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9cf0c526 NU |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (c) 2016, The Linux Foundation. All rights reserved. | |
4 | * Copyright (c) 2018, Craig Tatlor. | |
5 | */ | |
6 | ||
7 | #include <linux/module.h> | |
8 | #include <linux/of.h> | |
9 | #include <linux/platform_device.h> | |
10 | #include <linux/pinctrl/pinctrl.h> | |
11 | ||
12 | #include "pinctrl-msm.h" | |
13 | ||
14 | static const char * const sdm660_tiles[] = { | |
15 | "north", | |
16 | "center", | |
17 | "south" | |
18 | }; | |
19 | ||
20 | enum { | |
21 | NORTH, | |
22 | CENTER, | |
23 | SOUTH | |
24 | }; | |
25 | ||
26 | #define REG_SIZE 0x1000 | |
27 | ||
28 | #define FUNCTION(fname) \ | |
29 | [msm_mux_##fname] = { \ | |
30 | .name = #fname, \ | |
31 | .groups = fname##_groups, \ | |
32 | .ngroups = ARRAY_SIZE(fname##_groups), \ | |
33 | } | |
34 | ||
35 | ||
5db0b0a2 | 36 | #define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ |
9cf0c526 NU |
37 | { \ |
38 | .name = "gpio" #id, \ | |
39 | .pins = gpio##id##_pins, \ | |
40 | .npins = (unsigned)ARRAY_SIZE(gpio##id##_pins), \ | |
41 | .funcs = (int[]){ \ | |
42 | msm_mux_gpio, /* gpio mode */ \ | |
43 | msm_mux_##f1, \ | |
44 | msm_mux_##f2, \ | |
45 | msm_mux_##f3, \ | |
46 | msm_mux_##f4, \ | |
47 | msm_mux_##f5, \ | |
48 | msm_mux_##f6, \ | |
49 | msm_mux_##f7, \ | |
50 | msm_mux_##f8, \ | |
51 | msm_mux_##f9 \ | |
52 | }, \ | |
53 | .nfuncs = 10, \ | |
5db0b0a2 CT |
54 | .ctl_reg = REG_SIZE * id, \ |
55 | .io_reg = 0x4 + REG_SIZE * id, \ | |
56 | .intr_cfg_reg = 0x8 + REG_SIZE * id, \ | |
57 | .intr_status_reg = 0xc + REG_SIZE * id, \ | |
58 | .intr_target_reg = 0x8 + REG_SIZE * id, \ | |
59 | .tile = _tile, \ | |
9cf0c526 NU |
60 | .mux_bit = 2, \ |
61 | .pull_bit = 0, \ | |
62 | .drv_bit = 6, \ | |
63 | .oe_bit = 9, \ | |
64 | .in_bit = 0, \ | |
65 | .out_bit = 1, \ | |
66 | .intr_enable_bit = 0, \ | |
67 | .intr_status_bit = 0, \ | |
68 | .intr_target_bit = 5, \ | |
69 | .intr_target_kpss_val = 3, \ | |
70 | .intr_raw_status_bit = 4, \ | |
71 | .intr_polarity_bit = 1, \ | |
72 | .intr_detection_bit = 2, \ | |
73 | .intr_detection_width = 2, \ | |
74 | } | |
75 | ||
76 | #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ | |
77 | { \ | |
78 | .name = #pg_name, \ | |
79 | .pins = pg_name##_pins, \ | |
80 | .npins = (unsigned)ARRAY_SIZE(pg_name##_pins), \ | |
81 | .ctl_reg = ctl, \ | |
82 | .io_reg = 0, \ | |
83 | .intr_cfg_reg = 0, \ | |
84 | .intr_status_reg = 0, \ | |
85 | .intr_target_reg = 0, \ | |
5db0b0a2 | 86 | .tile = NORTH, \ |
9cf0c526 NU |
87 | .mux_bit = -1, \ |
88 | .pull_bit = pull, \ | |
89 | .drv_bit = drv, \ | |
90 | .oe_bit = -1, \ | |
91 | .in_bit = -1, \ | |
92 | .out_bit = -1, \ | |
93 | .intr_enable_bit = -1, \ | |
94 | .intr_status_bit = -1, \ | |
95 | .intr_target_bit = -1, \ | |
96 | .intr_raw_status_bit = -1, \ | |
97 | .intr_polarity_bit = -1, \ | |
98 | .intr_detection_bit = -1, \ | |
99 | .intr_detection_width = -1, \ | |
100 | } | |
101 | ||
102 | static const struct pinctrl_pin_desc sdm660_pins[] = { | |
103 | PINCTRL_PIN(0, "GPIO_0"), | |
104 | PINCTRL_PIN(1, "GPIO_1"), | |
105 | PINCTRL_PIN(2, "GPIO_2"), | |
106 | PINCTRL_PIN(3, "GPIO_3"), | |
107 | PINCTRL_PIN(4, "GPIO_4"), | |
108 | PINCTRL_PIN(5, "GPIO_5"), | |
109 | PINCTRL_PIN(6, "GPIO_6"), | |
110 | PINCTRL_PIN(7, "GPIO_7"), | |
111 | PINCTRL_PIN(8, "GPIO_8"), | |
112 | PINCTRL_PIN(9, "GPIO_9"), | |
113 | PINCTRL_PIN(10, "GPIO_10"), | |
114 | PINCTRL_PIN(11, "GPIO_11"), | |
115 | PINCTRL_PIN(12, "GPIO_12"), | |
116 | PINCTRL_PIN(13, "GPIO_13"), | |
117 | PINCTRL_PIN(14, "GPIO_14"), | |
118 | PINCTRL_PIN(15, "GPIO_15"), | |
119 | PINCTRL_PIN(16, "GPIO_16"), | |
120 | PINCTRL_PIN(17, "GPIO_17"), | |
121 | PINCTRL_PIN(18, "GPIO_18"), | |
122 | PINCTRL_PIN(19, "GPIO_19"), | |
123 | PINCTRL_PIN(20, "GPIO_20"), | |
124 | PINCTRL_PIN(21, "GPIO_21"), | |
125 | PINCTRL_PIN(22, "GPIO_22"), | |
126 | PINCTRL_PIN(23, "GPIO_23"), | |
127 | PINCTRL_PIN(24, "GPIO_24"), | |
128 | PINCTRL_PIN(25, "GPIO_25"), | |
129 | PINCTRL_PIN(26, "GPIO_26"), | |
130 | PINCTRL_PIN(27, "GPIO_27"), | |
131 | PINCTRL_PIN(28, "GPIO_28"), | |
132 | PINCTRL_PIN(29, "GPIO_29"), | |
133 | PINCTRL_PIN(30, "GPIO_30"), | |
134 | PINCTRL_PIN(31, "GPIO_31"), | |
135 | PINCTRL_PIN(32, "GPIO_32"), | |
136 | PINCTRL_PIN(33, "GPIO_33"), | |
137 | PINCTRL_PIN(34, "GPIO_34"), | |
138 | PINCTRL_PIN(35, "GPIO_35"), | |
139 | PINCTRL_PIN(36, "GPIO_36"), | |
140 | PINCTRL_PIN(37, "GPIO_37"), | |
141 | PINCTRL_PIN(38, "GPIO_38"), | |
142 | PINCTRL_PIN(39, "GPIO_39"), | |
143 | PINCTRL_PIN(40, "GPIO_40"), | |
144 | PINCTRL_PIN(41, "GPIO_41"), | |
145 | PINCTRL_PIN(42, "GPIO_42"), | |
146 | PINCTRL_PIN(43, "GPIO_43"), | |
147 | PINCTRL_PIN(44, "GPIO_44"), | |
148 | PINCTRL_PIN(45, "GPIO_45"), | |
149 | PINCTRL_PIN(46, "GPIO_46"), | |
150 | PINCTRL_PIN(47, "GPIO_47"), | |
151 | PINCTRL_PIN(48, "GPIO_48"), | |
152 | PINCTRL_PIN(49, "GPIO_49"), | |
153 | PINCTRL_PIN(50, "GPIO_50"), | |
154 | PINCTRL_PIN(51, "GPIO_51"), | |
155 | PINCTRL_PIN(52, "GPIO_52"), | |
156 | PINCTRL_PIN(53, "GPIO_53"), | |
157 | PINCTRL_PIN(54, "GPIO_54"), | |
158 | PINCTRL_PIN(55, "GPIO_55"), | |
159 | PINCTRL_PIN(56, "GPIO_56"), | |
160 | PINCTRL_PIN(57, "GPIO_57"), | |
161 | PINCTRL_PIN(58, "GPIO_58"), | |
162 | PINCTRL_PIN(59, "GPIO_59"), | |
163 | PINCTRL_PIN(60, "GPIO_60"), | |
164 | PINCTRL_PIN(61, "GPIO_61"), | |
165 | PINCTRL_PIN(62, "GPIO_62"), | |
166 | PINCTRL_PIN(63, "GPIO_63"), | |
167 | PINCTRL_PIN(64, "GPIO_64"), | |
168 | PINCTRL_PIN(65, "GPIO_65"), | |
169 | PINCTRL_PIN(66, "GPIO_66"), | |
170 | PINCTRL_PIN(67, "GPIO_67"), | |
171 | PINCTRL_PIN(68, "GPIO_68"), | |
172 | PINCTRL_PIN(69, "GPIO_69"), | |
173 | PINCTRL_PIN(70, "GPIO_70"), | |
174 | PINCTRL_PIN(71, "GPIO_71"), | |
175 | PINCTRL_PIN(72, "GPIO_72"), | |
176 | PINCTRL_PIN(73, "GPIO_73"), | |
177 | PINCTRL_PIN(74, "GPIO_74"), | |
178 | PINCTRL_PIN(75, "GPIO_75"), | |
179 | PINCTRL_PIN(76, "GPIO_76"), | |
180 | PINCTRL_PIN(77, "GPIO_77"), | |
181 | PINCTRL_PIN(78, "GPIO_78"), | |
182 | PINCTRL_PIN(79, "GPIO_79"), | |
183 | PINCTRL_PIN(80, "GPIO_80"), | |
184 | PINCTRL_PIN(81, "GPIO_81"), | |
185 | PINCTRL_PIN(82, "GPIO_82"), | |
186 | PINCTRL_PIN(83, "GPIO_83"), | |
187 | PINCTRL_PIN(84, "GPIO_84"), | |
188 | PINCTRL_PIN(85, "GPIO_85"), | |
189 | PINCTRL_PIN(86, "GPIO_86"), | |
190 | PINCTRL_PIN(87, "GPIO_87"), | |
191 | PINCTRL_PIN(88, "GPIO_88"), | |
192 | PINCTRL_PIN(89, "GPIO_89"), | |
193 | PINCTRL_PIN(90, "GPIO_90"), | |
194 | PINCTRL_PIN(91, "GPIO_91"), | |
195 | PINCTRL_PIN(92, "GPIO_92"), | |
196 | PINCTRL_PIN(93, "GPIO_93"), | |
197 | PINCTRL_PIN(94, "GPIO_94"), | |
198 | PINCTRL_PIN(95, "GPIO_95"), | |
199 | PINCTRL_PIN(96, "GPIO_96"), | |
200 | PINCTRL_PIN(97, "GPIO_97"), | |
201 | PINCTRL_PIN(98, "GPIO_98"), | |
202 | PINCTRL_PIN(99, "GPIO_99"), | |
203 | PINCTRL_PIN(100, "GPIO_100"), | |
204 | PINCTRL_PIN(101, "GPIO_101"), | |
205 | PINCTRL_PIN(102, "GPIO_102"), | |
206 | PINCTRL_PIN(103, "GPIO_103"), | |
207 | PINCTRL_PIN(104, "GPIO_104"), | |
208 | PINCTRL_PIN(105, "GPIO_105"), | |
209 | PINCTRL_PIN(106, "GPIO_106"), | |
210 | PINCTRL_PIN(107, "GPIO_107"), | |
211 | PINCTRL_PIN(108, "GPIO_108"), | |
212 | PINCTRL_PIN(109, "GPIO_109"), | |
213 | PINCTRL_PIN(110, "GPIO_110"), | |
214 | PINCTRL_PIN(111, "GPIO_111"), | |
215 | PINCTRL_PIN(112, "GPIO_112"), | |
216 | PINCTRL_PIN(113, "GPIO_113"), | |
217 | PINCTRL_PIN(114, "SDC1_CLK"), | |
218 | PINCTRL_PIN(115, "SDC1_CMD"), | |
219 | PINCTRL_PIN(116, "SDC1_DATA"), | |
220 | PINCTRL_PIN(117, "SDC2_CLK"), | |
221 | PINCTRL_PIN(118, "SDC2_CMD"), | |
222 | PINCTRL_PIN(119, "SDC2_DATA"), | |
223 | PINCTRL_PIN(120, "SDC1_RCLK"), | |
224 | }; | |
225 | ||
226 | #define DECLARE_MSM_GPIO_PINS(pin) \ | |
227 | static const unsigned int gpio##pin##_pins[] = { pin } | |
228 | DECLARE_MSM_GPIO_PINS(0); | |
229 | DECLARE_MSM_GPIO_PINS(1); | |
230 | DECLARE_MSM_GPIO_PINS(2); | |
231 | DECLARE_MSM_GPIO_PINS(3); | |
232 | DECLARE_MSM_GPIO_PINS(4); | |
233 | DECLARE_MSM_GPIO_PINS(5); | |
234 | DECLARE_MSM_GPIO_PINS(6); | |
235 | DECLARE_MSM_GPIO_PINS(7); | |
236 | DECLARE_MSM_GPIO_PINS(8); | |
237 | DECLARE_MSM_GPIO_PINS(9); | |
238 | DECLARE_MSM_GPIO_PINS(10); | |
239 | DECLARE_MSM_GPIO_PINS(11); | |
240 | DECLARE_MSM_GPIO_PINS(12); | |
241 | DECLARE_MSM_GPIO_PINS(13); | |
242 | DECLARE_MSM_GPIO_PINS(14); | |
243 | DECLARE_MSM_GPIO_PINS(15); | |
244 | DECLARE_MSM_GPIO_PINS(16); | |
245 | DECLARE_MSM_GPIO_PINS(17); | |
246 | DECLARE_MSM_GPIO_PINS(18); | |
247 | DECLARE_MSM_GPIO_PINS(19); | |
248 | DECLARE_MSM_GPIO_PINS(20); | |
249 | DECLARE_MSM_GPIO_PINS(21); | |
250 | DECLARE_MSM_GPIO_PINS(22); | |
251 | DECLARE_MSM_GPIO_PINS(23); | |
252 | DECLARE_MSM_GPIO_PINS(24); | |
253 | DECLARE_MSM_GPIO_PINS(25); | |
254 | DECLARE_MSM_GPIO_PINS(26); | |
255 | DECLARE_MSM_GPIO_PINS(27); | |
256 | DECLARE_MSM_GPIO_PINS(28); | |
257 | DECLARE_MSM_GPIO_PINS(29); | |
258 | DECLARE_MSM_GPIO_PINS(30); | |
259 | DECLARE_MSM_GPIO_PINS(31); | |
260 | DECLARE_MSM_GPIO_PINS(32); | |
261 | DECLARE_MSM_GPIO_PINS(33); | |
262 | DECLARE_MSM_GPIO_PINS(34); | |
263 | DECLARE_MSM_GPIO_PINS(35); | |
264 | DECLARE_MSM_GPIO_PINS(36); | |
265 | DECLARE_MSM_GPIO_PINS(37); | |
266 | DECLARE_MSM_GPIO_PINS(38); | |
267 | DECLARE_MSM_GPIO_PINS(39); | |
268 | DECLARE_MSM_GPIO_PINS(40); | |
269 | DECLARE_MSM_GPIO_PINS(41); | |
270 | DECLARE_MSM_GPIO_PINS(42); | |
271 | DECLARE_MSM_GPIO_PINS(43); | |
272 | DECLARE_MSM_GPIO_PINS(44); | |
273 | DECLARE_MSM_GPIO_PINS(45); | |
274 | DECLARE_MSM_GPIO_PINS(46); | |
275 | DECLARE_MSM_GPIO_PINS(47); | |
276 | DECLARE_MSM_GPIO_PINS(48); | |
277 | DECLARE_MSM_GPIO_PINS(49); | |
278 | DECLARE_MSM_GPIO_PINS(50); | |
279 | DECLARE_MSM_GPIO_PINS(51); | |
280 | DECLARE_MSM_GPIO_PINS(52); | |
281 | DECLARE_MSM_GPIO_PINS(53); | |
282 | DECLARE_MSM_GPIO_PINS(54); | |
283 | DECLARE_MSM_GPIO_PINS(55); | |
284 | DECLARE_MSM_GPIO_PINS(56); | |
285 | DECLARE_MSM_GPIO_PINS(57); | |
286 | DECLARE_MSM_GPIO_PINS(58); | |
287 | DECLARE_MSM_GPIO_PINS(59); | |
288 | DECLARE_MSM_GPIO_PINS(60); | |
289 | DECLARE_MSM_GPIO_PINS(61); | |
290 | DECLARE_MSM_GPIO_PINS(62); | |
291 | DECLARE_MSM_GPIO_PINS(63); | |
292 | DECLARE_MSM_GPIO_PINS(64); | |
293 | DECLARE_MSM_GPIO_PINS(65); | |
294 | DECLARE_MSM_GPIO_PINS(66); | |
295 | DECLARE_MSM_GPIO_PINS(67); | |
296 | DECLARE_MSM_GPIO_PINS(68); | |
297 | DECLARE_MSM_GPIO_PINS(69); | |
298 | DECLARE_MSM_GPIO_PINS(70); | |
299 | DECLARE_MSM_GPIO_PINS(71); | |
300 | DECLARE_MSM_GPIO_PINS(72); | |
301 | DECLARE_MSM_GPIO_PINS(73); | |
302 | DECLARE_MSM_GPIO_PINS(74); | |
303 | DECLARE_MSM_GPIO_PINS(75); | |
304 | DECLARE_MSM_GPIO_PINS(76); | |
305 | DECLARE_MSM_GPIO_PINS(77); | |
306 | DECLARE_MSM_GPIO_PINS(78); | |
307 | DECLARE_MSM_GPIO_PINS(79); | |
308 | DECLARE_MSM_GPIO_PINS(80); | |
309 | DECLARE_MSM_GPIO_PINS(81); | |
310 | DECLARE_MSM_GPIO_PINS(82); | |
311 | DECLARE_MSM_GPIO_PINS(83); | |
312 | DECLARE_MSM_GPIO_PINS(84); | |
313 | DECLARE_MSM_GPIO_PINS(85); | |
314 | DECLARE_MSM_GPIO_PINS(86); | |
315 | DECLARE_MSM_GPIO_PINS(87); | |
316 | DECLARE_MSM_GPIO_PINS(88); | |
317 | DECLARE_MSM_GPIO_PINS(89); | |
318 | DECLARE_MSM_GPIO_PINS(90); | |
319 | DECLARE_MSM_GPIO_PINS(91); | |
320 | DECLARE_MSM_GPIO_PINS(92); | |
321 | DECLARE_MSM_GPIO_PINS(93); | |
322 | DECLARE_MSM_GPIO_PINS(94); | |
323 | DECLARE_MSM_GPIO_PINS(95); | |
324 | DECLARE_MSM_GPIO_PINS(96); | |
325 | DECLARE_MSM_GPIO_PINS(97); | |
326 | DECLARE_MSM_GPIO_PINS(98); | |
327 | DECLARE_MSM_GPIO_PINS(99); | |
328 | DECLARE_MSM_GPIO_PINS(100); | |
329 | DECLARE_MSM_GPIO_PINS(101); | |
330 | DECLARE_MSM_GPIO_PINS(102); | |
331 | DECLARE_MSM_GPIO_PINS(103); | |
332 | DECLARE_MSM_GPIO_PINS(104); | |
333 | DECLARE_MSM_GPIO_PINS(105); | |
334 | DECLARE_MSM_GPIO_PINS(106); | |
335 | DECLARE_MSM_GPIO_PINS(107); | |
336 | DECLARE_MSM_GPIO_PINS(108); | |
337 | DECLARE_MSM_GPIO_PINS(109); | |
338 | DECLARE_MSM_GPIO_PINS(110); | |
339 | DECLARE_MSM_GPIO_PINS(111); | |
340 | DECLARE_MSM_GPIO_PINS(112); | |
341 | DECLARE_MSM_GPIO_PINS(113); | |
342 | ||
343 | static const unsigned int sdc1_clk_pins[] = { 114 }; | |
344 | static const unsigned int sdc1_cmd_pins[] = { 115 }; | |
345 | static const unsigned int sdc1_data_pins[] = { 116 }; | |
346 | static const unsigned int sdc1_rclk_pins[] = { 120 }; | |
347 | static const unsigned int sdc2_clk_pins[] = { 117 }; | |
348 | static const unsigned int sdc2_cmd_pins[] = { 118 }; | |
349 | static const unsigned int sdc2_data_pins[] = { 119 }; | |
350 | ||
351 | enum sdm660_functions { | |
352 | msm_mux_adsp_ext, | |
353 | msm_mux_agera_pll, | |
354 | msm_mux_atest_char, | |
355 | msm_mux_atest_char0, | |
356 | msm_mux_atest_char1, | |
357 | msm_mux_atest_char2, | |
358 | msm_mux_atest_char3, | |
359 | msm_mux_atest_gpsadc0, | |
360 | msm_mux_atest_gpsadc1, | |
361 | msm_mux_atest_tsens, | |
362 | msm_mux_atest_tsens2, | |
363 | msm_mux_atest_usb1, | |
364 | msm_mux_atest_usb10, | |
365 | msm_mux_atest_usb11, | |
366 | msm_mux_atest_usb12, | |
367 | msm_mux_atest_usb13, | |
368 | msm_mux_atest_usb2, | |
369 | msm_mux_atest_usb20, | |
370 | msm_mux_atest_usb21, | |
371 | msm_mux_atest_usb22, | |
372 | msm_mux_atest_usb23, | |
373 | msm_mux_audio_ref, | |
374 | msm_mux_bimc_dte0, | |
375 | msm_mux_bimc_dte1, | |
376 | msm_mux_blsp_i2c1, | |
377 | msm_mux_blsp_i2c2, | |
378 | msm_mux_blsp_i2c3, | |
379 | msm_mux_blsp_i2c4, | |
380 | msm_mux_blsp_i2c5, | |
381 | msm_mux_blsp_i2c6, | |
382 | msm_mux_blsp_i2c7, | |
383 | msm_mux_blsp_i2c8_a, | |
384 | msm_mux_blsp_i2c8_b, | |
385 | msm_mux_blsp_spi1, | |
386 | msm_mux_blsp_spi2, | |
387 | msm_mux_blsp_spi3, | |
388 | msm_mux_blsp_spi3_cs1, | |
389 | msm_mux_blsp_spi3_cs2, | |
390 | msm_mux_blsp_spi4, | |
391 | msm_mux_blsp_spi5, | |
392 | msm_mux_blsp_spi6, | |
393 | msm_mux_blsp_spi7, | |
394 | msm_mux_blsp_spi8_a, | |
395 | msm_mux_blsp_spi8_b, | |
396 | msm_mux_blsp_spi8_cs1, | |
397 | msm_mux_blsp_spi8_cs2, | |
398 | msm_mux_blsp_uart1, | |
399 | msm_mux_blsp_uart2, | |
400 | msm_mux_blsp_uart5, | |
401 | msm_mux_blsp_uart6_a, | |
402 | msm_mux_blsp_uart6_b, | |
403 | msm_mux_blsp_uim1, | |
404 | msm_mux_blsp_uim2, | |
405 | msm_mux_blsp_uim5, | |
406 | msm_mux_blsp_uim6, | |
407 | msm_mux_cam_mclk, | |
408 | msm_mux_cci_async, | |
409 | msm_mux_cci_i2c, | |
410 | msm_mux_cri_trng, | |
411 | msm_mux_cri_trng0, | |
412 | msm_mux_cri_trng1, | |
413 | msm_mux_dbg_out, | |
414 | msm_mux_ddr_bist, | |
415 | msm_mux_gcc_gp1, | |
416 | msm_mux_gcc_gp2, | |
417 | msm_mux_gcc_gp3, | |
418 | msm_mux_gpio, | |
419 | msm_mux_gps_tx_a, | |
420 | msm_mux_gps_tx_b, | |
421 | msm_mux_gps_tx_c, | |
422 | msm_mux_isense_dbg, | |
423 | msm_mux_jitter_bist, | |
424 | msm_mux_ldo_en, | |
425 | msm_mux_ldo_update, | |
426 | msm_mux_m_voc, | |
427 | msm_mux_mdp_vsync, | |
428 | msm_mux_mdss_vsync0, | |
429 | msm_mux_mdss_vsync1, | |
430 | msm_mux_mdss_vsync2, | |
431 | msm_mux_mdss_vsync3, | |
432 | msm_mux_mss_lte, | |
433 | msm_mux_nav_pps_a, | |
434 | msm_mux_nav_pps_b, | |
435 | msm_mux_nav_pps_c, | |
436 | msm_mux_pa_indicator, | |
437 | msm_mux_phase_flag0, | |
438 | msm_mux_phase_flag1, | |
439 | msm_mux_phase_flag2, | |
440 | msm_mux_phase_flag3, | |
441 | msm_mux_phase_flag4, | |
442 | msm_mux_phase_flag5, | |
443 | msm_mux_phase_flag6, | |
444 | msm_mux_phase_flag7, | |
445 | msm_mux_phase_flag8, | |
446 | msm_mux_phase_flag9, | |
447 | msm_mux_phase_flag10, | |
448 | msm_mux_phase_flag11, | |
449 | msm_mux_phase_flag12, | |
450 | msm_mux_phase_flag13, | |
451 | msm_mux_phase_flag14, | |
452 | msm_mux_phase_flag15, | |
453 | msm_mux_phase_flag16, | |
454 | msm_mux_phase_flag17, | |
455 | msm_mux_phase_flag18, | |
456 | msm_mux_phase_flag19, | |
457 | msm_mux_phase_flag20, | |
458 | msm_mux_phase_flag21, | |
459 | msm_mux_phase_flag22, | |
460 | msm_mux_phase_flag23, | |
461 | msm_mux_phase_flag24, | |
462 | msm_mux_phase_flag25, | |
463 | msm_mux_phase_flag26, | |
464 | msm_mux_phase_flag27, | |
465 | msm_mux_phase_flag28, | |
466 | msm_mux_phase_flag29, | |
467 | msm_mux_phase_flag30, | |
468 | msm_mux_phase_flag31, | |
469 | msm_mux_pll_bypassnl, | |
470 | msm_mux_pll_reset, | |
471 | msm_mux_pri_mi2s, | |
472 | msm_mux_pri_mi2s_ws, | |
473 | msm_mux_prng_rosc, | |
474 | msm_mux_pwr_crypto, | |
475 | msm_mux_pwr_modem, | |
476 | msm_mux_pwr_nav, | |
477 | msm_mux_qdss_cti0_a, | |
478 | msm_mux_qdss_cti0_b, | |
479 | msm_mux_qdss_cti1_a, | |
480 | msm_mux_qdss_cti1_b, | |
481 | msm_mux_qdss_gpio, | |
482 | msm_mux_qdss_gpio0, | |
483 | msm_mux_qdss_gpio1, | |
484 | msm_mux_qdss_gpio10, | |
485 | msm_mux_qdss_gpio11, | |
486 | msm_mux_qdss_gpio12, | |
487 | msm_mux_qdss_gpio13, | |
488 | msm_mux_qdss_gpio14, | |
489 | msm_mux_qdss_gpio15, | |
490 | msm_mux_qdss_gpio2, | |
491 | msm_mux_qdss_gpio3, | |
492 | msm_mux_qdss_gpio4, | |
493 | msm_mux_qdss_gpio5, | |
494 | msm_mux_qdss_gpio6, | |
495 | msm_mux_qdss_gpio7, | |
496 | msm_mux_qdss_gpio8, | |
497 | msm_mux_qdss_gpio9, | |
498 | msm_mux_qlink_enable, | |
499 | msm_mux_qlink_request, | |
500 | msm_mux_qspi_clk, | |
501 | msm_mux_qspi_cs, | |
502 | msm_mux_qspi_data0, | |
503 | msm_mux_qspi_data1, | |
504 | msm_mux_qspi_data2, | |
505 | msm_mux_qspi_data3, | |
506 | msm_mux_qspi_resetn, | |
507 | msm_mux_sec_mi2s, | |
508 | msm_mux_sndwire_clk, | |
509 | msm_mux_sndwire_data, | |
510 | msm_mux_sp_cmu, | |
511 | msm_mux_ssc_irq, | |
512 | msm_mux_tgu_ch0, | |
513 | msm_mux_tgu_ch1, | |
514 | msm_mux_tsense_pwm1, | |
515 | msm_mux_tsense_pwm2, | |
516 | msm_mux_uim1_clk, | |
517 | msm_mux_uim1_data, | |
518 | msm_mux_uim1_present, | |
519 | msm_mux_uim1_reset, | |
520 | msm_mux_uim2_clk, | |
521 | msm_mux_uim2_data, | |
522 | msm_mux_uim2_present, | |
523 | msm_mux_uim2_reset, | |
524 | msm_mux_uim_batt, | |
525 | msm_mux_vfr_1, | |
526 | msm_mux_vsense_clkout, | |
527 | msm_mux_vsense_data0, | |
528 | msm_mux_vsense_data1, | |
529 | msm_mux_vsense_mode, | |
530 | msm_mux_wlan1_adc0, | |
531 | msm_mux_wlan1_adc1, | |
532 | msm_mux_wlan2_adc0, | |
533 | msm_mux_wlan2_adc1, | |
534 | msm_mux__, | |
535 | }; | |
536 | ||
537 | static const char * const gpio_groups[] = { | |
538 | "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", | |
539 | "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", | |
540 | "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", | |
541 | "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", | |
542 | "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", | |
543 | "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", | |
544 | "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", | |
545 | "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", | |
546 | "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63", | |
547 | "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", | |
548 | "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", | |
549 | "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84", | |
550 | "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91", | |
551 | "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", | |
552 | "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104", | |
553 | "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110", | |
554 | "gpio111", "gpio112", "gpio113", | |
555 | }; | |
556 | ||
557 | static const char * const adsp_ext_groups[] = { | |
558 | "gpio65", | |
559 | }; | |
560 | static const char * const agera_pll_groups[] = { | |
561 | "gpio34", "gpio36", | |
562 | }; | |
563 | static const char * const atest_char0_groups[] = { | |
564 | "gpio62", | |
565 | }; | |
566 | static const char * const atest_char1_groups[] = { | |
567 | "gpio61", | |
568 | }; | |
569 | static const char * const atest_char2_groups[] = { | |
570 | "gpio60", | |
571 | }; | |
572 | static const char * const atest_char3_groups[] = { | |
573 | "gpio59", | |
574 | }; | |
575 | static const char * const atest_char_groups[] = { | |
576 | "gpio58", | |
577 | }; | |
578 | static const char * const atest_gpsadc0_groups[] = { | |
579 | "gpio1", | |
580 | }; | |
581 | static const char * const atest_gpsadc1_groups[] = { | |
582 | "gpio0", | |
583 | }; | |
584 | static const char * const atest_tsens2_groups[] = { | |
585 | "gpio3", | |
586 | }; | |
587 | static const char * const atest_tsens_groups[] = { | |
588 | "gpio36", | |
589 | }; | |
590 | static const char * const atest_usb10_groups[] = { | |
591 | "gpio11", | |
592 | }; | |
593 | static const char * const atest_usb11_groups[] = { | |
594 | "gpio10", | |
595 | }; | |
596 | static const char * const atest_usb12_groups[] = { | |
597 | "gpio9", | |
598 | }; | |
599 | static const char * const atest_usb13_groups[] = { | |
600 | "gpio8", | |
601 | }; | |
602 | static const char * const atest_usb1_groups[] = { | |
603 | "gpio3", | |
604 | }; | |
605 | static const char * const atest_usb20_groups[] = { | |
606 | "gpio56", | |
607 | }; | |
608 | static const char * const atest_usb21_groups[] = { | |
609 | "gpio36", | |
610 | }; | |
611 | static const char * const atest_usb22_groups[] = { | |
612 | "gpio57", | |
613 | }; | |
614 | static const char * const atest_usb23_groups[] = { | |
615 | "gpio37", | |
616 | }; | |
617 | static const char * const atest_usb2_groups[] = { | |
618 | "gpio35", | |
619 | }; | |
620 | static const char * const audio_ref_groups[] = { | |
621 | "gpio62", | |
622 | }; | |
623 | static const char * const bimc_dte0_groups[] = { | |
624 | "gpio9", "gpio11", | |
625 | }; | |
626 | static const char * const bimc_dte1_groups[] = { | |
627 | "gpio8", "gpio10", | |
628 | }; | |
629 | static const char * const blsp_i2c1_groups[] = { | |
630 | "gpio2", "gpio3", | |
631 | }; | |
632 | static const char * const blsp_i2c2_groups[] = { | |
633 | "gpio6", "gpio7", | |
634 | }; | |
635 | static const char * const blsp_i2c3_groups[] = { | |
636 | "gpio10", "gpio11", | |
637 | }; | |
638 | static const char * const blsp_i2c4_groups[] = { | |
639 | "gpio14", "gpio15", | |
640 | }; | |
641 | static const char * const blsp_i2c5_groups[] = { | |
642 | "gpio18", "gpio19", | |
643 | }; | |
644 | static const char * const blsp_i2c6_groups[] = { | |
645 | "gpio22", "gpio23", | |
646 | }; | |
647 | static const char * const blsp_i2c7_groups[] = { | |
648 | "gpio26", "gpio27", | |
649 | }; | |
650 | static const char * const blsp_i2c8_a_groups[] = { | |
651 | "gpio30", "gpio31", | |
652 | }; | |
653 | static const char * const blsp_i2c8_b_groups[] = { | |
654 | "gpio44", "gpio52", | |
655 | }; | |
656 | static const char * const blsp_spi1_groups[] = { | |
657 | "gpio0", "gpio1", "gpio2", "gpio3", "gpio46", | |
658 | }; | |
659 | static const char * const blsp_spi2_groups[] = { | |
660 | "gpio4", "gpio5", "gpio6", "gpio7", | |
661 | }; | |
662 | static const char * const blsp_spi3_cs1_groups[] = { | |
663 | "gpio30", | |
664 | }; | |
665 | static const char * const blsp_spi3_cs2_groups[] = { | |
666 | "gpio65", | |
667 | }; | |
668 | static const char * const blsp_spi3_groups[] = { | |
669 | "gpio8", "gpio9", "gpio10", "gpio11", | |
670 | }; | |
671 | static const char * const blsp_spi4_groups[] = { | |
672 | "gpio12", "gpio13", "gpio14", "gpio15", | |
673 | }; | |
674 | static const char * const blsp_spi5_groups[] = { | |
675 | "gpio16", "gpio17", "gpio18", "gpio19", | |
676 | }; | |
677 | static const char * const blsp_spi6_groups[] = { | |
678 | "gpio49", "gpio52", "gpio22", "gpio23", | |
679 | }; | |
680 | static const char * const blsp_spi7_groups[] = { | |
681 | "gpio24", "gpio25", "gpio26", "gpio27", | |
682 | }; | |
683 | static const char * const blsp_spi8_a_groups[] = { | |
684 | "gpio28", "gpio29", "gpio30", "gpio31", | |
685 | }; | |
686 | static const char * const blsp_spi8_b_groups[] = { | |
687 | "gpio40", "gpio41", "gpio44", "gpio52", | |
688 | }; | |
689 | static const char * const blsp_spi8_cs1_groups[] = { | |
690 | "gpio64", | |
691 | }; | |
692 | static const char * const blsp_spi8_cs2_groups[] = { | |
693 | "gpio76", | |
694 | }; | |
695 | static const char * const blsp_uart1_groups[] = { | |
696 | "gpio0", "gpio1", "gpio2", "gpio3", | |
697 | }; | |
698 | static const char * const blsp_uart2_groups[] = { | |
699 | "gpio4", "gpio5", "gpio6", "gpio7", | |
700 | }; | |
701 | static const char * const blsp_uart5_groups[] = { | |
702 | "gpio16", "gpio17", "gpio18", "gpio19", | |
703 | }; | |
704 | static const char * const blsp_uart6_a_groups[] = { | |
705 | "gpio24", "gpio25", "gpio26", "gpio27", | |
706 | }; | |
707 | static const char * const blsp_uart6_b_groups[] = { | |
708 | "gpio28", "gpio29", "gpio30", "gpio31", | |
709 | }; | |
710 | static const char * const blsp_uim1_groups[] = { | |
711 | "gpio0", "gpio1", | |
712 | }; | |
713 | static const char * const blsp_uim2_groups[] = { | |
714 | "gpio4", "gpio5", | |
715 | }; | |
716 | static const char * const blsp_uim5_groups[] = { | |
717 | "gpio16", "gpio17", | |
718 | }; | |
719 | static const char * const blsp_uim6_groups[] = { | |
720 | "gpio20", "gpio21", | |
721 | }; | |
722 | static const char * const cam_mclk_groups[] = { | |
723 | "gpio32", "gpio33", "gpio34", "gpio35", | |
724 | }; | |
725 | static const char * const cci_async_groups[] = { | |
726 | "gpio45", | |
727 | }; | |
728 | static const char * const cci_i2c_groups[] = { | |
729 | "gpio36", "gpio37", "gpio38", "gpio39", | |
730 | }; | |
731 | static const char * const cri_trng0_groups[] = { | |
732 | "gpio60", | |
733 | }; | |
734 | static const char * const cri_trng1_groups[] = { | |
735 | "gpio61", | |
736 | }; | |
737 | static const char * const cri_trng_groups[] = { | |
738 | "gpio62", | |
739 | }; | |
740 | static const char * const dbg_out_groups[] = { | |
741 | "gpio11", | |
742 | }; | |
743 | static const char * const ddr_bist_groups[] = { | |
744 | "gpio3", "gpio8", "gpio9", "gpio10", | |
745 | }; | |
746 | static const char * const gcc_gp1_groups[] = { | |
747 | "gpio57", "gpio78", | |
748 | }; | |
749 | static const char * const gcc_gp2_groups[] = { | |
750 | "gpio58", "gpio81", | |
751 | }; | |
752 | static const char * const gcc_gp3_groups[] = { | |
753 | "gpio59", "gpio82", | |
754 | }; | |
755 | static const char * const gps_tx_a_groups[] = { | |
756 | "gpio65", | |
757 | }; | |
758 | static const char * const gps_tx_b_groups[] = { | |
759 | "gpio98", | |
760 | }; | |
761 | static const char * const gps_tx_c_groups[] = { | |
762 | "gpio80", | |
763 | }; | |
764 | static const char * const isense_dbg_groups[] = { | |
765 | "gpio68", | |
766 | }; | |
767 | static const char * const jitter_bist_groups[] = { | |
768 | "gpio35", | |
769 | }; | |
770 | static const char * const ldo_en_groups[] = { | |
771 | "gpio97", | |
772 | }; | |
773 | static const char * const ldo_update_groups[] = { | |
774 | "gpio98", | |
775 | }; | |
776 | static const char * const m_voc_groups[] = { | |
777 | "gpio28", | |
778 | }; | |
779 | static const char * const mdp_vsync_groups[] = { | |
780 | "gpio59", "gpio74", | |
781 | }; | |
782 | static const char * const mdss_vsync0_groups[] = { | |
783 | "gpio42", | |
784 | }; | |
785 | static const char * const mdss_vsync1_groups[] = { | |
786 | "gpio42", | |
787 | }; | |
788 | static const char * const mdss_vsync2_groups[] = { | |
789 | "gpio42", | |
790 | }; | |
791 | static const char * const mdss_vsync3_groups[] = { | |
792 | "gpio42", | |
793 | }; | |
794 | static const char * const mss_lte_groups[] = { | |
795 | "gpio81", "gpio82", | |
796 | }; | |
797 | static const char * const nav_pps_a_groups[] = { | |
798 | "gpio65", | |
799 | }; | |
800 | static const char * const nav_pps_b_groups[] = { | |
801 | "gpio98", | |
802 | }; | |
803 | static const char * const nav_pps_c_groups[] = { | |
804 | "gpio80", | |
805 | }; | |
806 | static const char * const pa_indicator_groups[] = { | |
807 | "gpio92", | |
808 | }; | |
809 | static const char * const phase_flag0_groups[] = { | |
810 | "gpio68", | |
811 | }; | |
812 | static const char * const phase_flag1_groups[] = { | |
813 | "gpio48", | |
814 | }; | |
815 | static const char * const phase_flag2_groups[] = { | |
816 | "gpio49", | |
817 | }; | |
818 | static const char * const phase_flag3_groups[] = { | |
819 | "gpio4", | |
820 | }; | |
821 | static const char * const phase_flag4_groups[] = { | |
822 | "gpio57", | |
823 | }; | |
824 | static const char * const phase_flag5_groups[] = { | |
825 | "gpio17", | |
826 | }; | |
827 | static const char * const phase_flag6_groups[] = { | |
828 | "gpio53", | |
829 | }; | |
830 | static const char * const phase_flag7_groups[] = { | |
831 | "gpio69", | |
832 | }; | |
833 | static const char * const phase_flag8_groups[] = { | |
834 | "gpio70", | |
835 | }; | |
836 | static const char * const phase_flag9_groups[] = { | |
837 | "gpio50", | |
838 | }; | |
839 | static const char * const phase_flag10_groups[] = { | |
840 | "gpio56", | |
841 | }; | |
842 | static const char * const phase_flag11_groups[] = { | |
843 | "gpio21", | |
844 | }; | |
845 | static const char * const phase_flag12_groups[] = { | |
846 | "gpio22", | |
847 | }; | |
848 | static const char * const phase_flag13_groups[] = { | |
849 | "gpio23", | |
850 | }; | |
851 | static const char * const phase_flag14_groups[] = { | |
852 | "gpio5", | |
853 | }; | |
854 | static const char * const phase_flag15_groups[] = { | |
855 | "gpio51", | |
856 | }; | |
857 | static const char * const phase_flag16_groups[] = { | |
858 | "gpio52", | |
859 | }; | |
860 | static const char * const phase_flag17_groups[] = { | |
861 | "gpio24", | |
862 | }; | |
863 | static const char * const phase_flag18_groups[] = { | |
864 | "gpio25", | |
865 | }; | |
866 | static const char * const phase_flag19_groups[] = { | |
867 | "gpio26", | |
868 | }; | |
869 | static const char * const phase_flag20_groups[] = { | |
870 | "gpio27", | |
871 | }; | |
872 | static const char * const phase_flag21_groups[] = { | |
873 | "gpio28", | |
874 | }; | |
875 | static const char * const phase_flag22_groups[] = { | |
876 | "gpio29", | |
877 | }; | |
878 | static const char * const phase_flag23_groups[] = { | |
879 | "gpio30", | |
880 | }; | |
881 | static const char * const phase_flag24_groups[] = { | |
882 | "gpio31", | |
883 | }; | |
884 | static const char * const phase_flag25_groups[] = { | |
885 | "gpio55", | |
886 | }; | |
887 | static const char * const phase_flag26_groups[] = { | |
888 | "gpio12", | |
889 | }; | |
890 | static const char * const phase_flag27_groups[] = { | |
891 | "gpio13", | |
892 | }; | |
893 | static const char * const phase_flag28_groups[] = { | |
894 | "gpio14", | |
895 | }; | |
896 | static const char * const phase_flag29_groups[] = { | |
897 | "gpio54", | |
898 | }; | |
899 | static const char * const phase_flag30_groups[] = { | |
900 | "gpio47", | |
901 | }; | |
902 | static const char * const phase_flag31_groups[] = { | |
903 | "gpio6", | |
904 | }; | |
905 | static const char * const pll_bypassnl_groups[] = { | |
906 | "gpio36", | |
907 | }; | |
908 | static const char * const pll_reset_groups[] = { | |
909 | "gpio37", | |
910 | }; | |
911 | static const char * const pri_mi2s_groups[] = { | |
912 | "gpio12", "gpio14", "gpio15", "gpio61", | |
913 | }; | |
914 | static const char * const pri_mi2s_ws_groups[] = { | |
915 | "gpio13", | |
916 | }; | |
917 | static const char * const prng_rosc_groups[] = { | |
918 | "gpio102", | |
919 | }; | |
920 | static const char * const pwr_crypto_groups[] = { | |
921 | "gpio33", | |
922 | }; | |
923 | static const char * const pwr_modem_groups[] = { | |
924 | "gpio31", | |
925 | }; | |
926 | static const char * const pwr_nav_groups[] = { | |
927 | "gpio32", | |
928 | }; | |
929 | static const char * const qdss_cti0_a_groups[] = { | |
930 | "gpio49", "gpio50", | |
931 | }; | |
932 | static const char * const qdss_cti0_b_groups[] = { | |
933 | "gpio13", "gpio21", | |
934 | }; | |
935 | static const char * const qdss_cti1_a_groups[] = { | |
936 | "gpio53", "gpio55", | |
937 | }; | |
938 | static const char * const qdss_cti1_b_groups[] = { | |
939 | "gpio12", "gpio66", | |
940 | }; | |
941 | static const char * const qdss_gpio0_groups[] = { | |
942 | "gpio32", "gpio67", | |
943 | }; | |
944 | static const char * const qdss_gpio10_groups[] = { | |
945 | "gpio43", "gpio77", | |
946 | }; | |
947 | static const char * const qdss_gpio11_groups[] = { | |
948 | "gpio44", "gpio79", | |
949 | }; | |
950 | static const char * const qdss_gpio12_groups[] = { | |
951 | "gpio45", "gpio80", | |
952 | }; | |
953 | static const char * const qdss_gpio13_groups[] = { | |
954 | "gpio46", "gpio78", | |
955 | }; | |
956 | static const char * const qdss_gpio14_groups[] = { | |
957 | "gpio47", "gpio72", | |
958 | }; | |
959 | static const char * const qdss_gpio15_groups[] = { | |
960 | "gpio48", "gpio73", | |
961 | }; | |
962 | static const char * const qdss_gpio1_groups[] = { | |
963 | "gpio33", "gpio63", | |
964 | }; | |
965 | static const char * const qdss_gpio2_groups[] = { | |
966 | "gpio34", "gpio64", | |
967 | }; | |
968 | static const char * const qdss_gpio3_groups[] = { | |
969 | "gpio35", "gpio56", | |
970 | }; | |
971 | static const char * const qdss_gpio4_groups[] = { | |
972 | "gpio0", "gpio36", | |
973 | }; | |
974 | static const char * const qdss_gpio5_groups[] = { | |
975 | "gpio1", "gpio37", | |
976 | }; | |
977 | static const char * const qdss_gpio6_groups[] = { | |
978 | "gpio38", "gpio70", | |
979 | }; | |
980 | static const char * const qdss_gpio7_groups[] = { | |
981 | "gpio39", "gpio71", | |
982 | }; | |
983 | static const char * const qdss_gpio8_groups[] = { | |
984 | "gpio51", "gpio75", | |
985 | }; | |
986 | static const char * const qdss_gpio9_groups[] = { | |
987 | "gpio42", "gpio76", | |
988 | }; | |
989 | static const char * const qdss_gpio_groups[] = { | |
990 | "gpio31", "gpio52", "gpio68", "gpio69", | |
991 | }; | |
992 | static const char * const qlink_enable_groups[] = { | |
993 | "gpio100", | |
994 | }; | |
995 | static const char * const qlink_request_groups[] = { | |
996 | "gpio99", | |
997 | }; | |
998 | static const char * const qspi_clk_groups[] = { | |
999 | "gpio47", | |
1000 | }; | |
1001 | static const char * const qspi_cs_groups[] = { | |
1002 | "gpio43", "gpio50", | |
1003 | }; | |
1004 | static const char * const qspi_data0_groups[] = { | |
1005 | "gpio33", | |
1006 | }; | |
1007 | static const char * const qspi_data1_groups[] = { | |
1008 | "gpio34", | |
1009 | }; | |
1010 | static const char * const qspi_data2_groups[] = { | |
1011 | "gpio35", | |
1012 | }; | |
1013 | static const char * const qspi_data3_groups[] = { | |
1014 | "gpio51", | |
1015 | }; | |
1016 | static const char * const qspi_resetn_groups[] = { | |
1017 | "gpio48", | |
1018 | }; | |
1019 | static const char * const sec_mi2s_groups[] = { | |
1020 | "gpio24", "gpio25", "gpio26", "gpio27", "gpio62", | |
1021 | }; | |
1022 | static const char * const sndwire_clk_groups[] = { | |
1023 | "gpio24", | |
1024 | }; | |
1025 | static const char * const sndwire_data_groups[] = { | |
1026 | "gpio25", | |
1027 | }; | |
1028 | static const char * const sp_cmu_groups[] = { | |
1029 | "gpio64", | |
1030 | }; | |
1031 | static const char * const ssc_irq_groups[] = { | |
1032 | "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", "gpio72", "gpio74", | |
1033 | "gpio75", "gpio76", | |
1034 | }; | |
1035 | static const char * const tgu_ch0_groups[] = { | |
1036 | "gpio0", | |
1037 | }; | |
1038 | static const char * const tgu_ch1_groups[] = { | |
1039 | "gpio1", | |
1040 | }; | |
1041 | static const char * const tsense_pwm1_groups[] = { | |
1042 | "gpio71", | |
1043 | }; | |
1044 | static const char * const tsense_pwm2_groups[] = { | |
1045 | "gpio71", | |
1046 | }; | |
1047 | static const char * const uim1_clk_groups[] = { | |
1048 | "gpio88", | |
1049 | }; | |
1050 | static const char * const uim1_data_groups[] = { | |
1051 | "gpio87", | |
1052 | }; | |
1053 | static const char * const uim1_present_groups[] = { | |
1054 | "gpio90", | |
1055 | }; | |
1056 | static const char * const uim1_reset_groups[] = { | |
1057 | "gpio89", | |
1058 | }; | |
1059 | static const char * const uim2_clk_groups[] = { | |
1060 | "gpio84", | |
1061 | }; | |
1062 | static const char * const uim2_data_groups[] = { | |
1063 | "gpio83", | |
1064 | }; | |
1065 | static const char * const uim2_present_groups[] = { | |
1066 | "gpio86", | |
1067 | }; | |
1068 | static const char * const uim2_reset_groups[] = { | |
1069 | "gpio85", | |
1070 | }; | |
1071 | static const char * const uim_batt_groups[] = { | |
1072 | "gpio91", | |
1073 | }; | |
1074 | static const char * const vfr_1_groups[] = { | |
1075 | "gpio27", | |
1076 | }; | |
1077 | static const char * const vsense_clkout_groups[] = { | |
1078 | "gpio24", | |
1079 | }; | |
1080 | static const char * const vsense_data0_groups[] = { | |
1081 | "gpio21", | |
1082 | }; | |
1083 | static const char * const vsense_data1_groups[] = { | |
1084 | "gpio22", | |
1085 | }; | |
1086 | static const char * const vsense_mode_groups[] = { | |
1087 | "gpio23", | |
1088 | }; | |
1089 | static const char * const wlan1_adc0_groups[] = { | |
1090 | "gpio9", | |
1091 | }; | |
1092 | static const char * const wlan1_adc1_groups[] = { | |
1093 | "gpio8", | |
1094 | }; | |
1095 | static const char * const wlan2_adc0_groups[] = { | |
1096 | "gpio11", | |
1097 | }; | |
1098 | static const char * const wlan2_adc1_groups[] = { | |
1099 | "gpio10", | |
1100 | }; | |
1101 | ||
1102 | static const struct msm_function sdm660_functions[] = { | |
1103 | FUNCTION(adsp_ext), | |
1104 | FUNCTION(agera_pll), | |
1105 | FUNCTION(atest_char), | |
1106 | FUNCTION(atest_char0), | |
1107 | FUNCTION(atest_char1), | |
1108 | FUNCTION(atest_char2), | |
1109 | FUNCTION(atest_char3), | |
1110 | FUNCTION(atest_gpsadc0), | |
1111 | FUNCTION(atest_gpsadc1), | |
1112 | FUNCTION(atest_tsens), | |
1113 | FUNCTION(atest_tsens2), | |
1114 | FUNCTION(atest_usb1), | |
1115 | FUNCTION(atest_usb10), | |
1116 | FUNCTION(atest_usb11), | |
1117 | FUNCTION(atest_usb12), | |
1118 | FUNCTION(atest_usb13), | |
1119 | FUNCTION(atest_usb2), | |
1120 | FUNCTION(atest_usb20), | |
1121 | FUNCTION(atest_usb21), | |
1122 | FUNCTION(atest_usb22), | |
1123 | FUNCTION(atest_usb23), | |
1124 | FUNCTION(audio_ref), | |
1125 | FUNCTION(bimc_dte0), | |
1126 | FUNCTION(bimc_dte1), | |
1127 | FUNCTION(blsp_i2c1), | |
1128 | FUNCTION(blsp_i2c2), | |
1129 | FUNCTION(blsp_i2c3), | |
1130 | FUNCTION(blsp_i2c4), | |
1131 | FUNCTION(blsp_i2c5), | |
1132 | FUNCTION(blsp_i2c6), | |
1133 | FUNCTION(blsp_i2c7), | |
1134 | FUNCTION(blsp_i2c8_a), | |
1135 | FUNCTION(blsp_i2c8_b), | |
1136 | FUNCTION(blsp_spi1), | |
1137 | FUNCTION(blsp_spi2), | |
1138 | FUNCTION(blsp_spi3), | |
1139 | FUNCTION(blsp_spi3_cs1), | |
1140 | FUNCTION(blsp_spi3_cs2), | |
1141 | FUNCTION(blsp_spi4), | |
1142 | FUNCTION(blsp_spi5), | |
1143 | FUNCTION(blsp_spi6), | |
1144 | FUNCTION(blsp_spi7), | |
1145 | FUNCTION(blsp_spi8_a), | |
1146 | FUNCTION(blsp_spi8_b), | |
1147 | FUNCTION(blsp_spi8_cs1), | |
1148 | FUNCTION(blsp_spi8_cs2), | |
1149 | FUNCTION(blsp_uart1), | |
1150 | FUNCTION(blsp_uart2), | |
1151 | FUNCTION(blsp_uart5), | |
1152 | FUNCTION(blsp_uart6_a), | |
1153 | FUNCTION(blsp_uart6_b), | |
1154 | FUNCTION(blsp_uim1), | |
1155 | FUNCTION(blsp_uim2), | |
1156 | FUNCTION(blsp_uim5), | |
1157 | FUNCTION(blsp_uim6), | |
1158 | FUNCTION(cam_mclk), | |
1159 | FUNCTION(cci_async), | |
1160 | FUNCTION(cci_i2c), | |
1161 | FUNCTION(cri_trng), | |
1162 | FUNCTION(cri_trng0), | |
1163 | FUNCTION(cri_trng1), | |
1164 | FUNCTION(dbg_out), | |
1165 | FUNCTION(ddr_bist), | |
1166 | FUNCTION(gcc_gp1), | |
1167 | FUNCTION(gcc_gp2), | |
1168 | FUNCTION(gcc_gp3), | |
1169 | FUNCTION(gpio), | |
1170 | FUNCTION(gps_tx_a), | |
1171 | FUNCTION(gps_tx_b), | |
1172 | FUNCTION(gps_tx_c), | |
1173 | FUNCTION(isense_dbg), | |
1174 | FUNCTION(jitter_bist), | |
1175 | FUNCTION(ldo_en), | |
1176 | FUNCTION(ldo_update), | |
1177 | FUNCTION(m_voc), | |
1178 | FUNCTION(mdp_vsync), | |
1179 | FUNCTION(mdss_vsync0), | |
1180 | FUNCTION(mdss_vsync1), | |
1181 | FUNCTION(mdss_vsync2), | |
1182 | FUNCTION(mdss_vsync3), | |
1183 | FUNCTION(mss_lte), | |
1184 | FUNCTION(nav_pps_a), | |
1185 | FUNCTION(nav_pps_b), | |
1186 | FUNCTION(nav_pps_c), | |
1187 | FUNCTION(pa_indicator), | |
1188 | FUNCTION(phase_flag0), | |
1189 | FUNCTION(phase_flag1), | |
1190 | FUNCTION(phase_flag2), | |
1191 | FUNCTION(phase_flag3), | |
1192 | FUNCTION(phase_flag4), | |
1193 | FUNCTION(phase_flag5), | |
1194 | FUNCTION(phase_flag6), | |
1195 | FUNCTION(phase_flag7), | |
1196 | FUNCTION(phase_flag8), | |
1197 | FUNCTION(phase_flag9), | |
1198 | FUNCTION(phase_flag10), | |
1199 | FUNCTION(phase_flag11), | |
1200 | FUNCTION(phase_flag12), | |
1201 | FUNCTION(phase_flag13), | |
1202 | FUNCTION(phase_flag14), | |
1203 | FUNCTION(phase_flag15), | |
1204 | FUNCTION(phase_flag16), | |
1205 | FUNCTION(phase_flag17), | |
1206 | FUNCTION(phase_flag18), | |
1207 | FUNCTION(phase_flag19), | |
1208 | FUNCTION(phase_flag20), | |
1209 | FUNCTION(phase_flag21), | |
1210 | FUNCTION(phase_flag22), | |
1211 | FUNCTION(phase_flag23), | |
1212 | FUNCTION(phase_flag24), | |
1213 | FUNCTION(phase_flag25), | |
1214 | FUNCTION(phase_flag26), | |
1215 | FUNCTION(phase_flag27), | |
1216 | FUNCTION(phase_flag28), | |
1217 | FUNCTION(phase_flag29), | |
1218 | FUNCTION(phase_flag30), | |
1219 | FUNCTION(phase_flag31), | |
1220 | FUNCTION(pll_bypassnl), | |
1221 | FUNCTION(pll_reset), | |
1222 | FUNCTION(pri_mi2s), | |
1223 | FUNCTION(pri_mi2s_ws), | |
1224 | FUNCTION(prng_rosc), | |
1225 | FUNCTION(pwr_crypto), | |
1226 | FUNCTION(pwr_modem), | |
1227 | FUNCTION(pwr_nav), | |
1228 | FUNCTION(qdss_cti0_a), | |
1229 | FUNCTION(qdss_cti0_b), | |
1230 | FUNCTION(qdss_cti1_a), | |
1231 | FUNCTION(qdss_cti1_b), | |
1232 | FUNCTION(qdss_gpio), | |
1233 | FUNCTION(qdss_gpio0), | |
1234 | FUNCTION(qdss_gpio1), | |
1235 | FUNCTION(qdss_gpio10), | |
1236 | FUNCTION(qdss_gpio11), | |
1237 | FUNCTION(qdss_gpio12), | |
1238 | FUNCTION(qdss_gpio13), | |
1239 | FUNCTION(qdss_gpio14), | |
1240 | FUNCTION(qdss_gpio15), | |
1241 | FUNCTION(qdss_gpio2), | |
1242 | FUNCTION(qdss_gpio3), | |
1243 | FUNCTION(qdss_gpio4), | |
1244 | FUNCTION(qdss_gpio5), | |
1245 | FUNCTION(qdss_gpio6), | |
1246 | FUNCTION(qdss_gpio7), | |
1247 | FUNCTION(qdss_gpio8), | |
1248 | FUNCTION(qdss_gpio9), | |
1249 | FUNCTION(qlink_enable), | |
1250 | FUNCTION(qlink_request), | |
1251 | FUNCTION(qspi_clk), | |
1252 | FUNCTION(qspi_cs), | |
1253 | FUNCTION(qspi_data0), | |
1254 | FUNCTION(qspi_data1), | |
1255 | FUNCTION(qspi_data2), | |
1256 | FUNCTION(qspi_data3), | |
1257 | FUNCTION(qspi_resetn), | |
1258 | FUNCTION(sec_mi2s), | |
1259 | FUNCTION(sndwire_clk), | |
1260 | FUNCTION(sndwire_data), | |
1261 | FUNCTION(sp_cmu), | |
1262 | FUNCTION(ssc_irq), | |
1263 | FUNCTION(tgu_ch0), | |
1264 | FUNCTION(tgu_ch1), | |
1265 | FUNCTION(tsense_pwm1), | |
1266 | FUNCTION(tsense_pwm2), | |
1267 | FUNCTION(uim1_clk), | |
1268 | FUNCTION(uim1_data), | |
1269 | FUNCTION(uim1_present), | |
1270 | FUNCTION(uim1_reset), | |
1271 | FUNCTION(uim2_clk), | |
1272 | FUNCTION(uim2_data), | |
1273 | FUNCTION(uim2_present), | |
1274 | FUNCTION(uim2_reset), | |
1275 | FUNCTION(uim_batt), | |
1276 | FUNCTION(vfr_1), | |
1277 | FUNCTION(vsense_clkout), | |
1278 | FUNCTION(vsense_data0), | |
1279 | FUNCTION(vsense_data1), | |
1280 | FUNCTION(vsense_mode), | |
1281 | FUNCTION(wlan1_adc0), | |
1282 | FUNCTION(wlan1_adc1), | |
1283 | FUNCTION(wlan2_adc0), | |
1284 | FUNCTION(wlan2_adc1), | |
1285 | }; | |
1286 | ||
1287 | static const struct msm_pingroup sdm660_groups[] = { | |
1288 | PINGROUP(0, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch0, _, _, qdss_gpio4, atest_gpsadc1, _), | |
1289 | PINGROUP(1, SOUTH, blsp_spi1, blsp_uart1, blsp_uim1, tgu_ch1, _, _, qdss_gpio5, atest_gpsadc0, _), | |
1290 | PINGROUP(2, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, _, _, _, _, _, _), | |
1291 | PINGROUP(3, SOUTH, blsp_spi1, blsp_uart1, blsp_i2c1, ddr_bist, _, _, atest_tsens2, atest_usb1, _), | |
1292 | PINGROUP(4, NORTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag3, _, _, _, _, _), | |
1293 | PINGROUP(5, SOUTH, blsp_spi2, blsp_uim2, blsp_uart2, phase_flag14, _, _, _, _, _), | |
1294 | PINGROUP(6, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, phase_flag31, _, _, _, _, _), | |
1295 | PINGROUP(7, SOUTH, blsp_spi2, blsp_i2c2, blsp_uart2, _, _, _, _, _, _), | |
1296 | PINGROUP(8, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc1, atest_usb13, bimc_dte1, _), | |
1297 | PINGROUP(9, NORTH, blsp_spi3, ddr_bist, _, _, _, wlan1_adc0, atest_usb12, bimc_dte0, _), | |
1298 | PINGROUP(10, NORTH, blsp_spi3, blsp_i2c3, ddr_bist, _, _, wlan2_adc1, atest_usb11, bimc_dte1, _), | |
1299 | PINGROUP(11, NORTH, blsp_spi3, blsp_i2c3, _, dbg_out, wlan2_adc0, atest_usb10, bimc_dte0, _, _), | |
1300 | PINGROUP(12, NORTH, blsp_spi4, pri_mi2s, _, phase_flag26, qdss_cti1_b, _, _, _, _), | |
1301 | PINGROUP(13, NORTH, blsp_spi4, _, pri_mi2s_ws, _, _, phase_flag27, qdss_cti0_b, _, _), | |
1302 | PINGROUP(14, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, phase_flag28, _, _, _, _), | |
1303 | PINGROUP(15, NORTH, blsp_spi4, blsp_i2c4, pri_mi2s, _, _, _, _, _, _), | |
1304 | PINGROUP(16, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, _, _, _, _, _), | |
1305 | PINGROUP(17, CENTER, blsp_uart5, blsp_spi5, blsp_uim5, _, phase_flag5, _, _, _, _), | |
1306 | PINGROUP(18, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _), | |
1307 | PINGROUP(19, CENTER, blsp_uart5, blsp_spi5, blsp_i2c5, _, _, _, _, _, _), | |
1308 | PINGROUP(20, SOUTH, _, _, blsp_uim6, _, _, _, _, _, _), | |
1309 | PINGROUP(21, SOUTH, _, _, blsp_uim6, _, phase_flag11, qdss_cti0_b, vsense_data0, _, _), | |
1310 | PINGROUP(22, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag12, vsense_data1, _, _, _), | |
1311 | PINGROUP(23, CENTER, blsp_spi6, _, blsp_i2c6, _, phase_flag13, vsense_mode, _, _, _), | |
1312 | PINGROUP(24, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_clk, _, _, phase_flag17, vsense_clkout, _), | |
1313 | PINGROUP(25, NORTH, blsp_spi7, blsp_uart6_a, sec_mi2s, sndwire_data, _, _, phase_flag18, _, _), | |
1314 | PINGROUP(26, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, sec_mi2s, _, phase_flag19, _, _, _), | |
1315 | PINGROUP(27, NORTH, blsp_spi7, blsp_uart6_a, blsp_i2c7, vfr_1, sec_mi2s, _, phase_flag20, _, _), | |
1316 | PINGROUP(28, CENTER, blsp_spi8_a, blsp_uart6_b, m_voc, _, phase_flag21, _, _, _, _), | |
1317 | PINGROUP(29, CENTER, blsp_spi8_a, blsp_uart6_b, _, _, phase_flag22, _, _, _, _), | |
1318 | PINGROUP(30, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, blsp_spi3_cs1, _, phase_flag23, _, _, _), | |
1319 | PINGROUP(31, CENTER, blsp_spi8_a, blsp_uart6_b, blsp_i2c8_a, pwr_modem, _, phase_flag24, qdss_gpio, _, _), | |
1320 | PINGROUP(32, SOUTH, cam_mclk, pwr_nav, _, _, qdss_gpio0, _, _, _, _), | |
1321 | PINGROUP(33, SOUTH, cam_mclk, qspi_data0, pwr_crypto, _, _, qdss_gpio1, _, _, _), | |
1322 | PINGROUP(34, SOUTH, cam_mclk, qspi_data1, agera_pll, _, _, qdss_gpio2, _, _, _), | |
1323 | PINGROUP(35, SOUTH, cam_mclk, qspi_data2, jitter_bist, _, _, qdss_gpio3, _, atest_usb2, _), | |
1324 | PINGROUP(36, SOUTH, cci_i2c, pll_bypassnl, agera_pll, _, _, qdss_gpio4, atest_tsens, atest_usb21, _), | |
1325 | PINGROUP(37, SOUTH, cci_i2c, pll_reset, _, _, qdss_gpio5, atest_usb23, _, _, _), | |
1326 | PINGROUP(38, SOUTH, cci_i2c, _, _, qdss_gpio6, _, _, _, _, _), | |
1327 | PINGROUP(39, SOUTH, cci_i2c, _, _, qdss_gpio7, _, _, _, _, _), | |
1328 | PINGROUP(40, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _), | |
1329 | PINGROUP(41, SOUTH, _, _, blsp_spi8_b, _, _, _, _, _, _), | |
1330 | PINGROUP(42, SOUTH, mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, _, _, qdss_gpio9, _, _), | |
1331 | PINGROUP(43, SOUTH, _, _, qspi_cs, _, _, qdss_gpio10, _, _, _), | |
1332 | PINGROUP(44, SOUTH, _, _, blsp_spi8_b, blsp_i2c8_b, _, _, qdss_gpio11, _, _), | |
1333 | PINGROUP(45, SOUTH, cci_async, _, _, qdss_gpio12, _, _, _, _, _), | |
1334 | PINGROUP(46, SOUTH, blsp_spi1, _, _, qdss_gpio13, _, _, _, _, _), | |
1335 | PINGROUP(47, SOUTH, qspi_clk, _, phase_flag30, qdss_gpio14, _, _, _, _, _), | |
1336 | PINGROUP(48, SOUTH, _, phase_flag1, qdss_gpio15, _, _, _, _, _, _), | |
1337 | PINGROUP(49, SOUTH, blsp_spi6, phase_flag2, qdss_cti0_a, _, _, _, _, _, _), | |
1338 | PINGROUP(50, SOUTH, qspi_cs, _, phase_flag9, qdss_cti0_a, _, _, _, _, _), | |
1339 | PINGROUP(51, SOUTH, qspi_data3, _, phase_flag15, qdss_gpio8, _, _, _, _, _), | |
1340 | PINGROUP(52, SOUTH, _, blsp_spi8_b, blsp_i2c8_b, blsp_spi6, phase_flag16, qdss_gpio, _, _, _), | |
1341 | PINGROUP(53, NORTH, _, phase_flag6, qdss_cti1_a, _, _, _, _, _, _), | |
1342 | PINGROUP(54, NORTH, _, _, phase_flag29, _, _, _, _, _, _), | |
1343 | PINGROUP(55, SOUTH, _, phase_flag25, qdss_cti1_a, _, _, _, _, _, _), | |
1344 | PINGROUP(56, SOUTH, _, phase_flag10, qdss_gpio3, _, atest_usb20, _, _, _, _), | |
1345 | PINGROUP(57, SOUTH, gcc_gp1, _, phase_flag4, atest_usb22, _, _, _, _, _), | |
1346 | PINGROUP(58, SOUTH, _, gcc_gp2, _, _, atest_char, _, _, _, _), | |
1347 | PINGROUP(59, NORTH, mdp_vsync, gcc_gp3, _, _, atest_char3, _, _, _, _), | |
1348 | PINGROUP(60, NORTH, cri_trng0, _, _, atest_char2, _, _, _, _, _), | |
1349 | PINGROUP(61, NORTH, pri_mi2s, cri_trng1, _, _, atest_char1, _, _, _, _), | |
1350 | PINGROUP(62, NORTH, sec_mi2s, audio_ref, _, cri_trng, _, _, atest_char0, _, _), | |
1351 | PINGROUP(63, NORTH, _, _, _, qdss_gpio1, _, _, _, _, _), | |
1352 | PINGROUP(64, SOUTH, blsp_spi8_cs1, sp_cmu, _, _, qdss_gpio2, _, _, _, _), | |
1353 | PINGROUP(65, SOUTH, _, nav_pps_a, nav_pps_a, gps_tx_a, blsp_spi3_cs2, adsp_ext, _, _, _), | |
1354 | PINGROUP(66, NORTH, _, _, qdss_cti1_b, _, _, _, _, _, _), | |
1355 | PINGROUP(67, NORTH, _, _, qdss_gpio0, _, _, _, _, _, _), | |
1356 | PINGROUP(68, NORTH, isense_dbg, _, phase_flag0, qdss_gpio, _, _, _, _, _), | |
1357 | PINGROUP(69, NORTH, _, phase_flag7, qdss_gpio, _, _, _, _, _, _), | |
1358 | PINGROUP(70, NORTH, _, phase_flag8, qdss_gpio6, _, _, _, _, _, _), | |
1359 | PINGROUP(71, NORTH, _, _, qdss_gpio7, tsense_pwm1, tsense_pwm2, _, _, _, _), | |
1360 | PINGROUP(72, NORTH, _, qdss_gpio14, _, _, _, _, _, _, _), | |
1361 | PINGROUP(73, NORTH, _, _, qdss_gpio15, _, _, _, _, _, _), | |
1362 | PINGROUP(74, NORTH, mdp_vsync, _, _, _, _, _, _, _, _), | |
1363 | PINGROUP(75, NORTH, _, _, qdss_gpio8, _, _, _, _, _, _), | |
1364 | PINGROUP(76, NORTH, blsp_spi8_cs2, _, _, _, qdss_gpio9, _, _, _, _), | |
1365 | PINGROUP(77, NORTH, _, _, qdss_gpio10, _, _, _, _, _, _), | |
1366 | PINGROUP(78, NORTH, gcc_gp1, _, qdss_gpio13, _, _, _, _, _, _), | |
1367 | PINGROUP(79, SOUTH, _, _, qdss_gpio11, _, _, _, _, _, _), | |
1368 | PINGROUP(80, SOUTH, nav_pps_b, nav_pps_b, gps_tx_c, _, _, qdss_gpio12, _, _, _), | |
1369 | PINGROUP(81, CENTER, mss_lte, gcc_gp2, _, _, _, _, _, _, _), | |
1370 | PINGROUP(82, CENTER, mss_lte, gcc_gp3, _, _, _, _, _, _, _), | |
1371 | PINGROUP(83, SOUTH, uim2_data, _, _, _, _, _, _, _, _), | |
1372 | PINGROUP(84, SOUTH, uim2_clk, _, _, _, _, _, _, _, _), | |
1373 | PINGROUP(85, SOUTH, uim2_reset, _, _, _, _, _, _, _, _), | |
1374 | PINGROUP(86, SOUTH, uim2_present, _, _, _, _, _, _, _, _), | |
1375 | PINGROUP(87, SOUTH, uim1_data, _, _, _, _, _, _, _, _), | |
1376 | PINGROUP(88, SOUTH, uim1_clk, _, _, _, _, _, _, _, _), | |
1377 | PINGROUP(89, SOUTH, uim1_reset, _, _, _, _, _, _, _, _), | |
1378 | PINGROUP(90, SOUTH, uim1_present, _, _, _, _, _, _, _, _), | |
1379 | PINGROUP(91, SOUTH, uim_batt, _, _, _, _, _, _, _, _), | |
1380 | PINGROUP(92, SOUTH, _, _, pa_indicator, _, _, _, _, _, _), | |
1381 | PINGROUP(93, SOUTH, _, _, _, _, _, _, _, _, _), | |
1382 | PINGROUP(94, SOUTH, _, _, _, _, _, _, _, _, _), | |
1383 | PINGROUP(95, SOUTH, _, _, _, _, _, _, _, _, _), | |
1384 | PINGROUP(96, SOUTH, _, _, _, _, _, _, _, _, _), | |
1385 | PINGROUP(97, SOUTH, _, ldo_en, _, _, _, _, _, _, _), | |
1386 | PINGROUP(98, SOUTH, _, nav_pps_c, nav_pps_c, gps_tx_b, ldo_update, _, _, _, _), | |
1387 | PINGROUP(99, SOUTH, qlink_request, _, _, _, _, _, _, _, _), | |
1388 | PINGROUP(100, SOUTH, qlink_enable, _, _, _, _, _, _, _, _), | |
1389 | PINGROUP(101, SOUTH, _, _, _, _, _, _, _, _, _), | |
1390 | PINGROUP(102, SOUTH, _, prng_rosc, _, _, _, _, _, _, _), | |
1391 | PINGROUP(103, SOUTH, _, _, _, _, _, _, _, _, _), | |
1392 | PINGROUP(104, SOUTH, _, _, _, _, _, _, _, _, _), | |
1393 | PINGROUP(105, SOUTH, _, _, _, _, _, _, _, _, _), | |
1394 | PINGROUP(106, SOUTH, _, _, _, _, _, _, _, _, _), | |
1395 | PINGROUP(107, SOUTH, _, _, _, _, _, _, _, _, _), | |
1396 | PINGROUP(108, SOUTH, _, _, _, _, _, _, _, _, _), | |
1397 | PINGROUP(109, SOUTH, _, _, _, _, _, _, _, _, _), | |
1398 | PINGROUP(110, SOUTH, _, _, _, _, _, _, _, _, _), | |
1399 | PINGROUP(111, SOUTH, _, _, _, _, _, _, _, _, _), | |
1400 | PINGROUP(112, SOUTH, _, _, _, _, _, _, _, _, _), | |
1401 | PINGROUP(113, SOUTH, _, _, _, _, _, _, _, _, _), | |
5db0b0a2 CT |
1402 | SDC_QDSD_PINGROUP(sdc1_clk, 0x9a000, 13, 6), |
1403 | SDC_QDSD_PINGROUP(sdc1_cmd, 0x9a000, 11, 3), | |
1404 | SDC_QDSD_PINGROUP(sdc1_data, 0x9a000, 9, 0), | |
1405 | SDC_QDSD_PINGROUP(sdc2_clk, 0x9b000, 14, 6), | |
1406 | SDC_QDSD_PINGROUP(sdc2_cmd, 0x9b000, 11, 3), | |
1407 | SDC_QDSD_PINGROUP(sdc2_data, 0x9b000, 9, 0), | |
1408 | SDC_QDSD_PINGROUP(sdc1_rclk, 0x9a000, 15, 0), | |
9cf0c526 NU |
1409 | }; |
1410 | ||
1411 | static const struct msm_pinctrl_soc_data sdm660_pinctrl = { | |
1412 | .pins = sdm660_pins, | |
1413 | .npins = ARRAY_SIZE(sdm660_pins), | |
1414 | .functions = sdm660_functions, | |
1415 | .nfunctions = ARRAY_SIZE(sdm660_functions), | |
1416 | .groups = sdm660_groups, | |
1417 | .ngroups = ARRAY_SIZE(sdm660_groups), | |
1418 | .ngpios = 114, | |
1419 | .tiles = sdm660_tiles, | |
1420 | .ntiles = ARRAY_SIZE(sdm660_tiles), | |
1421 | }; | |
1422 | ||
1423 | static int sdm660_pinctrl_probe(struct platform_device *pdev) | |
1424 | { | |
1425 | return msm_pinctrl_probe(pdev, &sdm660_pinctrl); | |
1426 | } | |
1427 | ||
1428 | static const struct of_device_id sdm660_pinctrl_of_match[] = { | |
1429 | { .compatible = "qcom,sdm660-pinctrl", }, | |
1430 | { .compatible = "qcom,sdm630-pinctrl", }, | |
1431 | { }, | |
1432 | }; | |
1433 | ||
1434 | static struct platform_driver sdm660_pinctrl_driver = { | |
1435 | .driver = { | |
1436 | .name = "sdm660-pinctrl", | |
1437 | .of_match_table = sdm660_pinctrl_of_match, | |
1438 | }, | |
1439 | .probe = sdm660_pinctrl_probe, | |
1440 | .remove = msm_pinctrl_remove, | |
1441 | }; | |
1442 | ||
1443 | static int __init sdm660_pinctrl_init(void) | |
1444 | { | |
1445 | return platform_driver_register(&sdm660_pinctrl_driver); | |
1446 | } | |
1447 | arch_initcall(sdm660_pinctrl_init); | |
1448 | ||
1449 | static void __exit sdm660_pinctrl_exit(void) | |
1450 | { | |
1451 | platform_driver_unregister(&sdm660_pinctrl_driver); | |
1452 | } | |
1453 | module_exit(sdm660_pinctrl_exit); | |
1454 | ||
1455 | MODULE_DESCRIPTION("QTI sdm660 pinctrl driver"); | |
1456 | MODULE_LICENSE("GPL v2"); | |
1457 | MODULE_DEVICE_TABLE(of, sdm660_pinctrl_of_match); |