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Merge tag 'leds-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewsk...
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
CommitLineData
30574f0d
TA		 1/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/err.h>
28#include <linux/gpio.h>
a19fe2d4 29#include <linux/irqdomain.h>
19846950 30#include <linux/spinlock.h>
d9f99863 31#include <linux/syscore_ops.h>
30574f0d 32
ebe629a3 33#include "../core.h"
30574f0d
TA		 34#include "pinctrl-samsung.h"
35
30574f0d 36/* list of all possible config options supported */
d5fd5da2 37static struct pin_config {
9a2c1c3b
TF		 38 const char *property;
39 enum pincfg_type param;
40} cfg_params[] = {
30574f0d
TA		 41 { "samsung,pin-pud", PINCFG_TYPE_PUD },
42 { "samsung,pin-drv", PINCFG_TYPE_DRV },
43 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
44 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
2700bc01 45 { "samsung,pin-val", PINCFG_TYPE_DAT },
30574f0d
TA		 46};
47
d9f99863 48/* Global list of devices (struct samsung_pinctrl_drv_data) */
b9408975 49static LIST_HEAD(drvdata_list);
d9f99863 50
6fb6f1ba 51static unsigned int pin_base;
40ba6227 52
d3a7b9e3
TF		 53static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
54{
55 return container_of(gc, struct samsung_pin_bank, gpio_chip);
56}
57
30574f0d
TA		 58static int samsung_get_group_count(struct pinctrl_dev *pctldev)
59{
9a2c1c3b 60 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 61
9a2c1c3b 62 return pmx->nr_groups;
30574f0d
TA		 63}
64
30574f0d 65static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
9a2c1c3b 66 unsigned group)
30574f0d 67{
9a2c1c3b 68 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 69
9a2c1c3b 70 return pmx->pin_groups[group].name;
30574f0d
TA		 71}
72
30574f0d 73static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
9a2c1c3b
TF		 74 unsigned group,
75 const unsigned **pins,
76 unsigned *num_pins)
30574f0d 77{
9a2c1c3b
TF		 78 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
79
80 *pins = pmx->pin_groups[group].pins;
81 *num_pins = pmx->pin_groups[group].num_pins;
30574f0d 82
30574f0d
TA		 83 return 0;
84}
85
9a2c1c3b
TF		 86static int reserve_map(struct device *dev, struct pinctrl_map **map,
87 unsigned *reserved_maps, unsigned *num_maps,
88 unsigned reserve)
89{
90 unsigned old_num = *reserved_maps;
91 unsigned new_num = *num_maps + reserve;
92 struct pinctrl_map *new_map;
30574f0d 93
9a2c1c3b
TF		 94 if (old_num >= new_num)
95 return 0;
30574f0d 96
9a2c1c3b
TF		 97 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
98 if (!new_map) {
99 dev_err(dev, "krealloc(map) failed\n");
30574f0d
TA		 100 return -ENOMEM;
101 }
30574f0d 102
9a2c1c3b
TF		 103 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
104
105 *map = new_map;
106 *reserved_maps = new_num;
107
108 return 0;
109}
110
111static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
112 unsigned *num_maps, const char *group,
113 const char *function)
114{
115 if (WARN_ON(*num_maps == *reserved_maps))
116 return -ENOSPC;
117
118 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
119 (*map)[*num_maps].data.mux.group = group;
120 (*map)[*num_maps].data.mux.function = function;
121 (*num_maps)++;
122
123 return 0;
124}
125
126static int add_map_configs(struct device *dev, struct pinctrl_map **map,
127 unsigned *reserved_maps, unsigned *num_maps,
128 const char *group, unsigned long *configs,
129 unsigned num_configs)
130{
131 unsigned long *dup_configs;
132
133 if (WARN_ON(*num_maps == *reserved_maps))
134 return -ENOSPC;
135
136 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
137 GFP_KERNEL);
138 if (!dup_configs) {
139 dev_err(dev, "kmemdup(configs) failed\n");
140 return -ENOMEM;
30574f0d 141 }
30574f0d 142
9a2c1c3b
TF		 143 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
144 (*map)[*num_maps].data.configs.group_or_pin = group;
145 (*map)[*num_maps].data.configs.configs = dup_configs;
146 (*map)[*num_maps].data.configs.num_configs = num_configs;
147 (*num_maps)++;
148
149 return 0;
150}
151
152static int add_config(struct device *dev, unsigned long **configs,
153 unsigned *num_configs, unsigned long config)
154{
155 unsigned old_num = *num_configs;
156 unsigned new_num = old_num + 1;
157 unsigned long *new_configs;
158
159 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
160 GFP_KERNEL);
161 if (!new_configs) {
162 dev_err(dev, "krealloc(configs) failed\n");
163 return -ENOMEM;
30574f0d
TA		 164 }
165
9a2c1c3b
TF		 166 new_configs[old_num] = config;
167
168 *configs = new_configs;
169 *num_configs = new_num;
170
171 return 0;
172}
173
174static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
175 struct pinctrl_map *map,
176 unsigned num_maps)
177{
178 int i;
179
180 for (i = 0; i < num_maps; i++)
181 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
182 kfree(map[i].data.configs.configs);
183
184 kfree(map);
185}
186
187static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
188 struct device *dev,
189 struct device_node *np,
190 struct pinctrl_map **map,
191 unsigned *reserved_maps,
192 unsigned *num_maps)
193{
194 int ret, i;
195 u32 val;
196 unsigned long config;
197 unsigned long *configs = NULL;
198 unsigned num_configs = 0;
199 unsigned reserve;
200 struct property *prop;
201 const char *group;
202 bool has_func = false;
203
204 ret = of_property_read_u32(np, "samsung,pin-function", &val);
205 if (!ret)
206 has_func = true;
207
208 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
209 ret = of_property_read_u32(np, cfg_params[i].property, &val);
210 if (!ret) {
211 config = PINCFG_PACK(cfg_params[i].param, val);
212 ret = add_config(dev, &configs, &num_configs, config);
213 if (ret < 0)
214 goto exit;
215 /* EINVAL=missing, which is fine since it's optional */
216 } else if (ret != -EINVAL) {
217 dev_err(dev, "could not parse property %s\n",
218 cfg_params[i].property);
219 }
30574f0d
TA		 220 }
221
9a2c1c3b
TF		 222 reserve = 0;
223 if (has_func)
224 reserve++;
225 if (num_configs)
226 reserve++;
227 ret = of_property_count_strings(np, "samsung,pins");
228 if (ret < 0) {
229 dev_err(dev, "could not parse property samsung,pins\n");
230 goto exit;
231 }
232 reserve *= ret;
233
234 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
235 if (ret < 0)
236 goto exit;
237
238 of_property_for_each_string(np, "samsung,pins", prop, group) {
239 if (has_func) {
240 ret = add_map_mux(map, reserved_maps,
241 num_maps, group, np->full_name);
242 if (ret < 0)
243 goto exit;
30574f0d 244 }
30574f0d 245
9a2c1c3b
TF		 246 if (num_configs) {
247 ret = add_map_configs(dev, map, reserved_maps,
248 num_maps, group, configs,
249 num_configs);
250 if (ret < 0)
251 goto exit;
252 }
30574f0d
TA		 253 }
254
9a2c1c3b 255 ret = 0;
30574f0d 256
9a2c1c3b
TF		 257exit:
258 kfree(configs);
259 return ret;
30574f0d
TA		 260}
261
9a2c1c3b
TF		 262static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
263 struct device_node *np_config,
264 struct pinctrl_map **map,
265 unsigned *num_maps)
266{
267 struct samsung_pinctrl_drv_data *drvdata;
268 unsigned reserved_maps;
269 struct device_node *np;
270 int ret;
271
272 drvdata = pinctrl_dev_get_drvdata(pctldev);
273
274 reserved_maps = 0;
275 *map = NULL;
276 *num_maps = 0;
277
278 if (!of_get_child_count(np_config))
279 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
280 np_config, map,
281 &reserved_maps,
282 num_maps);
283
284 for_each_child_of_node(np_config, np) {
285 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
286 &reserved_maps, num_maps);
287 if (ret < 0) {
288 samsung_dt_free_map(pctldev, *map, *num_maps);
289 return ret;
30574f0d 290 }
9a2c1c3b 291 }
30574f0d 292
9a2c1c3b 293 return 0;
30574f0d
TA		 294}
295
296/* list of pinctrl callbacks for the pinctrl core */
022ab148 297static const struct pinctrl_ops samsung_pctrl_ops = {
30574f0d
TA		 298 .get_groups_count = samsung_get_group_count,
299 .get_group_name = samsung_get_group_name,
300 .get_group_pins = samsung_get_group_pins,
301 .dt_node_to_map = samsung_dt_node_to_map,
302 .dt_free_map = samsung_dt_free_map,
303};
304
305/* check if the selector is a valid pin function selector */
306static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
307{
308 struct samsung_pinctrl_drv_data *drvdata;
309
310 drvdata = pinctrl_dev_get_drvdata(pctldev);
311 return drvdata->nr_functions;
312}
313
314/* return the name of the pin function specified */
315static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
316 unsigned selector)
317{
318 struct samsung_pinctrl_drv_data *drvdata;
319
320 drvdata = pinctrl_dev_get_drvdata(pctldev);
321 return drvdata->pmx_functions[selector].name;
322}
323
324/* return the groups associated for the specified function selector */
325static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
326 unsigned selector, const char * const **groups,
327 unsigned * const num_groups)
328{
329 struct samsung_pinctrl_drv_data *drvdata;
330
331 drvdata = pinctrl_dev_get_drvdata(pctldev);
332 *groups = drvdata->pmx_functions[selector].groups;
333 *num_groups = drvdata->pmx_functions[selector].num_groups;
334 return 0;
335}
336
337/*
338 * given a pin number that is local to a pin controller, find out the pin bank
339 * and the register base of the pin bank.
340 */
62f14c0e
TF		 341static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
342 unsigned pin, void __iomem **reg, u32 *offset,
30574f0d
TA		 343 struct samsung_pin_bank **bank)
344{
30574f0d
TA		 345 struct samsung_pin_bank *b;
346
1bf00d7a 347 b = drvdata->pin_banks;
30574f0d
TA		 348
349 while ((pin >= b->pin_base) &&
350 ((b->pin_base + b->nr_pins - 1) < pin))
351 b++;
352
353 *reg = drvdata->virt_base + b->pctl_offset;
354 *offset = pin - b->pin_base;
355 if (bank)
356 *bank = b;
30574f0d
TA		 357}
358
359/* enable or disable a pinmux function */
360static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
361 unsigned group, bool enable)
362{
363 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 364 const struct samsung_pin_bank_type *type;
30574f0d
TA		 365 struct samsung_pin_bank *bank;
366 void __iomem *reg;
9a2c1c3b 367 u32 mask, shift, data, pin_offset;
19846950 368 unsigned long flags;
9a2c1c3b
TF		 369 const struct samsung_pmx_func *func;
370 const struct samsung_pin_group *grp;
30574f0d
TA		 371
372 drvdata = pinctrl_dev_get_drvdata(pctldev);
9a2c1c3b
TF		 373 func = &drvdata->pmx_functions[selector];
374 grp = &drvdata->pin_groups[group];
30574f0d 375
1bf00d7a 376 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
9a2c1c3b
TF		 377 &reg, &pin_offset, &bank);
378 type = bank->type;
379 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
380 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
381 if (shift >= 32) {
382 /* Some banks have two config registers */
383 shift -= 32;
384 reg += 4;
385 }
30574f0d 386
9a2c1c3b 387 spin_lock_irqsave(&bank->slock, flags);
19846950 388
9a2c1c3b
TF		 389 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
390 data &= ~(mask << shift);
391 if (enable)
392 data |= func->val << shift;
393 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
19846950 394
9a2c1c3b 395 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA		 396}
397
398/* enable a specified pinmux by writing to registers */
03e9f0ca
LW		 399static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
400 unsigned selector,
401 unsigned group)
30574f0d
TA		 402{
403 samsung_pinmux_setup(pctldev, selector, group, true);
404 return 0;
405}
406
30574f0d 407/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
022ab148 408static const struct pinmux_ops samsung_pinmux_ops = {
30574f0d
TA		 409 .get_functions_count = samsung_get_functions_count,
410 .get_function_name = samsung_pinmux_get_fname,
411 .get_function_groups = samsung_pinmux_get_groups,
03e9f0ca 412 .set_mux = samsung_pinmux_set_mux,
30574f0d
TA		 413};
414
415/* set or get the pin config settings for a specified pin */
416static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
417 unsigned long *config, bool set)
418{
419 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 420 const struct samsung_pin_bank_type *type;
30574f0d
TA		 421 struct samsung_pin_bank *bank;
422 void __iomem *reg_base;
423 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
424 u32 data, width, pin_offset, mask, shift;
425 u32 cfg_value, cfg_reg;
19846950 426 unsigned long flags;
30574f0d
TA		 427
428 drvdata = pinctrl_dev_get_drvdata(pctldev);
1bf00d7a 429 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
30574f0d 430 &pin_offset, &bank);
499147c9 431 type = bank->type;
30574f0d 432
499147c9 433 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
7c367d3d
TF		 434 return -EINVAL;
435
499147c9 436 width = type->fld_width[cfg_type];
43fc9e7f 437 cfg_reg = type->reg_offset[cfg_type];
499147c9 438
19846950
TF		 439 spin_lock_irqsave(&bank->slock, flags);
440
30574f0d
TA		 441 mask = (1 << width) - 1;
442 shift = pin_offset * width;
443 data = readl(reg_base + cfg_reg);
444
445 if (set) {
446 cfg_value = PINCFG_UNPACK_VALUE(*config);
447 data &= ~(mask << shift);
448 data |= (cfg_value << shift);
449 writel(data, reg_base + cfg_reg);
450 } else {
451 data >>= shift;
452 data &= mask;
453 *config = PINCFG_PACK(cfg_type, data);
454 }
19846950
TF		 455
456 spin_unlock_irqrestore(&bank->slock, flags);
457
30574f0d
TA		 458 return 0;
459}
460
461/* set the pin config settings for a specified pin */
462static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
03b054e9 463 unsigned long *configs, unsigned num_configs)
30574f0d 464{
03b054e9
SY		 465 int i, ret;
466
467 for (i = 0; i < num_configs; i++) {
468 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
469 if (ret < 0)
470 return ret;
471 } /* for each config */
472
473 return 0;
30574f0d
TA		 474}
475
476/* get the pin config settings for a specified pin */
477static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
478 unsigned long *config)
479{
480 return samsung_pinconf_rw(pctldev, pin, config, false);
481}
482
483/* set the pin config settings for a specified pin group */
484static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
03b054e9
SY		 485 unsigned group, unsigned long *configs,
486 unsigned num_configs)
30574f0d
TA		 487{
488 struct samsung_pinctrl_drv_data *drvdata;
489 const unsigned int *pins;
490 unsigned int cnt;
491
492 drvdata = pinctrl_dev_get_drvdata(pctldev);
493 pins = drvdata->pin_groups[group].pins;
494
495 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
03b054e9 496 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
30574f0d
TA		 497
498 return 0;
499}
500
501/* get the pin config settings for a specified pin group */
502static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
503 unsigned int group, unsigned long *config)
504{
505 struct samsung_pinctrl_drv_data *drvdata;
506 const unsigned int *pins;
507
508 drvdata = pinctrl_dev_get_drvdata(pctldev);
509 pins = drvdata->pin_groups[group].pins;
510 samsung_pinconf_get(pctldev, pins[0], config);
511 return 0;
512}
513
514/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
022ab148 515static const struct pinconf_ops samsung_pinconf_ops = {
30574f0d
TA		 516 .pin_config_get = samsung_pinconf_get,
517 .pin_config_set = samsung_pinconf_set,
518 .pin_config_group_get = samsung_pinconf_group_get,
519 .pin_config_group_set = samsung_pinconf_group_set,
520};
521
522/* gpiolib gpio_set callback function */
523static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
524{
d3a7b9e3 525 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
94ce944b 526 const struct samsung_pin_bank_type *type = bank->type;
19846950 527 unsigned long flags;
30574f0d 528 void __iomem *reg;
d3a7b9e3 529 u32 data;
30574f0d 530
d3a7b9e3 531 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 532
19846950
TF		 533 spin_lock_irqsave(&bank->slock, flags);
534
43fc9e7f 535 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 536 data &= ~(1 << offset);
30574f0d 537 if (value)
d3a7b9e3 538 data |= 1 << offset;
43fc9e7f 539 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
19846950
TF		 540
541 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA		 542}
543
544/* gpiolib gpio_get callback function */
545static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
546{
547 void __iomem *reg;
d3a7b9e3
TF		 548 u32 data;
549 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
94ce944b 550 const struct samsung_pin_bank_type *type = bank->type;
62f14c0e 551
d3a7b9e3 552 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 553
43fc9e7f 554 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 555 data >>= offset;
30574f0d
TA		 556 data &= 1;
557 return data;
558}
559
560/*
18c28caa
TF		 561 * The calls to gpio_direction_output() and gpio_direction_input()
562 * leads to this function call.
30574f0d 563 */
18c28caa
TF		 564static int samsung_gpio_set_direction(struct gpio_chip *gc,
565 unsigned offset, bool input)
566{
94ce944b 567 const struct samsung_pin_bank_type *type;
18c28caa
TF		 568 struct samsung_pin_bank *bank;
569 struct samsung_pinctrl_drv_data *drvdata;
570 void __iomem *reg;
571 u32 data, mask, shift;
572 unsigned long flags;
573
574 bank = gc_to_pin_bank(gc);
575 type = bank->type;
576 drvdata = bank->drvdata;
577
578 reg = drvdata->virt_base + bank->pctl_offset +
579 type->reg_offset[PINCFG_TYPE_FUNC];
580
581 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
582 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
583 if (shift >= 32) {
584 /* Some banks have two config registers */
585 shift -= 32;
586 reg += 4;
587 }
588
589 spin_lock_irqsave(&bank->slock, flags);
590
591 data = readl(reg);
592 data &= ~(mask << shift);
593 if (!input)
594 data |= FUNC_OUTPUT << shift;
595 writel(data, reg);
596
597 spin_unlock_irqrestore(&bank->slock, flags);
598
599 return 0;
600}
601
602/* gpiolib gpio_direction_input callback function. */
30574f0d
TA		 603static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
604{
18c28caa 605 return samsung_gpio_set_direction(gc, offset, true);
30574f0d
TA		 606}
607
18c28caa 608/* gpiolib gpio_direction_output callback function. */
30574f0d
TA		 609static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
610 int value)
611{
612 samsung_gpio_set(gc, offset, value);
18c28caa 613 return samsung_gpio_set_direction(gc, offset, false);
30574f0d
TA		 614}
615
a19fe2d4
TF		 616/*
617 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
618 * and a virtual IRQ, if not already present.
619 */
620static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
621{
622 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
623 unsigned int virq;
624
625 if (!bank->irq_domain)
626 return -ENXIO;
627
628 virq = irq_create_mapping(bank->irq_domain, offset);
629
630 return (virq) ? : -ENXIO;
631}
632
9a2c1c3b
TF		 633static struct samsung_pin_group *samsung_pinctrl_create_groups(
634 struct device *dev,
635 struct samsung_pinctrl_drv_data *drvdata,
636 unsigned int *cnt)
30574f0d 637{
9a2c1c3b
TF		 638 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
639 struct samsung_pin_group *groups, *grp;
640 const struct pinctrl_pin_desc *pdesc;
641 int i;
642
643 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
644 GFP_KERNEL);
645 if (!groups)
646 return ERR_PTR(-EINVAL);
647 grp = groups;
648
649 pdesc = ctrldesc->pins;
650 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
651 grp->name = pdesc->name;
652 grp->pins = &pdesc->number;
653 grp->num_pins = 1;
654 }
655
656 *cnt = ctrldesc->npins;
657 return groups;
658}
30574f0d 659
9a2c1c3b
TF		 660static int samsung_pinctrl_create_function(struct device *dev,
661 struct samsung_pinctrl_drv_data *drvdata,
662 struct device_node *func_np,
663 struct samsung_pmx_func *func)
664{
665 int npins;
666 int ret;
667 int i;
668
669 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
670 return 0;
671
672 npins = of_property_count_strings(func_np, "samsung,pins");
673 if (npins < 1) {
674 dev_err(dev, "invalid pin list in %s node", func_np->name);
30574f0d
TA		 675 return -EINVAL;
676 }
677
9a2c1c3b
TF		 678 func->name = func_np->full_name;
679
680 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
681 if (!func->groups)
30574f0d 682 return -ENOMEM;
30574f0d 683
9a2c1c3b
TF		 684 for (i = 0; i < npins; ++i) {
685 const char *gname;
686
687 ret = of_property_read_string_index(func_np, "samsung,pins",
688 i, &gname);
689 if (ret) {
690 dev_err(dev,
691 "failed to read pin name %d from %s node\n",
692 i, func_np->name);
693 return ret;
30574f0d 694 }
9a2c1c3b
TF		 695
696 func->groups[i] = gname;
30574f0d
TA		 697 }
698
9a2c1c3b
TF		 699 func->num_groups = npins;
700 return 1;
30574f0d
TA		 701}
702
9a2c1c3b
TF		 703static struct samsung_pmx_func *samsung_pinctrl_create_functions(
704 struct device *dev,
705 struct samsung_pinctrl_drv_data *drvdata,
706 unsigned int *cnt)
30574f0d 707{
9a2c1c3b 708 struct samsung_pmx_func *functions, *func;
30574f0d
TA		 709 struct device_node *dev_np = dev->of_node;
710 struct device_node *cfg_np;
9a2c1c3b 711 unsigned int func_cnt = 0;
30574f0d
TA		 712 int ret;
713
9a2c1c3b
TF		 714 /*
715 * Iterate over all the child nodes of the pin controller node
716 * and create pin groups and pin function lists.
717 */
718 for_each_child_of_node(dev_np, cfg_np) {
719 struct device_node *func_np;
30574f0d 720
9a2c1c3b
TF		 721 if (!of_get_child_count(cfg_np)) {
722 if (!of_find_property(cfg_np,
723 "samsung,pin-function", NULL))
724 continue;
725 ++func_cnt;
726 continue;
727 }
728
729 for_each_child_of_node(cfg_np, func_np) {
730 if (!of_find_property(func_np,
731 "samsung,pin-function", NULL))
732 continue;
733 ++func_cnt;
734 }
30574f0d 735 }
30574f0d 736
9a2c1c3b
TF		 737 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
738 GFP_KERNEL);
30574f0d
TA		 739 if (!functions) {
740 dev_err(dev, "failed to allocate memory for function list\n");
9a2c1c3b 741 return ERR_PTR(-EINVAL);
30574f0d
TA		 742 }
743 func = functions;
744
745 /*
746 * Iterate over all the child nodes of the pin controller node
747 * and create pin groups and pin function lists.
748 */
9a2c1c3b 749 func_cnt = 0;
30574f0d 750 for_each_child_of_node(dev_np, cfg_np) {
9a2c1c3b
TF		 751 struct device_node *func_np;
752
753 if (!of_get_child_count(cfg_np)) {
754 ret = samsung_pinctrl_create_function(dev, drvdata,
755 cfg_np, func);
756 if (ret < 0)
757 return ERR_PTR(ret);
758 if (ret > 0) {
759 ++func;
760 ++func_cnt;
761 }
30574f0d 762 continue;
9a2c1c3b 763 }
30574f0d 764
9a2c1c3b
TF		 765 for_each_child_of_node(cfg_np, func_np) {
766 ret = samsung_pinctrl_create_function(dev, drvdata,
767 func_np, func);
768 if (ret < 0)
769 return ERR_PTR(ret);
770 if (ret > 0) {
771 ++func;
772 ++func_cnt;
773 }
30574f0d 774 }
9a2c1c3b 775 }
30574f0d 776
9a2c1c3b
TF		 777 *cnt = func_cnt;
778 return functions;
779}
30574f0d 780
9a2c1c3b
TF		 781/*
782 * Parse the information about all the available pin groups and pin functions
783 * from device node of the pin-controller. A pin group is formed with all
784 * the pins listed in the "samsung,pins" property.
785 */
30574f0d 786
9a2c1c3b
TF		 787static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
788 struct samsung_pinctrl_drv_data *drvdata)
789{
790 struct device *dev = &pdev->dev;
791 struct samsung_pin_group *groups;
792 struct samsung_pmx_func *functions;
793 unsigned int grp_cnt = 0, func_cnt = 0;
794
795 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
796 if (IS_ERR(groups)) {
797 dev_err(dev, "failed to parse pin groups\n");
798 return PTR_ERR(groups);
799 }
800
801 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
802 if (IS_ERR(functions)) {
803 dev_err(dev, "failed to parse pin functions\n");
44a074ff 804 return PTR_ERR(functions);
30574f0d
TA		 805 }
806
807 drvdata->pin_groups = groups;
808 drvdata->nr_groups = grp_cnt;
809 drvdata->pmx_functions = functions;
9a2c1c3b 810 drvdata->nr_functions = func_cnt;
30574f0d
TA		 811
812 return 0;
813}
814
815/* register the pinctrl interface with the pinctrl subsystem */
150632b0
GKH		 816static int samsung_pinctrl_register(struct platform_device *pdev,
817 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA		 818{
819 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
820 struct pinctrl_pin_desc *pindesc, *pdesc;
821 struct samsung_pin_bank *pin_bank;
822 char *pin_names;
823 int pin, bank, ret;
824
825 ctrldesc->name = "samsung-pinctrl";
826 ctrldesc->owner = THIS_MODULE;
827 ctrldesc->pctlops = &samsung_pctrl_ops;
828 ctrldesc->pmxops = &samsung_pinmux_ops;
829 ctrldesc->confops = &samsung_pinconf_ops;
830
831 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
1bf00d7a 832 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA		 833 if (!pindesc) {
834 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
835 return -ENOMEM;
836 }
837 ctrldesc->pins = pindesc;
1bf00d7a 838 ctrldesc->npins = drvdata->nr_pins;
30574f0d
TA		 839
840 /* dynamically populate the pin number and pin name for pindesc */
841 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
1bf00d7a 842 pdesc->number = pin + drvdata->pin_base;
30574f0d
TA		 843
844 /*
845 * allocate space for storing the dynamically generated names for all
846 * the pins which belong to this pin-controller.
847 */
848 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
1bf00d7a 849 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA		 850 if (!pin_names) {
851 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
852 return -ENOMEM;
853 }
854
855 /* for each pin, the name of the pin is pin-bank name + pin number */
1bf00d7a
TF		 856 for (bank = 0; bank < drvdata->nr_banks; bank++) {
857 pin_bank = &drvdata->pin_banks[bank];
30574f0d
TA		 858 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
859 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
860 pdesc = pindesc + pin_bank->pin_base + pin;
861 pdesc->name = pin_names;
862 pin_names += PIN_NAME_LENGTH;
863 }
864 }
865
529301c1
TF		 866 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
867 if (ret)
868 return ret;
869
30574f0d 870 drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
323de9ef 871 if (IS_ERR(drvdata->pctl_dev)) {
30574f0d 872 dev_err(&pdev->dev, "could not register pinctrl driver\n");
323de9ef 873 return PTR_ERR(drvdata->pctl_dev);
30574f0d
TA		 874 }
875
1bf00d7a
TF		 876 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
877 pin_bank = &drvdata->pin_banks[bank];
d3a7b9e3
TF		 878 pin_bank->grange.name = pin_bank->name;
879 pin_bank->grange.id = bank;
1bf00d7a 880 pin_bank->grange.pin_base = drvdata->pin_base
6c6ce620 881 + pin_bank->pin_base;
d3a7b9e3
TF		 882 pin_bank->grange.base = pin_bank->gpio_chip.base;
883 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
884 pin_bank->grange.gc = &pin_bank->gpio_chip;
885 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
886 }
30574f0d 887
30574f0d
TA		 888 return 0;
889}
890
d3a7b9e3 891static const struct gpio_chip samsung_gpiolib_chip = {
98c85d58
JG		 892 .request = gpiochip_generic_request,
893 .free = gpiochip_generic_free,
d3a7b9e3
TF		 894 .set = samsung_gpio_set,
895 .get = samsung_gpio_get,
896 .direction_input = samsung_gpio_direction_input,
897 .direction_output = samsung_gpio_direction_output,
a19fe2d4 898 .to_irq = samsung_gpio_to_irq,
d3a7b9e3
TF		 899 .owner = THIS_MODULE,
900};
901
30574f0d 902/* register the gpiolib interface with the gpiolib subsystem */
150632b0
GKH		 903static int samsung_gpiolib_register(struct platform_device *pdev,
904 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 905{
1bf00d7a 906 struct samsung_pin_bank *bank = drvdata->pin_banks;
30574f0d
TA		 907 struct gpio_chip *gc;
908 int ret;
d3a7b9e3
TF		 909 int i;
910
1bf00d7a 911 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
d3a7b9e3
TF		 912 bank->gpio_chip = samsung_gpiolib_chip;
913
914 gc = &bank->gpio_chip;
1bf00d7a 915 gc->base = drvdata->pin_base + bank->pin_base;
d3a7b9e3
TF		 916 gc->ngpio = bank->nr_pins;
917 gc->dev = &pdev->dev;
918 gc->of_node = bank->of_node;
919 gc->label = bank->name;
920
921 ret = gpiochip_add(gc);
922 if (ret) {
923 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
924 gc->label, ret);
925 goto fail;
926 }
30574f0d
TA		 927 }
928
929 return 0;
d3a7b9e3
TF		 930
931fail:
932 for (--i, --bank; i >= 0; --i, --bank)
2fcea6ce 933 gpiochip_remove(&bank->gpio_chip);
d3a7b9e3 934 return ret;
30574f0d
TA		 935}
936
937/* unregister the gpiolib interface with the gpiolib subsystem */
150632b0
GKH		 938static int samsung_gpiolib_unregister(struct platform_device *pdev,
939 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 940{
1bf00d7a 941 struct samsung_pin_bank *bank = drvdata->pin_banks;
d3a7b9e3
TF		 942 int i;
943
1bf00d7a 944 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
2fcea6ce 945 gpiochip_remove(&bank->gpio_chip);
1bf00d7a 946
2fcea6ce 947 return 0;
30574f0d
TA		 948}
949
950static const struct of_device_id samsung_pinctrl_dt_match[];
951
952/* retrieve the soc specific data */
1bf00d7a
TF		 953static const struct samsung_pin_ctrl *
954samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
955 struct platform_device *pdev)
30574f0d
TA		 956{
957 int id;
958 const struct of_device_id *match;
6defe9a0 959 struct device_node *node = pdev->dev.of_node;
ab663789 960 struct device_node *np;
8100cf47 961 const struct samsung_pin_bank_data *bdata;
1bf00d7a 962 const struct samsung_pin_ctrl *ctrl;
40ba6227
TF		 963 struct samsung_pin_bank *bank;
964 int i;
30574f0d 965
6defe9a0 966 id = of_alias_get_id(node, "pinctrl");
30574f0d
TA		 967 if (id < 0) {
968 dev_err(&pdev->dev, "failed to get alias id\n");
87993273 969 return ERR_PTR(-ENOENT);
30574f0d
TA		 970 }
971 match = of_match_node(samsung_pinctrl_dt_match, node);
40ba6227
TF		 972 ctrl = (struct samsung_pin_ctrl *)match->data + id;
973
1bf00d7a
TF		 974 d->suspend = ctrl->suspend;
975 d->resume = ctrl->resume;
1bf00d7a 976 d->nr_banks = ctrl->nr_banks;
8100cf47
TF		 977 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
978 sizeof(*d->pin_banks), GFP_KERNEL);
979 if (!d->pin_banks)
980 return ERR_PTR(-ENOMEM);
1bf00d7a
TF		 981
982 bank = d->pin_banks;
8100cf47
TF		 983 bdata = ctrl->pin_banks;
984 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
985 bank->type = bdata->type;
986 bank->pctl_offset = bdata->pctl_offset;
987 bank->nr_pins = bdata->nr_pins;
988 bank->eint_func = bdata->eint_func;
989 bank->eint_type = bdata->eint_type;
990 bank->eint_mask = bdata->eint_mask;
991 bank->eint_offset = bdata->eint_offset;
992 bank->name = bdata->name;
993
19846950 994 spin_lock_init(&bank->slock);
6defe9a0 995 bank->drvdata = d;
1bf00d7a
TF		 996 bank->pin_base = d->nr_pins;
997 d->nr_pins += bank->nr_pins;
40ba6227
TF		 998 }
999
ab663789
TF		 1000 for_each_child_of_node(node, np) {
1001 if (!of_find_property(np, "gpio-controller", NULL))
1002 continue;
1bf00d7a
TF		 1003 bank = d->pin_banks;
1004 for (i = 0; i < d->nr_banks; ++i, ++bank) {
ab663789
TF		 1005 if (!strcmp(bank->name, np->name)) {
1006 bank->of_node = np;
1007 break;
1008 }
1009 }
1010 }
1011
1bf00d7a
TF		 1012 d->pin_base = pin_base;
1013 pin_base += d->nr_pins;
40ba6227
TF		 1014
1015 return ctrl;
30574f0d
TA		 1016}
1017
150632b0 1018static int samsung_pinctrl_probe(struct platform_device *pdev)
30574f0d
TA		 1019{
1020 struct samsung_pinctrl_drv_data *drvdata;
1bf00d7a 1021 const struct samsung_pin_ctrl *ctrl;
30574f0d 1022 struct device *dev = &pdev->dev;
30574f0d
TA		 1023 struct resource *res;
1024 int ret;
1025
1026 if (!dev->of_node) {
1027 dev_err(dev, "device tree node not found\n");
1028 return -ENODEV;
1029 }
1030
30574f0d
TA		 1031 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1032 if (!drvdata) {
1033 dev_err(dev, "failed to allocate memory for driver's "
1034 "private data\n");
1035 return -ENOMEM;
1036 }
6defe9a0
TF		 1037
1038 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
87993273 1039 if (IS_ERR(ctrl)) {
6defe9a0 1040 dev_err(&pdev->dev, "driver data not available\n");
87993273 1041 return PTR_ERR(ctrl);
6defe9a0 1042 }
30574f0d
TA		 1043 drvdata->dev = dev;
1044
1045 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9e0c1fb2
TR		 1046 drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
1047 if (IS_ERR(drvdata->virt_base))
1048 return PTR_ERR(drvdata->virt_base);
30574f0d
TA		 1049
1050 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1051 if (res)
1052 drvdata->irq = res->start;
1053
1054 ret = samsung_gpiolib_register(pdev, drvdata);
1055 if (ret)
1056 return ret;
1057
1058 ret = samsung_pinctrl_register(pdev, drvdata);
1059 if (ret) {
1060 samsung_gpiolib_unregister(pdev, drvdata);
1061 return ret;
1062 }
1063
1064 if (ctrl->eint_gpio_init)
1065 ctrl->eint_gpio_init(drvdata);
1066 if (ctrl->eint_wkup_init)
1067 ctrl->eint_wkup_init(drvdata);
1068
1069 platform_set_drvdata(pdev, drvdata);
d9f99863
DA		 1070
1071 /* Add to the global list */
1072 list_add_tail(&drvdata->node, &drvdata_list);
1073
30574f0d
TA		 1074 return 0;
1075}
1076
d9f99863
DA		 1077#ifdef CONFIG_PM
1078
1079/**
1080 * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
1081 *
1082 * Save data for all banks handled by this device.
1083 */
1084static void samsung_pinctrl_suspend_dev(
1085 struct samsung_pinctrl_drv_data *drvdata)
1086{
d9f99863
DA		 1087 void __iomem *virt_base = drvdata->virt_base;
1088 int i;
1089
1bf00d7a
TF		 1090 for (i = 0; i < drvdata->nr_banks; i++) {
1091 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1092 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF		 1093 const u8 *offs = bank->type->reg_offset;
1094 const u8 *widths = bank->type->fld_width;
d9f99863
DA		 1095 enum pincfg_type type;
1096
1097 /* Registers without a powerdown config aren't lost */
1098 if (!widths[PINCFG_TYPE_CON_PDN])
1099 continue;
1100
1101 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1102 if (widths[type])
1103 bank->pm_save[type] = readl(reg + offs[type]);
1104
1105 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1106 /* Some banks have two config registers */
1107 bank->pm_save[PINCFG_TYPE_NUM] =
1108 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1109 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1110 bank->name, reg,
1111 bank->pm_save[PINCFG_TYPE_FUNC],
1112 bank->pm_save[PINCFG_TYPE_NUM]);
1113 } else {
1114 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1115 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1116 }
1117 }
21c21993 1118
1bf00d7a
TF		 1119 if (drvdata->suspend)
1120 drvdata->suspend(drvdata);
d9f99863
DA		 1121}
1122
1123/**
1124 * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
1125 *
1126 * Restore one of the banks that was saved during suspend.
1127 *
1128 * We don't bother doing anything complicated to avoid glitching lines since
1129 * we're called before pad retention is turned off.
1130 */
1131static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1132{
d9f99863
DA		 1133 void __iomem *virt_base = drvdata->virt_base;
1134 int i;
1135
1bf00d7a
TF		 1136 if (drvdata->resume)
1137 drvdata->resume(drvdata);
21c21993 1138
1bf00d7a
TF		 1139 for (i = 0; i < drvdata->nr_banks; i++) {
1140 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1141 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF		 1142 const u8 *offs = bank->type->reg_offset;
1143 const u8 *widths = bank->type->fld_width;
d9f99863
DA		 1144 enum pincfg_type type;
1145
1146 /* Registers without a powerdown config aren't lost */
1147 if (!widths[PINCFG_TYPE_CON_PDN])
1148 continue;
1149
1150 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1151 /* Some banks have two config registers */
1152 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1153 bank->name, reg,
1154 readl(reg + offs[PINCFG_TYPE_FUNC]),
1155 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1156 bank->pm_save[PINCFG_TYPE_FUNC],
1157 bank->pm_save[PINCFG_TYPE_NUM]);
1158 writel(bank->pm_save[PINCFG_TYPE_NUM],
1159 reg + offs[PINCFG_TYPE_FUNC] + 4);
1160 } else {
1161 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1162 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1163 bank->pm_save[PINCFG_TYPE_FUNC]);
1164 }
1165 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1166 if (widths[type])
1167 writel(bank->pm_save[type], reg + offs[type]);
1168 }
1169}
1170
1171/**
1172 * samsung_pinctrl_suspend - save pinctrl state for suspend
1173 *
1174 * Save data for all banks across all devices.
1175 */
1176static int samsung_pinctrl_suspend(void)
1177{
1178 struct samsung_pinctrl_drv_data *drvdata;
1179
1180 list_for_each_entry(drvdata, &drvdata_list, node) {
1181 samsung_pinctrl_suspend_dev(drvdata);
1182 }
1183
1184 return 0;
1185}
1186
1187/**
1188 * samsung_pinctrl_resume - restore pinctrl state for suspend
1189 *
1190 * Restore data for all banks across all devices.
1191 */
1192static void samsung_pinctrl_resume(void)
1193{
1194 struct samsung_pinctrl_drv_data *drvdata;
1195
1196 list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
1197 samsung_pinctrl_resume_dev(drvdata);
1198 }
1199}
1200
1201#else
1202#define samsung_pinctrl_suspend NULL
1203#define samsung_pinctrl_resume NULL
1204#endif
1205
1206static struct syscore_ops samsung_pinctrl_syscore_ops = {
1207 .suspend = samsung_pinctrl_suspend,
1208 .resume = samsung_pinctrl_resume,
1209};
1210
30574f0d 1211static const struct of_device_id samsung_pinctrl_dt_match[] = {
d5517bec 1212#ifdef CONFIG_PINCTRL_EXYNOS
d97f5b98
TF		 1213 { .compatible = "samsung,exynos3250-pinctrl",
1214 .data = (void *)exynos3250_pin_ctrl },
b533c868 1215 { .compatible = "samsung,exynos4210-pinctrl",
30574f0d 1216 .data = (void *)exynos4210_pin_ctrl },
b533c868 1217 { .compatible = "samsung,exynos4x12-pinctrl",
6edc794a 1218 .data = (void *)exynos4x12_pin_ctrl },
2891ba29
TF		 1219 { .compatible = "samsung,exynos4415-pinctrl",
1220 .data = (void *)exynos4415_pin_ctrl },
f67faf48
TA		 1221 { .compatible = "samsung,exynos5250-pinctrl",
1222 .data = (void *)exynos5250_pin_ctrl },
9a8b6079
YGJ		 1223 { .compatible = "samsung,exynos5260-pinctrl",
1224 .data = (void *)exynos5260_pin_ctrl },
023e06df
HK		 1225 { .compatible = "samsung,exynos5410-pinctrl",
1226 .data = (void *)exynos5410_pin_ctrl },
983dbeb3
LKA		 1227 { .compatible = "samsung,exynos5420-pinctrl",
1228 .data = (void *)exynos5420_pin_ctrl },
3c5ecc9e
CC		 1229 { .compatible = "samsung,exynos5433-pinctrl",
1230 .data = (void *)exynos5433_pin_ctrl },
608a26a7
MK		 1231 { .compatible = "samsung,s5pv210-pinctrl",
1232 .data = (void *)s5pv210_pin_ctrl },
50cea0cf
NKC		 1233 { .compatible = "samsung,exynos7-pinctrl",
1234 .data = (void *)exynos7_pin_ctrl },
61dd7261
TF		 1235#endif
1236#ifdef CONFIG_PINCTRL_S3C64XX
1237 { .compatible = "samsung,s3c64xx-pinctrl",
1238 .data = s3c64xx_pin_ctrl },
af99a750
HS		 1239#endif
1240#ifdef CONFIG_PINCTRL_S3C24XX
1241 { .compatible = "samsung,s3c2412-pinctrl",
1242 .data = s3c2412_pin_ctrl },
1243 { .compatible = "samsung,s3c2416-pinctrl",
1244 .data = s3c2416_pin_ctrl },
1245 { .compatible = "samsung,s3c2440-pinctrl",
1246 .data = s3c2440_pin_ctrl },
1247 { .compatible = "samsung,s3c2450-pinctrl",
1248 .data = s3c2450_pin_ctrl },
d5517bec 1249#endif
30574f0d
TA		 1250 {},
1251};
1252MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
1253
1254static struct platform_driver samsung_pinctrl_driver = {
1255 .probe = samsung_pinctrl_probe,
1256 .driver = {
1257 .name = "samsung-pinctrl",
606fca94 1258 .of_match_table = samsung_pinctrl_dt_match,
30574f0d
TA		 1259 },
1260};
1261
1262static int __init samsung_pinctrl_drv_register(void)
1263{
d9f99863
DA		 1264 /*
1265 * Register syscore ops for save/restore of registers across suspend.
1266 * It's important to ensure that this driver is running at an earlier
1267 * initcall level than any arch-specific init calls that install syscore
1268 * ops that turn off pad retention (like exynos_pm_resume).
1269 */
1270 register_syscore_ops(&samsung_pinctrl_syscore_ops);
1271
30574f0d
TA		 1272 return platform_driver_register(&samsung_pinctrl_driver);
1273}
1274postcore_initcall(samsung_pinctrl_drv_register);
1275
1276static void __exit samsung_pinctrl_drv_unregister(void)
1277{
1278 platform_driver_unregister(&samsung_pinctrl_driver);
1279}
1280module_exit(samsung_pinctrl_drv_unregister);
1281
1282MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1283MODULE_DESCRIPTION("Samsung pinctrl driver");
1284MODULE_LICENSE("GPL v2");
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