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30574f0d TA |
1 | /* |
2 | * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's. | |
3 | * | |
4 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * Copyright (c) 2012 Linaro Ltd | |
7 | * http://www.linaro.org | |
8 | * | |
9 | * Author: Thomas Abraham <thomas.ab@samsung.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This driver implements the Samsung pinctrl driver. It supports setting up of | |
17 | * pinmux and pinconf configurations. The gpiolib interface is also included. | |
18 | * External interrupt (gpio and wakeup) support are not included in this driver | |
19 | * but provides extensions to which platform specific implementation of the gpio | |
20 | * and wakeup interrupts can be hooked to. | |
21 | */ | |
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/err.h> | |
28 | #include <linux/gpio.h> | |
a19fe2d4 | 29 | #include <linux/irqdomain.h> |
9abc2b90 | 30 | #include <linux/of_device.h> |
19846950 | 31 | #include <linux/spinlock.h> |
30574f0d | 32 | |
ebe629a3 | 33 | #include "../core.h" |
30574f0d TA |
34 | #include "pinctrl-samsung.h" |
35 | ||
8b1bd11c CC |
36 | /* maximum number of the memory resources */ |
37 | #define SAMSUNG_PINCTRL_NUM_RESOURCES 2 | |
38 | ||
30574f0d | 39 | /* list of all possible config options supported */ |
d5fd5da2 | 40 | static struct pin_config { |
9a2c1c3b TF |
41 | const char *property; |
42 | enum pincfg_type param; | |
43 | } cfg_params[] = { | |
30574f0d TA |
44 | { "samsung,pin-pud", PINCFG_TYPE_PUD }, |
45 | { "samsung,pin-drv", PINCFG_TYPE_DRV }, | |
46 | { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN }, | |
47 | { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN }, | |
2700bc01 | 48 | { "samsung,pin-val", PINCFG_TYPE_DAT }, |
30574f0d TA |
49 | }; |
50 | ||
6fb6f1ba | 51 | static unsigned int pin_base; |
40ba6227 | 52 | |
30574f0d TA |
53 | static int samsung_get_group_count(struct pinctrl_dev *pctldev) |
54 | { | |
9a2c1c3b | 55 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
30574f0d | 56 | |
9a2c1c3b | 57 | return pmx->nr_groups; |
30574f0d TA |
58 | } |
59 | ||
30574f0d | 60 | static const char *samsung_get_group_name(struct pinctrl_dev *pctldev, |
9a2c1c3b | 61 | unsigned group) |
30574f0d | 62 | { |
9a2c1c3b | 63 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
30574f0d | 64 | |
9a2c1c3b | 65 | return pmx->pin_groups[group].name; |
30574f0d TA |
66 | } |
67 | ||
30574f0d | 68 | static int samsung_get_group_pins(struct pinctrl_dev *pctldev, |
9a2c1c3b TF |
69 | unsigned group, |
70 | const unsigned **pins, | |
71 | unsigned *num_pins) | |
30574f0d | 72 | { |
9a2c1c3b TF |
73 | struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev); |
74 | ||
75 | *pins = pmx->pin_groups[group].pins; | |
76 | *num_pins = pmx->pin_groups[group].num_pins; | |
30574f0d | 77 | |
30574f0d TA |
78 | return 0; |
79 | } | |
80 | ||
9a2c1c3b TF |
81 | static int reserve_map(struct device *dev, struct pinctrl_map **map, |
82 | unsigned *reserved_maps, unsigned *num_maps, | |
83 | unsigned reserve) | |
84 | { | |
85 | unsigned old_num = *reserved_maps; | |
86 | unsigned new_num = *num_maps + reserve; | |
87 | struct pinctrl_map *new_map; | |
30574f0d | 88 | |
9a2c1c3b TF |
89 | if (old_num >= new_num) |
90 | return 0; | |
30574f0d | 91 | |
9a2c1c3b | 92 | new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL); |
fa5c0f46 | 93 | if (!new_map) |
30574f0d | 94 | return -ENOMEM; |
30574f0d | 95 | |
9a2c1c3b TF |
96 | memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map)); |
97 | ||
98 | *map = new_map; | |
99 | *reserved_maps = new_num; | |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
104 | static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps, | |
105 | unsigned *num_maps, const char *group, | |
106 | const char *function) | |
107 | { | |
108 | if (WARN_ON(*num_maps == *reserved_maps)) | |
109 | return -ENOSPC; | |
110 | ||
111 | (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; | |
112 | (*map)[*num_maps].data.mux.group = group; | |
113 | (*map)[*num_maps].data.mux.function = function; | |
114 | (*num_maps)++; | |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
119 | static int add_map_configs(struct device *dev, struct pinctrl_map **map, | |
120 | unsigned *reserved_maps, unsigned *num_maps, | |
121 | const char *group, unsigned long *configs, | |
122 | unsigned num_configs) | |
123 | { | |
124 | unsigned long *dup_configs; | |
125 | ||
126 | if (WARN_ON(*num_maps == *reserved_maps)) | |
127 | return -ENOSPC; | |
128 | ||
129 | dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs), | |
130 | GFP_KERNEL); | |
fa5c0f46 | 131 | if (!dup_configs) |
9a2c1c3b | 132 | return -ENOMEM; |
30574f0d | 133 | |
9a2c1c3b TF |
134 | (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP; |
135 | (*map)[*num_maps].data.configs.group_or_pin = group; | |
136 | (*map)[*num_maps].data.configs.configs = dup_configs; | |
137 | (*map)[*num_maps].data.configs.num_configs = num_configs; | |
138 | (*num_maps)++; | |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | static int add_config(struct device *dev, unsigned long **configs, | |
144 | unsigned *num_configs, unsigned long config) | |
145 | { | |
146 | unsigned old_num = *num_configs; | |
147 | unsigned new_num = old_num + 1; | |
148 | unsigned long *new_configs; | |
149 | ||
150 | new_configs = krealloc(*configs, sizeof(*new_configs) * new_num, | |
151 | GFP_KERNEL); | |
fa5c0f46 | 152 | if (!new_configs) |
9a2c1c3b | 153 | return -ENOMEM; |
30574f0d | 154 | |
9a2c1c3b TF |
155 | new_configs[old_num] = config; |
156 | ||
157 | *configs = new_configs; | |
158 | *num_configs = new_num; | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | static void samsung_dt_free_map(struct pinctrl_dev *pctldev, | |
164 | struct pinctrl_map *map, | |
165 | unsigned num_maps) | |
166 | { | |
167 | int i; | |
168 | ||
169 | for (i = 0; i < num_maps; i++) | |
170 | if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP) | |
171 | kfree(map[i].data.configs.configs); | |
172 | ||
173 | kfree(map); | |
174 | } | |
175 | ||
176 | static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata, | |
177 | struct device *dev, | |
178 | struct device_node *np, | |
179 | struct pinctrl_map **map, | |
180 | unsigned *reserved_maps, | |
181 | unsigned *num_maps) | |
182 | { | |
183 | int ret, i; | |
184 | u32 val; | |
185 | unsigned long config; | |
186 | unsigned long *configs = NULL; | |
187 | unsigned num_configs = 0; | |
188 | unsigned reserve; | |
189 | struct property *prop; | |
190 | const char *group; | |
191 | bool has_func = false; | |
192 | ||
193 | ret = of_property_read_u32(np, "samsung,pin-function", &val); | |
194 | if (!ret) | |
195 | has_func = true; | |
196 | ||
197 | for (i = 0; i < ARRAY_SIZE(cfg_params); i++) { | |
198 | ret = of_property_read_u32(np, cfg_params[i].property, &val); | |
199 | if (!ret) { | |
200 | config = PINCFG_PACK(cfg_params[i].param, val); | |
201 | ret = add_config(dev, &configs, &num_configs, config); | |
202 | if (ret < 0) | |
203 | goto exit; | |
204 | /* EINVAL=missing, which is fine since it's optional */ | |
205 | } else if (ret != -EINVAL) { | |
206 | dev_err(dev, "could not parse property %s\n", | |
207 | cfg_params[i].property); | |
208 | } | |
30574f0d TA |
209 | } |
210 | ||
9a2c1c3b TF |
211 | reserve = 0; |
212 | if (has_func) | |
213 | reserve++; | |
214 | if (num_configs) | |
215 | reserve++; | |
216 | ret = of_property_count_strings(np, "samsung,pins"); | |
217 | if (ret < 0) { | |
218 | dev_err(dev, "could not parse property samsung,pins\n"); | |
219 | goto exit; | |
220 | } | |
221 | reserve *= ret; | |
222 | ||
223 | ret = reserve_map(dev, map, reserved_maps, num_maps, reserve); | |
224 | if (ret < 0) | |
225 | goto exit; | |
226 | ||
227 | of_property_for_each_string(np, "samsung,pins", prop, group) { | |
228 | if (has_func) { | |
229 | ret = add_map_mux(map, reserved_maps, | |
230 | num_maps, group, np->full_name); | |
231 | if (ret < 0) | |
232 | goto exit; | |
30574f0d | 233 | } |
30574f0d | 234 | |
9a2c1c3b TF |
235 | if (num_configs) { |
236 | ret = add_map_configs(dev, map, reserved_maps, | |
237 | num_maps, group, configs, | |
238 | num_configs); | |
239 | if (ret < 0) | |
240 | goto exit; | |
241 | } | |
30574f0d TA |
242 | } |
243 | ||
9a2c1c3b | 244 | ret = 0; |
30574f0d | 245 | |
9a2c1c3b TF |
246 | exit: |
247 | kfree(configs); | |
248 | return ret; | |
30574f0d TA |
249 | } |
250 | ||
9a2c1c3b TF |
251 | static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev, |
252 | struct device_node *np_config, | |
253 | struct pinctrl_map **map, | |
254 | unsigned *num_maps) | |
255 | { | |
256 | struct samsung_pinctrl_drv_data *drvdata; | |
257 | unsigned reserved_maps; | |
258 | struct device_node *np; | |
259 | int ret; | |
260 | ||
261 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
262 | ||
263 | reserved_maps = 0; | |
264 | *map = NULL; | |
265 | *num_maps = 0; | |
266 | ||
267 | if (!of_get_child_count(np_config)) | |
268 | return samsung_dt_subnode_to_map(drvdata, pctldev->dev, | |
269 | np_config, map, | |
270 | &reserved_maps, | |
271 | num_maps); | |
272 | ||
273 | for_each_child_of_node(np_config, np) { | |
274 | ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map, | |
275 | &reserved_maps, num_maps); | |
276 | if (ret < 0) { | |
277 | samsung_dt_free_map(pctldev, *map, *num_maps); | |
278 | return ret; | |
30574f0d | 279 | } |
9a2c1c3b | 280 | } |
30574f0d | 281 | |
9a2c1c3b | 282 | return 0; |
30574f0d TA |
283 | } |
284 | ||
285 | /* list of pinctrl callbacks for the pinctrl core */ | |
022ab148 | 286 | static const struct pinctrl_ops samsung_pctrl_ops = { |
30574f0d TA |
287 | .get_groups_count = samsung_get_group_count, |
288 | .get_group_name = samsung_get_group_name, | |
289 | .get_group_pins = samsung_get_group_pins, | |
290 | .dt_node_to_map = samsung_dt_node_to_map, | |
291 | .dt_free_map = samsung_dt_free_map, | |
292 | }; | |
293 | ||
294 | /* check if the selector is a valid pin function selector */ | |
295 | static int samsung_get_functions_count(struct pinctrl_dev *pctldev) | |
296 | { | |
297 | struct samsung_pinctrl_drv_data *drvdata; | |
298 | ||
299 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
300 | return drvdata->nr_functions; | |
301 | } | |
302 | ||
303 | /* return the name of the pin function specified */ | |
304 | static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev, | |
305 | unsigned selector) | |
306 | { | |
307 | struct samsung_pinctrl_drv_data *drvdata; | |
308 | ||
309 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
310 | return drvdata->pmx_functions[selector].name; | |
311 | } | |
312 | ||
313 | /* return the groups associated for the specified function selector */ | |
314 | static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev, | |
315 | unsigned selector, const char * const **groups, | |
316 | unsigned * const num_groups) | |
317 | { | |
318 | struct samsung_pinctrl_drv_data *drvdata; | |
319 | ||
320 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
321 | *groups = drvdata->pmx_functions[selector].groups; | |
322 | *num_groups = drvdata->pmx_functions[selector].num_groups; | |
323 | return 0; | |
324 | } | |
325 | ||
326 | /* | |
327 | * given a pin number that is local to a pin controller, find out the pin bank | |
328 | * and the register base of the pin bank. | |
329 | */ | |
62f14c0e TF |
330 | static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, |
331 | unsigned pin, void __iomem **reg, u32 *offset, | |
30574f0d TA |
332 | struct samsung_pin_bank **bank) |
333 | { | |
30574f0d TA |
334 | struct samsung_pin_bank *b; |
335 | ||
1bf00d7a | 336 | b = drvdata->pin_banks; |
30574f0d TA |
337 | |
338 | while ((pin >= b->pin_base) && | |
339 | ((b->pin_base + b->nr_pins - 1) < pin)) | |
340 | b++; | |
341 | ||
8b1bd11c | 342 | *reg = b->pctl_base + b->pctl_offset; |
30574f0d TA |
343 | *offset = pin - b->pin_base; |
344 | if (bank) | |
345 | *bank = b; | |
30574f0d TA |
346 | } |
347 | ||
348 | /* enable or disable a pinmux function */ | |
349 | static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector, | |
991efb0f | 350 | unsigned group) |
30574f0d TA |
351 | { |
352 | struct samsung_pinctrl_drv_data *drvdata; | |
94ce944b | 353 | const struct samsung_pin_bank_type *type; |
30574f0d TA |
354 | struct samsung_pin_bank *bank; |
355 | void __iomem *reg; | |
9a2c1c3b | 356 | u32 mask, shift, data, pin_offset; |
19846950 | 357 | unsigned long flags; |
9a2c1c3b TF |
358 | const struct samsung_pmx_func *func; |
359 | const struct samsung_pin_group *grp; | |
30574f0d TA |
360 | |
361 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
9a2c1c3b TF |
362 | func = &drvdata->pmx_functions[selector]; |
363 | grp = &drvdata->pin_groups[group]; | |
30574f0d | 364 | |
1bf00d7a | 365 | pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base, |
9a2c1c3b TF |
366 | ®, &pin_offset, &bank); |
367 | type = bank->type; | |
368 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; | |
369 | shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
370 | if (shift >= 32) { | |
371 | /* Some banks have two config registers */ | |
372 | shift -= 32; | |
373 | reg += 4; | |
374 | } | |
30574f0d | 375 | |
9a2c1c3b | 376 | spin_lock_irqsave(&bank->slock, flags); |
19846950 | 377 | |
9a2c1c3b TF |
378 | data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]); |
379 | data &= ~(mask << shift); | |
991efb0f | 380 | data |= func->val << shift; |
9a2c1c3b | 381 | writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]); |
19846950 | 382 | |
9a2c1c3b | 383 | spin_unlock_irqrestore(&bank->slock, flags); |
30574f0d TA |
384 | } |
385 | ||
386 | /* enable a specified pinmux by writing to registers */ | |
03e9f0ca LW |
387 | static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev, |
388 | unsigned selector, | |
389 | unsigned group) | |
30574f0d | 390 | { |
991efb0f | 391 | samsung_pinmux_setup(pctldev, selector, group); |
30574f0d TA |
392 | return 0; |
393 | } | |
394 | ||
30574f0d | 395 | /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ |
022ab148 | 396 | static const struct pinmux_ops samsung_pinmux_ops = { |
30574f0d TA |
397 | .get_functions_count = samsung_get_functions_count, |
398 | .get_function_name = samsung_pinmux_get_fname, | |
399 | .get_function_groups = samsung_pinmux_get_groups, | |
03e9f0ca | 400 | .set_mux = samsung_pinmux_set_mux, |
30574f0d TA |
401 | }; |
402 | ||
403 | /* set or get the pin config settings for a specified pin */ | |
404 | static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin, | |
405 | unsigned long *config, bool set) | |
406 | { | |
407 | struct samsung_pinctrl_drv_data *drvdata; | |
94ce944b | 408 | const struct samsung_pin_bank_type *type; |
30574f0d TA |
409 | struct samsung_pin_bank *bank; |
410 | void __iomem *reg_base; | |
411 | enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config); | |
412 | u32 data, width, pin_offset, mask, shift; | |
413 | u32 cfg_value, cfg_reg; | |
19846950 | 414 | unsigned long flags; |
30574f0d TA |
415 | |
416 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
1bf00d7a | 417 | pin_to_reg_bank(drvdata, pin - drvdata->pin_base, ®_base, |
30574f0d | 418 | &pin_offset, &bank); |
499147c9 | 419 | type = bank->type; |
30574f0d | 420 | |
499147c9 | 421 | if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type]) |
7c367d3d TF |
422 | return -EINVAL; |
423 | ||
499147c9 | 424 | width = type->fld_width[cfg_type]; |
43fc9e7f | 425 | cfg_reg = type->reg_offset[cfg_type]; |
499147c9 | 426 | |
19846950 TF |
427 | spin_lock_irqsave(&bank->slock, flags); |
428 | ||
30574f0d TA |
429 | mask = (1 << width) - 1; |
430 | shift = pin_offset * width; | |
431 | data = readl(reg_base + cfg_reg); | |
432 | ||
433 | if (set) { | |
434 | cfg_value = PINCFG_UNPACK_VALUE(*config); | |
435 | data &= ~(mask << shift); | |
436 | data |= (cfg_value << shift); | |
437 | writel(data, reg_base + cfg_reg); | |
438 | } else { | |
439 | data >>= shift; | |
440 | data &= mask; | |
441 | *config = PINCFG_PACK(cfg_type, data); | |
442 | } | |
19846950 TF |
443 | |
444 | spin_unlock_irqrestore(&bank->slock, flags); | |
445 | ||
30574f0d TA |
446 | return 0; |
447 | } | |
448 | ||
449 | /* set the pin config settings for a specified pin */ | |
450 | static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, | |
03b054e9 | 451 | unsigned long *configs, unsigned num_configs) |
30574f0d | 452 | { |
03b054e9 SY |
453 | int i, ret; |
454 | ||
455 | for (i = 0; i < num_configs; i++) { | |
456 | ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true); | |
457 | if (ret < 0) | |
458 | return ret; | |
459 | } /* for each config */ | |
460 | ||
461 | return 0; | |
30574f0d TA |
462 | } |
463 | ||
464 | /* get the pin config settings for a specified pin */ | |
465 | static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, | |
466 | unsigned long *config) | |
467 | { | |
468 | return samsung_pinconf_rw(pctldev, pin, config, false); | |
469 | } | |
470 | ||
471 | /* set the pin config settings for a specified pin group */ | |
472 | static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev, | |
03b054e9 SY |
473 | unsigned group, unsigned long *configs, |
474 | unsigned num_configs) | |
30574f0d TA |
475 | { |
476 | struct samsung_pinctrl_drv_data *drvdata; | |
477 | const unsigned int *pins; | |
478 | unsigned int cnt; | |
479 | ||
480 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
481 | pins = drvdata->pin_groups[group].pins; | |
482 | ||
483 | for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++) | |
03b054e9 | 484 | samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs); |
30574f0d TA |
485 | |
486 | return 0; | |
487 | } | |
488 | ||
489 | /* get the pin config settings for a specified pin group */ | |
490 | static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, | |
491 | unsigned int group, unsigned long *config) | |
492 | { | |
493 | struct samsung_pinctrl_drv_data *drvdata; | |
494 | const unsigned int *pins; | |
495 | ||
496 | drvdata = pinctrl_dev_get_drvdata(pctldev); | |
497 | pins = drvdata->pin_groups[group].pins; | |
498 | samsung_pinconf_get(pctldev, pins[0], config); | |
499 | return 0; | |
500 | } | |
501 | ||
502 | /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ | |
022ab148 | 503 | static const struct pinconf_ops samsung_pinconf_ops = { |
30574f0d TA |
504 | .pin_config_get = samsung_pinconf_get, |
505 | .pin_config_set = samsung_pinconf_set, | |
506 | .pin_config_group_get = samsung_pinconf_group_get, | |
507 | .pin_config_group_set = samsung_pinconf_group_set, | |
508 | }; | |
509 | ||
d9ff0eb9 YN |
510 | /* |
511 | * The samsung_gpio_set_vlaue() should be called with "bank->slock" held | |
512 | * to avoid race condition. | |
513 | */ | |
514 | static void samsung_gpio_set_value(struct gpio_chip *gc, | |
515 | unsigned offset, int value) | |
30574f0d | 516 | { |
9f57f81c | 517 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
94ce944b | 518 | const struct samsung_pin_bank_type *type = bank->type; |
30574f0d | 519 | void __iomem *reg; |
d3a7b9e3 | 520 | u32 data; |
30574f0d | 521 | |
8b1bd11c | 522 | reg = bank->pctl_base + bank->pctl_offset; |
30574f0d | 523 | |
43fc9e7f | 524 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 525 | data &= ~(1 << offset); |
30574f0d | 526 | if (value) |
d3a7b9e3 | 527 | data |= 1 << offset; |
43fc9e7f | 528 | writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d9ff0eb9 YN |
529 | } |
530 | ||
531 | /* gpiolib gpio_set callback function */ | |
532 | static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
533 | { | |
534 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); | |
535 | unsigned long flags; | |
19846950 | 536 | |
d9ff0eb9 YN |
537 | spin_lock_irqsave(&bank->slock, flags); |
538 | samsung_gpio_set_value(gc, offset, value); | |
19846950 | 539 | spin_unlock_irqrestore(&bank->slock, flags); |
30574f0d TA |
540 | } |
541 | ||
542 | /* gpiolib gpio_get callback function */ | |
543 | static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset) | |
544 | { | |
545 | void __iomem *reg; | |
d3a7b9e3 | 546 | u32 data; |
9f57f81c | 547 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
94ce944b | 548 | const struct samsung_pin_bank_type *type = bank->type; |
62f14c0e | 549 | |
8b1bd11c | 550 | reg = bank->pctl_base + bank->pctl_offset; |
30574f0d | 551 | |
43fc9e7f | 552 | data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]); |
d3a7b9e3 | 553 | data >>= offset; |
30574f0d TA |
554 | data &= 1; |
555 | return data; | |
556 | } | |
557 | ||
558 | /* | |
d9ff0eb9 YN |
559 | * The samsung_gpio_set_direction() should be called with "bank->slock" held |
560 | * to avoid race condition. | |
18c28caa TF |
561 | * The calls to gpio_direction_output() and gpio_direction_input() |
562 | * leads to this function call. | |
30574f0d | 563 | */ |
18c28caa TF |
564 | static int samsung_gpio_set_direction(struct gpio_chip *gc, |
565 | unsigned offset, bool input) | |
566 | { | |
94ce944b | 567 | const struct samsung_pin_bank_type *type; |
18c28caa TF |
568 | struct samsung_pin_bank *bank; |
569 | struct samsung_pinctrl_drv_data *drvdata; | |
570 | void __iomem *reg; | |
571 | u32 data, mask, shift; | |
18c28caa | 572 | |
9f57f81c | 573 | bank = gpiochip_get_data(gc); |
18c28caa TF |
574 | type = bank->type; |
575 | drvdata = bank->drvdata; | |
576 | ||
8b1bd11c CC |
577 | reg = bank->pctl_base + bank->pctl_offset |
578 | + type->reg_offset[PINCFG_TYPE_FUNC]; | |
18c28caa TF |
579 | |
580 | mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1; | |
581 | shift = offset * type->fld_width[PINCFG_TYPE_FUNC]; | |
582 | if (shift >= 32) { | |
583 | /* Some banks have two config registers */ | |
584 | shift -= 32; | |
585 | reg += 4; | |
586 | } | |
587 | ||
18c28caa TF |
588 | data = readl(reg); |
589 | data &= ~(mask << shift); | |
590 | if (!input) | |
591 | data |= FUNC_OUTPUT << shift; | |
592 | writel(data, reg); | |
593 | ||
18c28caa TF |
594 | return 0; |
595 | } | |
596 | ||
597 | /* gpiolib gpio_direction_input callback function. */ | |
30574f0d TA |
598 | static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
599 | { | |
d9ff0eb9 YN |
600 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
601 | unsigned long flags; | |
602 | int ret; | |
603 | ||
604 | spin_lock_irqsave(&bank->slock, flags); | |
605 | ret = samsung_gpio_set_direction(gc, offset, true); | |
606 | spin_unlock_irqrestore(&bank->slock, flags); | |
607 | return ret; | |
30574f0d TA |
608 | } |
609 | ||
18c28caa | 610 | /* gpiolib gpio_direction_output callback function. */ |
30574f0d TA |
611 | static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset, |
612 | int value) | |
613 | { | |
d9ff0eb9 YN |
614 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
615 | unsigned long flags; | |
616 | int ret; | |
617 | ||
618 | spin_lock_irqsave(&bank->slock, flags); | |
619 | samsung_gpio_set_value(gc, offset, value); | |
620 | ret = samsung_gpio_set_direction(gc, offset, false); | |
621 | spin_unlock_irqrestore(&bank->slock, flags); | |
622 | ||
623 | return ret; | |
30574f0d TA |
624 | } |
625 | ||
a19fe2d4 TF |
626 | /* |
627 | * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin | |
628 | * and a virtual IRQ, if not already present. | |
629 | */ | |
630 | static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
631 | { | |
9f57f81c | 632 | struct samsung_pin_bank *bank = gpiochip_get_data(gc); |
a19fe2d4 TF |
633 | unsigned int virq; |
634 | ||
635 | if (!bank->irq_domain) | |
636 | return -ENXIO; | |
637 | ||
638 | virq = irq_create_mapping(bank->irq_domain, offset); | |
639 | ||
640 | return (virq) ? : -ENXIO; | |
641 | } | |
642 | ||
9a2c1c3b TF |
643 | static struct samsung_pin_group *samsung_pinctrl_create_groups( |
644 | struct device *dev, | |
645 | struct samsung_pinctrl_drv_data *drvdata, | |
646 | unsigned int *cnt) | |
30574f0d | 647 | { |
9a2c1c3b TF |
648 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; |
649 | struct samsung_pin_group *groups, *grp; | |
650 | const struct pinctrl_pin_desc *pdesc; | |
651 | int i; | |
652 | ||
653 | groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups), | |
654 | GFP_KERNEL); | |
655 | if (!groups) | |
656 | return ERR_PTR(-EINVAL); | |
657 | grp = groups; | |
658 | ||
659 | pdesc = ctrldesc->pins; | |
660 | for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) { | |
661 | grp->name = pdesc->name; | |
662 | grp->pins = &pdesc->number; | |
663 | grp->num_pins = 1; | |
664 | } | |
665 | ||
666 | *cnt = ctrldesc->npins; | |
667 | return groups; | |
668 | } | |
30574f0d | 669 | |
9a2c1c3b TF |
670 | static int samsung_pinctrl_create_function(struct device *dev, |
671 | struct samsung_pinctrl_drv_data *drvdata, | |
672 | struct device_node *func_np, | |
673 | struct samsung_pmx_func *func) | |
674 | { | |
675 | int npins; | |
676 | int ret; | |
677 | int i; | |
678 | ||
679 | if (of_property_read_u32(func_np, "samsung,pin-function", &func->val)) | |
680 | return 0; | |
681 | ||
682 | npins = of_property_count_strings(func_np, "samsung,pins"); | |
683 | if (npins < 1) { | |
684 | dev_err(dev, "invalid pin list in %s node", func_np->name); | |
30574f0d TA |
685 | return -EINVAL; |
686 | } | |
687 | ||
9a2c1c3b TF |
688 | func->name = func_np->full_name; |
689 | ||
690 | func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL); | |
691 | if (!func->groups) | |
30574f0d | 692 | return -ENOMEM; |
30574f0d | 693 | |
9a2c1c3b TF |
694 | for (i = 0; i < npins; ++i) { |
695 | const char *gname; | |
696 | ||
697 | ret = of_property_read_string_index(func_np, "samsung,pins", | |
698 | i, &gname); | |
699 | if (ret) { | |
700 | dev_err(dev, | |
701 | "failed to read pin name %d from %s node\n", | |
702 | i, func_np->name); | |
703 | return ret; | |
30574f0d | 704 | } |
9a2c1c3b TF |
705 | |
706 | func->groups[i] = gname; | |
30574f0d TA |
707 | } |
708 | ||
9a2c1c3b TF |
709 | func->num_groups = npins; |
710 | return 1; | |
30574f0d TA |
711 | } |
712 | ||
9a2c1c3b TF |
713 | static struct samsung_pmx_func *samsung_pinctrl_create_functions( |
714 | struct device *dev, | |
715 | struct samsung_pinctrl_drv_data *drvdata, | |
716 | unsigned int *cnt) | |
30574f0d | 717 | { |
9a2c1c3b | 718 | struct samsung_pmx_func *functions, *func; |
30574f0d TA |
719 | struct device_node *dev_np = dev->of_node; |
720 | struct device_node *cfg_np; | |
9a2c1c3b | 721 | unsigned int func_cnt = 0; |
30574f0d TA |
722 | int ret; |
723 | ||
9a2c1c3b TF |
724 | /* |
725 | * Iterate over all the child nodes of the pin controller node | |
726 | * and create pin groups and pin function lists. | |
727 | */ | |
728 | for_each_child_of_node(dev_np, cfg_np) { | |
729 | struct device_node *func_np; | |
30574f0d | 730 | |
9a2c1c3b TF |
731 | if (!of_get_child_count(cfg_np)) { |
732 | if (!of_find_property(cfg_np, | |
733 | "samsung,pin-function", NULL)) | |
734 | continue; | |
735 | ++func_cnt; | |
736 | continue; | |
737 | } | |
738 | ||
739 | for_each_child_of_node(cfg_np, func_np) { | |
740 | if (!of_find_property(func_np, | |
741 | "samsung,pin-function", NULL)) | |
742 | continue; | |
743 | ++func_cnt; | |
744 | } | |
30574f0d | 745 | } |
30574f0d | 746 | |
9a2c1c3b TF |
747 | functions = devm_kzalloc(dev, func_cnt * sizeof(*functions), |
748 | GFP_KERNEL); | |
fa5c0f46 | 749 | if (!functions) |
1f7b8eae | 750 | return ERR_PTR(-ENOMEM); |
30574f0d TA |
751 | func = functions; |
752 | ||
753 | /* | |
754 | * Iterate over all the child nodes of the pin controller node | |
755 | * and create pin groups and pin function lists. | |
756 | */ | |
9a2c1c3b | 757 | func_cnt = 0; |
30574f0d | 758 | for_each_child_of_node(dev_np, cfg_np) { |
9a2c1c3b TF |
759 | struct device_node *func_np; |
760 | ||
761 | if (!of_get_child_count(cfg_np)) { | |
762 | ret = samsung_pinctrl_create_function(dev, drvdata, | |
763 | cfg_np, func); | |
764 | if (ret < 0) | |
765 | return ERR_PTR(ret); | |
766 | if (ret > 0) { | |
767 | ++func; | |
768 | ++func_cnt; | |
769 | } | |
30574f0d | 770 | continue; |
9a2c1c3b | 771 | } |
30574f0d | 772 | |
9a2c1c3b TF |
773 | for_each_child_of_node(cfg_np, func_np) { |
774 | ret = samsung_pinctrl_create_function(dev, drvdata, | |
775 | func_np, func); | |
776 | if (ret < 0) | |
777 | return ERR_PTR(ret); | |
778 | if (ret > 0) { | |
779 | ++func; | |
780 | ++func_cnt; | |
781 | } | |
30574f0d | 782 | } |
9a2c1c3b | 783 | } |
30574f0d | 784 | |
9a2c1c3b TF |
785 | *cnt = func_cnt; |
786 | return functions; | |
787 | } | |
30574f0d | 788 | |
9a2c1c3b TF |
789 | /* |
790 | * Parse the information about all the available pin groups and pin functions | |
791 | * from device node of the pin-controller. A pin group is formed with all | |
792 | * the pins listed in the "samsung,pins" property. | |
793 | */ | |
30574f0d | 794 | |
9a2c1c3b TF |
795 | static int samsung_pinctrl_parse_dt(struct platform_device *pdev, |
796 | struct samsung_pinctrl_drv_data *drvdata) | |
797 | { | |
798 | struct device *dev = &pdev->dev; | |
799 | struct samsung_pin_group *groups; | |
800 | struct samsung_pmx_func *functions; | |
801 | unsigned int grp_cnt = 0, func_cnt = 0; | |
802 | ||
803 | groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt); | |
804 | if (IS_ERR(groups)) { | |
805 | dev_err(dev, "failed to parse pin groups\n"); | |
806 | return PTR_ERR(groups); | |
807 | } | |
808 | ||
809 | functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt); | |
810 | if (IS_ERR(functions)) { | |
811 | dev_err(dev, "failed to parse pin functions\n"); | |
44a074ff | 812 | return PTR_ERR(functions); |
30574f0d TA |
813 | } |
814 | ||
815 | drvdata->pin_groups = groups; | |
816 | drvdata->nr_groups = grp_cnt; | |
817 | drvdata->pmx_functions = functions; | |
9a2c1c3b | 818 | drvdata->nr_functions = func_cnt; |
30574f0d TA |
819 | |
820 | return 0; | |
821 | } | |
822 | ||
823 | /* register the pinctrl interface with the pinctrl subsystem */ | |
150632b0 GKH |
824 | static int samsung_pinctrl_register(struct platform_device *pdev, |
825 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d TA |
826 | { |
827 | struct pinctrl_desc *ctrldesc = &drvdata->pctl; | |
828 | struct pinctrl_pin_desc *pindesc, *pdesc; | |
829 | struct samsung_pin_bank *pin_bank; | |
830 | char *pin_names; | |
831 | int pin, bank, ret; | |
832 | ||
833 | ctrldesc->name = "samsung-pinctrl"; | |
834 | ctrldesc->owner = THIS_MODULE; | |
835 | ctrldesc->pctlops = &samsung_pctrl_ops; | |
836 | ctrldesc->pmxops = &samsung_pinmux_ops; | |
837 | ctrldesc->confops = &samsung_pinconf_ops; | |
838 | ||
839 | pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) * | |
1bf00d7a | 840 | drvdata->nr_pins, GFP_KERNEL); |
fa5c0f46 | 841 | if (!pindesc) |
30574f0d | 842 | return -ENOMEM; |
30574f0d | 843 | ctrldesc->pins = pindesc; |
1bf00d7a | 844 | ctrldesc->npins = drvdata->nr_pins; |
30574f0d TA |
845 | |
846 | /* dynamically populate the pin number and pin name for pindesc */ | |
847 | for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++) | |
1bf00d7a | 848 | pdesc->number = pin + drvdata->pin_base; |
30574f0d TA |
849 | |
850 | /* | |
851 | * allocate space for storing the dynamically generated names for all | |
852 | * the pins which belong to this pin-controller. | |
853 | */ | |
854 | pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH * | |
1bf00d7a | 855 | drvdata->nr_pins, GFP_KERNEL); |
fa5c0f46 | 856 | if (!pin_names) |
30574f0d | 857 | return -ENOMEM; |
30574f0d TA |
858 | |
859 | /* for each pin, the name of the pin is pin-bank name + pin number */ | |
1bf00d7a TF |
860 | for (bank = 0; bank < drvdata->nr_banks; bank++) { |
861 | pin_bank = &drvdata->pin_banks[bank]; | |
30574f0d TA |
862 | for (pin = 0; pin < pin_bank->nr_pins; pin++) { |
863 | sprintf(pin_names, "%s-%d", pin_bank->name, pin); | |
864 | pdesc = pindesc + pin_bank->pin_base + pin; | |
865 | pdesc->name = pin_names; | |
866 | pin_names += PIN_NAME_LENGTH; | |
867 | } | |
868 | } | |
869 | ||
529301c1 TF |
870 | ret = samsung_pinctrl_parse_dt(pdev, drvdata); |
871 | if (ret) | |
872 | return ret; | |
873 | ||
9ed19e06 LD |
874 | drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc, |
875 | drvdata); | |
323de9ef | 876 | if (IS_ERR(drvdata->pctl_dev)) { |
30574f0d | 877 | dev_err(&pdev->dev, "could not register pinctrl driver\n"); |
323de9ef | 878 | return PTR_ERR(drvdata->pctl_dev); |
30574f0d TA |
879 | } |
880 | ||
1bf00d7a TF |
881 | for (bank = 0; bank < drvdata->nr_banks; ++bank) { |
882 | pin_bank = &drvdata->pin_banks[bank]; | |
d3a7b9e3 TF |
883 | pin_bank->grange.name = pin_bank->name; |
884 | pin_bank->grange.id = bank; | |
1bf00d7a | 885 | pin_bank->grange.pin_base = drvdata->pin_base |
6c6ce620 | 886 | + pin_bank->pin_base; |
d3a7b9e3 TF |
887 | pin_bank->grange.base = pin_bank->gpio_chip.base; |
888 | pin_bank->grange.npins = pin_bank->gpio_chip.ngpio; | |
889 | pin_bank->grange.gc = &pin_bank->gpio_chip; | |
890 | pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange); | |
891 | } | |
30574f0d | 892 | |
30574f0d TA |
893 | return 0; |
894 | } | |
895 | ||
d3a7b9e3 | 896 | static const struct gpio_chip samsung_gpiolib_chip = { |
98c85d58 JG |
897 | .request = gpiochip_generic_request, |
898 | .free = gpiochip_generic_free, | |
d3a7b9e3 TF |
899 | .set = samsung_gpio_set, |
900 | .get = samsung_gpio_get, | |
901 | .direction_input = samsung_gpio_direction_input, | |
902 | .direction_output = samsung_gpio_direction_output, | |
a19fe2d4 | 903 | .to_irq = samsung_gpio_to_irq, |
d3a7b9e3 TF |
904 | .owner = THIS_MODULE, |
905 | }; | |
906 | ||
30574f0d | 907 | /* register the gpiolib interface with the gpiolib subsystem */ |
150632b0 GKH |
908 | static int samsung_gpiolib_register(struct platform_device *pdev, |
909 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 910 | { |
1bf00d7a | 911 | struct samsung_pin_bank *bank = drvdata->pin_banks; |
30574f0d TA |
912 | struct gpio_chip *gc; |
913 | int ret; | |
d3a7b9e3 TF |
914 | int i; |
915 | ||
1bf00d7a | 916 | for (i = 0; i < drvdata->nr_banks; ++i, ++bank) { |
d3a7b9e3 TF |
917 | bank->gpio_chip = samsung_gpiolib_chip; |
918 | ||
919 | gc = &bank->gpio_chip; | |
1bf00d7a | 920 | gc->base = drvdata->pin_base + bank->pin_base; |
d3a7b9e3 | 921 | gc->ngpio = bank->nr_pins; |
58383c78 | 922 | gc->parent = &pdev->dev; |
d3a7b9e3 TF |
923 | gc->of_node = bank->of_node; |
924 | gc->label = bank->name; | |
925 | ||
9f57f81c | 926 | ret = gpiochip_add_data(gc, bank); |
d3a7b9e3 TF |
927 | if (ret) { |
928 | dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n", | |
929 | gc->label, ret); | |
930 | goto fail; | |
931 | } | |
30574f0d TA |
932 | } |
933 | ||
934 | return 0; | |
d3a7b9e3 TF |
935 | |
936 | fail: | |
937 | for (--i, --bank; i >= 0; --i, --bank) | |
2fcea6ce | 938 | gpiochip_remove(&bank->gpio_chip); |
d3a7b9e3 | 939 | return ret; |
30574f0d TA |
940 | } |
941 | ||
942 | /* unregister the gpiolib interface with the gpiolib subsystem */ | |
150632b0 GKH |
943 | static int samsung_gpiolib_unregister(struct platform_device *pdev, |
944 | struct samsung_pinctrl_drv_data *drvdata) | |
30574f0d | 945 | { |
1bf00d7a | 946 | struct samsung_pin_bank *bank = drvdata->pin_banks; |
d3a7b9e3 TF |
947 | int i; |
948 | ||
1bf00d7a | 949 | for (i = 0; i < drvdata->nr_banks; ++i, ++bank) |
2fcea6ce | 950 | gpiochip_remove(&bank->gpio_chip); |
1bf00d7a | 951 | |
2fcea6ce | 952 | return 0; |
30574f0d TA |
953 | } |
954 | ||
30574f0d | 955 | /* retrieve the soc specific data */ |
1bf00d7a TF |
956 | static const struct samsung_pin_ctrl * |
957 | samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, | |
958 | struct platform_device *pdev) | |
30574f0d TA |
959 | { |
960 | int id; | |
6defe9a0 | 961 | struct device_node *node = pdev->dev.of_node; |
ab663789 | 962 | struct device_node *np; |
8100cf47 | 963 | const struct samsung_pin_bank_data *bdata; |
1bf00d7a | 964 | const struct samsung_pin_ctrl *ctrl; |
40ba6227 | 965 | struct samsung_pin_bank *bank; |
8b1bd11c CC |
966 | struct resource *res; |
967 | void __iomem *virt_base[SAMSUNG_PINCTRL_NUM_RESOURCES]; | |
40ba6227 | 968 | int i; |
30574f0d | 969 | |
6defe9a0 | 970 | id = of_alias_get_id(node, "pinctrl"); |
30574f0d TA |
971 | if (id < 0) { |
972 | dev_err(&pdev->dev, "failed to get alias id\n"); | |
87993273 | 973 | return ERR_PTR(-ENOENT); |
30574f0d | 974 | } |
9abc2b90 MS |
975 | ctrl = of_device_get_match_data(&pdev->dev); |
976 | ctrl += id; | |
40ba6227 | 977 | |
1bf00d7a TF |
978 | d->suspend = ctrl->suspend; |
979 | d->resume = ctrl->resume; | |
1bf00d7a | 980 | d->nr_banks = ctrl->nr_banks; |
8100cf47 TF |
981 | d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks, |
982 | sizeof(*d->pin_banks), GFP_KERNEL); | |
983 | if (!d->pin_banks) | |
984 | return ERR_PTR(-ENOMEM); | |
1bf00d7a | 985 | |
8b1bd11c CC |
986 | if (ctrl->nr_ext_resources + 1 > SAMSUNG_PINCTRL_NUM_RESOURCES) |
987 | return ERR_PTR(-EINVAL); | |
988 | ||
989 | for (i = 0; i < ctrl->nr_ext_resources + 1; i++) { | |
990 | res = platform_get_resource(pdev, IORESOURCE_MEM, i); | |
59f34e80 AH |
991 | if (!res) { |
992 | dev_err(&pdev->dev, "failed to get mem%d resource\n", i); | |
993 | return ERR_PTR(-EINVAL); | |
994 | } | |
995 | virt_base[i] = devm_ioremap(&pdev->dev, res->start, | |
996 | resource_size(res)); | |
997 | if (!virt_base[i]) { | |
998 | dev_err(&pdev->dev, "failed to ioremap %pR\n", res); | |
999 | return ERR_PTR(-EIO); | |
1000 | } | |
8b1bd11c CC |
1001 | } |
1002 | ||
1bf00d7a | 1003 | bank = d->pin_banks; |
8100cf47 TF |
1004 | bdata = ctrl->pin_banks; |
1005 | for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) { | |
1006 | bank->type = bdata->type; | |
1007 | bank->pctl_offset = bdata->pctl_offset; | |
1008 | bank->nr_pins = bdata->nr_pins; | |
1009 | bank->eint_func = bdata->eint_func; | |
1010 | bank->eint_type = bdata->eint_type; | |
1011 | bank->eint_mask = bdata->eint_mask; | |
1012 | bank->eint_offset = bdata->eint_offset; | |
1013 | bank->name = bdata->name; | |
1014 | ||
19846950 | 1015 | spin_lock_init(&bank->slock); |
6defe9a0 | 1016 | bank->drvdata = d; |
1bf00d7a TF |
1017 | bank->pin_base = d->nr_pins; |
1018 | d->nr_pins += bank->nr_pins; | |
8b1bd11c CC |
1019 | |
1020 | bank->eint_base = virt_base[0]; | |
1021 | bank->pctl_base = virt_base[bdata->pctl_res_idx]; | |
40ba6227 TF |
1022 | } |
1023 | ||
ab663789 TF |
1024 | for_each_child_of_node(node, np) { |
1025 | if (!of_find_property(np, "gpio-controller", NULL)) | |
1026 | continue; | |
1bf00d7a TF |
1027 | bank = d->pin_banks; |
1028 | for (i = 0; i < d->nr_banks; ++i, ++bank) { | |
ab663789 TF |
1029 | if (!strcmp(bank->name, np->name)) { |
1030 | bank->of_node = np; | |
1031 | break; | |
1032 | } | |
1033 | } | |
1034 | } | |
1035 | ||
1bf00d7a TF |
1036 | d->pin_base = pin_base; |
1037 | pin_base += d->nr_pins; | |
40ba6227 TF |
1038 | |
1039 | return ctrl; | |
30574f0d TA |
1040 | } |
1041 | ||
150632b0 | 1042 | static int samsung_pinctrl_probe(struct platform_device *pdev) |
30574f0d TA |
1043 | { |
1044 | struct samsung_pinctrl_drv_data *drvdata; | |
1bf00d7a | 1045 | const struct samsung_pin_ctrl *ctrl; |
30574f0d | 1046 | struct device *dev = &pdev->dev; |
30574f0d TA |
1047 | struct resource *res; |
1048 | int ret; | |
1049 | ||
30574f0d | 1050 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); |
b09eed7f | 1051 | if (!drvdata) |
30574f0d | 1052 | return -ENOMEM; |
6defe9a0 TF |
1053 | |
1054 | ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev); | |
87993273 | 1055 | if (IS_ERR(ctrl)) { |
6defe9a0 | 1056 | dev_err(&pdev->dev, "driver data not available\n"); |
87993273 | 1057 | return PTR_ERR(ctrl); |
6defe9a0 | 1058 | } |
30574f0d TA |
1059 | drvdata->dev = dev; |
1060 | ||
30574f0d TA |
1061 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
1062 | if (res) | |
1063 | drvdata->irq = res->start; | |
1064 | ||
1fc8ad86 MS |
1065 | if (ctrl->retention_data) { |
1066 | drvdata->retention_ctrl = ctrl->retention_data->init(drvdata, | |
1067 | ctrl->retention_data); | |
1068 | if (IS_ERR(drvdata->retention_ctrl)) | |
1069 | return PTR_ERR(drvdata->retention_ctrl); | |
1070 | } | |
1071 | ||
30574f0d TA |
1072 | ret = samsung_gpiolib_register(pdev, drvdata); |
1073 | if (ret) | |
1074 | return ret; | |
1075 | ||
1076 | ret = samsung_pinctrl_register(pdev, drvdata); | |
1077 | if (ret) { | |
1078 | samsung_gpiolib_unregister(pdev, drvdata); | |
1079 | return ret; | |
1080 | } | |
1081 | ||
1082 | if (ctrl->eint_gpio_init) | |
1083 | ctrl->eint_gpio_init(drvdata); | |
1084 | if (ctrl->eint_wkup_init) | |
1085 | ctrl->eint_wkup_init(drvdata); | |
1086 | ||
1087 | platform_set_drvdata(pdev, drvdata); | |
d9f99863 | 1088 | |
30574f0d TA |
1089 | return 0; |
1090 | } | |
1091 | ||
d9f99863 | 1092 | /** |
2b24efa8 | 1093 | * samsung_pinctrl_suspend - save pinctrl state for suspend |
d9f99863 DA |
1094 | * |
1095 | * Save data for all banks handled by this device. | |
1096 | */ | |
304c92e8 | 1097 | static int __maybe_unused samsung_pinctrl_suspend(struct device *dev) |
d9f99863 | 1098 | { |
2b24efa8 | 1099 | struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); |
d9f99863 DA |
1100 | int i; |
1101 | ||
1bf00d7a TF |
1102 | for (i = 0; i < drvdata->nr_banks; i++) { |
1103 | struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; | |
8b1bd11c | 1104 | void __iomem *reg = bank->pctl_base + bank->pctl_offset; |
94ce944b TF |
1105 | const u8 *offs = bank->type->reg_offset; |
1106 | const u8 *widths = bank->type->fld_width; | |
d9f99863 DA |
1107 | enum pincfg_type type; |
1108 | ||
1109 | /* Registers without a powerdown config aren't lost */ | |
1110 | if (!widths[PINCFG_TYPE_CON_PDN]) | |
1111 | continue; | |
1112 | ||
1113 | for (type = 0; type < PINCFG_TYPE_NUM; type++) | |
1114 | if (widths[type]) | |
1115 | bank->pm_save[type] = readl(reg + offs[type]); | |
1116 | ||
1117 | if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { | |
1118 | /* Some banks have two config registers */ | |
1119 | bank->pm_save[PINCFG_TYPE_NUM] = | |
1120 | readl(reg + offs[PINCFG_TYPE_FUNC] + 4); | |
1121 | pr_debug("Save %s @ %p (con %#010x %08x)\n", | |
1122 | bank->name, reg, | |
1123 | bank->pm_save[PINCFG_TYPE_FUNC], | |
1124 | bank->pm_save[PINCFG_TYPE_NUM]); | |
1125 | } else { | |
1126 | pr_debug("Save %s @ %p (con %#010x)\n", bank->name, | |
1127 | reg, bank->pm_save[PINCFG_TYPE_FUNC]); | |
1128 | } | |
1129 | } | |
21c21993 | 1130 | |
1bf00d7a TF |
1131 | if (drvdata->suspend) |
1132 | drvdata->suspend(drvdata); | |
1fc8ad86 MS |
1133 | if (drvdata->retention_ctrl && drvdata->retention_ctrl->enable) |
1134 | drvdata->retention_ctrl->enable(drvdata); | |
2b24efa8 MS |
1135 | |
1136 | return 0; | |
d9f99863 DA |
1137 | } |
1138 | ||
1139 | /** | |
2b24efa8 | 1140 | * samsung_pinctrl_resume - restore pinctrl state from suspend |
d9f99863 DA |
1141 | * |
1142 | * Restore one of the banks that was saved during suspend. | |
1143 | * | |
1144 | * We don't bother doing anything complicated to avoid glitching lines since | |
1145 | * we're called before pad retention is turned off. | |
1146 | */ | |
304c92e8 | 1147 | static int __maybe_unused samsung_pinctrl_resume(struct device *dev) |
d9f99863 | 1148 | { |
2b24efa8 | 1149 | struct samsung_pinctrl_drv_data *drvdata = dev_get_drvdata(dev); |
d9f99863 DA |
1150 | int i; |
1151 | ||
1bf00d7a TF |
1152 | if (drvdata->resume) |
1153 | drvdata->resume(drvdata); | |
21c21993 | 1154 | |
1bf00d7a TF |
1155 | for (i = 0; i < drvdata->nr_banks; i++) { |
1156 | struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; | |
8b1bd11c | 1157 | void __iomem *reg = bank->pctl_base + bank->pctl_offset; |
94ce944b TF |
1158 | const u8 *offs = bank->type->reg_offset; |
1159 | const u8 *widths = bank->type->fld_width; | |
d9f99863 DA |
1160 | enum pincfg_type type; |
1161 | ||
1162 | /* Registers without a powerdown config aren't lost */ | |
1163 | if (!widths[PINCFG_TYPE_CON_PDN]) | |
1164 | continue; | |
1165 | ||
1166 | if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) { | |
1167 | /* Some banks have two config registers */ | |
1168 | pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n", | |
1169 | bank->name, reg, | |
1170 | readl(reg + offs[PINCFG_TYPE_FUNC]), | |
1171 | readl(reg + offs[PINCFG_TYPE_FUNC] + 4), | |
1172 | bank->pm_save[PINCFG_TYPE_FUNC], | |
1173 | bank->pm_save[PINCFG_TYPE_NUM]); | |
1174 | writel(bank->pm_save[PINCFG_TYPE_NUM], | |
1175 | reg + offs[PINCFG_TYPE_FUNC] + 4); | |
1176 | } else { | |
1177 | pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name, | |
1178 | reg, readl(reg + offs[PINCFG_TYPE_FUNC]), | |
1179 | bank->pm_save[PINCFG_TYPE_FUNC]); | |
1180 | } | |
1181 | for (type = 0; type < PINCFG_TYPE_NUM; type++) | |
1182 | if (widths[type]) | |
1183 | writel(bank->pm_save[type], reg + offs[type]); | |
1184 | } | |
1fc8ad86 MS |
1185 | |
1186 | if (drvdata->retention_ctrl && drvdata->retention_ctrl->disable) | |
1187 | drvdata->retention_ctrl->disable(drvdata); | |
d9f99863 DA |
1188 | |
1189 | return 0; | |
1190 | } | |
d9f99863 | 1191 | |
30574f0d | 1192 | static const struct of_device_id samsung_pinctrl_dt_match[] = { |
d5517bec | 1193 | #ifdef CONFIG_PINCTRL_EXYNOS |
d97f5b98 TF |
1194 | { .compatible = "samsung,exynos3250-pinctrl", |
1195 | .data = (void *)exynos3250_pin_ctrl }, | |
b533c868 | 1196 | { .compatible = "samsung,exynos4210-pinctrl", |
30574f0d | 1197 | .data = (void *)exynos4210_pin_ctrl }, |
b533c868 | 1198 | { .compatible = "samsung,exynos4x12-pinctrl", |
6edc794a | 1199 | .data = (void *)exynos4x12_pin_ctrl }, |
f67faf48 TA |
1200 | { .compatible = "samsung,exynos5250-pinctrl", |
1201 | .data = (void *)exynos5250_pin_ctrl }, | |
9a8b6079 YGJ |
1202 | { .compatible = "samsung,exynos5260-pinctrl", |
1203 | .data = (void *)exynos5260_pin_ctrl }, | |
023e06df HK |
1204 | { .compatible = "samsung,exynos5410-pinctrl", |
1205 | .data = (void *)exynos5410_pin_ctrl }, | |
983dbeb3 LKA |
1206 | { .compatible = "samsung,exynos5420-pinctrl", |
1207 | .data = (void *)exynos5420_pin_ctrl }, | |
3c5ecc9e CC |
1208 | { .compatible = "samsung,exynos5433-pinctrl", |
1209 | .data = (void *)exynos5433_pin_ctrl }, | |
608a26a7 MK |
1210 | { .compatible = "samsung,s5pv210-pinctrl", |
1211 | .data = (void *)s5pv210_pin_ctrl }, | |
50cea0cf NKC |
1212 | { .compatible = "samsung,exynos7-pinctrl", |
1213 | .data = (void *)exynos7_pin_ctrl }, | |
61dd7261 TF |
1214 | #endif |
1215 | #ifdef CONFIG_PINCTRL_S3C64XX | |
1216 | { .compatible = "samsung,s3c64xx-pinctrl", | |
1217 | .data = s3c64xx_pin_ctrl }, | |
af99a750 HS |
1218 | #endif |
1219 | #ifdef CONFIG_PINCTRL_S3C24XX | |
1220 | { .compatible = "samsung,s3c2412-pinctrl", | |
1221 | .data = s3c2412_pin_ctrl }, | |
1222 | { .compatible = "samsung,s3c2416-pinctrl", | |
1223 | .data = s3c2416_pin_ctrl }, | |
1224 | { .compatible = "samsung,s3c2440-pinctrl", | |
1225 | .data = s3c2440_pin_ctrl }, | |
1226 | { .compatible = "samsung,s3c2450-pinctrl", | |
1227 | .data = s3c2450_pin_ctrl }, | |
d5517bec | 1228 | #endif |
30574f0d TA |
1229 | {}, |
1230 | }; | |
1231 | MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match); | |
1232 | ||
2b24efa8 MS |
1233 | static const struct dev_pm_ops samsung_pinctrl_pm_ops = { |
1234 | SET_LATE_SYSTEM_SLEEP_PM_OPS(samsung_pinctrl_suspend, | |
1235 | samsung_pinctrl_resume) | |
1236 | }; | |
1237 | ||
30574f0d TA |
1238 | static struct platform_driver samsung_pinctrl_driver = { |
1239 | .probe = samsung_pinctrl_probe, | |
1240 | .driver = { | |
1241 | .name = "samsung-pinctrl", | |
606fca94 | 1242 | .of_match_table = samsung_pinctrl_dt_match, |
a0ee2ac0 | 1243 | .suppress_bind_attrs = true, |
2b24efa8 | 1244 | .pm = &samsung_pinctrl_pm_ops, |
30574f0d TA |
1245 | }, |
1246 | }; | |
1247 | ||
1248 | static int __init samsung_pinctrl_drv_register(void) | |
1249 | { | |
1250 | return platform_driver_register(&samsung_pinctrl_driver); | |
1251 | } | |
1252 | postcore_initcall(samsung_pinctrl_drv_register); | |
1253 | ||
1254 | static void __exit samsung_pinctrl_drv_unregister(void) | |
1255 | { | |
1256 | platform_driver_unregister(&samsung_pinctrl_driver); | |
1257 | } | |
1258 | module_exit(samsung_pinctrl_drv_unregister); | |
1259 | ||
1260 | MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>"); | |
1261 | MODULE_DESCRIPTION("Samsung pinctrl driver"); | |
1262 | MODULE_LICENSE("GPL v2"); |