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Commit | Line | Data |
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b3c185a7 PM |
1 | /* |
2 | * SuperH Pin Function Controller GPIO driver. | |
3 | * | |
4 | * Copyright (C) 2008 Magnus Damm | |
5 | * Copyright (C) 2009 - 2012 Paul Mundt | |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
c6193eac LP |
11 | |
12 | #define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt | |
b3c185a7 | 13 | |
1724acfd | 14 | #include <linux/device.h> |
b3c185a7 | 15 | #include <linux/gpio.h> |
90efde22 | 16 | #include <linux/init.h> |
b3c185a7 | 17 | #include <linux/module.h> |
ca5481c6 | 18 | #include <linux/pinctrl/consumer.h> |
90efde22 LP |
19 | #include <linux/slab.h> |
20 | #include <linux/spinlock.h> | |
b3c185a7 | 21 | |
f9165132 LP |
22 | #include "core.h" |
23 | ||
b3c185a7 PM |
24 | struct sh_pfc_chip { |
25 | struct sh_pfc *pfc; | |
26 | struct gpio_chip gpio_chip; | |
27 | }; | |
28 | ||
29 | static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) | |
30 | { | |
31 | return container_of(gc, struct sh_pfc_chip, gpio_chip); | |
32 | } | |
33 | ||
34 | static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) | |
35 | { | |
36 | return gpio_to_pfc_chip(gc)->pfc; | |
37 | } | |
38 | ||
39 | static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) | |
40 | { | |
ca5481c6 | 41 | return pinctrl_request_gpio(offset); |
b3c185a7 PM |
42 | } |
43 | ||
44 | static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) | |
45 | { | |
ca5481c6 | 46 | pinctrl_free_gpio(offset); |
b3c185a7 PM |
47 | } |
48 | ||
49 | static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) | |
50 | { | |
51 | struct pinmux_data_reg *dr = NULL; | |
52 | int bit = 0; | |
53 | ||
a99ebec1 | 54 | if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) |
b3c185a7 PM |
55 | BUG(); |
56 | else | |
57 | sh_pfc_write_bit(dr, bit, value); | |
58 | } | |
59 | ||
b3c185a7 PM |
60 | static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) |
61 | { | |
62 | struct pinmux_data_reg *dr = NULL; | |
63 | int bit = 0; | |
64 | ||
a99ebec1 | 65 | if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) |
b3c185a7 PM |
66 | return -EINVAL; |
67 | ||
68 | return sh_pfc_read_bit(dr, bit); | |
69 | } | |
70 | ||
ca5481c6 PM |
71 | static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
72 | { | |
73 | return pinctrl_gpio_direction_input(offset); | |
74 | } | |
75 | ||
76 | static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, | |
77 | int value) | |
78 | { | |
79 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
80 | ||
81 | return pinctrl_gpio_direction_output(offset); | |
82 | } | |
83 | ||
b3c185a7 PM |
84 | static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) |
85 | { | |
86 | return sh_gpio_get_value(gpio_to_pfc(gc), offset); | |
87 | } | |
88 | ||
89 | static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) | |
90 | { | |
91 | sh_gpio_set_value(gpio_to_pfc(gc), offset, value); | |
92 | } | |
93 | ||
94 | static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) | |
95 | { | |
96 | struct sh_pfc *pfc = gpio_to_pfc(gc); | |
97 | pinmux_enum_t enum_id; | |
98 | pinmux_enum_t *enum_ids; | |
99 | int i, k, pos; | |
100 | ||
101 | pos = 0; | |
102 | enum_id = 0; | |
103 | while (1) { | |
104 | pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); | |
105 | if (pos <= 0 || !enum_id) | |
106 | break; | |
107 | ||
19bb7fe3 LP |
108 | for (i = 0; i < pfc->info->gpio_irq_size; i++) { |
109 | enum_ids = pfc->info->gpio_irq[i].enum_ids; | |
b3c185a7 PM |
110 | for (k = 0; enum_ids[k]; k++) { |
111 | if (enum_ids[k] == enum_id) | |
19bb7fe3 | 112 | return pfc->info->gpio_irq[i].irq; |
b3c185a7 PM |
113 | } |
114 | } | |
115 | } | |
116 | ||
117 | return -ENOSYS; | |
118 | } | |
119 | ||
120 | static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) | |
121 | { | |
122 | struct sh_pfc *pfc = chip->pfc; | |
123 | struct gpio_chip *gc = &chip->gpio_chip; | |
124 | ||
125 | gc->request = sh_gpio_request; | |
126 | gc->free = sh_gpio_free; | |
127 | gc->direction_input = sh_gpio_direction_input; | |
128 | gc->get = sh_gpio_get; | |
129 | gc->direction_output = sh_gpio_direction_output; | |
130 | gc->set = sh_gpio_set; | |
131 | gc->to_irq = sh_gpio_to_irq; | |
132 | ||
19bb7fe3 | 133 | gc->label = pfc->info->name; |
b3c185a7 | 134 | gc->owner = THIS_MODULE; |
d7a7ca57 LP |
135 | gc->base = 0; |
136 | gc->ngpio = pfc->info->nr_gpios; | |
b3c185a7 PM |
137 | } |
138 | ||
139 | int sh_pfc_register_gpiochip(struct sh_pfc *pfc) | |
140 | { | |
141 | struct sh_pfc_chip *chip; | |
142 | int ret; | |
143 | ||
1724acfd | 144 | chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); |
b3c185a7 PM |
145 | if (unlikely(!chip)) |
146 | return -ENOMEM; | |
147 | ||
148 | chip->pfc = pfc; | |
149 | ||
150 | sh_pfc_gpio_setup(chip); | |
151 | ||
152 | ret = gpiochip_add(&chip->gpio_chip); | |
1724acfd | 153 | if (unlikely(ret < 0)) |
6f6a4a68 | 154 | return ret; |
6f6a4a68 LP |
155 | |
156 | pfc->gpio = chip; | |
b3c185a7 | 157 | |
d7a7ca57 LP |
158 | pr_info("%s handling gpio 0 -> %u\n", |
159 | pfc->info->name, pfc->info->nr_gpios - 1); | |
b3c185a7 | 160 | |
b3c185a7 PM |
161 | return 0; |
162 | } | |
163 | ||
6f6a4a68 | 164 | int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc) |
b3c185a7 | 165 | { |
6f6a4a68 | 166 | struct sh_pfc_chip *chip = pfc->gpio; |
b3c185a7 PM |
167 | int ret; |
168 | ||
169 | ret = gpiochip_remove(&chip->gpio_chip); | |
170 | if (unlikely(ret < 0)) | |
171 | return ret; | |
172 | ||
6f6a4a68 | 173 | pfc->gpio = NULL; |
b3c185a7 PM |
174 | return 0; |
175 | } |