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Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / sunxi / pinctrl-sun4i-a10.c
CommitLineData
f2821b1c
MR		 1/*
2 * Allwinner A10 SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014 Maxime Ripard
5 *
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
0c8c6ba0 13#include <linux/init.h>
f2821b1c
MR		 14#include <linux/platform_device.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-sunxi.h"
20
21static const struct sunxi_desc_pin sun4i_a10_pins[] = {
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
26 SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */
5d8d3496
IZ		 27 SUNXI_FUNCTION(0x4, "uart2"), /* RTS */
28 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD3 */
29 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 30 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
31 SUNXI_FUNCTION(0x0, "gpio_in"),
32 SUNXI_FUNCTION(0x1, "gpio_out"),
33 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
34 SUNXI_FUNCTION(0x3, "spi1"), /* CLK */
5d8d3496
IZ		 35 SUNXI_FUNCTION(0x4, "uart2"), /* CTS */
36 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD2 */
37 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 38 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
39 SUNXI_FUNCTION(0x0, "gpio_in"),
40 SUNXI_FUNCTION(0x1, "gpio_out"),
41 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
42 SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */
5d8d3496
IZ		 43 SUNXI_FUNCTION(0x4, "uart2"), /* TX */
44 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD1 */
45 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
50 SUNXI_FUNCTION(0x3, "spi1"), /* MISO */
5d8d3496
IZ		 51 SUNXI_FUNCTION(0x4, "uart2"), /* RX */
52 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXD0 */
53 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 54 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
55 SUNXI_FUNCTION(0x0, "gpio_in"),
56 SUNXI_FUNCTION(0x1, "gpio_out"),
57 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
5d8d3496
IZ		 58 SUNXI_FUNCTION(0x3, "spi1"), /* CS1 */
59 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD3 */
60 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 61 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
62 SUNXI_FUNCTION(0x0, "gpio_in"),
63 SUNXI_FUNCTION(0x1, "gpio_out"),
64 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
5d8d3496
IZ		 65 SUNXI_FUNCTION(0x3, "spi3"), /* CS0 */
66 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD2 */
67 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 68 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
69 SUNXI_FUNCTION(0x0, "gpio_in"),
70 SUNXI_FUNCTION(0x1, "gpio_out"),
71 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
5d8d3496
IZ		 72 SUNXI_FUNCTION(0x3, "spi3"), /* CLK */
73 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD1 */
74 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 75 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
76 SUNXI_FUNCTION(0x0, "gpio_in"),
77 SUNXI_FUNCTION(0x1, "gpio_out"),
78 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
5d8d3496
IZ		 79 SUNXI_FUNCTION(0x3, "spi3"), /* MOSI */
80 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXD0 */
81 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 82 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
83 SUNXI_FUNCTION(0x0, "gpio_in"),
84 SUNXI_FUNCTION(0x1, "gpio_out"),
85 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
5d8d3496
IZ		 86 SUNXI_FUNCTION(0x3, "spi3"), /* MISO */
87 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXCK */
88 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 89 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
5d8d3496
IZ		 93 SUNXI_FUNCTION(0x3, "spi3"), /* CS1 */
94 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ERXERR */
95 PINCTRL_SUN7I_A20),
96 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* MCLK */
97 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 98 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
99 SUNXI_FUNCTION(0x0, "gpio_in"),
100 SUNXI_FUNCTION(0x1, "gpio_out"),
101 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
5d8d3496
IZ		 102 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
103 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GRXDV */
104 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 105 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
106 SUNXI_FUNCTION(0x0, "gpio_in"),
107 SUNXI_FUNCTION(0x1, "gpio_out"),
108 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
5d8d3496
IZ		 109 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
110 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDC */
111 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 112 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
113 SUNXI_FUNCTION(0x0, "gpio_in"),
114 SUNXI_FUNCTION(0x1, "gpio_out"),
115 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
116 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
5d8d3496
IZ		 117 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
118 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* EMDIO */
119 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 120 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out"),
123 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
124 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
5d8d3496
IZ		 125 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
126 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCTL / ETXEN */
127 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 128 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
129 SUNXI_FUNCTION(0x0, "gpio_in"),
130 SUNXI_FUNCTION(0x1, "gpio_out"),
131 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
132 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
5d8d3496
IZ		 133 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
134 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXCK */
135 PINCTRL_SUN7I_A20),
136 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* BCLK */
137 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 138 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
139 SUNXI_FUNCTION(0x0, "gpio_in"),
140 SUNXI_FUNCTION(0x1, "gpio_out"),
141 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
142 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
5d8d3496
IZ		 143 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
144 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GTXCK / ECRS */
145 PINCTRL_SUN7I_A20),
146 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* LRCK */
147 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 148 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
149 SUNXI_FUNCTION(0x0, "gpio_in"),
150 SUNXI_FUNCTION(0x1, "gpio_out"),
151 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
152 SUNXI_FUNCTION(0x3, "can"), /* TX */
5d8d3496
IZ		 153 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
154 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GCLKIN / ECOL */
155 PINCTRL_SUN7I_A20),
156 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DO */
157 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 158 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
159 SUNXI_FUNCTION(0x0, "gpio_in"),
160 SUNXI_FUNCTION(0x1, "gpio_out"),
161 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
162 SUNXI_FUNCTION(0x3, "can"), /* RX */
5d8d3496
IZ		 163 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
164 SUNXI_FUNCTION_VARIANT(0x5, "gmac", /* GNULL / ETXERR */
165 PINCTRL_SUN7I_A20),
166 SUNXI_FUNCTION_VARIANT(0x6, "i2s1", /* DI */
167 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 168 /* Hole */
169 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out"),
172 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
173 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out"),
176 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
177 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
178 SUNXI_FUNCTION(0x0, "gpio_in"),
179 SUNXI_FUNCTION(0x1, "gpio_out"),
180 SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */
181 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
182 SUNXI_FUNCTION(0x0, "gpio_in"),
183 SUNXI_FUNCTION(0x1, "gpio_out"),
8152d8cc
MC		 184 SUNXI_FUNCTION(0x2, "ir0"), /* TX */
185 /*
186 * The SPDIF block is not referenced at all in the A10 user
187 * manual. However it is described in the code leaked and the
188 * pin descriptions are declared in the A20 user manual which
189 * is pin compatible with this device.
190 */
191 SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF MCLK */
f2821b1c
MR		 192 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out"),
195 SUNXI_FUNCTION(0x2, "ir0")), /* RX */
196 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 199 /*
200 * On A10 there's only one I2S controller and the pin group
201 * is simply named "i2s". On A20 there's two and thus it's
202 * renamed to "i2s0". Deal with these name here, in order
203 * to satisfy existing device trees.
204 */
205 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* MCLK */
206 PINCTRL_SUN4I_A10),
207 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* MCLK */
208 PINCTRL_SUN7I_A20),
f2821b1c
MR		 209 SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */
210 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
211 SUNXI_FUNCTION(0x0, "gpio_in"),
212 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 213 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* BCLK */
214 PINCTRL_SUN4I_A10),
215 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* BCLK */
216 PINCTRL_SUN7I_A20),
f2821b1c
MR		 217 SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */
218 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
219 SUNXI_FUNCTION(0x0, "gpio_in"),
220 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 221 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* LRCK */
222 PINCTRL_SUN4I_A10),
223 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* LRCK */
224 PINCTRL_SUN7I_A20),
f2821b1c
MR		 225 SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */
226 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 8),
227 SUNXI_FUNCTION(0x0, "gpio_in"),
228 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 229 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO0 */
230 PINCTRL_SUN4I_A10),
231 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO0 */
232 PINCTRL_SUN7I_A20),
f2821b1c
MR		 233 SUNXI_FUNCTION(0x3, "ac97")), /* DO */
234 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 9),
235 SUNXI_FUNCTION(0x0, "gpio_in"),
236 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 237 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO1 */
238 PINCTRL_SUN4I_A10),
239 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO1 */
240 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 241 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
242 SUNXI_FUNCTION(0x0, "gpio_in"),
243 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 244 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO2 */
245 PINCTRL_SUN4I_A10),
246 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO2 */
247 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 248 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 11),
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 251 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DO3 */
252 PINCTRL_SUN4I_A10),
253 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DO3 */
254 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 255 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 12),
256 SUNXI_FUNCTION(0x0, "gpio_in"),
257 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 258 SUNXI_FUNCTION_VARIANT(0x2, "i2s", /* DI */
259 PINCTRL_SUN4I_A10),
260 SUNXI_FUNCTION_VARIANT(0x2, "i2s0", /* DI */
261 PINCTRL_SUN7I_A20),
8152d8cc 262 SUNXI_FUNCTION(0x3, "ac97"), /* DI */
5d8d3496 263 /* Undocumented mux function on A10 - See SPDIF MCLK above */
8152d8cc 264 SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF IN */
f2821b1c
MR		 265 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 13),
266 SUNXI_FUNCTION(0x0, "gpio_in"),
267 SUNXI_FUNCTION(0x1, "gpio_out"),
8152d8cc 268 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
5d8d3496 269 /* Undocumented mux function on A10 - See SPDIF MCLK above */
8152d8cc 270 SUNXI_FUNCTION(0x4, "spdif")), /* SPDIF OUT */
f2821b1c
MR		 271 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 14),
272 SUNXI_FUNCTION(0x0, "gpio_in"),
273 SUNXI_FUNCTION(0x1, "gpio_out"),
274 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
275 SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */
276 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
277 SUNXI_FUNCTION(0x0, "gpio_in"),
278 SUNXI_FUNCTION(0x1, "gpio_out"),
279 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
280 SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */
281 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
282 SUNXI_FUNCTION(0x0, "gpio_in"),
283 SUNXI_FUNCTION(0x1, "gpio_out"),
284 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
285 SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */
286 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
287 SUNXI_FUNCTION(0x0, "gpio_in"),
288 SUNXI_FUNCTION(0x1, "gpio_out"),
289 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
290 SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */
291 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
292 SUNXI_FUNCTION(0x0, "gpio_in"),
293 SUNXI_FUNCTION(0x1, "gpio_out"),
294 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
295 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 19),
296 SUNXI_FUNCTION(0x0, "gpio_in"),
297 SUNXI_FUNCTION(0x1, "gpio_out"),
298 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
299 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 20),
300 SUNXI_FUNCTION(0x0, "gpio_in"),
301 SUNXI_FUNCTION(0x1, "gpio_out"),
302 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
303 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 21),
304 SUNXI_FUNCTION(0x0, "gpio_in"),
305 SUNXI_FUNCTION(0x1, "gpio_out"),
306 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
307 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 22),
308 SUNXI_FUNCTION(0x0, "gpio_in"),
309 SUNXI_FUNCTION(0x1, "gpio_out"),
310 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
311 SUNXI_FUNCTION(0x3, "ir1")), /* TX */
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 23),
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
316 SUNXI_FUNCTION(0x3, "ir1")), /* RX */
317 /* Hole */
318 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
319 SUNXI_FUNCTION(0x0, "gpio_in"),
320 SUNXI_FUNCTION(0x1, "gpio_out"),
321 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
322 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
323 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
324 SUNXI_FUNCTION(0x0, "gpio_in"),
325 SUNXI_FUNCTION(0x1, "gpio_out"),
326 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
327 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
328 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
329 SUNXI_FUNCTION(0x0, "gpio_in"),
330 SUNXI_FUNCTION(0x1, "gpio_out"),
331 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
332 SUNXI_FUNCTION(0x3, "spi0")), /* SCK */
333 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
334 SUNXI_FUNCTION(0x0, "gpio_in"),
335 SUNXI_FUNCTION(0x1, "gpio_out"),
336 SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
341 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
342 SUNXI_FUNCTION(0x0, "gpio_in"),
343 SUNXI_FUNCTION(0x1, "gpio_out"),
344 SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
349 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
351 SUNXI_FUNCTION(0x0, "gpio_in"),
352 SUNXI_FUNCTION(0x1, "gpio_out"),
353 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
354 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
355 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
356 SUNXI_FUNCTION(0x0, "gpio_in"),
357 SUNXI_FUNCTION(0x1, "gpio_out"),
358 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
359 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
360 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
361 SUNXI_FUNCTION(0x0, "gpio_in"),
362 SUNXI_FUNCTION(0x1, "gpio_out"),
363 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
364 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
365 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
366 SUNXI_FUNCTION(0x0, "gpio_in"),
367 SUNXI_FUNCTION(0x1, "gpio_out"),
368 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
369 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
370 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
371 SUNXI_FUNCTION(0x0, "gpio_in"),
372 SUNXI_FUNCTION(0x1, "gpio_out"),
373 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
374 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
375 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
376 SUNXI_FUNCTION(0x0, "gpio_in"),
377 SUNXI_FUNCTION(0x1, "gpio_out"),
378 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */
379 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
380 SUNXI_FUNCTION(0x0, "gpio_in"),
381 SUNXI_FUNCTION(0x1, "gpio_out"),
382 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */
383 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
384 SUNXI_FUNCTION(0x0, "gpio_in"),
385 SUNXI_FUNCTION(0x1, "gpio_out"),
386 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */
387 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out"),
390 SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */
391 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out"),
394 SUNXI_FUNCTION(0x2, "nand0")), /* NWP */
395 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
396 SUNXI_FUNCTION(0x0, "gpio_in"),
397 SUNXI_FUNCTION(0x1, "gpio_out"),
398 SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */
399 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
400 SUNXI_FUNCTION(0x0, "gpio_in"),
401 SUNXI_FUNCTION(0x1, "gpio_out"),
402 SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */
403 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
404 SUNXI_FUNCTION(0x0, "gpio_in"),
405 SUNXI_FUNCTION(0x1, "gpio_out"),
406 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
407 SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */
408 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
409 SUNXI_FUNCTION(0x0, "gpio_in"),
410 SUNXI_FUNCTION(0x1, "gpio_out"),
411 SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */
412 SUNXI_FUNCTION(0x3, "spi2")), /* CLK */
413 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
414 SUNXI_FUNCTION(0x0, "gpio_in"),
415 SUNXI_FUNCTION(0x1, "gpio_out"),
416 SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */
417 SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
419 SUNXI_FUNCTION(0x0, "gpio_in"),
420 SUNXI_FUNCTION(0x1, "gpio_out"),
421 SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */
422 SUNXI_FUNCTION(0x3, "spi2")), /* MISO */
423 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
424 SUNXI_FUNCTION(0x0, "gpio_in"),
425 SUNXI_FUNCTION(0x1, "gpio_out"),
426 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
427 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
428 SUNXI_FUNCTION(0x0, "gpio_in"),
429 SUNXI_FUNCTION(0x1, "gpio_out"),
430 SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */
431 /* Hole */
432 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
433 SUNXI_FUNCTION(0x0, "gpio_in"),
434 SUNXI_FUNCTION(0x1, "gpio_out"),
435 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
436 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
437 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
438 SUNXI_FUNCTION(0x0, "gpio_in"),
439 SUNXI_FUNCTION(0x1, "gpio_out"),
440 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
441 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
442 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
443 SUNXI_FUNCTION(0x0, "gpio_in"),
444 SUNXI_FUNCTION(0x1, "gpio_out"),
445 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
446 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
447 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
448 SUNXI_FUNCTION(0x0, "gpio_in"),
449 SUNXI_FUNCTION(0x1, "gpio_out"),
450 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
451 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
452 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
453 SUNXI_FUNCTION(0x0, "gpio_in"),
454 SUNXI_FUNCTION(0x1, "gpio_out"),
455 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
456 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
457 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
458 SUNXI_FUNCTION(0x0, "gpio_in"),
459 SUNXI_FUNCTION(0x1, "gpio_out"),
460 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
461 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
462 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
463 SUNXI_FUNCTION(0x0, "gpio_in"),
464 SUNXI_FUNCTION(0x1, "gpio_out"),
465 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
466 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
467 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
468 SUNXI_FUNCTION(0x0, "gpio_in"),
469 SUNXI_FUNCTION(0x1, "gpio_out"),
470 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
471 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
472 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
473 SUNXI_FUNCTION(0x0, "gpio_in"),
474 SUNXI_FUNCTION(0x1, "gpio_out"),
475 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
476 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
477 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
478 SUNXI_FUNCTION(0x0, "gpio_in"),
479 SUNXI_FUNCTION(0x1, "gpio_out"),
480 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
481 SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */
482 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
483 SUNXI_FUNCTION(0x0, "gpio_in"),
484 SUNXI_FUNCTION(0x1, "gpio_out"),
485 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
486 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
487 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
488 SUNXI_FUNCTION(0x0, "gpio_in"),
489 SUNXI_FUNCTION(0x1, "gpio_out"),
490 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
491 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
492 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
493 SUNXI_FUNCTION(0x0, "gpio_in"),
494 SUNXI_FUNCTION(0x1, "gpio_out"),
495 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
496 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
497 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
498 SUNXI_FUNCTION(0x0, "gpio_in"),
499 SUNXI_FUNCTION(0x1, "gpio_out"),
500 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
501 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
502 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
503 SUNXI_FUNCTION(0x0, "gpio_in"),
504 SUNXI_FUNCTION(0x1, "gpio_out"),
505 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
506 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
507 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
508 SUNXI_FUNCTION(0x0, "gpio_in"),
509 SUNXI_FUNCTION(0x1, "gpio_out"),
510 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
511 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
512 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
513 SUNXI_FUNCTION(0x0, "gpio_in"),
514 SUNXI_FUNCTION(0x1, "gpio_out"),
515 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
516 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
517 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
518 SUNXI_FUNCTION(0x0, "gpio_in"),
519 SUNXI_FUNCTION(0x1, "gpio_out"),
520 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
521 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
522 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
523 SUNXI_FUNCTION(0x0, "gpio_in"),
524 SUNXI_FUNCTION(0x1, "gpio_out"),
525 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
526 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
527 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
528 SUNXI_FUNCTION(0x0, "gpio_in"),
529 SUNXI_FUNCTION(0x1, "gpio_out"),
530 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
531 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
532 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
533 SUNXI_FUNCTION(0x0, "gpio_in"),
534 SUNXI_FUNCTION(0x1, "gpio_out"),
535 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
536 SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */
537 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
538 SUNXI_FUNCTION(0x0, "gpio_in"),
539 SUNXI_FUNCTION(0x1, "gpio_out"),
540 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
541 SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */
542 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
543 SUNXI_FUNCTION(0x0, "gpio_in"),
544 SUNXI_FUNCTION(0x1, "gpio_out"),
545 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
546 SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */
547 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
548 SUNXI_FUNCTION(0x0, "gpio_in"),
549 SUNXI_FUNCTION(0x1, "gpio_out"),
550 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
551 SUNXI_FUNCTION(0x3, "sim")), /* DET */
552 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
553 SUNXI_FUNCTION(0x0, "gpio_in"),
554 SUNXI_FUNCTION(0x1, "gpio_out"),
555 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
556 SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */
557 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
558 SUNXI_FUNCTION(0x0, "gpio_in"),
559 SUNXI_FUNCTION(0x1, "gpio_out"),
560 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
561 SUNXI_FUNCTION(0x3, "sim")), /* RST */
562 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
563 SUNXI_FUNCTION(0x0, "gpio_in"),
564 SUNXI_FUNCTION(0x1, "gpio_out"),
565 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
566 SUNXI_FUNCTION(0x3, "sim")), /* SCK */
567 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
568 SUNXI_FUNCTION(0x0, "gpio_in"),
569 SUNXI_FUNCTION(0x1, "gpio_out"),
570 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
571 SUNXI_FUNCTION(0x3, "sim")), /* SDA */
572 /* Hole */
573 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
574 SUNXI_FUNCTION(0x0, "gpio_in"),
575 SUNXI_FUNCTION(0x1, "gpio_out"),
576 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
577 SUNXI_FUNCTION(0x3, "csi0")), /* PCK */
578 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
579 SUNXI_FUNCTION(0x0, "gpio_in"),
580 SUNXI_FUNCTION(0x1, "gpio_out"),
581 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
582 SUNXI_FUNCTION(0x3, "csi0")), /* CK */
583 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
584 SUNXI_FUNCTION(0x0, "gpio_in"),
585 SUNXI_FUNCTION(0x1, "gpio_out"),
586 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
587 SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */
588 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
589 SUNXI_FUNCTION(0x0, "gpio_in"),
590 SUNXI_FUNCTION(0x1, "gpio_out"),
591 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
592 SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */
593 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
594 SUNXI_FUNCTION(0x0, "gpio_in"),
595 SUNXI_FUNCTION(0x1, "gpio_out"),
596 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
597 SUNXI_FUNCTION(0x3, "csi0")), /* D0 */
598 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
599 SUNXI_FUNCTION(0x0, "gpio_in"),
600 SUNXI_FUNCTION(0x1, "gpio_out"),
601 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
602 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
603 SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */
604 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
608 SUNXI_FUNCTION(0x3, "csi0")), /* D2 */
609 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
610 SUNXI_FUNCTION(0x0, "gpio_in"),
611 SUNXI_FUNCTION(0x1, "gpio_out"),
612 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
613 SUNXI_FUNCTION(0x3, "csi0")), /* D3 */
614 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
615 SUNXI_FUNCTION(0x0, "gpio_in"),
616 SUNXI_FUNCTION(0x1, "gpio_out"),
617 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
618 SUNXI_FUNCTION(0x3, "csi0")), /* D4 */
619 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
620 SUNXI_FUNCTION(0x0, "gpio_in"),
621 SUNXI_FUNCTION(0x1, "gpio_out"),
622 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
623 SUNXI_FUNCTION(0x3, "csi0")), /* D5 */
624 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
625 SUNXI_FUNCTION(0x0, "gpio_in"),
626 SUNXI_FUNCTION(0x1, "gpio_out"),
627 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
628 SUNXI_FUNCTION(0x3, "csi0")), /* D6 */
629 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
630 SUNXI_FUNCTION(0x0, "gpio_in"),
631 SUNXI_FUNCTION(0x1, "gpio_out"),
632 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
633 SUNXI_FUNCTION(0x3, "csi0")), /* D7 */
634 /* Hole */
635 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
636 SUNXI_FUNCTION(0x0, "gpio_in"),
637 SUNXI_FUNCTION(0x1, "gpio_out"),
638 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
639 SUNXI_FUNCTION(0x4, "jtag")), /* MSI */
640 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
641 SUNXI_FUNCTION(0x0, "gpio_in"),
642 SUNXI_FUNCTION(0x1, "gpio_out"),
643 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
644 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
645 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
646 SUNXI_FUNCTION(0x0, "gpio_in"),
647 SUNXI_FUNCTION(0x1, "gpio_out"),
648 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
649 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
650 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
651 SUNXI_FUNCTION(0x0, "gpio_in"),
652 SUNXI_FUNCTION(0x1, "gpio_out"),
653 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
654 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
655 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
656 SUNXI_FUNCTION(0x0, "gpio_in"),
657 SUNXI_FUNCTION(0x1, "gpio_out"),
658 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
659 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
660 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
661 SUNXI_FUNCTION(0x0, "gpio_in"),
662 SUNXI_FUNCTION(0x1, "gpio_out"),
663 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
664 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
665 /* Hole */
666 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
667 SUNXI_FUNCTION(0x0, "gpio_in"),
668 SUNXI_FUNCTION(0x1, "gpio_out"),
669 SUNXI_FUNCTION(0x2, "ts1"), /* CLK */
670 SUNXI_FUNCTION(0x3, "csi1"), /* PCK */
671 SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */
672 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
673 SUNXI_FUNCTION(0x0, "gpio_in"),
674 SUNXI_FUNCTION(0x1, "gpio_out"),
675 SUNXI_FUNCTION(0x2, "ts1"), /* ERR */
676 SUNXI_FUNCTION(0x3, "csi1"), /* CK */
677 SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */
678 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
679 SUNXI_FUNCTION(0x0, "gpio_in"),
680 SUNXI_FUNCTION(0x1, "gpio_out"),
681 SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */
682 SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */
683 SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */
684 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
685 SUNXI_FUNCTION(0x0, "gpio_in"),
686 SUNXI_FUNCTION(0x1, "gpio_out"),
687 SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */
688 SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */
689 SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */
690 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
691 SUNXI_FUNCTION(0x0, "gpio_in"),
692 SUNXI_FUNCTION(0x1, "gpio_out"),
693 SUNXI_FUNCTION(0x2, "ts1"), /* D0 */
694 SUNXI_FUNCTION(0x3, "csi1"), /* D0 */
695 SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */
696 SUNXI_FUNCTION(0x5, "csi0")), /* D8 */
697 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
698 SUNXI_FUNCTION(0x0, "gpio_in"),
699 SUNXI_FUNCTION(0x1, "gpio_out"),
700 SUNXI_FUNCTION(0x2, "ts1"), /* D1 */
701 SUNXI_FUNCTION(0x3, "csi1"), /* D1 */
702 SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */
703 SUNXI_FUNCTION(0x5, "csi0")), /* D9 */
704 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
705 SUNXI_FUNCTION(0x0, "gpio_in"),
706 SUNXI_FUNCTION(0x1, "gpio_out"),
707 SUNXI_FUNCTION(0x2, "ts1"), /* D2 */
708 SUNXI_FUNCTION(0x3, "csi1"), /* D2 */
709 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
710 SUNXI_FUNCTION(0x5, "csi0")), /* D10 */
711 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
712 SUNXI_FUNCTION(0x0, "gpio_in"),
713 SUNXI_FUNCTION(0x1, "gpio_out"),
714 SUNXI_FUNCTION(0x2, "ts1"), /* D3 */
715 SUNXI_FUNCTION(0x3, "csi1"), /* D3 */
716 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
717 SUNXI_FUNCTION(0x5, "csi0")), /* D11 */
718 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
719 SUNXI_FUNCTION(0x0, "gpio_in"),
720 SUNXI_FUNCTION(0x1, "gpio_out"),
721 SUNXI_FUNCTION(0x2, "ts1"), /* D4 */
722 SUNXI_FUNCTION(0x3, "csi1"), /* D4 */
723 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
724 SUNXI_FUNCTION(0x5, "csi0")), /* D12 */
725 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
726 SUNXI_FUNCTION(0x0, "gpio_in"),
727 SUNXI_FUNCTION(0x1, "gpio_out"),
728 SUNXI_FUNCTION(0x2, "ts1"), /* D5 */
729 SUNXI_FUNCTION(0x3, "csi1"), /* D5 */
730 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
731 SUNXI_FUNCTION(0x5, "csi0")), /* D13 */
732 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
733 SUNXI_FUNCTION(0x0, "gpio_in"),
734 SUNXI_FUNCTION(0x1, "gpio_out"),
735 SUNXI_FUNCTION(0x2, "ts1"), /* D6 */
736 SUNXI_FUNCTION(0x3, "csi1"), /* D6 */
737 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
738 SUNXI_FUNCTION(0x5, "csi0")), /* D14 */
739 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
740 SUNXI_FUNCTION(0x0, "gpio_in"),
741 SUNXI_FUNCTION(0x1, "gpio_out"),
742 SUNXI_FUNCTION(0x2, "ts1"), /* D7 */
743 SUNXI_FUNCTION(0x3, "csi1"), /* D7 */
744 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
745 SUNXI_FUNCTION(0x5, "csi0")), /* D15 */
746 /* Hole */
747 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
748 SUNXI_FUNCTION(0x0, "gpio_in"),
749 SUNXI_FUNCTION(0x1, "gpio_out"),
750 SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */
5d8d3496
IZ		 751 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA0 */
752 PINCTRL_SUN4I_A10),
f2821b1c
MR		 753 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
754 SUNXI_FUNCTION_IRQ(0x6, 0), /* EINT0 */
755 SUNXI_FUNCTION(0x7, "csi1")), /* D0 */
756 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
757 SUNXI_FUNCTION(0x0, "gpio_in"),
758 SUNXI_FUNCTION(0x1, "gpio_out"),
759 SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */
5d8d3496
IZ		 760 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA1 */
761 PINCTRL_SUN4I_A10),
f2821b1c
MR		 762 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
763 SUNXI_FUNCTION_IRQ(0x6, 1), /* EINT1 */
764 SUNXI_FUNCTION(0x7, "csi1")), /* D1 */
765 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
766 SUNXI_FUNCTION(0x0, "gpio_in"),
767 SUNXI_FUNCTION(0x1, "gpio_out"),
768 SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */
5d8d3496
IZ		 769 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAA2 */
770 PINCTRL_SUN4I_A10),
f2821b1c
MR		 771 SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
772 SUNXI_FUNCTION_IRQ(0x6, 2), /* EINT2 */
773 SUNXI_FUNCTION(0x7, "csi1")), /* D2 */
774 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
775 SUNXI_FUNCTION(0x0, "gpio_in"),
776 SUNXI_FUNCTION(0x1, "gpio_out"),
777 SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */
5d8d3496
IZ		 778 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIRQ */
779 PINCTRL_SUN4I_A10),
f2821b1c
MR		 780 SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
781 SUNXI_FUNCTION_IRQ(0x6, 3), /* EINT3 */
782 SUNXI_FUNCTION(0x7, "csi1")), /* D3 */
783 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
784 SUNXI_FUNCTION(0x0, "gpio_in"),
785 SUNXI_FUNCTION(0x1, "gpio_out"),
786 SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */
5d8d3496
IZ		 787 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD0 */
788 PINCTRL_SUN4I_A10),
f2821b1c
MR		 789 SUNXI_FUNCTION(0x4, "uart4"), /* TX */
790 SUNXI_FUNCTION_IRQ(0x6, 4), /* EINT4 */
791 SUNXI_FUNCTION(0x7, "csi1")), /* D4 */
792 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
793 SUNXI_FUNCTION(0x0, "gpio_in"),
794 SUNXI_FUNCTION(0x1, "gpio_out"),
795 SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */
5d8d3496
IZ		 796 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD1 */
797 PINCTRL_SUN4I_A10),
f2821b1c
MR		 798 SUNXI_FUNCTION(0x4, "uart4"), /* RX */
799 SUNXI_FUNCTION_IRQ(0x6, 5), /* EINT5 */
800 SUNXI_FUNCTION(0x7, "csi1")), /* D5 */
801 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
802 SUNXI_FUNCTION(0x0, "gpio_in"),
803 SUNXI_FUNCTION(0x1, "gpio_out"),
804 SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */
5d8d3496
IZ		 805 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD2 */
806 PINCTRL_SUN4I_A10),
f2821b1c
MR		 807 SUNXI_FUNCTION(0x4, "uart5"), /* TX */
808 SUNXI_FUNCTION(0x5, "ms"), /* BS */
809 SUNXI_FUNCTION_IRQ(0x6, 6), /* EINT6 */
810 SUNXI_FUNCTION(0x7, "csi1")), /* D6 */
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out"),
814 SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */
5d8d3496
IZ		 815 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD3 */
816 PINCTRL_SUN4I_A10),
f2821b1c
MR		 817 SUNXI_FUNCTION(0x4, "uart5"), /* RX */
818 SUNXI_FUNCTION(0x5, "ms"), /* CLK */
819 SUNXI_FUNCTION_IRQ(0x6, 7), /* EINT7 */
820 SUNXI_FUNCTION(0x7, "csi1")), /* D7 */
821 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
822 SUNXI_FUNCTION(0x0, "gpio_in"),
823 SUNXI_FUNCTION(0x1, "gpio_out"),
824 SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */
5d8d3496
IZ		 825 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD4 */
826 PINCTRL_SUN4I_A10),
827 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD3 */
828 PINCTRL_SUN7I_A20),
f2821b1c
MR		 829 SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */
830 SUNXI_FUNCTION(0x5, "ms"), /* D0 */
831 SUNXI_FUNCTION_IRQ(0x6, 8), /* EINT8 */
832 SUNXI_FUNCTION(0x7, "csi1")), /* D8 */
833 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
834 SUNXI_FUNCTION(0x0, "gpio_in"),
835 SUNXI_FUNCTION(0x1, "gpio_out"),
836 SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */
5d8d3496
IZ		 837 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD5 */
838 PINCTRL_SUN4I_A10),
839 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD2 */
840 PINCTRL_SUN7I_A20),
f2821b1c
MR		 841 SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */
842 SUNXI_FUNCTION(0x5, "ms"), /* D1 */
843 SUNXI_FUNCTION_IRQ(0x6, 9), /* EINT9 */
844 SUNXI_FUNCTION(0x7, "csi1")), /* D9 */
845 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
846 SUNXI_FUNCTION(0x0, "gpio_in"),
847 SUNXI_FUNCTION(0x1, "gpio_out"),
848 SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */
5d8d3496
IZ		 849 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD6 */
850 PINCTRL_SUN4I_A10),
851 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD1 */
852 PINCTRL_SUN7I_A20),
f2821b1c
MR		 853 SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */
854 SUNXI_FUNCTION(0x5, "ms"), /* D2 */
855 SUNXI_FUNCTION_IRQ(0x6, 10), /* EINT10 */
856 SUNXI_FUNCTION(0x7, "csi1")), /* D10 */
857 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
858 SUNXI_FUNCTION(0x0, "gpio_in"),
859 SUNXI_FUNCTION(0x1, "gpio_out"),
860 SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */
5d8d3496
IZ		 861 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD7 */
862 PINCTRL_SUN4I_A10),
863 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXD0 */
864 PINCTRL_SUN7I_A20),
f2821b1c
MR		 865 SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */
866 SUNXI_FUNCTION(0x5, "ms"), /* D3 */
867 SUNXI_FUNCTION_IRQ(0x6, 11), /* EINT11 */
868 SUNXI_FUNCTION(0x7, "csi1")), /* D11 */
869 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
870 SUNXI_FUNCTION(0x0, "gpio_in"),
871 SUNXI_FUNCTION(0x1, "gpio_out"),
872 SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */
5d8d3496
IZ		 873 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD8 */
874 PINCTRL_SUN4I_A10),
f2821b1c
MR		 875 SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */
876 SUNXI_FUNCTION_IRQ(0x6, 12), /* EINT12 */
877 SUNXI_FUNCTION(0x7, "csi1")), /* D12 */
878 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
879 SUNXI_FUNCTION(0x0, "gpio_in"),
880 SUNXI_FUNCTION(0x1, "gpio_out"),
881 SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */
5d8d3496
IZ		 882 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD9 */
883 PINCTRL_SUN4I_A10),
f2821b1c
MR		 884 SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */
885 SUNXI_FUNCTION(0x5, "sim"), /* RST */
886 SUNXI_FUNCTION_IRQ(0x6, 13), /* EINT13 */
887 SUNXI_FUNCTION(0x7, "csi1")), /* D13 */
888 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
889 SUNXI_FUNCTION(0x0, "gpio_in"),
890 SUNXI_FUNCTION(0x1, "gpio_out"),
891 SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */
5d8d3496
IZ		 892 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD10 */
893 PINCTRL_SUN4I_A10),
894 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD3 */
895 PINCTRL_SUN7I_A20),
f2821b1c
MR		 896 SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */
897 SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */
898 SUNXI_FUNCTION_IRQ(0x6, 14), /* EINT14 */
899 SUNXI_FUNCTION(0x7, "csi1")), /* D14 */
900 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
901 SUNXI_FUNCTION(0x0, "gpio_in"),
902 SUNXI_FUNCTION(0x1, "gpio_out"),
903 SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */
5d8d3496
IZ		 904 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD11 */
905 PINCTRL_SUN4I_A10),
906 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD2 */
907 PINCTRL_SUN7I_A20),
f2821b1c
MR		 908 SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */
909 SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */
910 SUNXI_FUNCTION_IRQ(0x6, 15), /* EINT15 */
911 SUNXI_FUNCTION(0x7, "csi1")), /* D15 */
912 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
913 SUNXI_FUNCTION(0x0, "gpio_in"),
914 SUNXI_FUNCTION(0x1, "gpio_out"),
915 SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */
5d8d3496
IZ		 916 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD12 */
917 PINCTRL_SUN4I_A10),
918 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD1 */
919 PINCTRL_SUN7I_A20),
f2821b1c 920 SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */
d81ece74 921 SUNXI_FUNCTION(0x5, "sim"), /* DET */
f2821b1c
MR		 922 SUNXI_FUNCTION_IRQ(0x6, 16), /* EINT16 */
923 SUNXI_FUNCTION(0x7, "csi1")), /* D16 */
924 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
925 SUNXI_FUNCTION(0x0, "gpio_in"),
926 SUNXI_FUNCTION(0x1, "gpio_out"),
927 SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */
5d8d3496
IZ		 928 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD13 */
929 PINCTRL_SUN4I_A10),
930 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXD0 */
931 PINCTRL_SUN7I_A20),
f2821b1c
MR		 932 SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */
933 SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */
934 SUNXI_FUNCTION_IRQ(0x6, 17), /* EINT17 */
935 SUNXI_FUNCTION(0x7, "csi1")), /* D17 */
936 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
937 SUNXI_FUNCTION(0x0, "gpio_in"),
938 SUNXI_FUNCTION(0x1, "gpio_out"),
939 SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */
5d8d3496
IZ		 940 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD14 */
941 PINCTRL_SUN4I_A10),
942 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXCK */
943 PINCTRL_SUN7I_A20),
f2821b1c
MR		 944 SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */
945 SUNXI_FUNCTION(0x5, "sim"), /* SCK */
946 SUNXI_FUNCTION_IRQ(0x6, 18), /* EINT18 */
947 SUNXI_FUNCTION(0x7, "csi1")), /* D18 */
948 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
949 SUNXI_FUNCTION(0x0, "gpio_in"),
950 SUNXI_FUNCTION(0x1, "gpio_out"),
951 SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */
5d8d3496
IZ		 952 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAD15 */
953 PINCTRL_SUN4I_A10),
954 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXERR */
955 PINCTRL_SUN7I_A20),
f2821b1c
MR		 956 SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */
957 SUNXI_FUNCTION(0x5, "sim"), /* SDA */
958 SUNXI_FUNCTION_IRQ(0x6, 19), /* EINT19 */
959 SUNXI_FUNCTION(0x7, "csi1")), /* D19 */
960 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
961 SUNXI_FUNCTION(0x0, "gpio_in"),
962 SUNXI_FUNCTION(0x1, "gpio_out"),
963 SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */
5d8d3496
IZ		 964 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAOE */
965 PINCTRL_SUN4I_A10),
966 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ERXDV */
967 PINCTRL_SUN7I_A20),
f2821b1c
MR		 968 SUNXI_FUNCTION(0x4, "can"), /* TX */
969 SUNXI_FUNCTION_IRQ(0x6, 20), /* EINT20 */
970 SUNXI_FUNCTION(0x7, "csi1")), /* D20 */
971 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
972 SUNXI_FUNCTION(0x0, "gpio_in"),
973 SUNXI_FUNCTION(0x1, "gpio_out"),
974 SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */
5d8d3496
IZ		 975 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADREQ */
976 PINCTRL_SUN4I_A10),
977 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDC */
978 PINCTRL_SUN7I_A20),
f2821b1c
MR		 979 SUNXI_FUNCTION(0x4, "can"), /* RX */
980 SUNXI_FUNCTION_IRQ(0x6, 21), /* EINT21 */
981 SUNXI_FUNCTION(0x7, "csi1")), /* D21 */
982 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
983 SUNXI_FUNCTION(0x0, "gpio_in"),
984 SUNXI_FUNCTION(0x1, "gpio_out"),
985 SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */
5d8d3496
IZ		 986 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATADACK */
987 PINCTRL_SUN4I_A10),
988 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* EMDIO */
989 PINCTRL_SUN7I_A20),
f2821b1c
MR		 990 SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */
991 SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */
992 SUNXI_FUNCTION(0x7, "csi1")), /* D22 */
993 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
994 SUNXI_FUNCTION(0x0, "gpio_in"),
995 SUNXI_FUNCTION(0x1, "gpio_out"),
996 SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */
5d8d3496
IZ		 997 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS0 */
998 PINCTRL_SUN4I_A10),
999 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXEN */
1000 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1001 SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */
1002 SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */
1003 SUNXI_FUNCTION(0x7, "csi1")), /* D23 */
1004 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
1005 SUNXI_FUNCTION(0x0, "gpio_in"),
1006 SUNXI_FUNCTION(0x1, "gpio_out"),
1007 SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */
5d8d3496
IZ		 1008 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATACS1 */
1009 PINCTRL_SUN4I_A10),
1010 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXCK */
1011 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1012 SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */
1013 SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */
1014 SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */
1015 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
1016 SUNXI_FUNCTION(0x0, "gpio_in"),
1017 SUNXI_FUNCTION(0x1, "gpio_out"),
1018 SUNXI_FUNCTION(0x2, "lcd1"), /* DE */
5d8d3496
IZ		 1019 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIORDY */
1020 PINCTRL_SUN4I_A10),
1021 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECRS */
1022 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1023 SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */
1024 SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */
1025 SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */
1026 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
1027 SUNXI_FUNCTION(0x0, "gpio_in"),
1028 SUNXI_FUNCTION(0x1, "gpio_out"),
1029 SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */
5d8d3496
IZ		 1030 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOR */
1031 PINCTRL_SUN4I_A10),
1032 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ECOL */
1033 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1034 SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */
1035 SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */
1036 SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */
1037 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
1038 SUNXI_FUNCTION(0x0, "gpio_in"),
1039 SUNXI_FUNCTION(0x1, "gpio_out"),
1040 SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */
5d8d3496
IZ		 1041 SUNXI_FUNCTION_VARIANT(0x3, "pata", /* ATAIOW */
1042 PINCTRL_SUN4I_A10),
1043 SUNXI_FUNCTION_VARIANT(0x3, "emac", /* ETXERR */
1044 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1045 SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */
1046 SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */
1047 SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */
1048 /* Hole */
1049 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 0),
1050 SUNXI_FUNCTION(0x0, "gpio_in"),
5d8d3496
IZ		 1051 SUNXI_FUNCTION(0x1, "gpio_out"),
1052 SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SCK */
1053 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 1054 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 1),
1055 SUNXI_FUNCTION(0x0, "gpio_in"),
5d8d3496
IZ		 1056 SUNXI_FUNCTION(0x1, "gpio_out"),
1057 SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SDA */
1058 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 1059 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 2),
1060 SUNXI_FUNCTION(0x0, "gpio_in"),
5d8d3496
IZ		 1061 SUNXI_FUNCTION(0x1, "gpio_out"),
1062 SUNXI_FUNCTION_VARIANT(0x3, "i2c4", /* SCK */
1063 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 1064 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 3),
1065 SUNXI_FUNCTION(0x0, "gpio_in"),
1066 SUNXI_FUNCTION(0x1, "gpio_out"),
5d8d3496
IZ		 1067 SUNXI_FUNCTION(0x2, "pwm"), /* PWM1 */
1068 SUNXI_FUNCTION_VARIANT(0x3, "i2c3", /* SDA */
1069 PINCTRL_SUN7I_A20)),
f2821b1c
MR		 1070 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 4),
1071 SUNXI_FUNCTION(0x0, "gpio_in"),
1072 SUNXI_FUNCTION(0x1, "gpio_out"),
1073 SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */
1074 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 5),
1075 SUNXI_FUNCTION(0x0, "gpio_in"),
1076 SUNXI_FUNCTION(0x1, "gpio_out"),
1077 SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */
1078 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 6),
1079 SUNXI_FUNCTION(0x0, "gpio_in"),
1080 SUNXI_FUNCTION(0x1, "gpio_out"),
1081 SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */
1082 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 7),
1083 SUNXI_FUNCTION(0x0, "gpio_in"),
1084 SUNXI_FUNCTION(0x1, "gpio_out"),
1085 SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */
1086 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 8),
1087 SUNXI_FUNCTION(0x0, "gpio_in"),
1088 SUNXI_FUNCTION(0x1, "gpio_out"),
1089 SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */
1090 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 9),
1091 SUNXI_FUNCTION(0x0, "gpio_in"),
1092 SUNXI_FUNCTION(0x1, "gpio_out"),
1093 SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */
1094 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 10),
1095 SUNXI_FUNCTION(0x0, "gpio_in"),
1096 SUNXI_FUNCTION(0x1, "gpio_out"),
1097 SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */
1098 SUNXI_FUNCTION(0x3, "uart5"), /* TX */
1099 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
1100 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 11),
1101 SUNXI_FUNCTION(0x0, "gpio_in"),
1102 SUNXI_FUNCTION(0x1, "gpio_out"),
1103 SUNXI_FUNCTION(0x2, "spi0"), /* CLK */
1104 SUNXI_FUNCTION(0x3, "uart5"), /* RX */
1105 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
1106 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 12),
1107 SUNXI_FUNCTION(0x0, "gpio_in"),
1108 SUNXI_FUNCTION(0x1, "gpio_out"),
1109 SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */
1110 SUNXI_FUNCTION(0x3, "uart6"), /* TX */
5d8d3496
IZ		 1111 SUNXI_FUNCTION_VARIANT(0x4, "clk_out_a",
1112 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1113 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
1114 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 13),
1115 SUNXI_FUNCTION(0x0, "gpio_in"),
1116 SUNXI_FUNCTION(0x1, "gpio_out"),
1117 SUNXI_FUNCTION(0x2, "spi0"), /* MISO */
1118 SUNXI_FUNCTION(0x3, "uart6"), /* RX */
5d8d3496
IZ		 1119 SUNXI_FUNCTION_VARIANT(0x4, "clk_out_b",
1120 PINCTRL_SUN7I_A20),
f2821b1c
MR		 1121 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
1122 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 14),
1123 SUNXI_FUNCTION(0x0, "gpio_in"),
1124 SUNXI_FUNCTION(0x1, "gpio_out"),
1125 SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */
1126 SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */
1127 SUNXI_FUNCTION(0x4, "timer4"), /* TCLKIN0 */
1128 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
1129 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 15),
1130 SUNXI_FUNCTION(0x0, "gpio_in"),
1131 SUNXI_FUNCTION(0x1, "gpio_out"),
1132 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
1133 SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */
1134 SUNXI_FUNCTION(0x4, "timer5"), /* TCLKIN1 */
1135 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
1136 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 16),
1137 SUNXI_FUNCTION(0x0, "gpio_in"),
1138 SUNXI_FUNCTION(0x1, "gpio_out"),
1139 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
1140 SUNXI_FUNCTION(0x3, "uart2"), /* RTS */
1141 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
1142 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 17),
1143 SUNXI_FUNCTION(0x0, "gpio_in"),
1144 SUNXI_FUNCTION(0x1, "gpio_out"),
1145 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
1146 SUNXI_FUNCTION(0x3, "uart2"), /* CTS */
1147 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
1148 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 18),
1149 SUNXI_FUNCTION(0x0, "gpio_in"),
1150 SUNXI_FUNCTION(0x1, "gpio_out"),
1151 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
1152 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
1153 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
1154 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 19),
1155 SUNXI_FUNCTION(0x0, "gpio_in"),
1156 SUNXI_FUNCTION(0x1, "gpio_out"),
1157 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
1158 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
1159 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
1160 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 20),
1161 SUNXI_FUNCTION(0x0, "gpio_in"),
1162 SUNXI_FUNCTION(0x1, "gpio_out"),
1163 SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */
1164 SUNXI_FUNCTION(0x3, "uart7"), /* TX */
1165 SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */
1166 SUNXI_PIN(SUNXI_PINCTRL_PIN(I, 21),
1167 SUNXI_FUNCTION(0x0, "gpio_in"),
1168 SUNXI_FUNCTION(0x1, "gpio_out"),
1169 SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */
1170 SUNXI_FUNCTION(0x3, "uart7"), /* RX */
1171 SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */
1172};
1173
1174static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
1175 .pins = sun4i_a10_pins,
1176 .npins = ARRAY_SIZE(sun4i_a10_pins),
8966ada2 1177 .irq_banks = 1,
ef6d24cc 1178 .irq_read_needs_mux = true,
f2821b1c
MR		 1179};
1180
1181static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
1182{
5d8d3496
IZ		 1183 unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
1184
1185 return sunxi_pinctrl_init_with_variant(pdev, &sun4i_a10_pinctrl_data,
1186 variant);
f2821b1c
MR		 1187}
1188
baa9946e 1189static const struct of_device_id sun4i_a10_pinctrl_match[] = {
5d8d3496
IZ		 1190 {
1191 .compatible = "allwinner,sun4i-a10-pinctrl",
1192 .data = (void *)PINCTRL_SUN4I_A10
1193 },
1194 {
1195 .compatible = "allwinner,sun7i-a20-pinctrl",
1196 .data = (void *)PINCTRL_SUN7I_A20
1197 },
f2821b1c
MR		 1198 {}
1199};
f2821b1c
MR		 1200
1201static struct platform_driver sun4i_a10_pinctrl_driver = {
1202 .probe = sun4i_a10_pinctrl_probe,
1203 .driver = {
1204 .name = "sun4i-pinctrl",
f2821b1c
MR		 1205 .of_match_table = sun4i_a10_pinctrl_match,
1206 },
1207};
0c8c6ba0 1208builtin_platform_driver(sun4i_a10_pinctrl_driver);
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