[mirror_ubuntu-artful-kernel.git] / drivers / pinctrl / uniphier / pinctrl-uniphier.h

/*
 * Copyright (C) 2015-2017 Socionext Inc.
 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef __PINCTRL_UNIPHIER_H__
#define __PINCTRL_UNIPHIER_H__

#include <linux/bitops.h>
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/types.h>

struct platform_device;

/* input enable control register bit */
#define UNIPHIER_PIN_IECTRL_SHIFT	0
#define UNIPHIER_PIN_IECTRL_BITS	8
#define UNIPHIER_PIN_IECTRL_MASK	((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \
					 - 1)

/* drive strength control register number */
#define UNIPHIER_PIN_DRVCTRL_SHIFT	((UNIPHIER_PIN_IECTRL_SHIFT) + \
					(UNIPHIER_PIN_IECTRL_BITS))
#define UNIPHIER_PIN_DRVCTRL_BITS	9
#define UNIPHIER_PIN_DRVCTRL_MASK	((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
					 - 1)

/* drive control type */
#define UNIPHIER_PIN_DRV_TYPE_SHIFT	((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
					 (UNIPHIER_PIN_DRVCTRL_BITS))
#define UNIPHIER_PIN_DRV_TYPE_BITS	3
#define UNIPHIER_PIN_DRV_TYPE_MASK	((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
					 - 1)

/* pull-up / pull-down register number */
#define UNIPHIER_PIN_PUPDCTRL_SHIFT	((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
					 (UNIPHIER_PIN_DRV_TYPE_BITS))
#define UNIPHIER_PIN_PUPDCTRL_BITS	9
#define UNIPHIER_PIN_PUPDCTRL_MASK	((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
					 - 1)

/* direction of pull register */
#define UNIPHIER_PIN_PULL_DIR_SHIFT	((UNIPHIER_PIN_PUPDCTRL_SHIFT) + \
					 (UNIPHIER_PIN_PUPDCTRL_BITS))
#define UNIPHIER_PIN_PULL_DIR_BITS	3
#define UNIPHIER_PIN_PULL_DIR_MASK	((1UL << (UNIPHIER_PIN_PULL_DIR_BITS))\
					 - 1)

#if UNIPHIER_PIN_PULL_DIR_SHIFT + UNIPHIER_PIN_PULL_DIR_BITS > BITS_PER_LONG
#error "unable to pack pin attributes."
#endif

#define UNIPHIER_PIN_IECTRL_NONE	(UNIPHIER_PIN_IECTRL_MASK)

/* drive control type */
enum uniphier_pin_drv_type {
	UNIPHIER_PIN_DRV_1BIT,		/* 2 level control: 4/8 mA */
	UNIPHIER_PIN_DRV_2BIT,		/* 4 level control: 8/12/16/20 mA */
	UNIPHIER_PIN_DRV_3BIT,		/* 8 level control: 4/5/7/9/11/12/14/16 mA */
	UNIPHIER_PIN_DRV_FIXED4,	/* fixed to 4mA */
	UNIPHIER_PIN_DRV_FIXED5,	/* fixed to 5mA */
	UNIPHIER_PIN_DRV_FIXED8,	/* fixed to 8mA */
	UNIPHIER_PIN_DRV_NONE,		/* no support (input only pin) */
};

/* direction of pull register (no pin supports bi-directional pull biasing) */
enum uniphier_pin_pull_dir {
	UNIPHIER_PIN_PULL_UP,		/* pull-up or disabled */
	UNIPHIER_PIN_PULL_DOWN,		/* pull-down or disabled */
	UNIPHIER_PIN_PULL_UP_FIXED,	/* always pull-up */
	UNIPHIER_PIN_PULL_DOWN_FIXED,	/* always pull-down */
	UNIPHIER_PIN_PULL_NONE,		/* no pull register */
};

#define UNIPHIER_PIN_IECTRL(x) \
	(((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
#define UNIPHIER_PIN_DRVCTRL(x) \
	(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
#define UNIPHIER_PIN_DRV_TYPE(x) \
	(((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
#define UNIPHIER_PIN_PUPDCTRL(x) \
	(((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
#define UNIPHIER_PIN_PULL_DIR(x) \
	(((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))

#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
				(UNIPHIER_PIN_IECTRL(iectrl) |		\
				 UNIPHIER_PIN_DRVCTRL(drvctrl) |	\
				 UNIPHIER_PIN_DRV_TYPE(drv_type) |	\
				 UNIPHIER_PIN_PUPDCTRL(pupdctrl) |	\
				 UNIPHIER_PIN_PULL_DIR(pull_dir))

static inline unsigned int uniphier_pin_get_iectrl(void *drv_data)
{
	return ((unsigned long)drv_data >> UNIPHIER_PIN_IECTRL_SHIFT) &
						UNIPHIER_PIN_IECTRL_MASK;
}

static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data)
{
	return ((unsigned long)drv_data >> UNIPHIER_PIN_DRVCTRL_SHIFT) &
						UNIPHIER_PIN_DRVCTRL_MASK;
}

static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
{
	return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
						UNIPHIER_PIN_DRV_TYPE_MASK;
}

static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
{
	return ((unsigned long)drv_data >> UNIPHIER_PIN_PUPDCTRL_SHIFT) &
						UNIPHIER_PIN_PUPDCTRL_MASK;
}

static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data)
{
	return ((unsigned long)drv_data >> UNIPHIER_PIN_PULL_DIR_SHIFT) &
						UNIPHIER_PIN_PULL_DIR_MASK;
}

enum uniphier_pinmux_gpio_range_type {
	UNIPHIER_PINMUX_GPIO_RANGE_PORT,
	UNIPHIER_PINMUX_GPIO_RANGE_IRQ,
	UNIPHIER_PINMUX_GPIO_RANGE_NONE,
};

struct uniphier_pinctrl_group {
	const char *name;
	const unsigned *pins;
	unsigned num_pins;
	const int *muxvals;
	enum uniphier_pinmux_gpio_range_type range_type;
};

struct uniphier_pinmux_function {
	const char *name;
	const char * const *groups;
	unsigned num_groups;
};

struct uniphier_pinctrl_socdata {
	const struct pinctrl_pin_desc *pins;
	unsigned int npins;
	const struct uniphier_pinctrl_group *groups;
	int groups_count;
	const struct uniphier_pinmux_function *functions;
	int functions_count;
	unsigned int caps;
#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL	BIT(1)
#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE	BIT(0)
};

#define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g)			\
{									\
	.number = a,							\
	.name = b,							\
	.drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g),	\
}

#define __UNIPHIER_PINCTRL_GROUP(grp, type)				\
	{								\
		.name = #grp,						\
		.pins = grp##_pins,					\
		.num_pins = ARRAY_SIZE(grp##_pins),			\
		.muxvals = grp##_muxvals +				\
			BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) !=	\
					  ARRAY_SIZE(grp##_muxvals)),	\
		.range_type = type,					\
	}

#define UNIPHIER_PINCTRL_GROUP(grp)					\
	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_NONE)

#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(grp)			\
	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_PORT)

#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(grp)			\
	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_IRQ)

#define UNIPHIER_PINCTRL_GROUP_SINGLE(grp, array, ofst)			\
	{								\
		.name = #grp,						\
		.pins = array##_pins + ofst,				\
		.num_pins = 1,						\
		.muxvals = array##_muxvals + ofst,			\
	}

#define UNIPHIER_PINMUX_FUNCTION(func)					\
	{								\
		.name = #func,						\
		.groups = func##_groups,				\
		.num_groups = ARRAY_SIZE(func##_groups),		\
	}

int uniphier_pinctrl_probe(struct platform_device *pdev,
			   struct uniphier_pinctrl_socdata *socdata);

#endif /* __PINCTRL_UNIPHIER_H__ */
Commit	Line	Data
6e908892	1	/*
8ef364b3 MY	2	* Copyright (C) 2015-2017 Socionext Inc.
8ef364b3 MY	3	* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6e908892 MY	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#ifndef __PINCTRL_UNIPHIER_H__
	17	#define __PINCTRL_UNIPHIER_H__
	18
c2ebf475	19	#include <linux/bitops.h>
6e908892 MY	20	#include <linux/bug.h>
	21	#include <linux/kernel.h>
	22	#include <linux/types.h>
	23
fc78a566 MY	24	struct platform_device;
fc78a566 MY	25
6e908892 MY	26	/* input enable control register bit */
	27	#define UNIPHIER_PIN_IECTRL_SHIFT 0
	28	#define UNIPHIER_PIN_IECTRL_BITS 8
	29	#define UNIPHIER_PIN_IECTRL_MASK ((1UL << (UNIPHIER_PIN_IECTRL_BITS)) \
	30	- 1)
	31
	32	/* drive strength control register number */
	33	#define UNIPHIER_PIN_DRVCTRL_SHIFT ((UNIPHIER_PIN_IECTRL_SHIFT) + \
	34	(UNIPHIER_PIN_IECTRL_BITS))
	35	#define UNIPHIER_PIN_DRVCTRL_BITS 9
	36	#define UNIPHIER_PIN_DRVCTRL_MASK ((1UL << (UNIPHIER_PIN_DRVCTRL_BITS)) \
	37	- 1)
	38
9eaa98a6 MY	39	/* drive control type */
9eaa98a6 MY	40	#define UNIPHIER_PIN_DRV_TYPE_SHIFT ((UNIPHIER_PIN_DRVCTRL_SHIFT) + \
6e908892	41	(UNIPHIER_PIN_DRVCTRL_BITS))
9eaa98a6 MY	42	#define UNIPHIER_PIN_DRV_TYPE_BITS 3
9eaa98a6 MY	43	#define UNIPHIER_PIN_DRV_TYPE_MASK ((1UL << (UNIPHIER_PIN_DRV_TYPE_BITS)) \
6e908892 MY	44	- 1)
	45
	46	/* pull-up / pull-down register number */
9eaa98a6 MY	47	#define UNIPHIER_PIN_PUPDCTRL_SHIFT ((UNIPHIER_PIN_DRV_TYPE_SHIFT) + \
9eaa98a6 MY	48	(UNIPHIER_PIN_DRV_TYPE_BITS))
6e908892 MY	49	#define UNIPHIER_PIN_PUPDCTRL_BITS 9
	50	#define UNIPHIER_PIN_PUPDCTRL_MASK ((1UL << (UNIPHIER_PIN_PUPDCTRL_BITS))\
	51	- 1)
	52
	53	/* direction of pull register */
	54	#define UNIPHIER_PIN_PULL_DIR_SHIFT ((UNIPHIER_PIN_PUPDCTRL_SHIFT) + \
	55	(UNIPHIER_PIN_PUPDCTRL_BITS))
	56	#define UNIPHIER_PIN_PULL_DIR_BITS 3
	57	#define UNIPHIER_PIN_PULL_DIR_MASK ((1UL << (UNIPHIER_PIN_PULL_DIR_BITS))\
	58	- 1)
	59
	60	#if UNIPHIER_PIN_PULL_DIR_SHIFT + UNIPHIER_PIN_PULL_DIR_BITS > BITS_PER_LONG
	61	#error "unable to pack pin attributes."
	62	#endif
	63
	64	#define UNIPHIER_PIN_IECTRL_NONE (UNIPHIER_PIN_IECTRL_MASK)
	65
9eaa98a6 MY	66	/* drive control type */
	67	enum uniphier_pin_drv_type {
	68	UNIPHIER_PIN_DRV_1BIT, /* 2 level control: 4/8 mA */
	69	UNIPHIER_PIN_DRV_2BIT, /* 4 level control: 8/12/16/20 mA */
72e5706a	70	UNIPHIER_PIN_DRV_3BIT, /* 8 level control: 4/5/7/9/11/12/14/16 mA */
9eaa98a6 MY	71	UNIPHIER_PIN_DRV_FIXED4, /* fixed to 4mA */
	72	UNIPHIER_PIN_DRV_FIXED5, /* fixed to 5mA */
	73	UNIPHIER_PIN_DRV_FIXED8, /* fixed to 8mA */
6e908892 MY	74	UNIPHIER_PIN_DRV_NONE, /* no support (input only pin) */
	75	};
	76
	77	/* direction of pull register (no pin supports bi-directional pull biasing) */
	78	enum uniphier_pin_pull_dir {
	79	UNIPHIER_PIN_PULL_UP, /* pull-up or disabled */
	80	UNIPHIER_PIN_PULL_DOWN, /* pull-down or disabled */
	81	UNIPHIER_PIN_PULL_UP_FIXED, /* always pull-up */
	82	UNIPHIER_PIN_PULL_DOWN_FIXED, /* always pull-down */
	83	UNIPHIER_PIN_PULL_NONE, /* no pull register */
	84	};
	85
	86	#define UNIPHIER_PIN_IECTRL(x) \
	87	(((x) & (UNIPHIER_PIN_IECTRL_MASK)) << (UNIPHIER_PIN_IECTRL_SHIFT))
	88	#define UNIPHIER_PIN_DRVCTRL(x) \
	89	(((x) & (UNIPHIER_PIN_DRVCTRL_MASK)) << (UNIPHIER_PIN_DRVCTRL_SHIFT))
9eaa98a6 MY	90	#define UNIPHIER_PIN_DRV_TYPE(x) \
9eaa98a6 MY	91	(((x) & (UNIPHIER_PIN_DRV_TYPE_MASK)) << (UNIPHIER_PIN_DRV_TYPE_SHIFT))
6e908892 MY	92	#define UNIPHIER_PIN_PUPDCTRL(x) \
	93	(((x) & (UNIPHIER_PIN_PUPDCTRL_MASK)) << (UNIPHIER_PIN_PUPDCTRL_SHIFT))
	94	#define UNIPHIER_PIN_PULL_DIR(x) \
	95	(((x) & (UNIPHIER_PIN_PULL_DIR_MASK)) << (UNIPHIER_PIN_PULL_DIR_SHIFT))
	96
9eaa98a6	97	#define UNIPHIER_PIN_ATTR_PACKED(iectrl, drvctrl, drv_type, pupdctrl, pull_dir)\
6e908892 MY	98	(UNIPHIER_PIN_IECTRL(iectrl) \| \
6e908892 MY	99	UNIPHIER_PIN_DRVCTRL(drvctrl) \| \
9eaa98a6	100	UNIPHIER_PIN_DRV_TYPE(drv_type) \| \
6e908892 MY	101	UNIPHIER_PIN_PUPDCTRL(pupdctrl) \| \
	102	UNIPHIER_PIN_PULL_DIR(pull_dir))
	103
	104	static inline unsigned int uniphier_pin_get_iectrl(void *drv_data)
	105	{
	106	return ((unsigned long)drv_data >> UNIPHIER_PIN_IECTRL_SHIFT) &
	107	UNIPHIER_PIN_IECTRL_MASK;
	108	}
	109
	110	static inline unsigned int uniphier_pin_get_drvctrl(void *drv_data)
	111	{
	112	return ((unsigned long)drv_data >> UNIPHIER_PIN_DRVCTRL_SHIFT) &
	113	UNIPHIER_PIN_DRVCTRL_MASK;
	114	}
	115
9eaa98a6	116	static inline unsigned int uniphier_pin_get_drv_type(void *drv_data)
6e908892	117	{
9eaa98a6 MY	118	return ((unsigned long)drv_data >> UNIPHIER_PIN_DRV_TYPE_SHIFT) &
9eaa98a6 MY	119	UNIPHIER_PIN_DRV_TYPE_MASK;
6e908892 MY	120	}
	121
	122	static inline unsigned int uniphier_pin_get_pupdctrl(void *drv_data)
	123	{
	124	return ((unsigned long)drv_data >> UNIPHIER_PIN_PUPDCTRL_SHIFT) &
	125	UNIPHIER_PIN_PUPDCTRL_MASK;
	126	}
	127
	128	static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data)
	129	{
	130	return ((unsigned long)drv_data >> UNIPHIER_PIN_PULL_DIR_SHIFT) &
	131	UNIPHIER_PIN_PULL_DIR_MASK;
	132	}
	133
	134	enum uniphier_pinmux_gpio_range_type {
	135	UNIPHIER_PINMUX_GPIO_RANGE_PORT,
	136	UNIPHIER_PINMUX_GPIO_RANGE_IRQ,
	137	UNIPHIER_PINMUX_GPIO_RANGE_NONE,
	138	};
	139
	140	struct uniphier_pinctrl_group {
	141	const char *name;
	142	const unsigned *pins;
	143	unsigned num_pins;
39ec9ace	144	const int *muxvals;
6e908892 MY	145	enum uniphier_pinmux_gpio_range_type range_type;
	146	};
	147
	148	struct uniphier_pinmux_function {
	149	const char *name;
	150	const char * const *groups;
	151	unsigned num_groups;
	152	};
	153
	154	struct uniphier_pinctrl_socdata {
fc78a566 MY	155	const struct pinctrl_pin_desc *pins;
fc78a566 MY	156	unsigned int npins;
6e908892 MY	157	const struct uniphier_pinctrl_group *groups;
	158	int groups_count;
	159	const struct uniphier_pinmux_function *functions;
	160	int functions_count;
c2ebf475	161	unsigned int caps;
aa543888	162	#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
c2ebf475	163	#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
6e908892 MY	164	};
	165
	166	#define UNIPHIER_PINCTRL_PIN(a, b, c, d, e, f, g) \
	167	{ \
	168	.number = a, \
	169	.name = b, \
	170	.drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g), \
	171	}
	172
	173	#define __UNIPHIER_PINCTRL_GROUP(grp, type) \
	174	{ \
	175	.name = #grp, \
	176	.pins = grp##_pins, \
	177	.num_pins = ARRAY_SIZE(grp##_pins), \
	178	.muxvals = grp##_muxvals + \
	179	BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
	180	ARRAY_SIZE(grp##_muxvals)), \
	181	.range_type = type, \
	182	}
	183
	184	#define UNIPHIER_PINCTRL_GROUP(grp) \
	185	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_NONE)
	186
	187	#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(grp) \
	188	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_PORT)
	189
	190	#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(grp) \
	191	__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_IRQ)
	192
	193	#define UNIPHIER_PINCTRL_GROUP_SINGLE(grp, array, ofst) \
	194	{ \
	195	.name = #grp, \
	196	.pins = array##_pins + ofst, \
	197	.num_pins = 1, \
	198	.muxvals = array##_muxvals + ofst, \
	199	}
	200
	201	#define UNIPHIER_PINMUX_FUNCTION(func) \
	202	{ \
	203	.name = #func, \
	204	.groups = func##_groups, \
	205	.num_groups = ARRAY_SIZE(func##_groups), \
	206	}
	207
6e908892	208	int uniphier_pinctrl_probe(struct platform_device *pdev,
6e908892 MY	209	struct uniphier_pinctrl_socdata *socdata);
6e908892 MY	210
6e908892	211	#endif /* __PINCTRL_UNIPHIER_H__ */