[mirror_ubuntu-artful-kernel.git] / drivers / platform / x86 / intel_mid_thermal.c

/*
 * intel_mid_thermal.c - Intel MID platform thermal driver
 *
 * Copyright (C) 2011 Intel Corporation
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.        See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
 *
 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 * Author: Durgadoss R <durgadoss.r@intel.com>
 */

#define pr_fmt(fmt) "intel_mid_thermal: " fmt

#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/param.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/pm.h>
#include <linux/thermal.h>
#include <linux/mfd/intel_msic.h>

/* Number of thermal sensors */
#define MSIC_THERMAL_SENSORS	4

/* ADC1 - thermal registers */
#define MSIC_ADC_ENBL		0x10
#define MSIC_ADC_START		0x08

#define MSIC_ADCTHERM_ENBL	0x04
#define MSIC_ADCRRDATA_ENBL	0x05
#define MSIC_CHANL_MASK_VAL	0x0F

#define MSIC_STOPBIT_MASK	16
#define MSIC_ADCTHERM_MASK	4
/* Number of ADC channels */
#define ADC_CHANLS_MAX		15
#define ADC_LOOP_MAX		(ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)

/* ADC channel code values */
#define SKIN_SENSOR0_CODE	0x08
#define SKIN_SENSOR1_CODE	0x09
#define SYS_SENSOR_CODE		0x0A
#define MSIC_DIE_SENSOR_CODE	0x03

#define SKIN_THERM_SENSOR0	0
#define SKIN_THERM_SENSOR1	1
#define SYS_THERM_SENSOR2	2
#define MSIC_DIE_THERM_SENSOR3	3

/* ADC code range */
#define ADC_MAX			977
#define ADC_MIN			162
#define ADC_VAL0C		887
#define ADC_VAL20C		720
#define ADC_VAL40C		508
#define ADC_VAL60C		315

/* ADC base addresses */
#define ADC_CHNL_START_ADDR	INTEL_MSIC_ADC1ADDR0	/* increments by 1 */
#define ADC_DATA_START_ADDR	INTEL_MSIC_ADC1SNS0H	/* increments by 2 */

/* MSIC die attributes */
#define MSIC_DIE_ADC_MIN	488
#define MSIC_DIE_ADC_MAX	1004

/* This holds the address of the first free ADC channel,
 * among the 15 channels
 */
static int channel_index;

struct platform_info {
	struct platform_device *pdev;
	struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
};

struct thermal_device_info {
	unsigned int chnl_addr;
	int direct;
	/* This holds the current temperature in millidegree celsius */
	long curr_temp;
};

/**
 * to_msic_die_temp - converts adc_val to msic_die temperature
 * @adc_val: ADC value to be converted
 *
 * Can sleep
 */
static int to_msic_die_temp(uint16_t adc_val)
{
	return (368 * (adc_val) / 1000) - 220;
}

/**
 * is_valid_adc - checks whether the adc code is within the defined range
 * @min: minimum value for the sensor
 * @max: maximum value for the sensor
 *
 * Can sleep
 */
static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
{
	return (adc_val >= min) && (adc_val <= max);
}

/**
 * adc_to_temp - converts the ADC code to temperature in C
 * @direct: true if ths channel is direct index
 * @adc_val: the adc_val that needs to be converted
 * @tp: temperature return value
 *
 * Linear approximation is used to covert the skin adc value into temperature.
 * This technique is used to avoid very long look-up table to get
 * the appropriate temp value from ADC value.
 * The adc code vs sensor temp curve is split into five parts
 * to achieve very close approximate temp value with less than
 * 0.5C error
 */
static int adc_to_temp(int direct, uint16_t adc_val, int *tp)
{
	int temp;

	/* Direct conversion for die temperature */
	if (direct) {
		if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
			*tp = to_msic_die_temp(adc_val) * 1000;
			return 0;
		}
		return -ERANGE;
	}

	if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
		return -ERANGE;

	/* Linear approximation for skin temperature */
	if (adc_val > ADC_VAL0C)
		temp = 177 - (adc_val/5);
	else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
		temp = 111 - (adc_val/8);
	else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
		temp = 92 - (adc_val/10);
	else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
		temp = 91 - (adc_val/10);
	else
		temp = 112 - (adc_val/6);

	/* Convert temperature in celsius to milli degree celsius */
	*tp = temp * 1000;
	return 0;
}

/**
 * mid_read_temp - read sensors for temperature
 * @temp: holds the current temperature for the sensor after reading
 *
 * reads the adc_code from the channel and converts it to real
 * temperature. The converted value is stored in temp.
 *
 * Can sleep
 */
static int mid_read_temp(struct thermal_zone_device *tzd, int *temp)
{
	struct thermal_device_info *td_info = tzd->devdata;
	uint16_t adc_val, addr;
	uint8_t data = 0;
	int ret;
	int curr_temp;

	addr = td_info->chnl_addr;

	/* Enable the msic for conversion before reading */
	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
	if (ret)
		return ret;

	/* Re-toggle the RRDATARD bit (temporary workaround) */
	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
	if (ret)
		return ret;

	/* Read the higher bits of data */
	ret = intel_msic_reg_read(addr, &data);
	if (ret)
		return ret;

	/* Shift bits to accommodate the lower two data bits */
	adc_val = (data << 2);
	addr++;

	ret = intel_msic_reg_read(addr, &data);/* Read lower bits */
	if (ret)
		return ret;

	/* Adding lower two bits to the higher bits */
	data &= 03;
	adc_val += data;

	/* Convert ADC value to temperature */
	ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
	if (ret == 0)
		*temp = td_info->curr_temp = curr_temp;
	return ret;
}

/**
 * configure_adc - enables/disables the ADC for conversion
 * @val: zero: disables the ADC non-zero:enables the ADC
 *
 * Enable/Disable the ADC depending on the argument
 *
 * Can sleep
 */
static int configure_adc(int val)
{
	int ret;
	uint8_t data;

	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
	if (ret)
		return ret;

	if (val) {
		/* Enable and start the ADC */
		data |= (MSIC_ADC_ENBL | MSIC_ADC_START);
	} else {
		/* Just stop the ADC */
		data &= (~MSIC_ADC_START);
	}
	return intel_msic_reg_write(INTEL_MSIC_ADC1CNTL1, data);
}

/**
 * set_up_therm_channel - enable thermal channel for conversion
 * @base_addr: index of free msic ADC channel
 *
 * Enable all the three channels for conversion
 *
 * Can sleep
 */
static int set_up_therm_channel(u16 base_addr)
{
	int ret;

	/* Enable all the sensor channels */
	ret = intel_msic_reg_write(base_addr, SKIN_SENSOR0_CODE);
	if (ret)
		return ret;

	ret = intel_msic_reg_write(base_addr + 1, SKIN_SENSOR1_CODE);
	if (ret)
		return ret;

	ret = intel_msic_reg_write(base_addr + 2, SYS_SENSOR_CODE);
	if (ret)
		return ret;

	/* Since this is the last channel, set the stop bit
	 * to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
	ret = intel_msic_reg_write(base_addr + 3,
			(MSIC_DIE_SENSOR_CODE | 0x10));
	if (ret)
		return ret;

	/* Enable ADC and start it */
	return configure_adc(1);
}

/**
 * reset_stopbit - sets the stop bit to 0 on the given channel
 * @addr: address of the channel
 *
 * Can sleep
 */
static int reset_stopbit(uint16_t addr)
{
	int ret;
	uint8_t data;
	ret = intel_msic_reg_read(addr, &data);
	if (ret)
		return ret;
	/* Set the stop bit to zero */
	return intel_msic_reg_write(addr, (data & 0xEF));
}

/**
 * find_free_channel - finds an empty channel for conversion
 *
 * If the ADC is not enabled then start using 0th channel
 * itself. Otherwise find an empty channel by looking for a
 * channel in which the stopbit is set to 1. returns the index
 * of the first free channel if succeeds or an error code.
 *
 * Context: can sleep
 *
 * FIXME: Ultimately the channel allocator will move into the intel_scu_ipc
 * code.
 */
static int find_free_channel(void)
{
	int ret;
	int i;
	uint8_t data;

	/* check whether ADC is enabled */
	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
	if (ret)
		return ret;

	if ((data & MSIC_ADC_ENBL) == 0)
		return 0;

	/* ADC is already enabled; Looking for an empty channel */
	for (i = 0; i < ADC_CHANLS_MAX; i++) {
		ret = intel_msic_reg_read(ADC_CHNL_START_ADDR + i, &data);
		if (ret)
			return ret;

		if (data & MSIC_STOPBIT_MASK) {
			ret = i;
			break;
		}
	}
	return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
}

/**
 * mid_initialize_adc - initializing the ADC
 * @dev: our device structure
 *
 * Initialize the ADC for reading thermistor values. Can sleep.
 */
static int mid_initialize_adc(struct device *dev)
{
	u8  data;
	u16 base_addr;
	int ret;

	/*
	 * Ensure that adctherm is disabled before we
	 * initialize the ADC
	 */
	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL3, &data);
	if (ret)
		return ret;

	data &= ~MSIC_ADCTHERM_MASK;
	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, data);
	if (ret)
		return ret;

	/* Index of the first channel in which the stop bit is set */
	channel_index = find_free_channel();
	if (channel_index < 0) {
		dev_err(dev, "No free ADC channels");
		return channel_index;
	}

	base_addr = ADC_CHNL_START_ADDR + channel_index;

	if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
		/* Reset stop bit for channels other than 0 and 12 */
		ret = reset_stopbit(base_addr);
		if (ret)
			return ret;

		/* Index of the first free channel */
		base_addr++;
		channel_index++;
	}

	ret = set_up_therm_channel(base_addr);
	if (ret) {
		dev_err(dev, "unable to enable ADC");
		return ret;
	}
	dev_dbg(dev, "ADC initialization successful");
	return ret;
}

/**
 * initialize_sensor - sets default temp and timer ranges
 * @index: index of the sensor
 *
 * Context: can sleep
 */
static struct thermal_device_info *initialize_sensor(int index)
{
	struct thermal_device_info *td_info =
		kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);

	if (!td_info)
		return NULL;

	/* Set the base addr of the channel for this sensor */
	td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
	/* Sensor 3 is direct conversion */
	if (index == 3)
		td_info->direct = 1;
	return td_info;
}

#ifdef CONFIG_PM_SLEEP
/**
 * mid_thermal_resume - resume routine
 * @dev: device structure
 *
 * mid thermal resume: re-initializes the adc. Can sleep.
 */
static int mid_thermal_resume(struct device *dev)
{
	return mid_initialize_adc(dev);
}

/**
 * mid_thermal_suspend - suspend routine
 * @dev: device structure
 *
 * mid thermal suspend implements the suspend functionality
 * by stopping the ADC. Can sleep.
 */
static int mid_thermal_suspend(struct device *dev)
{
	/*
	 * This just stops the ADC and does not disable it.
	 * temporary workaround until we have a generic ADC driver.
	 * If 0 is passed, it disables the ADC.
	 */
	return configure_adc(0);
}
#endif

static SIMPLE_DEV_PM_OPS(mid_thermal_pm,
			 mid_thermal_suspend, mid_thermal_resume);

/**
 * read_curr_temp - reads the current temperature and stores in temp
 * @temp: holds the current temperature value after reading
 *
 * Can sleep
 */
static int read_curr_temp(struct thermal_zone_device *tzd, int *temp)
{
	WARN_ON(tzd == NULL);
	return mid_read_temp(tzd, temp);
}

/* Can't be const */
static struct thermal_zone_device_ops tzd_ops = {
	.get_temp = read_curr_temp,
};

/**
 * mid_thermal_probe - mfld thermal initialize
 * @pdev: platform device structure
 *
 * mid thermal probe initializes the hardware and registers
 * all the sensors with the generic thermal framework. Can sleep.
 */
static int mid_thermal_probe(struct platform_device *pdev)
{
	static char *name[MSIC_THERMAL_SENSORS] = {
		"skin0", "skin1", "sys", "msicdie"
	};

	int ret;
	int i;
	struct platform_info *pinfo;

	pinfo = devm_kzalloc(&pdev->dev, sizeof(struct platform_info),
			     GFP_KERNEL);
	if (!pinfo)
		return -ENOMEM;

	/* Initializing the hardware */
	ret = mid_initialize_adc(&pdev->dev);
	if (ret) {
		dev_err(&pdev->dev, "ADC init failed");
		return ret;
	}

	/* Register each sensor with the generic thermal framework*/
	for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
		struct thermal_device_info *td_info = initialize_sensor(i);

		if (!td_info) {
			ret = -ENOMEM;
			goto err;
		}
		pinfo->tzd[i] = thermal_zone_device_register(name[i],
				0, 0, td_info, &tzd_ops, NULL, 0, 0);
		if (IS_ERR(pinfo->tzd[i])) {
			kfree(td_info);
			ret = PTR_ERR(pinfo->tzd[i]);
			goto err;
		}
	}

	pinfo->pdev = pdev;
	platform_set_drvdata(pdev, pinfo);
	return 0;

err:
	while (--i >= 0) {
		kfree(pinfo->tzd[i]->devdata);
		thermal_zone_device_unregister(pinfo->tzd[i]);
	}
	configure_adc(0);
	return ret;
}

/**
 * mid_thermal_remove - mfld thermal finalize
 * @dev: platform device structure
 *
 * MLFD thermal remove unregisters all the sensors from the generic
 * thermal framework. Can sleep.
 */
static int mid_thermal_remove(struct platform_device *pdev)
{
	int i;
	struct platform_info *pinfo = platform_get_drvdata(pdev);

	for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
		kfree(pinfo->tzd[i]->devdata);
		thermal_zone_device_unregister(pinfo->tzd[i]);
	}

	/* Stop the ADC */
	return configure_adc(0);
}

#define DRIVER_NAME "msic_thermal"

static const struct platform_device_id therm_id_table[] = {
	{ DRIVER_NAME, 1 },
	{ }
};
MODULE_DEVICE_TABLE(platform, therm_id_table);

static struct platform_driver mid_thermal_driver = {
	.driver = {
		.name = DRIVER_NAME,
		.pm = &mid_thermal_pm,
	},
	.probe = mid_thermal_probe,
	.remove = mid_thermal_remove,
	.id_table = therm_id_table,
};

module_platform_driver(mid_thermal_driver);

MODULE_AUTHOR("Durgadoss R <durgadoss.r@intel.com>");
MODULE_DESCRIPTION("Intel Medfield Platform Thermal Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
f017fbe7 D	1	/*
	2	* intel_mid_thermal.c - Intel MID platform thermal driver
	3	*
	4	* Copyright (C) 2011 Intel Corporation
	5	*
	6	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; version 2 of the License.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License along
	18	* with this program; if not, write to the Free Software Foundation, Inc.,
	19	* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
	20	*
	21	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	22	* Author: Durgadoss R <durgadoss.r@intel.com>
	23	*/
	24
	25	#define pr_fmt(fmt) "intel_mid_thermal: " fmt
	26
	27	#include <linux/module.h>
	28	#include <linux/init.h>
	29	#include <linux/err.h>
	30	#include <linux/param.h>
	31	#include <linux/device.h>
	32	#include <linux/platform_device.h>
	33	#include <linux/slab.h>
	34	#include <linux/pm.h>
	35	#include <linux/thermal.h>
0f48d34e	36	#include <linux/mfd/intel_msic.h>
f017fbe7 D	37
f017fbe7 D	38	/* Number of thermal sensors */
253a0069	39	#define MSIC_THERMAL_SENSORS 4
f017fbe7 D	40
f017fbe7 D	41	/* ADC1 - thermal registers */
253a0069 AP	42	#define MSIC_ADC_ENBL 0x10
253a0069 AP	43	#define MSIC_ADC_START 0x08
f017fbe7	44
253a0069 AP	45	#define MSIC_ADCTHERM_ENBL 0x04
	46	#define MSIC_ADCRRDATA_ENBL 0x05
	47	#define MSIC_CHANL_MASK_VAL 0x0F
f017fbe7	48
253a0069 AP	49	#define MSIC_STOPBIT_MASK 16
	50	#define MSIC_ADCTHERM_MASK 4
	51	/* Number of ADC channels */
	52	#define ADC_CHANLS_MAX 15
	53	#define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)
f017fbe7 D	54
f017fbe7 D	55	/* ADC channel code values */
253a0069 AP	56	#define SKIN_SENSOR0_CODE 0x08
	57	#define SKIN_SENSOR1_CODE 0x09
	58	#define SYS_SENSOR_CODE 0x0A
	59	#define MSIC_DIE_SENSOR_CODE 0x03
f017fbe7	60
253a0069 AP	61	#define SKIN_THERM_SENSOR0 0
	62	#define SKIN_THERM_SENSOR1 1
	63	#define SYS_THERM_SENSOR2 2
	64	#define MSIC_DIE_THERM_SENSOR3 3
f017fbe7 D	65
f017fbe7 D	66	/* ADC code range */
253a0069 AP	67	#define ADC_MAX 977
	68	#define ADC_MIN 162
	69	#define ADC_VAL0C 887
	70	#define ADC_VAL20C 720
	71	#define ADC_VAL40C 508
	72	#define ADC_VAL60C 315
f017fbe7 D	73
f017fbe7 D	74	/* ADC base addresses */
0f48d34e MW	75	#define ADC_CHNL_START_ADDR INTEL_MSIC_ADC1ADDR0 /* increments by 1 */
0f48d34e MW	76	#define ADC_DATA_START_ADDR INTEL_MSIC_ADC1SNS0H /* increments by 2 */
f017fbe7 D	77
f017fbe7 D	78	/* MSIC die attributes */
253a0069 AP	79	#define MSIC_DIE_ADC_MIN 488
253a0069 AP	80	#define MSIC_DIE_ADC_MAX 1004
f017fbe7 D	81
	82	/* This holds the address of the first free ADC channel,
	83	* among the 15 channels
	84	*/
	85	static int channel_index;
	86
	87	struct platform_info {
253a0069 AP	88	struct platform_device *pdev;
253a0069 AP	89	struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
f017fbe7 D	90	};
	91
	92	struct thermal_device_info {
253a0069 AP	93	unsigned int chnl_addr;
	94	int direct;
	95	/* This holds the current temperature in millidegree celsius */
	96	long curr_temp;
f017fbe7 D	97	};
	98
	99	/**
	100	* to_msic_die_temp - converts adc_val to msic_die temperature
	101	* @adc_val: ADC value to be converted
	102	*
	103	* Can sleep
	104	*/
	105	static int to_msic_die_temp(uint16_t adc_val)
	106	{
253a0069	107	return (368 * (adc_val) / 1000) - 220;
f017fbe7 D	108	}
	109
	110	/**
	111	* is_valid_adc - checks whether the adc code is within the defined range
	112	* @min: minimum value for the sensor
	113	* @max: maximum value for the sensor
	114	*
	115	* Can sleep
	116	*/
	117	static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
	118	{
253a0069	119	return (adc_val >= min) && (adc_val <= max);
f017fbe7 D	120	}
	121
	122	/**
	123	* adc_to_temp - converts the ADC code to temperature in C
	124	* @direct: true if ths channel is direct index
	125	* @adc_val: the adc_val that needs to be converted
	126	* @tp: temperature return value
	127	*
	128	* Linear approximation is used to covert the skin adc value into temperature.
	129	* This technique is used to avoid very long look-up table to get
	130	* the appropriate temp value from ADC value.
	131	* The adc code vs sensor temp curve is split into five parts
	132	* to achieve very close approximate temp value with less than
	133	* 0.5C error
	134	*/
17e8351a	135	static int adc_to_temp(int direct, uint16_t adc_val, int *tp)
f017fbe7	136	{
253a0069 AP	137	int temp;
	138
	139	/* Direct conversion for die temperature */
	140	if (direct) {
	141	if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
	142	tp = to_msic_die_temp(adc_val) 1000;
	143	return 0;
	144	}
	145	return -ERANGE;
	146	}
	147
	148	if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
	149	return -ERANGE;
	150
	151	/* Linear approximation for skin temperature */
	152	if (adc_val > ADC_VAL0C)
	153	temp = 177 - (adc_val/5);
	154	else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
	155	temp = 111 - (adc_val/8);
	156	else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
	157	temp = 92 - (adc_val/10);
	158	else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
	159	temp = 91 - (adc_val/10);
	160	else
	161	temp = 112 - (adc_val/6);
	162
	163	/* Convert temperature in celsius to milli degree celsius */
	164	tp = temp 1000;
	165	return 0;
f017fbe7 D	166	}
	167
	168	/**
	169	* mid_read_temp - read sensors for temperature
	170	* @temp: holds the current temperature for the sensor after reading
	171	*
	172	* reads the adc_code from the channel and converts it to real
	173	* temperature. The converted value is stored in temp.
	174	*
	175	* Can sleep
	176	*/
17e8351a	177	static int mid_read_temp(struct thermal_zone_device tzd, int temp)
f017fbe7	178	{
253a0069 AP	179	struct thermal_device_info *td_info = tzd->devdata;
	180	uint16_t adc_val, addr;
	181	uint8_t data = 0;
	182	int ret;
17e8351a	183	int curr_temp;
253a0069 AP	184
	185	addr = td_info->chnl_addr;
	186
	187	/* Enable the msic for conversion before reading */
0f48d34e	188	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
253a0069 AP	189	if (ret)
	190	return ret;
	191
	192	/* Re-toggle the RRDATARD bit (temporary workaround) */
0f48d34e	193	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
253a0069 AP	194	if (ret)
	195	return ret;
	196
	197	/* Read the higher bits of data */
0f48d34e	198	ret = intel_msic_reg_read(addr, &data);
253a0069 AP	199	if (ret)
	200	return ret;
	201
	202	/* Shift bits to accommodate the lower two data bits */
	203	adc_val = (data << 2);
	204	addr++;
	205
0f48d34e	206	ret = intel_msic_reg_read(addr, &data);/* Read lower bits */
253a0069 AP	207	if (ret)
	208	return ret;
	209
	210	/* Adding lower two bits to the higher bits */
	211	data &= 03;
	212	adc_val += data;
	213
	214	/* Convert ADC value to temperature */
	215	ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
	216	if (ret == 0)
	217	*temp = td_info->curr_temp = curr_temp;
	218	return ret;
f017fbe7 D	219	}
	220
	221	/**
	222	* configure_adc - enables/disables the ADC for conversion
	223	* @val: zero: disables the ADC non-zero:enables the ADC
	224	*
	225	* Enable/Disable the ADC depending on the argument
	226	*
	227	* Can sleep
	228	*/
	229	static int configure_adc(int val)
	230	{
253a0069 AP	231	int ret;
	232	uint8_t data;
	233
0f48d34e	234	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
253a0069 AP	235	if (ret)
	236	return ret;
	237
	238	if (val) {
	239	/* Enable and start the ADC */
	240	data \|= (MSIC_ADC_ENBL \| MSIC_ADC_START);
	241	} else {
	242	/* Just stop the ADC */
	243	data &= (~MSIC_ADC_START);
	244	}
0f48d34e	245	return intel_msic_reg_write(INTEL_MSIC_ADC1CNTL1, data);
f017fbe7 D	246	}
	247
	248	/**
	249	* set_up_therm_channel - enable thermal channel for conversion
	250	* @base_addr: index of free msic ADC channel
	251	*
	252	* Enable all the three channels for conversion
	253	*
	254	* Can sleep
	255	*/
	256	static int set_up_therm_channel(u16 base_addr)
	257	{
253a0069 AP	258	int ret;
	259
	260	/* Enable all the sensor channels */
0f48d34e	261	ret = intel_msic_reg_write(base_addr, SKIN_SENSOR0_CODE);
253a0069 AP	262	if (ret)
	263	return ret;
	264
0f48d34e	265	ret = intel_msic_reg_write(base_addr + 1, SKIN_SENSOR1_CODE);
253a0069 AP	266	if (ret)
	267	return ret;
	268
0f48d34e	269	ret = intel_msic_reg_write(base_addr + 2, SYS_SENSOR_CODE);
253a0069 AP	270	if (ret)
	271	return ret;
	272
	273	/* Since this is the last channel, set the stop bit
	274	* to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
0f48d34e	275	ret = intel_msic_reg_write(base_addr + 3,
253a0069 AP	276	(MSIC_DIE_SENSOR_CODE \| 0x10));
	277	if (ret)
	278	return ret;
	279
	280	/* Enable ADC and start it */
	281	return configure_adc(1);
f017fbe7 D	282	}
	283
	284	/**
	285	* reset_stopbit - sets the stop bit to 0 on the given channel
	286	* @addr: address of the channel
	287	*
	288	* Can sleep
	289	*/
	290	static int reset_stopbit(uint16_t addr)
	291	{
253a0069 AP	292	int ret;
253a0069 AP	293	uint8_t data;
0f48d34e	294	ret = intel_msic_reg_read(addr, &data);
253a0069 AP	295	if (ret)
	296	return ret;
	297	/* Set the stop bit to zero */
0f48d34e	298	return intel_msic_reg_write(addr, (data & 0xEF));
f017fbe7 D	299	}
	300
	301	/**
	302	* find_free_channel - finds an empty channel for conversion
	303	*
	304	* If the ADC is not enabled then start using 0th channel
	305	* itself. Otherwise find an empty channel by looking for a
	306	* channel in which the stopbit is set to 1. returns the index
	307	* of the first free channel if succeeds or an error code.
	308	*
	309	* Context: can sleep
	310	*
	311	* FIXME: Ultimately the channel allocator will move into the intel_scu_ipc
	312	* code.
	313	*/
	314	static int find_free_channel(void)
	315	{
253a0069 AP	316	int ret;
	317	int i;
	318	uint8_t data;
	319
	320	/* check whether ADC is enabled */
0f48d34e	321	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
253a0069 AP	322	if (ret)
	323	return ret;
	324
	325	if ((data & MSIC_ADC_ENBL) == 0)
	326	return 0;
	327
	328	/* ADC is already enabled; Looking for an empty channel */
	329	for (i = 0; i < ADC_CHANLS_MAX; i++) {
0f48d34e	330	ret = intel_msic_reg_read(ADC_CHNL_START_ADDR + i, &data);
253a0069 AP	331	if (ret)
	332	return ret;
	333
	334	if (data & MSIC_STOPBIT_MASK) {
	335	ret = i;
	336	break;
	337	}
	338	}
	339	return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
f017fbe7 D	340	}
	341
	342	/**
	343	* mid_initialize_adc - initializing the ADC
	344	* @dev: our device structure
	345	*
	346	* Initialize the ADC for reading thermistor values. Can sleep.
	347	*/
	348	static int mid_initialize_adc(struct device *dev)
	349	{
253a0069 AP	350	u8 data;
	351	u16 base_addr;
	352	int ret;
	353
	354	/*
	355	* Ensure that adctherm is disabled before we
	356	* initialize the ADC
	357	*/
0f48d34e	358	ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL3, &data);
253a0069 AP	359	if (ret)
	360	return ret;
	361
1b7ccabc MW	362	data &= ~MSIC_ADCTHERM_MASK;
	363	ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, data);
	364	if (ret)
	365	return ret;
253a0069 AP	366
	367	/* Index of the first channel in which the stop bit is set */
	368	channel_index = find_free_channel();
	369	if (channel_index < 0) {
	370	dev_err(dev, "No free ADC channels");
	371	return channel_index;
	372	}
	373
	374	base_addr = ADC_CHNL_START_ADDR + channel_index;
	375
	376	if (!(channel_index == 0 \|\| channel_index == ADC_LOOP_MAX)) {
	377	/* Reset stop bit for channels other than 0 and 12 */
	378	ret = reset_stopbit(base_addr);
	379	if (ret)
	380	return ret;
	381
	382	/* Index of the first free channel */
	383	base_addr++;
	384	channel_index++;
	385	}
	386
	387	ret = set_up_therm_channel(base_addr);
	388	if (ret) {
	389	dev_err(dev, "unable to enable ADC");
	390	return ret;
	391	}
	392	dev_dbg(dev, "ADC initialization successful");
	393	return ret;
f017fbe7 D	394	}
	395
	396	/**
	397	* initialize_sensor - sets default temp and timer ranges
	398	* @index: index of the sensor
	399	*
	400	* Context: can sleep
	401	*/
	402	static struct thermal_device_info *initialize_sensor(int index)
	403	{
253a0069 AP	404	struct thermal_device_info *td_info =
	405	kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);
	406
	407	if (!td_info)
	408	return NULL;
	409
	410	/* Set the base addr of the channel for this sensor */
	411	td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
	412	/* Sensor 3 is direct conversion */
	413	if (index == 3)
	414	td_info->direct = 1;
	415	return td_info;
f017fbe7 D	416	}
f017fbe7 D	417
b4aca383	418	#ifdef CONFIG_PM_SLEEP
f017fbe7 D	419	/**
f017fbe7 D	420	* mid_thermal_resume - resume routine
8ff847fc	421	* @dev: device structure
f017fbe7 D	422	*
	423	* mid thermal resume: re-initializes the adc. Can sleep.
	424	*/
8ff847fc	425	static int mid_thermal_resume(struct device *dev)
f017fbe7	426	{
8ff847fc	427	return mid_initialize_adc(dev);
f017fbe7 D	428	}
	429
	430	/**
	431	* mid_thermal_suspend - suspend routine
8ff847fc	432	* @dev: device structure
f017fbe7 D	433	*
	434	* mid thermal suspend implements the suspend functionality
	435	* by stopping the ADC. Can sleep.
	436	*/
8ff847fc	437	static int mid_thermal_suspend(struct device *dev)
f017fbe7	438	{
253a0069 AP	439	/*
	440	* This just stops the ADC and does not disable it.
	441	* temporary workaround until we have a generic ADC driver.
	442	* If 0 is passed, it disables the ADC.
	443	*/
	444	return configure_adc(0);
f017fbe7	445	}
b4aca383	446	#endif
f017fbe7	447
8ff847fc RW	448	static SIMPLE_DEV_PM_OPS(mid_thermal_pm,
	449	mid_thermal_suspend, mid_thermal_resume);
	450
f017fbe7 D	451	/**
	452	* read_curr_temp - reads the current temperature and stores in temp
	453	* @temp: holds the current temperature value after reading
	454	*
	455	* Can sleep
	456	*/
17e8351a	457	static int read_curr_temp(struct thermal_zone_device tzd, int temp)
f017fbe7	458	{
253a0069 AP	459	WARN_ON(tzd == NULL);
253a0069 AP	460	return mid_read_temp(tzd, temp);
f017fbe7 D	461	}
	462
	463	/* Can't be const */
	464	static struct thermal_zone_device_ops tzd_ops = {
253a0069	465	.get_temp = read_curr_temp,
f017fbe7 D	466	};
f017fbe7 D	467
f017fbe7 D	468	/**
	469	* mid_thermal_probe - mfld thermal initialize
	470	* @pdev: platform device structure
	471	*
	472	* mid thermal probe initializes the hardware and registers
	473	* all the sensors with the generic thermal framework. Can sleep.
	474	*/
	475	static int mid_thermal_probe(struct platform_device *pdev)
	476	{
253a0069 AP	477	static char *name[MSIC_THERMAL_SENSORS] = {
	478	"skin0", "skin1", "sys", "msicdie"
	479	};
	480
	481	int ret;
	482	int i;
	483	struct platform_info *pinfo;
	484
14627e36 HS	485	pinfo = devm_kzalloc(&pdev->dev, sizeof(struct platform_info),
14627e36 HS	486	GFP_KERNEL);
253a0069 AP	487	if (!pinfo)
	488	return -ENOMEM;
	489
	490	/* Initializing the hardware */
	491	ret = mid_initialize_adc(&pdev->dev);
	492	if (ret) {
	493	dev_err(&pdev->dev, "ADC init failed");
253a0069 AP	494	return ret;
	495	}
	496
	497	/* Register each sensor with the generic thermal framework*/
	498	for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
03f8952c AL	499	struct thermal_device_info *td_info = initialize_sensor(i);
	500
	501	if (!td_info) {
	502	ret = -ENOMEM;
	503	goto err;
	504	}
253a0069	505	pinfo->tzd[i] = thermal_zone_device_register(name[i],
50125a9b	506	0, 0, td_info, &tzd_ops, NULL, 0, 0);
03f8952c AL	507	if (IS_ERR(pinfo->tzd[i])) {
	508	kfree(td_info);
	509	ret = PTR_ERR(pinfo->tzd[i]);
	510	goto err;
	511	}
253a0069 AP	512	}
	513
	514	pinfo->pdev = pdev;
	515	platform_set_drvdata(pdev, pinfo);
	516	return 0;
f017fbe7	517
03f8952c AL	518	err:
	519	while (--i >= 0) {
	520	kfree(pinfo->tzd[i]->devdata);
253a0069	521	thermal_zone_device_unregister(pinfo->tzd[i]);
03f8952c	522	}
253a0069	523	configure_adc(0);
253a0069	524	return ret;
f017fbe7 D	525	}
	526
	527	/**
	528	* mid_thermal_remove - mfld thermal finalize
	529	* @dev: platform device structure
	530	*
	531	* MLFD thermal remove unregisters all the sensors from the generic
	532	* thermal framework. Can sleep.
	533	*/
	534	static int mid_thermal_remove(struct platform_device *pdev)
	535	{
253a0069 AP	536	int i;
253a0069 AP	537	struct platform_info *pinfo = platform_get_drvdata(pdev);
f017fbe7	538
03f8952c AL	539	for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
03f8952c AL	540	kfree(pinfo->tzd[i]->devdata);
253a0069	541	thermal_zone_device_unregister(pinfo->tzd[i]);
03f8952c	542	}
f017fbe7	543
253a0069 AP	544	/* Stop the ADC */
253a0069 AP	545	return configure_adc(0);
f017fbe7 D	546	}
f017fbe7 D	547
63483070	548	#define DRIVER_NAME "msic_thermal"
f017fbe7 D	549
f017fbe7 D	550	static const struct platform_device_id therm_id_table[] = {
253a0069 AP	551	{ DRIVER_NAME, 1 },
253a0069 AP	552	{ }
f017fbe7	553	};
a93151a7	554	MODULE_DEVICE_TABLE(platform, therm_id_table);
f017fbe7 D	555
f017fbe7 D	556	static struct platform_driver mid_thermal_driver = {
253a0069 AP	557	.driver = {
253a0069 AP	558	.name = DRIVER_NAME,
8ff847fc	559	.pm = &mid_thermal_pm,
253a0069 AP	560	},
253a0069 AP	561	.probe = mid_thermal_probe,
b859f159	562	.remove = mid_thermal_remove,
253a0069	563	.id_table = therm_id_table,
f017fbe7 D	564	};
f017fbe7 D	565
73d99a22	566	module_platform_driver(mid_thermal_driver);
f017fbe7 D	567
	568	MODULE_AUTHOR("Durgadoss R <durgadoss.r@intel.com>");
	569	MODULE_DESCRIPTION("Intel Medfield Platform Thermal Driver");
	570	MODULE_LICENSE("GPL");