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1/*
2 * Marvell Berlin PWM driver
3 *
4 * Copyright (C) 2015 Marvell Technology Group Ltd.
5 *
6 * Author: Antoine Tenart <antoine.tenart@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/clk.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/pwm.h>
bbf0722c 19#include <linux/slab.h>
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20
21#define BERLIN_PWM_EN 0x0
22#define BERLIN_PWM_ENABLE BIT(0)
23#define BERLIN_PWM_CONTROL 0x4
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24/*
25 * The prescaler claims to support 8 different moduli, configured using the
26 * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64,
27 * 256, 1024, and 4096.) However, the moduli from 4 to 1024 appear to be
28 * implemented by internally shifting TCNT left without adding additional
29 * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff;
30 * for 8, 0x1fff; and so on. This means that those moduli are entirely
31 * useless, as we could just do the shift ourselves. The 4096 modulus is
32 * implemented with a real prescaler, so we do use that, but we treat it
33 * as a flag instead of pretending the modulus is actually configurable.
34 */
35#define BERLIN_PWM_PRESCALE_4096 0x7
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36#define BERLIN_PWM_INVERT_POLARITY BIT(3)
37#define BERLIN_PWM_DUTY 0x8
38#define BERLIN_PWM_TCNT 0xc
39#define BERLIN_PWM_MAX_TCNT 65535
40
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41struct berlin_pwm_channel {
42 u32 enable;
43 u32 ctrl;
44 u32 duty;
45 u32 tcnt;
46};
47
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48struct berlin_pwm_chip {
49 struct pwm_chip chip;
50 struct clk *clk;
51 void __iomem *base;
52};
53
54static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip)
55{
56 return container_of(chip, struct berlin_pwm_chip, chip);
57}
58
3f3e8051 59static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *bpc,
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60 unsigned int channel, unsigned long offset)
61{
3f3e8051 62 return readl_relaxed(bpc->base + channel * 0x10 + offset);
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63}
64
3f3e8051 65static inline void berlin_pwm_writel(struct berlin_pwm_chip *bpc,
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66 unsigned int channel, u32 value,
67 unsigned long offset)
68{
3f3e8051 69 writel_relaxed(value, bpc->base + channel * 0x10 + offset);
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70}
71
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72static int berlin_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
73{
74 struct berlin_pwm_channel *channel;
75
76 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
77 if (!channel)
78 return -ENOMEM;
79
80 return pwm_set_chip_data(pwm, channel);
81}
82
83static void berlin_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
84{
85 struct berlin_pwm_channel *channel = pwm_get_chip_data(pwm);
86
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87 kfree(channel);
88}
89
3f3e8051 90static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
30dffb42 91 u64 duty_ns, u64 period_ns)
59d5c8b1 92{
3f3e8051 93 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
4de445cb 94 bool prescale_4096 = false;
59d5c8b1 95 u32 value, duty, period;
4de445cb 96 u64 cycles;
59d5c8b1 97
3f3e8051 98 cycles = clk_get_rate(bpc->clk);
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99 cycles *= period_ns;
100 do_div(cycles, NSEC_PER_SEC);
101
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102 if (cycles > BERLIN_PWM_MAX_TCNT) {
103 prescale_4096 = true;
104 cycles >>= 12; // Prescaled by 4096
59d5c8b1 105
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106 if (cycles > BERLIN_PWM_MAX_TCNT)
107 return -ERANGE;
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108 }
109
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110 period = cycles;
111 cycles *= duty_ns;
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112 do_div(cycles, period_ns);
113 duty = cycles;
114
3f3e8051 115 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL);
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116 if (prescale_4096)
117 value |= BERLIN_PWM_PRESCALE_4096;
118 else
119 value &= ~BERLIN_PWM_PRESCALE_4096;
3f3e8051 120 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL);
59d5c8b1 121
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122 berlin_pwm_writel(bpc, pwm->hwpwm, duty, BERLIN_PWM_DUTY);
123 berlin_pwm_writel(bpc, pwm->hwpwm, period, BERLIN_PWM_TCNT);
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124
125 return 0;
126}
127
128static int berlin_pwm_set_polarity(struct pwm_chip *chip,
3f3e8051 129 struct pwm_device *pwm,
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130 enum pwm_polarity polarity)
131{
3f3e8051 132 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
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133 u32 value;
134
3f3e8051 135 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL);
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136
137 if (polarity == PWM_POLARITY_NORMAL)
138 value &= ~BERLIN_PWM_INVERT_POLARITY;
139 else
140 value |= BERLIN_PWM_INVERT_POLARITY;
141
3f3e8051 142 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL);
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143
144 return 0;
145}
146
3f3e8051 147static int berlin_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
59d5c8b1 148{
3f3e8051 149 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
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150 u32 value;
151
3f3e8051 152 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN);
59d5c8b1 153 value |= BERLIN_PWM_ENABLE;
3f3e8051 154 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN);
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155
156 return 0;
157}
158
159static void berlin_pwm_disable(struct pwm_chip *chip,
3f3e8051 160 struct pwm_device *pwm)
59d5c8b1 161{
3f3e8051 162 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
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163 u32 value;
164
3f3e8051 165 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN);
59d5c8b1 166 value &= ~BERLIN_PWM_ENABLE;
3f3e8051 167 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN);
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168}
169
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170static int berlin_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
171 const struct pwm_state *state)
172{
173 int err;
174 bool enabled = pwm->state.enabled;
175
176 if (state->polarity != pwm->state.polarity) {
177 if (enabled) {
178 berlin_pwm_disable(chip, pwm);
179 enabled = false;
180 }
181
182 err = berlin_pwm_set_polarity(chip, pwm, state->polarity);
183 if (err)
184 return err;
185 }
186
187 if (!state->enabled) {
188 if (enabled)
189 berlin_pwm_disable(chip, pwm);
190 return 0;
191 }
192
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193 err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period);
194 if (err)
195 return err;
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196
197 if (!enabled)
198 return berlin_pwm_enable(chip, pwm);
199
200 return 0;
201}
202
59d5c8b1 203static const struct pwm_ops berlin_pwm_ops = {
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204 .request = berlin_pwm_request,
205 .free = berlin_pwm_free,
30dffb42 206 .apply = berlin_pwm_apply,
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207 .owner = THIS_MODULE,
208};
209
210static const struct of_device_id berlin_pwm_match[] = {
211 { .compatible = "marvell,berlin-pwm" },
212 { },
213};
214MODULE_DEVICE_TABLE(of, berlin_pwm_match);
215
216static int berlin_pwm_probe(struct platform_device *pdev)
217{
3f3e8051 218 struct berlin_pwm_chip *bpc;
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219 int ret;
220
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221 bpc = devm_kzalloc(&pdev->dev, sizeof(*bpc), GFP_KERNEL);
222 if (!bpc)
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223 return -ENOMEM;
224
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225 bpc->base = devm_platform_ioremap_resource(pdev, 0);
226 if (IS_ERR(bpc->base))
227 return PTR_ERR(bpc->base);
59d5c8b1 228
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229 bpc->clk = devm_clk_get(&pdev->dev, NULL);
230 if (IS_ERR(bpc->clk))
231 return PTR_ERR(bpc->clk);
59d5c8b1 232
3f3e8051 233 ret = clk_prepare_enable(bpc->clk);
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234 if (ret)
235 return ret;
236
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237 bpc->chip.dev = &pdev->dev;
238 bpc->chip.ops = &berlin_pwm_ops;
239 bpc->chip.npwm = 4;
59d5c8b1 240
3f3e8051 241 ret = pwmchip_add(&bpc->chip);
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242 if (ret < 0) {
243 dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
3f3e8051 244 clk_disable_unprepare(bpc->clk);
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245 return ret;
246 }
247
3f3e8051 248 platform_set_drvdata(pdev, bpc);
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249
250 return 0;
251}
252
253static int berlin_pwm_remove(struct platform_device *pdev)
254{
3f3e8051 255 struct berlin_pwm_chip *bpc = platform_get_drvdata(pdev);
59d5c8b1 256
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257 pwmchip_remove(&bpc->chip);
258
3f3e8051 259 clk_disable_unprepare(bpc->clk);
59d5c8b1 260
0512f050 261 return 0;
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262}
263
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264#ifdef CONFIG_PM_SLEEP
265static int berlin_pwm_suspend(struct device *dev)
266{
3f3e8051 267 struct berlin_pwm_chip *bpc = dev_get_drvdata(dev);
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268 unsigned int i;
269
3f3e8051 270 for (i = 0; i < bpc->chip.npwm; i++) {
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271 struct berlin_pwm_channel *channel;
272
3f3e8051 273 channel = pwm_get_chip_data(&bpc->chip.pwms[i]);
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274 if (!channel)
275 continue;
276
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277 channel->enable = berlin_pwm_readl(bpc, i, BERLIN_PWM_ENABLE);
278 channel->ctrl = berlin_pwm_readl(bpc, i, BERLIN_PWM_CONTROL);
279 channel->duty = berlin_pwm_readl(bpc, i, BERLIN_PWM_DUTY);
280 channel->tcnt = berlin_pwm_readl(bpc, i, BERLIN_PWM_TCNT);
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281 }
282
3f3e8051 283 clk_disable_unprepare(bpc->clk);
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284
285 return 0;
286}
287
288static int berlin_pwm_resume(struct device *dev)
289{
3f3e8051 290 struct berlin_pwm_chip *bpc = dev_get_drvdata(dev);
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291 unsigned int i;
292 int ret;
293
3f3e8051 294 ret = clk_prepare_enable(bpc->clk);
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295 if (ret)
296 return ret;
297
3f3e8051 298 for (i = 0; i < bpc->chip.npwm; i++) {
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299 struct berlin_pwm_channel *channel;
300
3f3e8051 301 channel = pwm_get_chip_data(&bpc->chip.pwms[i]);
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302 if (!channel)
303 continue;
304
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305 berlin_pwm_writel(bpc, i, channel->ctrl, BERLIN_PWM_CONTROL);
306 berlin_pwm_writel(bpc, i, channel->duty, BERLIN_PWM_DUTY);
307 berlin_pwm_writel(bpc, i, channel->tcnt, BERLIN_PWM_TCNT);
308 berlin_pwm_writel(bpc, i, channel->enable, BERLIN_PWM_ENABLE);
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309 }
310
311 return 0;
312}
313#endif
314
315static SIMPLE_DEV_PM_OPS(berlin_pwm_pm_ops, berlin_pwm_suspend,
316 berlin_pwm_resume);
317
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318static struct platform_driver berlin_pwm_driver = {
319 .probe = berlin_pwm_probe,
320 .remove = berlin_pwm_remove,
321 .driver = {
322 .name = "berlin-pwm",
323 .of_match_table = berlin_pwm_match,
bbf0722c 324 .pm = &berlin_pwm_pm_ops,
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325 },
326};
327module_platform_driver(berlin_pwm_driver);
328
329MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
330MODULE_DESCRIPTION("Marvell Berlin PWM driver");
331MODULE_LICENSE("GPL v2");