[mirror_ubuntu-bionic-kernel.git] / drivers / pwm / pwm-jz4740.c

/*
 *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
 *  JZ4740 platform PWM support
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under  the terms of the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the License, or (at your
 *  option) any later version.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  675 Mass Ave, Cambridge, MA 02139, USA.
 *
 */

#include <linux/clk.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>

#include <asm/mach-jz4740/timer.h>

#define NUM_PWM 8

struct jz4740_pwm_chip {
	struct pwm_chip chip;
	struct clk *clk;
};

static inline struct jz4740_pwm_chip *to_jz4740(struct pwm_chip *chip)
{
	return container_of(chip, struct jz4740_pwm_chip, chip);
}

static int jz4740_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
{
	/*
	 * Timers 0 and 1 are used for system tasks, so they are unavailable
	 * for use as PWMs.
	 */
	if (pwm->hwpwm < 2)
		return -EBUSY;

	jz4740_timer_start(pwm->hwpwm);

	return 0;
}

static void jz4740_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{
	jz4740_timer_set_ctrl(pwm->hwpwm, 0);

	jz4740_timer_stop(pwm->hwpwm);
}

static int jz4740_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);

	ctrl |= JZ_TIMER_CTRL_PWM_ENABLE;
	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
	jz4740_timer_enable(pwm->hwpwm);

	return 0;
}

static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{
	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);

	ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
	jz4740_timer_disable(pwm->hwpwm);
	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
}

static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
			     int duty_ns, int period_ns)
{
	struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
	unsigned long long tmp;
	unsigned long period, duty;
	unsigned int prescaler = 0;
	uint16_t ctrl;
	bool is_enabled;

	tmp = (unsigned long long)clk_get_rate(jz4740->clk) * period_ns;
	do_div(tmp, 1000000000);
	period = tmp;

	while (period > 0xffff && prescaler < 6) {
		period >>= 2;
		++prescaler;
	}

	if (prescaler == 6)
		return -EINVAL;

	tmp = (unsigned long long)period * duty_ns;
	do_div(tmp, period_ns);
	duty = period - tmp;

	if (duty >= period)
		duty = period - 1;

	is_enabled = jz4740_timer_is_enabled(pwm->hwpwm);
	if (is_enabled)
		jz4740_pwm_disable(chip, pwm);

	jz4740_timer_set_count(pwm->hwpwm, 0);
	jz4740_timer_set_duty(pwm->hwpwm, duty);
	jz4740_timer_set_period(pwm->hwpwm, period);

	ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) | JZ_TIMER_CTRL_SRC_EXT |
		JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;

	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);

	if (is_enabled)
		jz4740_pwm_enable(chip, pwm);

	return 0;
}

static const struct pwm_ops jz4740_pwm_ops = {
	.request = jz4740_pwm_request,
	.free = jz4740_pwm_free,
	.config = jz4740_pwm_config,
	.enable = jz4740_pwm_enable,
	.disable = jz4740_pwm_disable,
	.owner = THIS_MODULE,
};

static int jz4740_pwm_probe(struct platform_device *pdev)
{
	struct jz4740_pwm_chip *jz4740;

	jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
	if (!jz4740)
		return -ENOMEM;

	jz4740->clk = devm_clk_get(&pdev->dev, "ext");
	if (IS_ERR(jz4740->clk))
		return PTR_ERR(jz4740->clk);

	jz4740->chip.dev = &pdev->dev;
	jz4740->chip.ops = &jz4740_pwm_ops;
	jz4740->chip.npwm = NUM_PWM;
	jz4740->chip.base = -1;

	platform_set_drvdata(pdev, jz4740);

	return pwmchip_add(&jz4740->chip);
}

static int jz4740_pwm_remove(struct platform_device *pdev)
{
	struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);

	return pwmchip_remove(&jz4740->chip);
}

static struct platform_driver jz4740_pwm_driver = {
	.driver = {
		.name = "jz4740-pwm",
	},
	.probe = jz4740_pwm_probe,
	.remove = jz4740_pwm_remove,
};
module_platform_driver(jz4740_pwm_driver);

MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_DESCRIPTION("Ingenic JZ4740 PWM driver");
MODULE_ALIAS("platform:jz4740-pwm");
MODULE_LICENSE("GPL");
Commit	Line	Data
f6b8a570 TR	1	/*
	2	* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
	3	* JZ4740 platform PWM support
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	* You should have received a copy of the GNU General Public License along
	11	* with this program; if not, write to the Free Software Foundation, Inc.,
	12	* 675 Mass Ave, Cambridge, MA 02139, USA.
	13	*
	14	*/
	15
	16	#include <linux/clk.h>
	17	#include <linux/err.h>
	18	#include <linux/gpio.h>
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/platform_device.h>
	22	#include <linux/pwm.h>
	23
f6b8a570 TR	24	#include <asm/mach-jz4740/timer.h>
	25
	26	#define NUM_PWM 8
	27
f6b8a570 TR	28	struct jz4740_pwm_chip {
	29	struct pwm_chip chip;
	30	struct clk *clk;
	31	};
	32
	33	static inline struct jz4740_pwm_chip to_jz4740(struct pwm_chip chip)
	34	{
	35	return container_of(chip, struct jz4740_pwm_chip, chip);
	36	}
	37
	38	static int jz4740_pwm_request(struct pwm_chip chip, struct pwm_device pwm)
	39	{
f6b8a570 TR	40	/*
	41	* Timers 0 and 1 are used for system tasks, so they are unavailable
	42	* for use as PWMs.
	43	*/
	44	if (pwm->hwpwm < 2)
	45	return -EBUSY;
	46
f6b8a570 TR	47	jz4740_timer_start(pwm->hwpwm);
	48
	49	return 0;
	50	}
	51
	52	static void jz4740_pwm_free(struct pwm_chip chip, struct pwm_device pwm)
	53	{
f6b8a570 TR	54	jz4740_timer_set_ctrl(pwm->hwpwm, 0);
f6b8a570 TR	55
f6b8a570 TR	56	jz4740_timer_stop(pwm->hwpwm);
	57	}
	58
	59	static int jz4740_pwm_enable(struct pwm_chip chip, struct pwm_device pwm)
	60	{
	61	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
	62
	63	ctrl \|= JZ_TIMER_CTRL_PWM_ENABLE;
	64	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
	65	jz4740_timer_enable(pwm->hwpwm);
	66
	67	return 0;
	68	}
	69
	70	static void jz4740_pwm_disable(struct pwm_chip chip, struct pwm_device pwm)
	71	{
	72	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
	73
	74	ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
	75	jz4740_timer_disable(pwm->hwpwm);
	76	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
	77	}
	78
	79	static int jz4740_pwm_config(struct pwm_chip chip, struct pwm_device pwm,
	80	int duty_ns, int period_ns)
	81	{
	82	struct jz4740_pwm_chip *jz4740 = to_jz4740(pwm->chip);
	83	unsigned long long tmp;
	84	unsigned long period, duty;
	85	unsigned int prescaler = 0;
	86	uint16_t ctrl;
	87	bool is_enabled;
	88
	89	tmp = (unsigned long long)clk_get_rate(jz4740->clk) * period_ns;
	90	do_div(tmp, 1000000000);
	91	period = tmp;
	92
	93	while (period > 0xffff && prescaler < 6) {
	94	period >>= 2;
	95	++prescaler;
	96	}
	97
	98	if (prescaler == 6)
	99	return -EINVAL;
	100
	101	tmp = (unsigned long long)period * duty_ns;
	102	do_div(tmp, period_ns);
	103	duty = period - tmp;
	104
	105	if (duty >= period)
	106	duty = period - 1;
	107
	108	is_enabled = jz4740_timer_is_enabled(pwm->hwpwm);
	109	if (is_enabled)
	110	jz4740_pwm_disable(chip, pwm);
	111
	112	jz4740_timer_set_count(pwm->hwpwm, 0);
	113	jz4740_timer_set_duty(pwm->hwpwm, duty);
	114	jz4740_timer_set_period(pwm->hwpwm, period);
	115
	116	ctrl = JZ_TIMER_CTRL_PRESCALER(prescaler) \| JZ_TIMER_CTRL_SRC_EXT \|
	117	JZ_TIMER_CTRL_PWM_ABBRUPT_SHUTDOWN;
	118
	119	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
120
121	if (is_enabled)
122	jz4740_pwm_enable(chip, pwm);
123
124	return 0;
125	}
126
127	static const struct pwm_ops jz4740_pwm_ops = {
128	.request = jz4740_pwm_request,
129	.free = jz4740_pwm_free,
130	.config = jz4740_pwm_config,
131	.enable = jz4740_pwm_enable,
132	.disable = jz4740_pwm_disable,
133	.owner = THIS_MODULE,
134	};
135
3e9fe83d	136	static int jz4740_pwm_probe(struct platform_device *pdev)
f6b8a570 TR	137	{
f6b8a570 TR	138	struct jz4740_pwm_chip *jz4740;
f6b8a570 TR	139
	140	jz4740 = devm_kzalloc(&pdev->dev, sizeof(*jz4740), GFP_KERNEL);
	141	if (!jz4740)
	142	return -ENOMEM;
	143
0dc1135f	144	jz4740->clk = devm_clk_get(&pdev->dev, "ext");
f6b8a570 TR	145	if (IS_ERR(jz4740->clk))
	146	return PTR_ERR(jz4740->clk);
	147
	148	jz4740->chip.dev = &pdev->dev;
	149	jz4740->chip.ops = &jz4740_pwm_ops;
	150	jz4740->chip.npwm = NUM_PWM;
	151	jz4740->chip.base = -1;
	152
f6b8a570 TR	153	platform_set_drvdata(pdev, jz4740);
f6b8a570 TR	154
0dc1135f	155	return pwmchip_add(&jz4740->chip);
f6b8a570 TR	156	}
f6b8a570 TR	157
77f37917	158	static int jz4740_pwm_remove(struct platform_device *pdev)
f6b8a570 TR	159	{
f6b8a570 TR	160	struct jz4740_pwm_chip *jz4740 = platform_get_drvdata(pdev);
f6b8a570	161
0dc1135f	162	return pwmchip_remove(&jz4740->chip);
f6b8a570 TR	163	}
	164
	165	static struct platform_driver jz4740_pwm_driver = {
	166	.driver = {
	167	.name = "jz4740-pwm",
f6b8a570 TR	168	},
f6b8a570 TR	169	.probe = jz4740_pwm_probe,
fd109112	170	.remove = jz4740_pwm_remove,
f6b8a570 TR	171	};
	172	module_platform_driver(jz4740_pwm_driver);
	173
	174	MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
	175	MODULE_DESCRIPTION("Ingenic JZ4740 PWM driver");
	176	MODULE_ALIAS("platform:jz4740-pwm");
	177	MODULE_LICENSE("GPL");