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caab277b 1// SPDX-License-Identifier: GPL-2.0-only
88b613e6
ST
2/*
3 * Driver for PCA9685 16-channel 12-bit PWM LED controller
4 *
5 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
01ec8472 6 * Copyright (C) 2015 Clemens Gruber <clemens.gruber@pqgruber.com>
88b613e6
ST
7 *
8 * based on the pwm-twl-led.c driver
88b613e6
ST
9 */
10
912b8439 11#include <linux/acpi.h>
bccec89f 12#include <linux/gpio/driver.h>
88b613e6
ST
13#include <linux/i2c.h>
14#include <linux/module.h>
bccec89f 15#include <linux/mutex.h>
88b613e6 16#include <linux/platform_device.h>
912b8439 17#include <linux/property.h>
88b613e6
ST
18#include <linux/pwm.h>
19#include <linux/regmap.h>
20#include <linux/slab.h>
01ec8472 21#include <linux/delay.h>
c40c461e 22#include <linux/pm_runtime.h>
9cc5f232 23#include <linux/bitmap.h>
01ec8472
CG
24
25/*
6d6e7050
CG
26 * Because the PCA9685 has only one prescaler per chip, only the first channel
27 * that is enabled is allowed to change the prescale register.
28 * PWM channels requested afterwards must use a period that results in the same
29 * prescale setting as the one set by the first requested channel.
30 * GPIOs do not count as enabled PWMs as they are not using the prescaler.
01ec8472 31 */
88b613e6
ST
32
33#define PCA9685_MODE1 0x00
34#define PCA9685_MODE2 0x01
35#define PCA9685_SUBADDR1 0x02
36#define PCA9685_SUBADDR2 0x03
37#define PCA9685_SUBADDR3 0x04
38#define PCA9685_ALLCALLADDR 0x05
39#define PCA9685_LEDX_ON_L 0x06
40#define PCA9685_LEDX_ON_H 0x07
41#define PCA9685_LEDX_OFF_L 0x08
42#define PCA9685_LEDX_OFF_H 0x09
43
44#define PCA9685_ALL_LED_ON_L 0xFA
45#define PCA9685_ALL_LED_ON_H 0xFB
46#define PCA9685_ALL_LED_OFF_L 0xFC
47#define PCA9685_ALL_LED_OFF_H 0xFD
48#define PCA9685_PRESCALE 0xFE
49
01ec8472
CG
50#define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */
51#define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */
52
53#define PCA9685_COUNTER_RANGE 4096
01ec8472
CG
54#define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */
55
88b613e6
ST
56#define PCA9685_NUMREGS 0xFF
57#define PCA9685_MAXCHAN 0x10
58
e1057a8d 59#define LED_FULL BIT(4)
bce54366
DJ
60#define MODE1_ALLCALL BIT(0)
61#define MODE1_SUB3 BIT(1)
62#define MODE1_SUB2 BIT(2)
63#define MODE1_SUB1 BIT(3)
e1057a8d
DJ
64#define MODE1_SLEEP BIT(4)
65#define MODE2_INVRT BIT(4)
66#define MODE2_OUTDRV BIT(2)
88b613e6
ST
67
68#define LED_N_ON_H(N) (PCA9685_LEDX_ON_H + (4 * (N)))
69#define LED_N_ON_L(N) (PCA9685_LEDX_ON_L + (4 * (N)))
70#define LED_N_OFF_H(N) (PCA9685_LEDX_OFF_H + (4 * (N)))
71#define LED_N_OFF_L(N) (PCA9685_LEDX_OFF_L + (4 * (N)))
72
9af1fba3
CG
73#define REG_ON_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_H : LED_N_ON_H((C)))
74#define REG_ON_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_ON_L : LED_N_ON_L((C)))
75#define REG_OFF_H(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : LED_N_OFF_H((C)))
76#define REG_OFF_L(C) ((C) >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : LED_N_OFF_L((C)))
77
88b613e6
ST
78struct pca9685 {
79 struct pwm_chip chip;
80 struct regmap *regmap;
bccec89f 81 struct mutex lock;
6d6e7050
CG
82 DECLARE_BITMAP(pwms_enabled, PCA9685_MAXCHAN + 1);
83#if IS_ENABLED(CONFIG_GPIOLIB)
bccec89f 84 struct gpio_chip gpio;
9cc5f232 85 DECLARE_BITMAP(pwms_inuse, PCA9685_MAXCHAN + 1);
bccec89f 86#endif
88b613e6
ST
87};
88
89static inline struct pca9685 *to_pca(struct pwm_chip *chip)
90{
91 return container_of(chip, struct pca9685, chip);
92}
93
6d6e7050
CG
94/* This function is supposed to be called with the lock mutex held */
95static bool pca9685_prescaler_can_change(struct pca9685 *pca, int channel)
96{
97 /* No PWM enabled: Change allowed */
98 if (bitmap_empty(pca->pwms_enabled, PCA9685_MAXCHAN + 1))
99 return true;
100 /* More than one PWM enabled: Change not allowed */
101 if (bitmap_weight(pca->pwms_enabled, PCA9685_MAXCHAN + 1) > 1)
102 return false;
103 /*
104 * Only one PWM enabled: Change allowed if the PWM about to
105 * be changed is the one that is already enabled
106 */
107 return test_bit(channel, pca->pwms_enabled);
108}
109
79dd354f
CG
110static int pca9685_read_reg(struct pca9685 *pca, unsigned int reg, unsigned int *val)
111{
112 struct device *dev = pca->chip.dev;
113 int err;
114
115 err = regmap_read(pca->regmap, reg, val);
116 if (err)
117 dev_err(dev, "regmap_read of register 0x%x failed: %pe\n", reg, ERR_PTR(err));
118
119 return err;
120}
121
122static int pca9685_write_reg(struct pca9685 *pca, unsigned int reg, unsigned int val)
123{
124 struct device *dev = pca->chip.dev;
125 int err;
126
127 err = regmap_write(pca->regmap, reg, val);
128 if (err)
129 dev_err(dev, "regmap_write to register 0x%x failed: %pe\n", reg, ERR_PTR(err));
130
131 return err;
132}
133
9af1fba3
CG
134/* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */
135static void pca9685_pwm_set_duty(struct pca9685 *pca, int channel, unsigned int duty)
136{
ae16db1f
CG
137 struct pwm_device *pwm = &pca->chip.pwms[channel];
138 unsigned int on, off;
139
9af1fba3
CG
140 if (duty == 0) {
141 /* Set the full OFF bit, which has the highest precedence */
79dd354f 142 pca9685_write_reg(pca, REG_OFF_H(channel), LED_FULL);
ae16db1f 143 return;
9af1fba3
CG
144 } else if (duty >= PCA9685_COUNTER_RANGE) {
145 /* Set the full ON bit and clear the full OFF bit */
79dd354f
CG
146 pca9685_write_reg(pca, REG_ON_H(channel), LED_FULL);
147 pca9685_write_reg(pca, REG_OFF_H(channel), 0);
ae16db1f 148 return;
9af1fba3 149 }
ae16db1f
CG
150
151
152 if (pwm->state.usage_power && channel < PCA9685_MAXCHAN) {
153 /*
154 * If usage_power is set, the pca9685 driver will phase shift
155 * the individual channels relative to their channel number.
156 * This improves EMI because the enabled channels no longer
157 * turn on at the same time, while still maintaining the
158 * configured duty cycle / power output.
159 */
160 on = channel * PCA9685_COUNTER_RANGE / PCA9685_MAXCHAN;
161 } else
162 on = 0;
163
164 off = (on + duty) % PCA9685_COUNTER_RANGE;
165
166 /* Set ON time (clears full ON bit) */
79dd354f
CG
167 pca9685_write_reg(pca, REG_ON_L(channel), on & 0xff);
168 pca9685_write_reg(pca, REG_ON_H(channel), (on >> 8) & 0xf);
ae16db1f 169 /* Set OFF time (clears full OFF bit) */
79dd354f
CG
170 pca9685_write_reg(pca, REG_OFF_L(channel), off & 0xff);
171 pca9685_write_reg(pca, REG_OFF_H(channel), (off >> 8) & 0xf);
9af1fba3
CG
172}
173
174static unsigned int pca9685_pwm_get_duty(struct pca9685 *pca, int channel)
175{
ae16db1f
CG
176 struct pwm_device *pwm = &pca->chip.pwms[channel];
177 unsigned int off = 0, on = 0, val = 0;
9af1fba3
CG
178
179 if (WARN_ON(channel >= PCA9685_MAXCHAN)) {
180 /* HW does not support reading state of "all LEDs" channel */
181 return 0;
182 }
183
79dd354f 184 pca9685_read_reg(pca, LED_N_OFF_H(channel), &off);
ae16db1f 185 if (off & LED_FULL) {
9af1fba3
CG
186 /* Full OFF bit is set */
187 return 0;
188 }
189
79dd354f 190 pca9685_read_reg(pca, LED_N_ON_H(channel), &on);
ae16db1f 191 if (on & LED_FULL) {
9af1fba3
CG
192 /* Full ON bit is set */
193 return PCA9685_COUNTER_RANGE;
194 }
195
79dd354f 196 pca9685_read_reg(pca, LED_N_OFF_L(channel), &val);
ae16db1f
CG
197 off = ((off & 0xf) << 8) | (val & 0xff);
198 if (!pwm->state.usage_power)
199 return off;
200
201 /* Read ON register to calculate duty cycle of staggered output */
79dd354f 202 if (pca9685_read_reg(pca, LED_N_ON_L(channel), &val)) {
ae16db1f 203 /* Reset val to 0 in case reading LED_N_ON_L failed */
9af1fba3
CG
204 val = 0;
205 }
ae16db1f
CG
206 on = ((on & 0xf) << 8) | (val & 0xff);
207 return (off - on) & (PCA9685_COUNTER_RANGE - 1);
9af1fba3
CG
208}
209
bccec89f 210#if IS_ENABLED(CONFIG_GPIOLIB)
9cc5f232 211static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx)
bccec89f 212{
9cc5f232 213 bool is_inuse;
bccec89f
MW
214
215 mutex_lock(&pca->lock);
9cc5f232
SVA
216 if (pwm_idx >= PCA9685_MAXCHAN) {
217 /*
316b676b 218 * "All LEDs" channel:
9cc5f232
SVA
219 * pretend already in use if any of the PWMs are requested
220 */
221 if (!bitmap_empty(pca->pwms_inuse, PCA9685_MAXCHAN)) {
222 is_inuse = true;
223 goto out;
224 }
225 } else {
226 /*
316b676b 227 * Regular channel:
9cc5f232
SVA
228 * pretend already in use if the "all LEDs" channel is requested
229 */
230 if (test_bit(PCA9685_MAXCHAN, pca->pwms_inuse)) {
231 is_inuse = true;
232 goto out;
233 }
bccec89f 234 }
9cc5f232
SVA
235 is_inuse = test_and_set_bit(pwm_idx, pca->pwms_inuse);
236out:
bccec89f 237 mutex_unlock(&pca->lock);
9cc5f232 238 return is_inuse;
bccec89f
MW
239}
240
9cc5f232 241static void pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
bccec89f 242{
bccec89f 243 mutex_lock(&pca->lock);
9cc5f232
SVA
244 clear_bit(pwm_idx, pca->pwms_inuse);
245 mutex_unlock(&pca->lock);
246}
bccec89f 247
9cc5f232
SVA
248static int pca9685_pwm_gpio_request(struct gpio_chip *gpio, unsigned int offset)
249{
250 struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f 251
9cc5f232
SVA
252 if (pca9685_pwm_test_and_set_inuse(pca, offset))
253 return -EBUSY;
254 pm_runtime_get_sync(pca->chip.dev);
255 return 0;
bccec89f
MW
256}
257
258static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset)
259{
260 struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f 261
9af1fba3 262 return pca9685_pwm_get_duty(pca, offset) != 0;
bccec89f
MW
263}
264
265static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset,
266 int value)
267{
268 struct pca9685 *pca = gpiochip_get_data(gpio);
bccec89f 269
9af1fba3 270 pca9685_pwm_set_duty(pca, offset, value ? PCA9685_COUNTER_RANGE : 0);
bccec89f
MW
271}
272
c40c461e
SVA
273static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset)
274{
275 struct pca9685 *pca = gpiochip_get_data(gpio);
c40c461e 276
9af1fba3 277 pca9685_pwm_set_duty(pca, offset, 0);
c40c461e 278 pm_runtime_put(pca->chip.dev);
9cc5f232 279 pca9685_pwm_clear_inuse(pca, offset);
c40c461e
SVA
280}
281
bccec89f
MW
282static int pca9685_pwm_gpio_get_direction(struct gpio_chip *chip,
283 unsigned int offset)
284{
285 /* Always out */
a37507d5 286 return GPIO_LINE_DIRECTION_OUT;
bccec89f
MW
287}
288
289static int pca9685_pwm_gpio_direction_input(struct gpio_chip *gpio,
290 unsigned int offset)
291{
292 return -EINVAL;
293}
294
295static int pca9685_pwm_gpio_direction_output(struct gpio_chip *gpio,
296 unsigned int offset, int value)
297{
298 pca9685_pwm_gpio_set(gpio, offset, value);
299
300 return 0;
301}
302
303/*
304 * The PCA9685 has a bit for turning the PWM output full off or on. Some
305 * boards like Intel Galileo actually uses these as normal GPIOs so we
306 * expose a GPIO chip here which can exclusively take over the underlying
307 * PWM channel.
308 */
309static int pca9685_pwm_gpio_probe(struct pca9685 *pca)
310{
311 struct device *dev = pca->chip.dev;
312
bccec89f
MW
313 pca->gpio.label = dev_name(dev);
314 pca->gpio.parent = dev;
315 pca->gpio.request = pca9685_pwm_gpio_request;
316 pca->gpio.free = pca9685_pwm_gpio_free;
317 pca->gpio.get_direction = pca9685_pwm_gpio_get_direction;
318 pca->gpio.direction_input = pca9685_pwm_gpio_direction_input;
319 pca->gpio.direction_output = pca9685_pwm_gpio_direction_output;
320 pca->gpio.get = pca9685_pwm_gpio_get;
321 pca->gpio.set = pca9685_pwm_gpio_set;
322 pca->gpio.base = -1;
323 pca->gpio.ngpio = PCA9685_MAXCHAN;
324 pca->gpio.can_sleep = true;
325
326 return devm_gpiochip_add_data(dev, &pca->gpio, pca);
327}
328#else
9cc5f232
SVA
329static inline bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca,
330 int pwm_idx)
bccec89f
MW
331{
332 return false;
333}
334
9cc5f232
SVA
335static inline void
336pca9685_pwm_clear_inuse(struct pca9685 *pca, int pwm_idx)
337{
338}
339
bccec89f
MW
340static inline int pca9685_pwm_gpio_probe(struct pca9685 *pca)
341{
342 return 0;
343}
344#endif
345
0829326a 346static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable)
c40c461e 347{
79dd354f
CG
348 struct device *dev = pca->chip.dev;
349 int err = regmap_update_bits(pca->regmap, PCA9685_MODE1,
350 MODE1_SLEEP, enable ? MODE1_SLEEP : 0);
351 if (err) {
352 dev_err(dev, "regmap_update_bits of register 0x%x failed: %pe\n",
353 PCA9685_MODE1, ERR_PTR(err));
354 return;
355 }
356
0829326a 357 if (!enable) {
c40c461e
SVA
358 /* Wait 500us for the oscillator to be back up */
359 udelay(500);
360 }
361}
362
6d6e7050
CG
363static int __pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
364 const struct pwm_state *state)
88b613e6
ST
365{
366 struct pca9685 *pca = to_pca(chip);
9af1fba3
CG
367 unsigned long long duty, prescale;
368 unsigned int val = 0;
88b613e6 369
9af1fba3
CG
370 if (state->polarity != PWM_POLARITY_NORMAL)
371 return -EINVAL;
88b613e6 372
9af1fba3
CG
373 prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period,
374 PCA9685_COUNTER_RANGE * 1000) - 1;
375 if (prescale < PCA9685_PRESCALE_MIN || prescale > PCA9685_PRESCALE_MAX) {
376 dev_err(chip->dev, "pwm not changed: period out of bounds!\n");
377 return -EINVAL;
88b613e6
ST
378 }
379
9af1fba3
CG
380 if (!state->enabled) {
381 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
88b613e6
ST
382 return 0;
383 }
384
79dd354f 385 pca9685_read_reg(pca, PCA9685_PRESCALE, &val);
9af1fba3 386 if (prescale != val) {
6d6e7050
CG
387 if (!pca9685_prescaler_can_change(pca, pwm->hwpwm)) {
388 dev_err(chip->dev,
389 "pwm not changed: periods of enabled pwms must match!\n");
390 return -EBUSY;
391 }
392
9af1fba3
CG
393 /*
394 * Putting the chip briefly into SLEEP mode
395 * at this point won't interfere with the
396 * pm_runtime framework, because the pm_runtime
397 * state is guaranteed active here.
398 */
399 /* Put chip into sleep mode */
400 pca9685_set_sleep_mode(pca, true);
88b613e6 401
9af1fba3 402 /* Change the chip-wide output frequency */
79dd354f 403 pca9685_write_reg(pca, PCA9685_PRESCALE, prescale);
88b613e6 404
9af1fba3
CG
405 /* Wake the chip up */
406 pca9685_set_sleep_mode(pca, false);
407 }
88b613e6 408
9af1fba3
CG
409 duty = PCA9685_COUNTER_RANGE * state->duty_cycle;
410 duty = DIV_ROUND_UP_ULL(duty, state->period);
411 pca9685_pwm_set_duty(pca, pwm->hwpwm, duty);
88b613e6
ST
412 return 0;
413}
414
6d6e7050
CG
415static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
416 const struct pwm_state *state)
417{
418 struct pca9685 *pca = to_pca(chip);
419 int ret;
420
421 mutex_lock(&pca->lock);
422 ret = __pca9685_pwm_apply(chip, pwm, state);
423 if (ret == 0) {
424 if (state->enabled)
425 set_bit(pwm->hwpwm, pca->pwms_enabled);
426 else
427 clear_bit(pwm->hwpwm, pca->pwms_enabled);
428 }
429 mutex_unlock(&pca->lock);
430
431 return ret;
432}
433
8f4768a5
CG
434static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
435 struct pwm_state *state)
436{
437 struct pca9685 *pca = to_pca(chip);
438 unsigned long long duty;
439 unsigned int val = 0;
440
441 /* Calculate (chip-wide) period from prescale value */
79dd354f 442 pca9685_read_reg(pca, PCA9685_PRESCALE, &val);
8f4768a5
CG
443 /*
444 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000.
445 * The following calculation is therefore only a multiplication
446 * and we are not losing precision.
447 */
448 state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) *
449 (val + 1);
450
451 /* The (per-channel) polarity is fixed */
452 state->polarity = PWM_POLARITY_NORMAL;
453
454 if (pwm->hwpwm >= PCA9685_MAXCHAN) {
455 /*
456 * The "all LEDs" channel does not support HW readout
457 * Return 0 and disabled for backwards compatibility
458 */
459 state->duty_cycle = 0;
460 state->enabled = false;
461 return;
462 }
463
464 state->enabled = true;
465 duty = pca9685_pwm_get_duty(pca, pwm->hwpwm);
466 state->duty_cycle = DIV_ROUND_DOWN_ULL(duty * state->period, PCA9685_COUNTER_RANGE);
467}
468
88b613e6
ST
469static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
470{
471 struct pca9685 *pca = to_pca(chip);
472
9cc5f232 473 if (pca9685_pwm_test_and_set_inuse(pca, pwm->hwpwm))
bccec89f 474 return -EBUSY;
6d6e7050
CG
475
476 if (pwm->hwpwm < PCA9685_MAXCHAN) {
477 /* PWMs - except the "all LEDs" channel - default to enabled */
478 mutex_lock(&pca->lock);
479 set_bit(pwm->hwpwm, pca->pwms_enabled);
480 mutex_unlock(&pca->lock);
481 }
482
c40c461e 483 pm_runtime_get_sync(chip->dev);
88b613e6
ST
484
485 return 0;
486}
487
488static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
489{
9cc5f232
SVA
490 struct pca9685 *pca = to_pca(chip);
491
6d6e7050 492 mutex_lock(&pca->lock);
9af1fba3 493 pca9685_pwm_set_duty(pca, pwm->hwpwm, 0);
6d6e7050
CG
494 clear_bit(pwm->hwpwm, pca->pwms_enabled);
495 mutex_unlock(&pca->lock);
496
c40c461e 497 pm_runtime_put(chip->dev);
9cc5f232 498 pca9685_pwm_clear_inuse(pca, pwm->hwpwm);
88b613e6
ST
499}
500
501static const struct pwm_ops pca9685_pwm_ops = {
9af1fba3 502 .apply = pca9685_pwm_apply,
8f4768a5 503 .get_state = pca9685_pwm_get_state,
88b613e6
ST
504 .request = pca9685_pwm_request,
505 .free = pca9685_pwm_free,
3dd0a909 506 .owner = THIS_MODULE,
88b613e6
ST
507};
508
c456fbb2 509static const struct regmap_config pca9685_regmap_i2c_config = {
88b613e6
ST
510 .reg_bits = 8,
511 .val_bits = 8,
512 .max_register = PCA9685_NUMREGS,
513 .cache_type = REGCACHE_NONE,
514};
515
516static int pca9685_pwm_probe(struct i2c_client *client,
517 const struct i2c_device_id *id)
518{
88b613e6 519 struct pca9685 *pca;
bce54366 520 unsigned int reg;
88b613e6 521 int ret;
88b613e6
ST
522
523 pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL);
524 if (!pca)
525 return -ENOMEM;
526
527 pca->regmap = devm_regmap_init_i2c(client, &pca9685_regmap_i2c_config);
528 if (IS_ERR(pca->regmap)) {
529 ret = PTR_ERR(pca->regmap);
530 dev_err(&client->dev, "Failed to initialize register map: %d\n",
531 ret);
532 return ret;
533 }
534
535 i2c_set_clientdata(client, pca);
536
6d6e7050
CG
537 mutex_init(&pca->lock);
538
79dd354f
CG
539 ret = pca9685_read_reg(pca, PCA9685_MODE2, &reg);
540 if (ret)
541 return ret;
88b613e6 542
912b8439 543 if (device_property_read_bool(&client->dev, "invert"))
bce54366 544 reg |= MODE2_INVRT;
88b613e6 545 else
bce54366 546 reg &= ~MODE2_INVRT;
88b613e6 547
912b8439 548 if (device_property_read_bool(&client->dev, "open-drain"))
bce54366 549 reg &= ~MODE2_OUTDRV;
88b613e6 550 else
bce54366
DJ
551 reg |= MODE2_OUTDRV;
552
79dd354f
CG
553 ret = pca9685_write_reg(pca, PCA9685_MODE2, reg);
554 if (ret)
555 return ret;
88b613e6 556
bce54366 557 /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */
79dd354f 558 pca9685_read_reg(pca, PCA9685_MODE1, &reg);
bce54366 559 reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3);
79dd354f 560 pca9685_write_reg(pca, PCA9685_MODE1, reg);
88b613e6 561
ae16db1f 562 /* Reset OFF/ON registers to POR default */
79dd354f
CG
563 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_L, LED_FULL);
564 pca9685_write_reg(pca, PCA9685_ALL_LED_OFF_H, LED_FULL);
565 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_L, 0);
566 pca9685_write_reg(pca, PCA9685_ALL_LED_ON_H, 0);
88b613e6
ST
567
568 pca->chip.ops = &pca9685_pwm_ops;
316b676b 569 /* Add an extra channel for ALL_LED */
88b613e6
ST
570 pca->chip.npwm = PCA9685_MAXCHAN + 1;
571
572 pca->chip.dev = &client->dev;
88b613e6 573
bccec89f
MW
574 ret = pwmchip_add(&pca->chip);
575 if (ret < 0)
576 return ret;
577
578 ret = pca9685_pwm_gpio_probe(pca);
c40c461e 579 if (ret < 0) {
bccec89f 580 pwmchip_remove(&pca->chip);
c40c461e
SVA
581 return ret;
582 }
583
c40c461e 584 pm_runtime_enable(&client->dev);
bccec89f 585
9e6fd830
CG
586 if (pm_runtime_enabled(&client->dev)) {
587 /*
588 * Although the chip comes out of power-up in the sleep state,
589 * we force it to sleep in case it was woken up before
590 */
591 pca9685_set_sleep_mode(pca, true);
592 pm_runtime_set_suspended(&client->dev);
593 } else {
594 /* Wake the chip up if runtime PM is disabled */
595 pca9685_set_sleep_mode(pca, false);
596 }
597
c40c461e 598 return 0;
88b613e6
ST
599}
600
601static int pca9685_pwm_remove(struct i2c_client *client)
602{
603 struct pca9685 *pca = i2c_get_clientdata(client);
604
f0e96e2e 605 pwmchip_remove(&pca->chip);
9e6fd830
CG
606
607 if (!pm_runtime_enabled(&client->dev)) {
608 /* Put chip in sleep state if runtime PM is disabled */
609 pca9685_set_sleep_mode(pca, true);
610 }
611
c40c461e 612 pm_runtime_disable(&client->dev);
9e6fd830 613
c40c461e
SVA
614 return 0;
615}
88b613e6 616
408a7591 617static int __maybe_unused pca9685_pwm_runtime_suspend(struct device *dev)
c40c461e
SVA
618{
619 struct i2c_client *client = to_i2c_client(dev);
620 struct pca9685 *pca = i2c_get_clientdata(client);
621
0829326a 622 pca9685_set_sleep_mode(pca, true);
c40c461e 623 return 0;
88b613e6
ST
624}
625
408a7591 626static int __maybe_unused pca9685_pwm_runtime_resume(struct device *dev)
c40c461e
SVA
627{
628 struct i2c_client *client = to_i2c_client(dev);
629 struct pca9685 *pca = i2c_get_clientdata(client);
630
0829326a 631 pca9685_set_sleep_mode(pca, false);
c40c461e
SVA
632 return 0;
633}
c40c461e 634
88b613e6
ST
635static const struct i2c_device_id pca9685_id[] = {
636 { "pca9685", 0 },
637 { /* sentinel */ },
638};
639MODULE_DEVICE_TABLE(i2c, pca9685_id);
640
912b8439
AS
641#ifdef CONFIG_ACPI
642static const struct acpi_device_id pca9685_acpi_ids[] = {
643 { "INT3492", 0 },
644 { /* sentinel */ },
645};
646MODULE_DEVICE_TABLE(acpi, pca9685_acpi_ids);
647#endif
648
649#ifdef CONFIG_OF
88b613e6
ST
650static const struct of_device_id pca9685_dt_ids[] = {
651 { .compatible = "nxp,pca9685-pwm", },
652 { /* sentinel */ }
653};
654MODULE_DEVICE_TABLE(of, pca9685_dt_ids);
912b8439 655#endif
88b613e6 656
c40c461e
SVA
657static const struct dev_pm_ops pca9685_pwm_pm = {
658 SET_RUNTIME_PM_OPS(pca9685_pwm_runtime_suspend,
659 pca9685_pwm_runtime_resume, NULL)
660};
661
88b613e6
ST
662static struct i2c_driver pca9685_i2c_driver = {
663 .driver = {
664 .name = "pca9685-pwm",
912b8439
AS
665 .acpi_match_table = ACPI_PTR(pca9685_acpi_ids),
666 .of_match_table = of_match_ptr(pca9685_dt_ids),
c40c461e 667 .pm = &pca9685_pwm_pm,
88b613e6
ST
668 },
669 .probe = pca9685_pwm_probe,
670 .remove = pca9685_pwm_remove,
671 .id_table = pca9685_id,
672};
673
674module_i2c_driver(pca9685_i2c_driver);
675
676MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de>");
677MODULE_DESCRIPTION("PWM driver for PCA9685");
678MODULE_LICENSE("GPL");