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75540c1a 1/*
45b301d2 2 * drivers/pwm/pwm-pxa.c
75540c1a 3 *
4 * simple driver for PWM (Pulse Width Modulator) controller
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 2008-02-13 initial version
b07ab663 11 * eric miao <eric.miao@marvell.com>
75540c1a 12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
5a0e3ad6 17#include <linux/slab.h>
75540c1a 18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/io.h>
21#include <linux/pwm.h>
b52fa7bc 22#include <linux/of_device.h>
75540c1a 23
24#include <asm/div64.h>
75540c1a 25
3d2a98cd
EM
26#define HAS_SECONDARY_PWM 0x10
27
28static const struct platform_device_id pwm_id_table[] = {
29 /* PWM has_secondary_pwm? */
30 { "pxa25x-pwm", 0 },
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AL
31 { "pxa27x-pwm", HAS_SECONDARY_PWM },
32 { "pxa168-pwm", 0 },
33 { "pxa910-pwm", 0 },
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EM
34 { },
35};
36MODULE_DEVICE_TABLE(platform, pwm_id_table);
37
75540c1a 38/* PWM registers and bits definitions */
39#define PWMCR (0x00)
40#define PWMDCR (0x04)
41#define PWMPCR (0x08)
42
43#define PWMCR_SD (1 << 6)
44#define PWMDCR_FD (1 << 10)
45
17b2b478
TR
46struct pxa_pwm_chip {
47 struct pwm_chip chip;
48 struct device *dev;
75540c1a 49
75540c1a 50 struct clk *clk;
51 void __iomem *mmio_base;
75540c1a 52};
53
17b2b478
TR
54static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
55{
56 return container_of(chip, struct pxa_pwm_chip, chip);
57}
58
75540c1a 59/*
60 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
61 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
62 */
17b2b478
TR
63static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
64 int duty_ns, int period_ns)
75540c1a 65{
17b2b478 66 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
75540c1a 67 unsigned long long c;
68 unsigned long period_cycles, prescale, pv, dc;
17b2b478
TR
69 unsigned long offset;
70 int rc;
75540c1a 71
17b2b478
TR
72 offset = pwm->hwpwm ? 0x10 : 0;
73
74 c = clk_get_rate(pc->clk);
75540c1a 75 c = c * period_ns;
76 do_div(c, 1000000000);
77 period_cycles = c;
78
71a35d75 79 if (period_cycles < 1)
75540c1a 80 period_cycles = 1;
81 prescale = (period_cycles - 1) / 1024;
82 pv = period_cycles / (prescale + 1) - 1;
83
84 if (prescale > 63)
85 return -EINVAL;
86
87 if (duty_ns == period_ns)
88 dc = PWMDCR_FD;
89 else
90 dc = (pv + 1) * duty_ns / period_ns;
91
92 /* NOTE: the clock to PWM has to be enabled first
93 * before writing to the registers
94 */
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TR
95 rc = clk_prepare_enable(pc->clk);
96 if (rc < 0)
97 return rc;
98
99 writel(prescale, pc->mmio_base + offset + PWMCR);
100 writel(dc, pc->mmio_base + offset + PWMDCR);
101 writel(pv, pc->mmio_base + offset + PWMPCR);
75540c1a 102
17b2b478 103 clk_disable_unprepare(pc->clk);
75540c1a 104 return 0;
105}
75540c1a 106
17b2b478 107static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
75540c1a 108{
17b2b478 109 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
c860d701 110
b014a30c 111 return clk_prepare_enable(pc->clk);
75540c1a 112}
75540c1a 113
17b2b478 114static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
75540c1a 115{
17b2b478 116 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
75540c1a 117
b014a30c 118 clk_disable_unprepare(pc->clk);
75540c1a 119}
75540c1a 120
b2ec9efc 121static const struct pwm_ops pxa_pwm_ops = {
17b2b478
TR
122 .config = pxa_pwm_config,
123 .enable = pxa_pwm_enable,
124 .disable = pxa_pwm_disable,
125 .owner = THIS_MODULE,
126};
75540c1a 127
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MD
128#ifdef CONFIG_OF
129/*
fdec4f72 130 * Device tree users must create one device instance for each PWM channel.
b52fa7bc
MD
131 * Hence we dispense with the HAS_SECONDARY_PWM and "tell" the original driver
132 * code that this is a single channel pxa25x-pwm. Currently all devices are
133 * supported identically.
134 */
2ae69a46 135static const struct of_device_id pwm_of_match[] = {
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MD
136 { .compatible = "marvell,pxa250-pwm", .data = &pwm_id_table[0]},
137 { .compatible = "marvell,pxa270-pwm", .data = &pwm_id_table[0]},
138 { .compatible = "marvell,pxa168-pwm", .data = &pwm_id_table[0]},
139 { .compatible = "marvell,pxa910-pwm", .data = &pwm_id_table[0]},
140 { }
141};
142MODULE_DEVICE_TABLE(of, pwm_of_match);
f409cd38
TR
143#else
144#define pwm_of_match NULL
b52fa7bc
MD
145#endif
146
147static const struct platform_device_id *pxa_pwm_get_id_dt(struct device *dev)
148{
149 const struct of_device_id *id = of_match_device(pwm_of_match, dev);
150
151 return id ? id->data : NULL;
152}
153
154static struct pwm_device *
155pxa_pwm_of_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
156{
157 struct pwm_device *pwm;
158
159 pwm = pwm_request_from_chip(pc, 0, NULL);
160 if (IS_ERR(pwm))
161 return pwm;
162
e39c0df1 163 pwm->args.period = args->args[0];
b52fa7bc
MD
164
165 return pwm;
166}
167
3e9fe83d 168static int pwm_probe(struct platform_device *pdev)
75540c1a 169{
b3282ab1 170 const struct platform_device_id *id = platform_get_device_id(pdev);
17b2b478 171 struct pxa_pwm_chip *pwm;
75540c1a 172 struct resource *r;
173 int ret = 0;
174
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MD
175 if (IS_ENABLED(CONFIG_OF) && id == NULL)
176 id = pxa_pwm_get_id_dt(&pdev->dev);
177
178 if (id == NULL)
179 return -EINVAL;
180
45b301d2 181 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
d93fc78f 182 if (pwm == NULL)
3d2a98cd 183 return -ENOMEM;
75540c1a 184
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AL
185 pwm->clk = devm_clk_get(&pdev->dev, NULL);
186 if (IS_ERR(pwm->clk))
187 return PTR_ERR(pwm->clk);
188
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TR
189 pwm->chip.dev = &pdev->dev;
190 pwm->chip.ops = &pxa_pwm_ops;
191 pwm->chip.base = -1;
192 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
75540c1a 193
b52fa7bc
MD
194 if (IS_ENABLED(CONFIG_OF)) {
195 pwm->chip.of_xlate = pxa_pwm_of_xlate;
196 pwm->chip.of_pwm_n_cells = 1;
197 }
198
75540c1a 199 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6d4294d1
TR
200 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r);
201 if (IS_ERR(pwm->mmio_base))
202 return PTR_ERR(pwm->mmio_base);
75540c1a 203
17b2b478
TR
204 ret = pwmchip_add(&pwm->chip);
205 if (ret < 0) {
206 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
207 return ret;
3d2a98cd
EM
208 }
209
75540c1a 210 platform_set_drvdata(pdev, pwm);
3d2a98cd 211 return 0;
75540c1a 212}
213
77f37917 214static int pwm_remove(struct platform_device *pdev)
75540c1a 215{
17b2b478 216 struct pxa_pwm_chip *chip;
75540c1a 217
17b2b478
TR
218 chip = platform_get_drvdata(pdev);
219 if (chip == NULL)
75540c1a 220 return -ENODEV;
221
abeaf755 222 return pwmchip_remove(&chip->chip);
75540c1a 223}
224
3d2a98cd 225static struct platform_driver pwm_driver = {
75540c1a 226 .driver = {
227 .name = "pxa25x-pwm",
f409cd38 228 .of_match_table = pwm_of_match,
75540c1a 229 },
3d2a98cd 230 .probe = pwm_probe,
fd109112 231 .remove = pwm_remove,
3d2a98cd 232 .id_table = pwm_id_table,
75540c1a 233};
234
1e185c7a 235module_platform_driver(pwm_driver);
b5f0228a
GL
236
237MODULE_LICENSE("GPL v2");