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regulator: ab8500: Split up probe() into manageable pieces
[mirror_ubuntu-zesty-kernel.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
c789ca20
SI		 17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
c789ca20
SI		 21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/regulator/ab8500.h>
24
25/**
26 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 27 * @dev: device pointer
c789ca20 28 * @desc: regulator description
c789ca20
SI		 29 * @regulator_dev: regulator device
30 * @max_uV: maximum voltage (for variable voltage supplies)
31 * @min_uV: minimum voltage (for variable voltage supplies)
32 * @fixed_uV: typical voltage (for fixed voltage supplies)
47c16975 33 * @update_bank: bank to control on/off
c789ca20 34 * @update_reg: register to control on/off
e1159e6d
BJ		 35 * @update_mask: mask to enable/disable regulator
36 * @update_val_enable: bits to enable the regulator in normal (high power) mode
47c16975 37 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 38 * @voltage_reg: register to control regulator voltage
39 * @voltage_mask: mask to control regulator voltage
e1159e6d 40 * @voltages: supported voltage table
c789ca20 41 * @voltages_len: number of supported voltages for the regulator
42ab616a 42 * @delay: startup/set voltage delay in us
c789ca20
SI		 43 */
44struct ab8500_regulator_info {
45 struct device *dev;
46 struct regulator_desc desc;
c789ca20
SI		 47 struct regulator_dev *regulator;
48 int max_uV;
49 int min_uV;
50 int fixed_uV;
47c16975
MW		 51 u8 update_bank;
52 u8 update_reg;
e1159e6d
BJ		 53 u8 update_mask;
54 u8 update_val_enable;
47c16975
MW		 55 u8 voltage_bank;
56 u8 voltage_reg;
57 u8 voltage_mask;
e1159e6d 58 int const *voltages;
c789ca20 59 int voltages_len;
42ab616a 60 unsigned int delay;
c789ca20
SI		 61};
62
63/* voltage tables for the vauxn/vintcore supplies */
64static const int ldo_vauxn_voltages[] = {
65 1100000,
66 1200000,
67 1300000,
68 1400000,
69 1500000,
70 1800000,
71 1850000,
72 1900000,
73 2500000,
74 2650000,
75 2700000,
76 2750000,
77 2800000,
78 2900000,
79 3000000,
80 3300000,
81};
82
2b75151a
BJ		 83static const int ldo_vaux3_voltages[] = {
84 1200000,
85 1500000,
86 1800000,
87 2100000,
88 2500000,
89 2750000,
90 2790000,
91 2910000,
92};
93
c789ca20
SI		 94static const int ldo_vintcore_voltages[] = {
95 1200000,
96 1225000,
97 1250000,
98 1275000,
99 1300000,
100 1325000,
101 1350000,
102};
103
104static int ab8500_regulator_enable(struct regulator_dev *rdev)
105{
fc24b426 106 int ret;
c789ca20
SI		 107 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
108
fc24b426
BJ		 109 if (info == NULL) {
110 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 111 return -EINVAL;
fc24b426 112 }
c789ca20 113
47c16975 114 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 115 info->update_bank, info->update_reg,
116 info->update_mask, info->update_val_enable);
c789ca20
SI		 117 if (ret < 0)
118 dev_err(rdev_get_dev(rdev),
119 "couldn't set enable bits for regulator\n");
09aefa12
BJ		 120
121 dev_vdbg(rdev_get_dev(rdev),
122 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
123 info->desc.name, info->update_bank, info->update_reg,
124 info->update_mask, info->update_val_enable);
125
c789ca20
SI		 126 return ret;
127}
128
129static int ab8500_regulator_disable(struct regulator_dev *rdev)
130{
fc24b426 131 int ret;
c789ca20
SI		 132 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
133
fc24b426
BJ		 134 if (info == NULL) {
135 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 136 return -EINVAL;
fc24b426 137 }
c789ca20 138
47c16975 139 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 140 info->update_bank, info->update_reg,
141 info->update_mask, 0x0);
c789ca20
SI		 142 if (ret < 0)
143 dev_err(rdev_get_dev(rdev),
144 "couldn't set disable bits for regulator\n");
09aefa12
BJ		 145
146 dev_vdbg(rdev_get_dev(rdev),
147 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
148 info->desc.name, info->update_bank, info->update_reg,
149 info->update_mask, 0x0);
150
c789ca20
SI		 151 return ret;
152}
153
154static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
155{
fc24b426 156 int ret;
c789ca20 157 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 158 u8 regval;
c789ca20 159
fc24b426
BJ		 160 if (info == NULL) {
161 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 162 return -EINVAL;
fc24b426 163 }
c789ca20 164
47c16975 165 ret = abx500_get_register_interruptible(info->dev,
09aefa12 166 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 167 if (ret < 0) {
168 dev_err(rdev_get_dev(rdev),
169 "couldn't read 0x%x register\n", info->update_reg);
170 return ret;
171 }
172
09aefa12
BJ		 173 dev_vdbg(rdev_get_dev(rdev),
174 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
175 " 0x%x\n",
176 info->desc.name, info->update_bank, info->update_reg,
177 info->update_mask, regval);
178
179 if (regval & info->update_mask)
c789ca20
SI		 180 return true;
181 else
182 return false;
183}
184
185static int ab8500_list_voltage(struct regulator_dev *rdev, unsigned selector)
186{
c789ca20
SI		 187 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
188
fc24b426
BJ		 189 if (info == NULL) {
190 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 191 return -EINVAL;
fc24b426 192 }
c789ca20
SI		 193
194 /* return the uV for the fixed regulators */
195 if (info->fixed_uV)
196 return info->fixed_uV;
197
49990e6e 198 if (selector >= info->voltages_len)
c789ca20
SI		 199 return -EINVAL;
200
e1159e6d 201 return info->voltages[selector];
c789ca20
SI		 202}
203
3bf6e90e 204static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
c789ca20 205{
09aefa12 206 int ret, val;
c789ca20 207 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 208 u8 regval;
c789ca20 209
fc24b426
BJ		 210 if (info == NULL) {
211 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 212 return -EINVAL;
fc24b426 213 }
c789ca20 214
09aefa12
BJ		 215 ret = abx500_get_register_interruptible(info->dev,
216 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 217 if (ret < 0) {
218 dev_err(rdev_get_dev(rdev),
219 "couldn't read voltage reg for regulator\n");
220 return ret;
221 }
222
09aefa12
BJ		 223 dev_vdbg(rdev_get_dev(rdev),
224 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
225 " 0x%x\n",
226 info->desc.name, info->voltage_bank, info->voltage_reg,
227 info->voltage_mask, regval);
228
c789ca20 229 /* vintcore has a different layout */
09aefa12 230 val = regval & info->voltage_mask;
fc24b426 231 if (info->desc.id == AB8500_LDO_INTCORE)
3bf6e90e 232 return val >> 0x3;
c789ca20 233 else
3bf6e90e 234 return val;
c789ca20
SI		 235}
236
ae713d39
AL		 237static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
238 unsigned selector)
c789ca20 239{
fc24b426 240 int ret;
c789ca20 241 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 242 u8 regval;
c789ca20 243
fc24b426
BJ		 244 if (info == NULL) {
245 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 246 return -EINVAL;
fc24b426 247 }
c789ca20 248
c789ca20 249 /* set the registers for the request */
ae713d39 250 regval = (u8)selector;
47c16975 251 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 252 info->voltage_bank, info->voltage_reg,
253 info->voltage_mask, regval);
c789ca20
SI		 254 if (ret < 0)
255 dev_err(rdev_get_dev(rdev),
256 "couldn't set voltage reg for regulator\n");
257
09aefa12
BJ		 258 dev_vdbg(rdev_get_dev(rdev),
259 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
260 " 0x%x\n",
261 info->desc.name, info->voltage_bank, info->voltage_reg,
262 info->voltage_mask, regval);
263
c789ca20
SI		 264 return ret;
265}
266
42ab616a
LW		 267static int ab8500_regulator_enable_time(struct regulator_dev *rdev)
268{
269 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
270
271 return info->delay;
272}
273
274static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
275 unsigned int old_sel,
276 unsigned int new_sel)
277{
278 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
279 int ret;
280
281 /* If the regulator isn't on, it won't take time here */
282 ret = ab8500_regulator_is_enabled(rdev);
283 if (ret < 0)
284 return ret;
285 if (!ret)
286 return 0;
287 return info->delay;
288}
289
c789ca20
SI		 290static struct regulator_ops ab8500_regulator_ops = {
291 .enable = ab8500_regulator_enable,
292 .disable = ab8500_regulator_disable,
293 .is_enabled = ab8500_regulator_is_enabled,
3bf6e90e 294 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
ae713d39 295 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
c789ca20 296 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 297 .enable_time = ab8500_regulator_enable_time,
298 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 299};
300
301static int ab8500_fixed_get_voltage(struct regulator_dev *rdev)
302{
c789ca20
SI		 303 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
304
fc24b426
BJ		 305 if (info == NULL) {
306 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 307 return -EINVAL;
fc24b426 308 }
c789ca20
SI		 309
310 return info->fixed_uV;
311}
312
6909b452 313static struct regulator_ops ab8500_regulator_fixed_ops = {
c789ca20
SI		 314 .enable = ab8500_regulator_enable,
315 .disable = ab8500_regulator_disable,
316 .is_enabled = ab8500_regulator_is_enabled,
317 .get_voltage = ab8500_fixed_get_voltage,
318 .list_voltage = ab8500_list_voltage,
42ab616a
LW		 319 .enable_time = ab8500_regulator_enable_time,
320 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 321};
322
6909b452
BJ		 323static struct ab8500_regulator_info
324 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 325 /*
e1159e6d
BJ		 326 * Variable Voltage Regulators
327 * name, min mV, max mV,
328 * update bank, reg, mask, enable val
329 * volt bank, reg, mask, table, table length
c789ca20 330 */
6909b452
BJ		 331 [AB8500_LDO_AUX1] = {
332 .desc = {
333 .name = "LDO-AUX1",
334 .ops = &ab8500_regulator_ops,
335 .type = REGULATOR_VOLTAGE,
336 .id = AB8500_LDO_AUX1,
337 .owner = THIS_MODULE,
338 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
339 },
340 .min_uV = 1100000,
341 .max_uV = 3300000,
342 .update_bank = 0x04,
343 .update_reg = 0x09,
344 .update_mask = 0x03,
345 .update_val_enable = 0x01,
346 .voltage_bank = 0x04,
347 .voltage_reg = 0x1f,
348 .voltage_mask = 0x0f,
349 .voltages = ldo_vauxn_voltages,
350 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
351 },
352 [AB8500_LDO_AUX2] = {
353 .desc = {
354 .name = "LDO-AUX2",
355 .ops = &ab8500_regulator_ops,
356 .type = REGULATOR_VOLTAGE,
357 .id = AB8500_LDO_AUX2,
358 .owner = THIS_MODULE,
359 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
360 },
361 .min_uV = 1100000,
362 .max_uV = 3300000,
363 .update_bank = 0x04,
364 .update_reg = 0x09,
365 .update_mask = 0x0c,
366 .update_val_enable = 0x04,
367 .voltage_bank = 0x04,
368 .voltage_reg = 0x20,
369 .voltage_mask = 0x0f,
370 .voltages = ldo_vauxn_voltages,
371 .voltages_len = ARRAY_SIZE(ldo_vauxn_voltages),
372 },
373 [AB8500_LDO_AUX3] = {
374 .desc = {
375 .name = "LDO-AUX3",
376 .ops = &ab8500_regulator_ops,
377 .type = REGULATOR_VOLTAGE,
378 .id = AB8500_LDO_AUX3,
379 .owner = THIS_MODULE,
380 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
381 },
382 .min_uV = 1100000,
383 .max_uV = 3300000,
384 .update_bank = 0x04,
385 .update_reg = 0x0a,
386 .update_mask = 0x03,
387 .update_val_enable = 0x01,
388 .voltage_bank = 0x04,
389 .voltage_reg = 0x21,
390 .voltage_mask = 0x07,
391 .voltages = ldo_vaux3_voltages,
392 .voltages_len = ARRAY_SIZE(ldo_vaux3_voltages),
393 },
394 [AB8500_LDO_INTCORE] = {
395 .desc = {
396 .name = "LDO-INTCORE",
397 .ops = &ab8500_regulator_ops,
398 .type = REGULATOR_VOLTAGE,
399 .id = AB8500_LDO_INTCORE,
400 .owner = THIS_MODULE,
401 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
402 },
403 .min_uV = 1100000,
404 .max_uV = 3300000,
405 .update_bank = 0x03,
406 .update_reg = 0x80,
407 .update_mask = 0x44,
408 .update_val_enable = 0x04,
409 .voltage_bank = 0x03,
410 .voltage_reg = 0x80,
411 .voltage_mask = 0x38,
412 .voltages = ldo_vintcore_voltages,
413 .voltages_len = ARRAY_SIZE(ldo_vintcore_voltages),
414 },
c789ca20
SI		 415
416 /*
e1159e6d
BJ		 417 * Fixed Voltage Regulators
418 * name, fixed mV,
419 * update bank, reg, mask, enable val
c789ca20 420 */
6909b452
BJ		 421 [AB8500_LDO_TVOUT] = {
422 .desc = {
423 .name = "LDO-TVOUT",
424 .ops = &ab8500_regulator_fixed_ops,
425 .type = REGULATOR_VOLTAGE,
426 .id = AB8500_LDO_TVOUT,
427 .owner = THIS_MODULE,
428 .n_voltages = 1,
429 },
42ab616a 430 .delay = 10000,
6909b452
BJ		 431 .fixed_uV = 2000000,
432 .update_bank = 0x03,
433 .update_reg = 0x80,
434 .update_mask = 0x82,
435 .update_val_enable = 0x02,
436 },
ea05ef31
BJ		 437 [AB8500_LDO_USB] = {
438 .desc = {
439 .name = "LDO-USB",
440 .ops = &ab8500_regulator_fixed_ops,
441 .type = REGULATOR_VOLTAGE,
442 .id = AB8500_LDO_USB,
443 .owner = THIS_MODULE,
444 .n_voltages = 1,
445 },
446 .fixed_uV = 3300000,
447 .update_bank = 0x03,
448 .update_reg = 0x82,
449 .update_mask = 0x03,
450 .update_val_enable = 0x01,
451 },
6909b452
BJ		 452 [AB8500_LDO_AUDIO] = {
453 .desc = {
454 .name = "LDO-AUDIO",
455 .ops = &ab8500_regulator_fixed_ops,
456 .type = REGULATOR_VOLTAGE,
457 .id = AB8500_LDO_AUDIO,
458 .owner = THIS_MODULE,
459 .n_voltages = 1,
460 },
461 .fixed_uV = 2000000,
462 .update_bank = 0x03,
463 .update_reg = 0x83,
464 .update_mask = 0x02,
465 .update_val_enable = 0x02,
466 },
467 [AB8500_LDO_ANAMIC1] = {
468 .desc = {
469 .name = "LDO-ANAMIC1",
470 .ops = &ab8500_regulator_fixed_ops,
471 .type = REGULATOR_VOLTAGE,
472 .id = AB8500_LDO_ANAMIC1,
473 .owner = THIS_MODULE,
474 .n_voltages = 1,
475 },
476 .fixed_uV = 2050000,
477 .update_bank = 0x03,
478 .update_reg = 0x83,
479 .update_mask = 0x08,
480 .update_val_enable = 0x08,
481 },
482 [AB8500_LDO_ANAMIC2] = {
483 .desc = {
484 .name = "LDO-ANAMIC2",
485 .ops = &ab8500_regulator_fixed_ops,
486 .type = REGULATOR_VOLTAGE,
487 .id = AB8500_LDO_ANAMIC2,
488 .owner = THIS_MODULE,
489 .n_voltages = 1,
490 },
491 .fixed_uV = 2050000,
492 .update_bank = 0x03,
493 .update_reg = 0x83,
494 .update_mask = 0x10,
495 .update_val_enable = 0x10,
496 },
497 [AB8500_LDO_DMIC] = {
498 .desc = {
499 .name = "LDO-DMIC",
500 .ops = &ab8500_regulator_fixed_ops,
501 .type = REGULATOR_VOLTAGE,
502 .id = AB8500_LDO_DMIC,
503 .owner = THIS_MODULE,
504 .n_voltages = 1,
505 },
506 .fixed_uV = 1800000,
507 .update_bank = 0x03,
508 .update_reg = 0x83,
509 .update_mask = 0x04,
510 .update_val_enable = 0x04,
511 },
512 [AB8500_LDO_ANA] = {
513 .desc = {
514 .name = "LDO-ANA",
515 .ops = &ab8500_regulator_fixed_ops,
516 .type = REGULATOR_VOLTAGE,
517 .id = AB8500_LDO_ANA,
518 .owner = THIS_MODULE,
519 .n_voltages = 1,
520 },
521 .fixed_uV = 1200000,
522 .update_bank = 0x04,
523 .update_reg = 0x06,
524 .update_mask = 0x0c,
525 .update_val_enable = 0x04,
526 },
527
528
c789ca20
SI		 529};
530
79568b94
BJ		 531struct ab8500_reg_init {
532 u8 bank;
533 u8 addr;
534 u8 mask;
535};
536
537#define REG_INIT(_id, _bank, _addr, _mask) \
538 [_id] = { \
539 .bank = _bank, \
540 .addr = _addr, \
541 .mask = _mask, \
542 }
543
544static struct ab8500_reg_init ab8500_reg_init[] = {
545 /*
546 * 0x30, VanaRequestCtrl
547 * 0x0C, VpllRequestCtrl
548 * 0xc0, VextSupply1RequestCtrl
549 */
550 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xfc),
551 /*
552 * 0x03, VextSupply2RequestCtrl
553 * 0x0c, VextSupply3RequestCtrl
554 * 0x30, Vaux1RequestCtrl
555 * 0xc0, Vaux2RequestCtrl
556 */
557 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
558 /*
559 * 0x03, Vaux3RequestCtrl
560 * 0x04, SwHPReq
561 */
562 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
563 /*
564 * 0x08, VanaSysClkReq1HPValid
565 * 0x20, Vaux1SysClkReq1HPValid
566 * 0x40, Vaux2SysClkReq1HPValid
567 * 0x80, Vaux3SysClkReq1HPValid
568 */
569 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
570 /*
571 * 0x10, VextSupply1SysClkReq1HPValid
572 * 0x20, VextSupply2SysClkReq1HPValid
573 * 0x40, VextSupply3SysClkReq1HPValid
574 */
575 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
576 /*
577 * 0x08, VanaHwHPReq1Valid
578 * 0x20, Vaux1HwHPReq1Valid
579 * 0x40, Vaux2HwHPReq1Valid
580 * 0x80, Vaux3HwHPReq1Valid
581 */
582 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xe8),
583 /*
584 * 0x01, VextSupply1HwHPReq1Valid
585 * 0x02, VextSupply2HwHPReq1Valid
586 * 0x04, VextSupply3HwHPReq1Valid
587 */
588 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x07),
589 /*
590 * 0x08, VanaHwHPReq2Valid
591 * 0x20, Vaux1HwHPReq2Valid
592 * 0x40, Vaux2HwHPReq2Valid
593 * 0x80, Vaux3HwHPReq2Valid
594 */
595 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xe8),
596 /*
597 * 0x01, VextSupply1HwHPReq2Valid
598 * 0x02, VextSupply2HwHPReq2Valid
599 * 0x04, VextSupply3HwHPReq2Valid
600 */
601 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x07),
602 /*
603 * 0x20, VanaSwHPReqValid
604 * 0x80, Vaux1SwHPReqValid
605 */
606 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xa0),
607 /*
608 * 0x01, Vaux2SwHPReqValid
609 * 0x02, Vaux3SwHPReqValid
610 * 0x04, VextSupply1SwHPReqValid
611 * 0x08, VextSupply2SwHPReqValid
612 * 0x10, VextSupply3SwHPReqValid
613 */
614 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x1f),
615 /*
616 * 0x02, SysClkReq2Valid1
617 * ...
618 * 0x80, SysClkReq8Valid1
619 */
620 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
621 /*
622 * 0x02, SysClkReq2Valid2
623 * ...
624 * 0x80, SysClkReq8Valid2
625 */
626 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
627 /*
628 * 0x02, VTVoutEna
629 * 0x04, Vintcore12Ena
630 * 0x38, Vintcore12Sel
631 * 0x40, Vintcore12LP
632 * 0x80, VTVoutLP
633 */
634 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
635 /*
636 * 0x02, VaudioEna
637 * 0x04, VdmicEna
638 * 0x08, Vamic1Ena
639 * 0x10, Vamic2Ena
640 */
641 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
642 /*
643 * 0x01, Vamic1_dzout
644 * 0x02, Vamic2_dzout
645 */
646 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
647 /*
648 * 0x0c, VanaRegu
649 * 0x03, VpllRegu
650 */
651 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
652 /*
653 * 0x01, VrefDDREna
654 * 0x02, VrefDDRSleepMode
655 */
656 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
657 /*
658 * 0x03, VextSupply1Regu
659 * 0x0c, VextSupply2Regu
660 * 0x30, VextSupply3Regu
661 * 0x40, ExtSupply2Bypass
662 * 0x80, ExtSupply3Bypass
663 */
664 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
665 /*
666 * 0x03, Vaux1Regu
667 * 0x0c, Vaux2Regu
668 */
669 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
670 /*
671 * 0x03, Vaux3Regu
672 */
673 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x03),
674 /*
675 * 0x3f, Vsmps1Sel1
676 */
677 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
678 /*
679 * 0x0f, Vaux1Sel
680 */
681 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
682 /*
683 * 0x0f, Vaux2Sel
684 */
685 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
686 /*
687 * 0x07, Vaux3Sel
688 */
689 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x07),
690 /*
691 * 0x01, VextSupply12LP
692 */
693 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
694 /*
695 * 0x04, Vaux1Disch
696 * 0x08, Vaux2Disch
697 * 0x10, Vaux3Disch
698 * 0x20, Vintcore12Disch
699 * 0x40, VTVoutDisch
700 * 0x80, VaudioDisch
701 */
702 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xfc),
703 /*
704 * 0x02, VanaDisch
705 * 0x04, VdmicPullDownEna
706 * 0x10, VdmicDisch
707 */
708 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x16),
709};
710
a7ac1d9e
LJ		 711static __devinit int
712ab8500_regulator_init_registers(struct platform_device *pdev, int id, int value)
713{
714 int err;
715
716 if (value & ~ab8500_reg_init[id].mask) {
717 dev_err(&pdev->dev,
718 "Configuration error: value outside mask.\n");
719 return -EINVAL;
720 }
721
722 err = abx500_mask_and_set_register_interruptible(
723 &pdev->dev,
724 ab8500_reg_init[id].bank,
725 ab8500_reg_init[id].addr,
726 ab8500_reg_init[id].mask,
727 value);
728 if (err < 0) {
729 dev_err(&pdev->dev,
730 "Failed to initialize 0x%02x, 0x%02x.\n",
731 ab8500_reg_init[id].bank,
732 ab8500_reg_init[id].addr);
733 return err;
734 }
735
736 dev_vdbg(&pdev->dev,
737 "init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
738 ab8500_reg_init[id].bank,
739 ab8500_reg_init[id].addr,
740 ab8500_reg_init[id].mask,
741 value);
742
743 return 0;
744}
745
746static __devinit int ab8500_regulator_register(struct platform_device *pdev,
747 struct regulator_init_data *init_data,
748 int id,
749 struct device_node *np)
750{
751 struct ab8500_regulator_info *info = NULL;
752 struct regulator_config config = { };
753 int err;
754
755 /* assign per-regulator data */
756 info = &ab8500_regulator_info[id];
757 info->dev = &pdev->dev;
758
759 config.dev = &pdev->dev;
760 config.init_data = init_data;
761 config.driver_data = info;
762 config.of_node = np;
763
764 /* fix for hardware before ab8500v2.0 */
765 if (abx500_get_chip_id(info->dev) < 0x20) {
766 if (info->desc.id == AB8500_LDO_AUX3) {
767 info->desc.n_voltages =
768 ARRAY_SIZE(ldo_vauxn_voltages);
769 info->voltages = ldo_vauxn_voltages;
770 info->voltages_len =
771 ARRAY_SIZE(ldo_vauxn_voltages);
772 info->voltage_mask = 0xf;
773 }
774 }
775
776 /* register regulator with framework */
777 info->regulator = regulator_register(&info->desc, &config);
778 if (IS_ERR(info->regulator)) {
779 err = PTR_ERR(info->regulator);
780 dev_err(&pdev->dev, "failed to register regulator %s\n",
781 info->desc.name);
782 /* when we fail, un-register all earlier regulators */
783 while (--id >= 0) {
784 info = &ab8500_regulator_info[id];
785 regulator_unregister(info->regulator);
786 }
787 return err;
788 }
789
790 return 0;
791}
792
c789ca20
SI		 793static __devinit int ab8500_regulator_probe(struct platform_device *pdev)
794{
795 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
af54decd 796 struct ab8500_platform_data *pdata;
c789ca20
SI		 797 int i, err;
798
799 if (!ab8500) {
800 dev_err(&pdev->dev, "null mfd parent\n");
801 return -EINVAL;
802 }
af54decd 803 pdata = dev_get_platdata(ab8500->dev);
fc24b426
BJ		 804 if (!pdata) {
805 dev_err(&pdev->dev, "null pdata\n");
806 return -EINVAL;
807 }
c789ca20 808
cb189b07
BJ		 809 /* make sure the platform data has the correct size */
810 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 811 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 812 return -EINVAL;
813 }
814
79568b94
BJ		 815 /* initialize registers */
816 for (i = 0; i < pdata->num_regulator_reg_init; i++) {
a7ac1d9e 817 int id, value;
79568b94
BJ		 818
819 id = pdata->regulator_reg_init[i].id;
820 value = pdata->regulator_reg_init[i].value;
821
822 /* check for configuration errors */
823 if (id >= AB8500_NUM_REGULATOR_REGISTERS) {
824 dev_err(&pdev->dev,
825 "Configuration error: id outside range.\n");
826 return -EINVAL;
827 }
79568b94 828
a7ac1d9e
LJ		 829 err = ab8500_regulator_init_registers(pdev, id, value);
830 if (err < 0)
79568b94 831 return err;
79568b94
BJ		 832 }
833
c789ca20
SI		 834 /* register all regulators */
835 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
a7ac1d9e
LJ		 836 err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
837 if (err < 0)
c789ca20 838 return err;
c789ca20
SI		 839 }
840
841 return 0;
842}
843
844static __devexit int ab8500_regulator_remove(struct platform_device *pdev)
845{
846 int i;
847
848 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
849 struct ab8500_regulator_info *info = NULL;
850 info = &ab8500_regulator_info[i];
09aefa12
BJ		 851
852 dev_vdbg(rdev_get_dev(info->regulator),
853 "%s-remove\n", info->desc.name);
854
c789ca20
SI		 855 regulator_unregister(info->regulator);
856 }
857
858 return 0;
859}
860
861static struct platform_driver ab8500_regulator_driver = {
862 .probe = ab8500_regulator_probe,
863 .remove = __devexit_p(ab8500_regulator_remove),
864 .driver = {
865 .name = "ab8500-regulator",
866 .owner = THIS_MODULE,
867 },
868};
869
870static int __init ab8500_regulator_init(void)
871{
872 int ret;
873
874 ret = platform_driver_register(&ab8500_regulator_driver);
875 if (ret != 0)
876 pr_err("Failed to register ab8500 regulator: %d\n", ret);
877
878 return ret;
879}
880subsys_initcall(ab8500_regulator_init);
881
882static void __exit ab8500_regulator_exit(void)
883{
884 platform_driver_unregister(&ab8500_regulator_driver);
885}
886module_exit(ab8500_regulator_exit);
887
888MODULE_LICENSE("GPL v2");
889MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
890MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
891MODULE_ALIAS("platform:ab8500-regulator");
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