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08bf1c0a AJ |
1 | /* |
2 | * da9052-regulator.c: Regulator driver for DA9052 | |
3 | * | |
4 | * Copyright(c) 2011 Dialog Semiconductor Ltd. | |
5 | * | |
6 | * Author: David Dajun Chen <dchen@diasemi.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/moduleparam.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/regulator/driver.h> | |
21 | #include <linux/regulator/machine.h> | |
88c84c14 YCLP |
22 | #ifdef CONFIG_OF |
23 | #include <linux/regulator/of_regulator.h> | |
24 | #endif | |
08bf1c0a AJ |
25 | |
26 | #include <linux/mfd/da9052/da9052.h> | |
27 | #include <linux/mfd/da9052/reg.h> | |
28 | #include <linux/mfd/da9052/pdata.h> | |
29 | ||
30 | /* Buck step size */ | |
31 | #define DA9052_BUCK_PERI_3uV_STEP 100000 | |
32 | #define DA9052_BUCK_PERI_REG_MAP_UPTO_3uV 24 | |
33 | #define DA9052_CONST_3uV 3000000 | |
34 | ||
35 | #define DA9052_MIN_UA 0 | |
36 | #define DA9052_MAX_UA 3 | |
37 | #define DA9052_CURRENT_RANGE 4 | |
38 | ||
39 | /* Bit masks */ | |
40 | #define DA9052_BUCK_ILIM_MASK_EVEN 0x0c | |
41 | #define DA9052_BUCK_ILIM_MASK_ODD 0xc0 | |
42 | ||
9210f05b AL |
43 | /* DA9052 REGULATOR IDs */ |
44 | #define DA9052_ID_BUCK1 0 | |
45 | #define DA9052_ID_BUCK2 1 | |
46 | #define DA9052_ID_BUCK3 2 | |
47 | #define DA9052_ID_BUCK4 3 | |
48 | #define DA9052_ID_LDO1 4 | |
49 | #define DA9052_ID_LDO2 5 | |
50 | #define DA9052_ID_LDO3 6 | |
51 | #define DA9052_ID_LDO4 7 | |
52 | #define DA9052_ID_LDO5 8 | |
53 | #define DA9052_ID_LDO6 9 | |
54 | #define DA9052_ID_LDO7 10 | |
55 | #define DA9052_ID_LDO8 11 | |
56 | #define DA9052_ID_LDO9 12 | |
57 | #define DA9052_ID_LDO10 13 | |
58 | ||
08bf1c0a AJ |
59 | static const u32 da9052_current_limits[3][4] = { |
60 | {700000, 800000, 1000000, 1200000}, /* DA9052-BC BUCKs */ | |
61 | {1600000, 2000000, 2400000, 3000000}, /* DA9053-AA/Bx BUCK-CORE */ | |
62 | {800000, 1000000, 1200000, 1500000}, /* DA9053-AA/Bx BUCK-PRO, | |
63 | * BUCK-MEM and BUCK-PERI | |
64 | */ | |
65 | }; | |
66 | ||
67 | struct da9052_regulator_info { | |
68 | struct regulator_desc reg_desc; | |
69 | int step_uV; | |
70 | int min_uV; | |
71 | int max_uV; | |
72 | unsigned char volt_shift; | |
73 | unsigned char en_bit; | |
74 | unsigned char activate_bit; | |
75 | }; | |
76 | ||
77 | struct da9052_regulator { | |
78 | struct da9052 *da9052; | |
79 | struct da9052_regulator_info *info; | |
80 | struct regulator_dev *rdev; | |
81 | }; | |
82 | ||
83 | static int verify_range(struct da9052_regulator_info *info, | |
84 | int min_uV, int max_uV) | |
85 | { | |
86 | if (min_uV > info->max_uV || max_uV < info->min_uV) | |
87 | return -EINVAL; | |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static int da9052_regulator_enable(struct regulator_dev *rdev) | |
93 | { | |
94 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
95 | struct da9052_regulator_info *info = regulator->info; | |
96 | int offset = rdev_get_id(rdev); | |
97 | ||
98 | return da9052_reg_update(regulator->da9052, | |
99 | DA9052_BUCKCORE_REG + offset, | |
100 | 1 << info->en_bit, 1 << info->en_bit); | |
101 | } | |
102 | ||
103 | static int da9052_regulator_disable(struct regulator_dev *rdev) | |
104 | { | |
105 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
106 | struct da9052_regulator_info *info = regulator->info; | |
107 | int offset = rdev_get_id(rdev); | |
108 | ||
109 | return da9052_reg_update(regulator->da9052, | |
110 | DA9052_BUCKCORE_REG + offset, | |
111 | 1 << info->en_bit, 0); | |
112 | } | |
113 | ||
114 | static int da9052_regulator_is_enabled(struct regulator_dev *rdev) | |
115 | { | |
116 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
117 | struct da9052_regulator_info *info = regulator->info; | |
118 | int offset = rdev_get_id(rdev); | |
119 | int ret; | |
120 | ||
121 | ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset); | |
122 | if (ret < 0) | |
123 | return ret; | |
124 | ||
125 | return ret & (1 << info->en_bit); | |
126 | } | |
127 | ||
128 | static int da9052_dcdc_get_current_limit(struct regulator_dev *rdev) | |
129 | { | |
130 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
131 | int offset = rdev_get_id(rdev); | |
132 | int ret, row = 2; | |
133 | ||
134 | ret = da9052_reg_read(regulator->da9052, DA9052_BUCKA_REG + offset/2); | |
135 | if (ret < 0) | |
136 | return ret; | |
137 | ||
138 | /* Determine the even or odd position of the buck current limit | |
139 | * register field | |
140 | */ | |
141 | if (offset % 2 == 0) | |
142 | ret = (ret & DA9052_BUCK_ILIM_MASK_EVEN) >> 2; | |
143 | else | |
144 | ret = (ret & DA9052_BUCK_ILIM_MASK_ODD) >> 6; | |
145 | ||
146 | /* Select the appropriate current limit range */ | |
147 | if (regulator->da9052->chip_id == DA9052) | |
148 | row = 0; | |
149 | else if (offset == 0) | |
150 | row = 1; | |
151 | ||
152 | return da9052_current_limits[row][ret]; | |
153 | } | |
154 | ||
155 | static int da9052_dcdc_set_current_limit(struct regulator_dev *rdev, int min_uA, | |
156 | int max_uA) | |
157 | { | |
158 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
159 | int offset = rdev_get_id(rdev); | |
160 | int reg_val = 0; | |
161 | int i, row = 2; | |
162 | ||
163 | /* Select the appropriate current limit range */ | |
164 | if (regulator->da9052->chip_id == DA9052) | |
165 | row = 0; | |
166 | else if (offset == 0) | |
167 | row = 1; | |
168 | ||
169 | if (min_uA > da9052_current_limits[row][DA9052_MAX_UA] || | |
170 | max_uA < da9052_current_limits[row][DA9052_MIN_UA]) | |
171 | return -EINVAL; | |
172 | ||
173 | for (i = 0; i < DA9052_CURRENT_RANGE; i++) { | |
174 | if (min_uA <= da9052_current_limits[row][i]) { | |
175 | reg_val = i; | |
176 | break; | |
177 | } | |
178 | } | |
179 | ||
180 | /* Determine the even or odd position of the buck current limit | |
181 | * register field | |
182 | */ | |
183 | if (offset % 2 == 0) | |
184 | return da9052_reg_update(regulator->da9052, | |
185 | DA9052_BUCKA_REG + offset/2, | |
186 | DA9052_BUCK_ILIM_MASK_EVEN, | |
187 | reg_val << 2); | |
188 | else | |
189 | return da9052_reg_update(regulator->da9052, | |
190 | DA9052_BUCKA_REG + offset/2, | |
191 | DA9052_BUCK_ILIM_MASK_ODD, | |
192 | reg_val << 6); | |
193 | } | |
194 | ||
08bf1c0a AJ |
195 | static int da9052_list_voltage(struct regulator_dev *rdev, |
196 | unsigned int selector) | |
197 | { | |
198 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
199 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 200 | int id = rdev_get_id(rdev); |
08bf1c0a AJ |
201 | int volt_uV; |
202 | ||
0ec446ea AL |
203 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
204 | && (selector >= DA9052_BUCK_PERI_REG_MAP_UPTO_3uV)) { | |
205 | volt_uV = ((DA9052_BUCK_PERI_REG_MAP_UPTO_3uV * info->step_uV) | |
206 | + info->min_uV); | |
207 | volt_uV += (selector - DA9052_BUCK_PERI_REG_MAP_UPTO_3uV) | |
208 | * (DA9052_BUCK_PERI_3uV_STEP); | |
209 | } else { | |
210 | volt_uV = (selector * info->step_uV) + info->min_uV; | |
211 | } | |
08bf1c0a AJ |
212 | |
213 | if (volt_uV > info->max_uV) | |
214 | return -EINVAL; | |
215 | ||
216 | return volt_uV; | |
217 | } | |
218 | ||
0ec446ea | 219 | static int da9052_regulator_set_voltage(struct regulator_dev *rdev, |
08bf1c0a AJ |
220 | int min_uV, int max_uV, |
221 | unsigned int *selector) | |
222 | { | |
223 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
224 | struct da9052_regulator_info *info = regulator->info; | |
0ec446ea | 225 | int id = rdev_get_id(rdev); |
08bf1c0a AJ |
226 | int ret; |
227 | ||
228 | ret = verify_range(info, min_uV, max_uV); | |
229 | if (ret < 0) | |
230 | return ret; | |
231 | ||
232 | if (min_uV < info->min_uV) | |
233 | min_uV = info->min_uV; | |
234 | ||
0ec446ea AL |
235 | if ((id == DA9052_ID_BUCK4) && (regulator->da9052->chip_id == DA9052) |
236 | && (min_uV >= DA9052_CONST_3uV)) { | |
237 | *selector = DA9052_BUCK_PERI_REG_MAP_UPTO_3uV + | |
238 | DIV_ROUND_UP(min_uV - DA9052_CONST_3uV, | |
239 | DA9052_BUCK_PERI_3uV_STEP); | |
240 | } else { | |
241 | *selector = DIV_ROUND_UP(min_uV - info->min_uV, info->step_uV); | |
242 | } | |
08bf1c0a AJ |
243 | |
244 | ret = da9052_list_voltage(rdev, *selector); | |
245 | if (ret < 0) | |
246 | return ret; | |
247 | ||
0ec446ea AL |
248 | ret = da9052_reg_update(regulator->da9052, |
249 | DA9052_BUCKCORE_REG + id, | |
08bf1c0a | 250 | (1 << info->volt_shift) - 1, *selector); |
08bf1c0a AJ |
251 | if (ret < 0) |
252 | return ret; | |
253 | ||
0ec446ea AL |
254 | /* Some LDOs and DCDCs are DVC controlled which requires enabling of |
255 | * the activate bit to implment the changes on the output. | |
256 | */ | |
257 | switch (id) { | |
258 | case DA9052_ID_BUCK1: | |
259 | case DA9052_ID_BUCK2: | |
260 | case DA9052_ID_BUCK3: | |
261 | case DA9052_ID_LDO2: | |
262 | case DA9052_ID_LDO3: | |
263 | ret = da9052_reg_update(regulator->da9052, DA9052_SUPPLY_REG, | |
264 | info->activate_bit, info->activate_bit); | |
265 | break; | |
266 | } | |
08bf1c0a AJ |
267 | |
268 | return ret; | |
269 | } | |
270 | ||
0ec446ea | 271 | static int da9052_get_regulator_voltage_sel(struct regulator_dev *rdev) |
08bf1c0a AJ |
272 | { |
273 | struct da9052_regulator *regulator = rdev_get_drvdata(rdev); | |
274 | struct da9052_regulator_info *info = regulator->info; | |
275 | int offset = rdev_get_id(rdev); | |
276 | int ret; | |
277 | ||
278 | ret = da9052_reg_read(regulator->da9052, DA9052_BUCKCORE_REG + offset); | |
279 | if (ret < 0) | |
280 | return ret; | |
281 | ||
282 | ret &= ((1 << info->volt_shift) - 1); | |
283 | ||
284 | return ret; | |
285 | } | |
286 | ||
08bf1c0a | 287 | static struct regulator_ops da9052_dcdc_ops = { |
0ec446ea | 288 | .set_voltage = da9052_regulator_set_voltage, |
08bf1c0a AJ |
289 | .get_current_limit = da9052_dcdc_get_current_limit, |
290 | .set_current_limit = da9052_dcdc_set_current_limit, | |
291 | ||
292 | .list_voltage = da9052_list_voltage, | |
293 | .get_voltage_sel = da9052_get_regulator_voltage_sel, | |
294 | .is_enabled = da9052_regulator_is_enabled, | |
295 | .enable = da9052_regulator_enable, | |
296 | .disable = da9052_regulator_disable, | |
297 | }; | |
298 | ||
08bf1c0a | 299 | static struct regulator_ops da9052_ldo_ops = { |
0ec446ea | 300 | .set_voltage = da9052_regulator_set_voltage, |
08bf1c0a AJ |
301 | |
302 | .list_voltage = da9052_list_voltage, | |
303 | .get_voltage_sel = da9052_get_regulator_voltage_sel, | |
304 | .is_enabled = da9052_regulator_is_enabled, | |
305 | .enable = da9052_regulator_enable, | |
306 | .disable = da9052_regulator_disable, | |
307 | }; | |
308 | ||
08bf1c0a AJ |
309 | #define DA9052_LDO(_id, step, min, max, sbits, ebits, abits) \ |
310 | {\ | |
311 | .reg_desc = {\ | |
9210f05b | 312 | .name = #_id,\ |
08bf1c0a AJ |
313 | .ops = &da9052_ldo_ops,\ |
314 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 315 | .id = DA9052_ID_##_id,\ |
7b957654 | 316 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a AJ |
317 | .owner = THIS_MODULE,\ |
318 | },\ | |
319 | .min_uV = (min) * 1000,\ | |
320 | .max_uV = (max) * 1000,\ | |
321 | .step_uV = (step) * 1000,\ | |
322 | .volt_shift = (sbits),\ | |
323 | .en_bit = (ebits),\ | |
324 | .activate_bit = (abits),\ | |
325 | } | |
326 | ||
327 | #define DA9052_DCDC(_id, step, min, max, sbits, ebits, abits) \ | |
328 | {\ | |
329 | .reg_desc = {\ | |
9210f05b | 330 | .name = #_id,\ |
08bf1c0a AJ |
331 | .ops = &da9052_dcdc_ops,\ |
332 | .type = REGULATOR_VOLTAGE,\ | |
9210f05b | 333 | .id = DA9052_ID_##_id,\ |
7b957654 | 334 | .n_voltages = (max - min) / step + 1, \ |
08bf1c0a AJ |
335 | .owner = THIS_MODULE,\ |
336 | },\ | |
337 | .min_uV = (min) * 1000,\ | |
338 | .max_uV = (max) * 1000,\ | |
339 | .step_uV = (step) * 1000,\ | |
340 | .volt_shift = (sbits),\ | |
341 | .en_bit = (ebits),\ | |
342 | .activate_bit = (abits),\ | |
343 | } | |
344 | ||
6242eae9 | 345 | static struct da9052_regulator_info da9052_regulator_info[] = { |
9210f05b AL |
346 | DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
347 | DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
348 | DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), | |
0ec446ea | 349 | DA9052_DCDC(BUCK4, 50, 1800, 3600, 5, 6, 0), |
9210f05b | 350 | DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), |
0ec446ea AL |
351 | DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), |
352 | DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
9210f05b AL |
353 | DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), |
354 | DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), | |
355 | DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), | |
356 | DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), | |
357 | DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), | |
358 | DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), | |
359 | DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
360 | }; |
361 | ||
6242eae9 | 362 | static struct da9052_regulator_info da9053_regulator_info[] = { |
9210f05b AL |
363 | DA9052_DCDC(BUCK1, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBCOREGO), |
364 | DA9052_DCDC(BUCK2, 25, 500, 2075, 6, 6, DA9052_SUPPLY_VBPROGO), | |
365 | DA9052_DCDC(BUCK3, 25, 925, 2500, 6, 6, DA9052_SUPPLY_VBMEMGO), | |
0ec446ea | 366 | DA9052_DCDC(BUCK4, 25, 925, 2500, 6, 6, 0), |
9210f05b | 367 | DA9052_LDO(LDO1, 50, 600, 1800, 5, 6, 0), |
0ec446ea AL |
368 | DA9052_LDO(LDO2, 25, 600, 1800, 6, 6, DA9052_SUPPLY_VLDO2GO), |
369 | DA9052_LDO(LDO3, 25, 1725, 3300, 6, 6, DA9052_SUPPLY_VLDO3GO), | |
9210f05b AL |
370 | DA9052_LDO(LDO4, 25, 1725, 3300, 6, 6, 0), |
371 | DA9052_LDO(LDO5, 50, 1200, 3600, 6, 6, 0), | |
372 | DA9052_LDO(LDO6, 50, 1200, 3600, 6, 6, 0), | |
373 | DA9052_LDO(LDO7, 50, 1200, 3600, 6, 6, 0), | |
374 | DA9052_LDO(LDO8, 50, 1200, 3600, 6, 6, 0), | |
375 | DA9052_LDO(LDO9, 50, 1250, 3650, 6, 6, 0), | |
376 | DA9052_LDO(LDO10, 50, 1200, 3600, 6, 6, 0), | |
08bf1c0a AJ |
377 | }; |
378 | ||
379 | static inline struct da9052_regulator_info *find_regulator_info(u8 chip_id, | |
380 | int id) | |
381 | { | |
382 | struct da9052_regulator_info *info; | |
383 | int i; | |
384 | ||
984b5a6b AJ |
385 | switch (chip_id) { |
386 | case DA9052: | |
08bf1c0a AJ |
387 | for (i = 0; i < ARRAY_SIZE(da9052_regulator_info); i++) { |
388 | info = &da9052_regulator_info[i]; | |
389 | if (info->reg_desc.id == id) | |
390 | return info; | |
391 | } | |
984b5a6b AJ |
392 | break; |
393 | case DA9053_AA: | |
394 | case DA9053_BA: | |
395 | case DA9053_BB: | |
08bf1c0a AJ |
396 | for (i = 0; i < ARRAY_SIZE(da9053_regulator_info); i++) { |
397 | info = &da9053_regulator_info[i]; | |
398 | if (info->reg_desc.id == id) | |
399 | return info; | |
400 | } | |
984b5a6b | 401 | break; |
08bf1c0a AJ |
402 | } |
403 | ||
404 | return NULL; | |
405 | } | |
406 | ||
407 | static int __devinit da9052_regulator_probe(struct platform_device *pdev) | |
408 | { | |
c172708d | 409 | struct regulator_config config = { }; |
08bf1c0a AJ |
410 | struct da9052_regulator *regulator; |
411 | struct da9052 *da9052; | |
412 | struct da9052_pdata *pdata; | |
08bf1c0a | 413 | |
984b5a6b AJ |
414 | regulator = devm_kzalloc(&pdev->dev, sizeof(struct da9052_regulator), |
415 | GFP_KERNEL); | |
08bf1c0a AJ |
416 | if (!regulator) |
417 | return -ENOMEM; | |
418 | ||
419 | da9052 = dev_get_drvdata(pdev->dev.parent); | |
420 | pdata = da9052->dev->platform_data; | |
421 | regulator->da9052 = da9052; | |
422 | ||
423 | regulator->info = find_regulator_info(regulator->da9052->chip_id, | |
424 | pdev->id); | |
425 | if (regulator->info == NULL) { | |
426 | dev_err(&pdev->dev, "invalid regulator ID specified\n"); | |
7eb6444f | 427 | return -EINVAL; |
08bf1c0a | 428 | } |
c172708d MB |
429 | |
430 | config.dev = &pdev->dev; | |
c172708d | 431 | config.driver_data = regulator; |
88c84c14 YCLP |
432 | if (pdata && pdata->regulators) { |
433 | config.init_data = pdata->regulators[pdev->id]; | |
434 | } else { | |
435 | #ifdef CONFIG_OF | |
436 | struct device_node *nproot = da9052->dev->of_node; | |
437 | struct device_node *np; | |
438 | ||
439 | if (!nproot) | |
440 | return -ENODEV; | |
441 | ||
442 | nproot = of_find_node_by_name(nproot, "regulators"); | |
443 | if (!nproot) | |
444 | return -ENODEV; | |
445 | ||
446 | for (np = of_get_next_child(nproot, NULL); !np; | |
447 | np = of_get_next_child(nproot, np)) { | |
448 | if (!of_node_cmp(np->name, | |
449 | regulator->info->reg_desc.name)) { | |
450 | config.init_data = of_get_regulator_init_data( | |
451 | &pdev->dev, np); | |
452 | break; | |
453 | } | |
454 | } | |
455 | #endif | |
456 | } | |
c172708d | 457 | |
08bf1c0a | 458 | regulator->rdev = regulator_register(®ulator->info->reg_desc, |
c172708d | 459 | &config); |
08bf1c0a AJ |
460 | if (IS_ERR(regulator->rdev)) { |
461 | dev_err(&pdev->dev, "failed to register regulator %s\n", | |
462 | regulator->info->reg_desc.name); | |
7eb6444f | 463 | return PTR_ERR(regulator->rdev); |
08bf1c0a AJ |
464 | } |
465 | ||
466 | platform_set_drvdata(pdev, regulator); | |
467 | ||
468 | return 0; | |
08bf1c0a AJ |
469 | } |
470 | ||
471 | static int __devexit da9052_regulator_remove(struct platform_device *pdev) | |
472 | { | |
473 | struct da9052_regulator *regulator = platform_get_drvdata(pdev); | |
474 | ||
475 | regulator_unregister(regulator->rdev); | |
08bf1c0a AJ |
476 | return 0; |
477 | } | |
478 | ||
479 | static struct platform_driver da9052_regulator_driver = { | |
480 | .probe = da9052_regulator_probe, | |
481 | .remove = __devexit_p(da9052_regulator_remove), | |
482 | .driver = { | |
483 | .name = "da9052-regulator", | |
484 | .owner = THIS_MODULE, | |
485 | }, | |
486 | }; | |
487 | ||
488 | static int __init da9052_regulator_init(void) | |
489 | { | |
490 | return platform_driver_register(&da9052_regulator_driver); | |
491 | } | |
492 | subsys_initcall(da9052_regulator_init); | |
493 | ||
494 | static void __exit da9052_regulator_exit(void) | |
495 | { | |
496 | platform_driver_unregister(&da9052_regulator_driver); | |
497 | } | |
498 | module_exit(da9052_regulator_exit); | |
499 | ||
500 | MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); | |
501 | MODULE_DESCRIPTION("Power Regulator driver for Dialog DA9052 PMIC"); | |
502 | MODULE_LICENSE("GPL"); | |
503 | MODULE_ALIAS("platform:da9052-regulator"); |