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fd2f02f9 AL |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | // | |
3 | // Regulator device driver for DA9061 and DA9062. | |
4 | // Copyright (C) 2015-2017 Dialog Semiconductor | |
5 | ||
4068e518 T |
6 | #include <linux/kernel.h> |
7 | #include <linux/module.h> | |
8 | #include <linux/init.h> | |
9 | #include <linux/err.h> | |
10 | #include <linux/slab.h> | |
11 | #include <linux/of.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/regmap.h> | |
14 | #include <linux/regulator/driver.h> | |
15 | #include <linux/regulator/machine.h> | |
16 | #include <linux/regulator/of_regulator.h> | |
17 | #include <linux/mfd/da9062/core.h> | |
18 | #include <linux/mfd/da9062/registers.h> | |
7d34aec5 | 19 | #include <dt-bindings/regulator/dlg,da9063-regulator.h> |
4068e518 T |
20 | |
21 | /* Regulator IDs */ | |
4b7f4958 ST |
22 | enum { |
23 | DA9061_ID_BUCK1, | |
24 | DA9061_ID_BUCK2, | |
25 | DA9061_ID_BUCK3, | |
26 | DA9061_ID_LDO1, | |
27 | DA9061_ID_LDO2, | |
28 | DA9061_ID_LDO3, | |
29 | DA9061_ID_LDO4, | |
30 | DA9061_MAX_REGULATORS, | |
31 | }; | |
32 | ||
4068e518 T |
33 | enum { |
34 | DA9062_ID_BUCK1, | |
35 | DA9062_ID_BUCK2, | |
36 | DA9062_ID_BUCK3, | |
37 | DA9062_ID_BUCK4, | |
38 | DA9062_ID_LDO1, | |
39 | DA9062_ID_LDO2, | |
40 | DA9062_ID_LDO3, | |
41 | DA9062_ID_LDO4, | |
42 | DA9062_MAX_REGULATORS, | |
43 | }; | |
44 | ||
45 | /* Regulator capabilities and registers description */ | |
46 | struct da9062_regulator_info { | |
47 | struct regulator_desc desc; | |
4068e518 T |
48 | /* Main register fields */ |
49 | struct reg_field mode; | |
50 | struct reg_field suspend; | |
51 | struct reg_field sleep; | |
52 | struct reg_field suspend_sleep; | |
53 | unsigned int suspend_vsel_reg; | |
4068e518 T |
54 | /* Event detection bit */ |
55 | struct reg_field oc_event; | |
56 | }; | |
57 | ||
58 | /* Single regulator settings */ | |
59 | struct da9062_regulator { | |
60 | struct regulator_desc desc; | |
61 | struct regulator_dev *rdev; | |
62 | struct da9062 *hw; | |
63 | const struct da9062_regulator_info *info; | |
64 | ||
65 | struct regmap_field *mode; | |
66 | struct regmap_field *suspend; | |
67 | struct regmap_field *sleep; | |
68 | struct regmap_field *suspend_sleep; | |
4068e518 T |
69 | }; |
70 | ||
71 | /* Encapsulates all information for the regulators driver */ | |
72 | struct da9062_regulators { | |
73 | int irq_ldo_lim; | |
74 | unsigned n_regulators; | |
75 | /* Array size to be defined during init. Keep at end. */ | |
d69f763f | 76 | struct da9062_regulator regulator[]; |
4068e518 T |
77 | }; |
78 | ||
4068e518 T |
79 | /* Regulator operations */ |
80 | ||
4b7f4958 ST |
81 | /* Current limits array (in uA) |
82 | * - DA9061_ID_[BUCK1|BUCK3] | |
83 | * - DA9062_ID_[BUCK1|BUCK2|BUCK4] | |
84 | * Entry indexes corresponds to register values. | |
85 | */ | |
958e9b82 | 86 | static const unsigned int da9062_buck_a_limits[] = { |
4068e518 T |
87 | 500000, 600000, 700000, 800000, 900000, 1000000, 1100000, 1200000, |
88 | 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1900000, 2000000 | |
89 | }; | |
90 | ||
4b7f4958 ST |
91 | /* Current limits array (in uA) |
92 | * - DA9061_ID_BUCK2 | |
93 | * - DA9062_ID_BUCK3 | |
94 | * Entry indexes corresponds to register values. | |
95 | */ | |
958e9b82 | 96 | static const unsigned int da9062_buck_b_limits[] = { |
4068e518 T |
97 | 1500000, 1600000, 1700000, 1800000, 1900000, 2000000, 2100000, 2200000, |
98 | 2300000, 2400000, 2500000, 2600000, 2700000, 2800000, 2900000, 3000000 | |
99 | }; | |
100 | ||
844e7492 CF |
101 | static unsigned int da9062_map_buck_mode(unsigned int mode) |
102 | { | |
103 | switch (mode) { | |
104 | case DA9063_BUCK_MODE_SLEEP: | |
105 | return REGULATOR_MODE_STANDBY; | |
106 | case DA9063_BUCK_MODE_SYNC: | |
107 | return REGULATOR_MODE_FAST; | |
108 | case DA9063_BUCK_MODE_AUTO: | |
109 | return REGULATOR_MODE_NORMAL; | |
110 | default: | |
c15d5a64 | 111 | return REGULATOR_MODE_INVALID; |
844e7492 CF |
112 | } |
113 | } | |
114 | ||
4068e518 T |
115 | static int da9062_buck_set_mode(struct regulator_dev *rdev, unsigned mode) |
116 | { | |
117 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
118 | unsigned val; | |
119 | ||
120 | switch (mode) { | |
121 | case REGULATOR_MODE_FAST: | |
7d34aec5 | 122 | val = DA9063_BUCK_MODE_SYNC; |
4068e518 T |
123 | break; |
124 | case REGULATOR_MODE_NORMAL: | |
7d34aec5 | 125 | val = DA9063_BUCK_MODE_AUTO; |
4068e518 T |
126 | break; |
127 | case REGULATOR_MODE_STANDBY: | |
7d34aec5 | 128 | val = DA9063_BUCK_MODE_SLEEP; |
4068e518 T |
129 | break; |
130 | default: | |
131 | return -EINVAL; | |
132 | } | |
133 | ||
134 | return regmap_field_write(regl->mode, val); | |
135 | } | |
136 | ||
137 | /* | |
138 | * Bucks use single mode register field for normal operation | |
139 | * and suspend state. | |
140 | * There are 3 modes to map to: FAST, NORMAL, and STANDBY. | |
141 | */ | |
142 | ||
143 | static unsigned da9062_buck_get_mode(struct regulator_dev *rdev) | |
144 | { | |
145 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
be446f18 | 146 | unsigned int val; |
4068e518 T |
147 | int ret; |
148 | ||
149 | ret = regmap_field_read(regl->mode, &val); | |
150 | if (ret < 0) | |
151 | return ret; | |
152 | ||
153 | switch (val) { | |
154 | default: | |
4068e518 T |
155 | /* Sleep flag bit decides the mode */ |
156 | break; | |
7d34aec5 | 157 | case DA9063_BUCK_MODE_SLEEP: |
4068e518 | 158 | return REGULATOR_MODE_STANDBY; |
7d34aec5 | 159 | case DA9063_BUCK_MODE_SYNC: |
4068e518 | 160 | return REGULATOR_MODE_FAST; |
7d34aec5 | 161 | case DA9063_BUCK_MODE_AUTO: |
4068e518 T |
162 | return REGULATOR_MODE_NORMAL; |
163 | } | |
164 | ||
a72865f0 | 165 | ret = regmap_field_read(regl->sleep, &val); |
4068e518 T |
166 | if (ret < 0) |
167 | return 0; | |
168 | ||
169 | if (val) | |
be446f18 | 170 | return REGULATOR_MODE_STANDBY; |
4068e518 | 171 | else |
be446f18 | 172 | return REGULATOR_MODE_FAST; |
4068e518 T |
173 | } |
174 | ||
175 | /* | |
176 | * LDOs use sleep flags - one for normal and one for suspend state. | |
177 | * There are 2 modes to map to: NORMAL and STANDBY (sleep) for each state. | |
178 | */ | |
179 | ||
180 | static int da9062_ldo_set_mode(struct regulator_dev *rdev, unsigned mode) | |
181 | { | |
182 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
183 | unsigned val; | |
184 | ||
185 | switch (mode) { | |
186 | case REGULATOR_MODE_NORMAL: | |
187 | val = 0; | |
188 | break; | |
189 | case REGULATOR_MODE_STANDBY: | |
190 | val = 1; | |
191 | break; | |
192 | default: | |
193 | return -EINVAL; | |
194 | } | |
195 | ||
196 | return regmap_field_write(regl->sleep, val); | |
197 | } | |
198 | ||
199 | static unsigned da9062_ldo_get_mode(struct regulator_dev *rdev) | |
200 | { | |
201 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
4068e518 T |
202 | int ret, val; |
203 | ||
a72865f0 | 204 | ret = regmap_field_read(regl->sleep, &val); |
4068e518 T |
205 | if (ret < 0) |
206 | return 0; | |
207 | ||
208 | if (val) | |
209 | return REGULATOR_MODE_STANDBY; | |
210 | else | |
211 | return REGULATOR_MODE_NORMAL; | |
212 | } | |
213 | ||
214 | static int da9062_buck_get_status(struct regulator_dev *rdev) | |
215 | { | |
216 | int ret = regulator_is_enabled_regmap(rdev); | |
217 | ||
218 | if (ret == 0) { | |
219 | ret = REGULATOR_STATUS_OFF; | |
220 | } else if (ret > 0) { | |
221 | ret = da9062_buck_get_mode(rdev); | |
222 | if (ret > 0) | |
223 | ret = regulator_mode_to_status(ret); | |
224 | else if (ret == 0) | |
225 | ret = -EIO; | |
226 | } | |
227 | ||
228 | return ret; | |
229 | } | |
230 | ||
231 | static int da9062_ldo_get_status(struct regulator_dev *rdev) | |
232 | { | |
233 | int ret = regulator_is_enabled_regmap(rdev); | |
234 | ||
235 | if (ret == 0) { | |
236 | ret = REGULATOR_STATUS_OFF; | |
237 | } else if (ret > 0) { | |
238 | ret = da9062_ldo_get_mode(rdev); | |
239 | if (ret > 0) | |
240 | ret = regulator_mode_to_status(ret); | |
241 | else if (ret == 0) | |
242 | ret = -EIO; | |
243 | } | |
244 | ||
245 | return ret; | |
246 | } | |
247 | ||
248 | static int da9062_set_suspend_voltage(struct regulator_dev *rdev, int uv) | |
249 | { | |
250 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
251 | const struct da9062_regulator_info *rinfo = regl->info; | |
252 | int ret, sel; | |
253 | ||
254 | sel = regulator_map_voltage_linear(rdev, uv, uv); | |
255 | if (sel < 0) | |
256 | return sel; | |
257 | ||
258 | sel <<= ffs(rdev->desc->vsel_mask) - 1; | |
259 | ||
260 | ret = regmap_update_bits(regl->hw->regmap, rinfo->suspend_vsel_reg, | |
261 | rdev->desc->vsel_mask, sel); | |
262 | ||
263 | return ret; | |
264 | } | |
265 | ||
266 | static int da9062_suspend_enable(struct regulator_dev *rdev) | |
267 | { | |
268 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
269 | ||
270 | return regmap_field_write(regl->suspend, 1); | |
271 | } | |
272 | ||
273 | static int da9062_suspend_disable(struct regulator_dev *rdev) | |
274 | { | |
275 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
276 | ||
277 | return regmap_field_write(regl->suspend, 0); | |
278 | } | |
279 | ||
280 | static int da9062_buck_set_suspend_mode(struct regulator_dev *rdev, | |
281 | unsigned mode) | |
282 | { | |
283 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
284 | int val; | |
285 | ||
286 | switch (mode) { | |
287 | case REGULATOR_MODE_FAST: | |
7d34aec5 | 288 | val = DA9063_BUCK_MODE_SYNC; |
4068e518 T |
289 | break; |
290 | case REGULATOR_MODE_NORMAL: | |
7d34aec5 | 291 | val = DA9063_BUCK_MODE_AUTO; |
4068e518 T |
292 | break; |
293 | case REGULATOR_MODE_STANDBY: | |
7d34aec5 | 294 | val = DA9063_BUCK_MODE_SLEEP; |
4068e518 T |
295 | break; |
296 | default: | |
297 | return -EINVAL; | |
298 | } | |
299 | ||
300 | return regmap_field_write(regl->mode, val); | |
301 | } | |
302 | ||
303 | static int da9062_ldo_set_suspend_mode(struct regulator_dev *rdev, | |
304 | unsigned mode) | |
305 | { | |
306 | struct da9062_regulator *regl = rdev_get_drvdata(rdev); | |
307 | unsigned val; | |
308 | ||
309 | switch (mode) { | |
310 | case REGULATOR_MODE_NORMAL: | |
311 | val = 0; | |
312 | break; | |
313 | case REGULATOR_MODE_STANDBY: | |
314 | val = 1; | |
315 | break; | |
316 | default: | |
317 | return -EINVAL; | |
318 | } | |
319 | ||
320 | return regmap_field_write(regl->suspend_sleep, val); | |
321 | } | |
322 | ||
71242b49 | 323 | static const struct regulator_ops da9062_buck_ops = { |
4068e518 T |
324 | .enable = regulator_enable_regmap, |
325 | .disable = regulator_disable_regmap, | |
326 | .is_enabled = regulator_is_enabled_regmap, | |
327 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
328 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
329 | .list_voltage = regulator_list_voltage_linear, | |
958e9b82 AL |
330 | .set_current_limit = regulator_set_current_limit_regmap, |
331 | .get_current_limit = regulator_get_current_limit_regmap, | |
4068e518 T |
332 | .set_mode = da9062_buck_set_mode, |
333 | .get_mode = da9062_buck_get_mode, | |
334 | .get_status = da9062_buck_get_status, | |
335 | .set_suspend_voltage = da9062_set_suspend_voltage, | |
336 | .set_suspend_enable = da9062_suspend_enable, | |
337 | .set_suspend_disable = da9062_suspend_disable, | |
338 | .set_suspend_mode = da9062_buck_set_suspend_mode, | |
339 | }; | |
340 | ||
71242b49 | 341 | static const struct regulator_ops da9062_ldo_ops = { |
4068e518 T |
342 | .enable = regulator_enable_regmap, |
343 | .disable = regulator_disable_regmap, | |
344 | .is_enabled = regulator_is_enabled_regmap, | |
345 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
346 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
347 | .list_voltage = regulator_list_voltage_linear, | |
348 | .set_mode = da9062_ldo_set_mode, | |
349 | .get_mode = da9062_ldo_get_mode, | |
350 | .get_status = da9062_ldo_get_status, | |
351 | .set_suspend_voltage = da9062_set_suspend_voltage, | |
352 | .set_suspend_enable = da9062_suspend_enable, | |
353 | .set_suspend_disable = da9062_suspend_disable, | |
354 | .set_suspend_mode = da9062_ldo_set_suspend_mode, | |
355 | }; | |
356 | ||
4b7f4958 ST |
357 | /* DA9061 Regulator information */ |
358 | static const struct da9062_regulator_info local_da9061_regulator_info[] = { | |
359 | { | |
360 | .desc.id = DA9061_ID_BUCK1, | |
361 | .desc.name = "DA9061 BUCK1", | |
362 | .desc.of_match = of_match_ptr("buck1"), | |
363 | .desc.regulators_node = of_match_ptr("regulators"), | |
364 | .desc.ops = &da9062_buck_ops, | |
365 | .desc.min_uV = (300) * 1000, | |
366 | .desc.uV_step = (10) * 1000, | |
367 | .desc.n_voltages = ((1570) - (300))/(10) + 1, | |
958e9b82 AL |
368 | .desc.curr_table = da9062_buck_a_limits, |
369 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), | |
370 | .desc.csel_reg = DA9062AA_BUCK_ILIM_C, | |
371 | .desc.csel_mask = DA9062AA_BUCK1_ILIM_MASK, | |
4b7f4958 ST |
372 | .desc.enable_reg = DA9062AA_BUCK1_CONT, |
373 | .desc.enable_mask = DA9062AA_BUCK1_EN_MASK, | |
374 | .desc.vsel_reg = DA9062AA_VBUCK1_A, | |
375 | .desc.vsel_mask = DA9062AA_VBUCK1_A_MASK, | |
376 | .desc.linear_min_sel = 0, | |
844e7492 | 377 | .desc.of_map_mode = da9062_map_buck_mode, |
4b7f4958 ST |
378 | .sleep = REG_FIELD(DA9062AA_VBUCK1_A, |
379 | __builtin_ffs((int)DA9062AA_BUCK1_SL_A_MASK) - 1, | |
380 | sizeof(unsigned int) * 8 - | |
381 | __builtin_clz((DA9062AA_BUCK1_SL_A_MASK)) - 1), | |
382 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B, | |
383 | __builtin_ffs((int)DA9062AA_BUCK1_SL_B_MASK) - 1, | |
384 | sizeof(unsigned int) * 8 - | |
385 | __builtin_clz((DA9062AA_BUCK1_SL_B_MASK)) - 1), | |
386 | .suspend_vsel_reg = DA9062AA_VBUCK1_B, | |
387 | .mode = REG_FIELD(DA9062AA_BUCK1_CFG, | |
388 | __builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1, | |
389 | sizeof(unsigned int) * 8 - | |
390 | __builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1), | |
a72865f0 MF |
391 | .suspend = REG_FIELD(DA9062AA_BUCK1_CONT, |
392 | __builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1, | |
4b7f4958 | 393 | sizeof(unsigned int) * 8 - |
a72865f0 | 394 | __builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1), |
4b7f4958 ST |
395 | }, |
396 | { | |
397 | .desc.id = DA9061_ID_BUCK2, | |
398 | .desc.name = "DA9061 BUCK2", | |
399 | .desc.of_match = of_match_ptr("buck2"), | |
400 | .desc.regulators_node = of_match_ptr("regulators"), | |
401 | .desc.ops = &da9062_buck_ops, | |
402 | .desc.min_uV = (800) * 1000, | |
403 | .desc.uV_step = (20) * 1000, | |
404 | .desc.n_voltages = ((3340) - (800))/(20) + 1, | |
958e9b82 AL |
405 | .desc.curr_table = da9062_buck_b_limits, |
406 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_b_limits), | |
407 | .desc.csel_reg = DA9062AA_BUCK_ILIM_A, | |
408 | .desc.csel_mask = DA9062AA_BUCK3_ILIM_MASK, | |
4b7f4958 ST |
409 | .desc.enable_reg = DA9062AA_BUCK3_CONT, |
410 | .desc.enable_mask = DA9062AA_BUCK3_EN_MASK, | |
411 | .desc.vsel_reg = DA9062AA_VBUCK3_A, | |
412 | .desc.vsel_mask = DA9062AA_VBUCK3_A_MASK, | |
413 | .desc.linear_min_sel = 0, | |
844e7492 | 414 | .desc.of_map_mode = da9062_map_buck_mode, |
4b7f4958 ST |
415 | .sleep = REG_FIELD(DA9062AA_VBUCK3_A, |
416 | __builtin_ffs((int)DA9062AA_BUCK3_SL_A_MASK) - 1, | |
417 | sizeof(unsigned int) * 8 - | |
418 | __builtin_clz((DA9062AA_BUCK3_SL_A_MASK)) - 1), | |
419 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK3_B, | |
420 | __builtin_ffs((int)DA9062AA_BUCK3_SL_B_MASK) - 1, | |
421 | sizeof(unsigned int) * 8 - | |
422 | __builtin_clz((DA9062AA_BUCK3_SL_B_MASK)) - 1), | |
423 | .suspend_vsel_reg = DA9062AA_VBUCK3_B, | |
424 | .mode = REG_FIELD(DA9062AA_BUCK3_CFG, | |
425 | __builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1, | |
426 | sizeof(unsigned int) * 8 - | |
427 | __builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1), | |
a72865f0 MF |
428 | .suspend = REG_FIELD(DA9062AA_BUCK3_CONT, |
429 | __builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1, | |
4b7f4958 | 430 | sizeof(unsigned int) * 8 - |
a72865f0 | 431 | __builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1), |
4b7f4958 ST |
432 | }, |
433 | { | |
434 | .desc.id = DA9061_ID_BUCK3, | |
435 | .desc.name = "DA9061 BUCK3", | |
436 | .desc.of_match = of_match_ptr("buck3"), | |
437 | .desc.regulators_node = of_match_ptr("regulators"), | |
438 | .desc.ops = &da9062_buck_ops, | |
439 | .desc.min_uV = (530) * 1000, | |
440 | .desc.uV_step = (10) * 1000, | |
441 | .desc.n_voltages = ((1800) - (530))/(10) + 1, | |
958e9b82 AL |
442 | .desc.curr_table = da9062_buck_a_limits, |
443 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), | |
444 | .desc.csel_reg = DA9062AA_BUCK_ILIM_B, | |
445 | .desc.csel_mask = DA9062AA_BUCK4_ILIM_MASK, | |
4b7f4958 ST |
446 | .desc.enable_reg = DA9062AA_BUCK4_CONT, |
447 | .desc.enable_mask = DA9062AA_BUCK4_EN_MASK, | |
448 | .desc.vsel_reg = DA9062AA_VBUCK4_A, | |
449 | .desc.vsel_mask = DA9062AA_VBUCK4_A_MASK, | |
450 | .desc.linear_min_sel = 0, | |
844e7492 | 451 | .desc.of_map_mode = da9062_map_buck_mode, |
4b7f4958 ST |
452 | .sleep = REG_FIELD(DA9062AA_VBUCK4_A, |
453 | __builtin_ffs((int)DA9062AA_BUCK4_SL_A_MASK) - 1, | |
454 | sizeof(unsigned int) * 8 - | |
455 | __builtin_clz((DA9062AA_BUCK4_SL_A_MASK)) - 1), | |
456 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK4_B, | |
457 | __builtin_ffs((int)DA9062AA_BUCK4_SL_B_MASK) - 1, | |
458 | sizeof(unsigned int) * 8 - | |
459 | __builtin_clz((DA9062AA_BUCK4_SL_B_MASK)) - 1), | |
460 | .suspend_vsel_reg = DA9062AA_VBUCK4_B, | |
461 | .mode = REG_FIELD(DA9062AA_BUCK4_CFG, | |
462 | __builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1, | |
463 | sizeof(unsigned int) * 8 - | |
464 | __builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1), | |
a72865f0 MF |
465 | .suspend = REG_FIELD(DA9062AA_BUCK4_CONT, |
466 | __builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1, | |
4b7f4958 | 467 | sizeof(unsigned int) * 8 - |
a72865f0 | 468 | __builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1), |
4b7f4958 ST |
469 | }, |
470 | { | |
471 | .desc.id = DA9061_ID_LDO1, | |
472 | .desc.name = "DA9061 LDO1", | |
473 | .desc.of_match = of_match_ptr("ldo1"), | |
474 | .desc.regulators_node = of_match_ptr("regulators"), | |
475 | .desc.ops = &da9062_ldo_ops, | |
476 | .desc.min_uV = (900) * 1000, | |
477 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
478 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
479 | + DA9062AA_VLDO_A_MIN_SEL, | |
4b7f4958 ST |
480 | .desc.enable_reg = DA9062AA_LDO1_CONT, |
481 | .desc.enable_mask = DA9062AA_LDO1_EN_MASK, | |
482 | .desc.vsel_reg = DA9062AA_VLDO1_A, | |
483 | .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, | |
fd5d1005 | 484 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4b7f4958 ST |
485 | .sleep = REG_FIELD(DA9062AA_VLDO1_A, |
486 | __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, | |
487 | sizeof(unsigned int) * 8 - | |
488 | __builtin_clz((DA9062AA_LDO1_SL_A_MASK)) - 1), | |
489 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO1_B, | |
490 | __builtin_ffs((int)DA9062AA_LDO1_SL_B_MASK) - 1, | |
491 | sizeof(unsigned int) * 8 - | |
492 | __builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1), | |
493 | .suspend_vsel_reg = DA9062AA_VLDO1_B, | |
a72865f0 MF |
494 | .suspend = REG_FIELD(DA9062AA_LDO1_CONT, |
495 | __builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1, | |
4b7f4958 | 496 | sizeof(unsigned int) * 8 - |
a72865f0 | 497 | __builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1), |
4b7f4958 ST |
498 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
499 | __builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1, | |
500 | sizeof(unsigned int) * 8 - | |
501 | __builtin_clz((DA9062AA_LDO1_ILIM_MASK)) - 1), | |
502 | }, | |
503 | { | |
504 | .desc.id = DA9061_ID_LDO2, | |
505 | .desc.name = "DA9061 LDO2", | |
506 | .desc.of_match = of_match_ptr("ldo2"), | |
507 | .desc.regulators_node = of_match_ptr("regulators"), | |
508 | .desc.ops = &da9062_ldo_ops, | |
509 | .desc.min_uV = (900) * 1000, | |
510 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
511 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
512 | + DA9062AA_VLDO_A_MIN_SEL, | |
4b7f4958 ST |
513 | .desc.enable_reg = DA9062AA_LDO2_CONT, |
514 | .desc.enable_mask = DA9062AA_LDO2_EN_MASK, | |
515 | .desc.vsel_reg = DA9062AA_VLDO2_A, | |
516 | .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, | |
fd5d1005 | 517 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4b7f4958 ST |
518 | .sleep = REG_FIELD(DA9062AA_VLDO2_A, |
519 | __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, | |
520 | sizeof(unsigned int) * 8 - | |
521 | __builtin_clz((DA9062AA_LDO2_SL_A_MASK)) - 1), | |
522 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO2_B, | |
523 | __builtin_ffs((int)DA9062AA_LDO2_SL_B_MASK) - 1, | |
524 | sizeof(unsigned int) * 8 - | |
525 | __builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1), | |
526 | .suspend_vsel_reg = DA9062AA_VLDO2_B, | |
a72865f0 MF |
527 | .suspend = REG_FIELD(DA9062AA_LDO2_CONT, |
528 | __builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1, | |
4b7f4958 | 529 | sizeof(unsigned int) * 8 - |
a72865f0 | 530 | __builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1), |
4b7f4958 ST |
531 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
532 | __builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1, | |
533 | sizeof(unsigned int) * 8 - | |
534 | __builtin_clz((DA9062AA_LDO2_ILIM_MASK)) - 1), | |
535 | }, | |
536 | { | |
537 | .desc.id = DA9061_ID_LDO3, | |
538 | .desc.name = "DA9061 LDO3", | |
539 | .desc.of_match = of_match_ptr("ldo3"), | |
540 | .desc.regulators_node = of_match_ptr("regulators"), | |
541 | .desc.ops = &da9062_ldo_ops, | |
542 | .desc.min_uV = (900) * 1000, | |
543 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
544 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
545 | + DA9062AA_VLDO_A_MIN_SEL, | |
4b7f4958 ST |
546 | .desc.enable_reg = DA9062AA_LDO3_CONT, |
547 | .desc.enable_mask = DA9062AA_LDO3_EN_MASK, | |
548 | .desc.vsel_reg = DA9062AA_VLDO3_A, | |
549 | .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, | |
fd5d1005 | 550 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4b7f4958 ST |
551 | .sleep = REG_FIELD(DA9062AA_VLDO3_A, |
552 | __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, | |
553 | sizeof(unsigned int) * 8 - | |
554 | __builtin_clz((DA9062AA_LDO3_SL_A_MASK)) - 1), | |
555 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO3_B, | |
556 | __builtin_ffs((int)DA9062AA_LDO3_SL_B_MASK) - 1, | |
557 | sizeof(unsigned int) * 8 - | |
558 | __builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1), | |
559 | .suspend_vsel_reg = DA9062AA_VLDO3_B, | |
a72865f0 MF |
560 | .suspend = REG_FIELD(DA9062AA_LDO3_CONT, |
561 | __builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1, | |
4b7f4958 | 562 | sizeof(unsigned int) * 8 - |
a72865f0 | 563 | __builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1), |
4b7f4958 ST |
564 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
565 | __builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1, | |
566 | sizeof(unsigned int) * 8 - | |
567 | __builtin_clz((DA9062AA_LDO3_ILIM_MASK)) - 1), | |
568 | }, | |
569 | { | |
570 | .desc.id = DA9061_ID_LDO4, | |
571 | .desc.name = "DA9061 LDO4", | |
572 | .desc.of_match = of_match_ptr("ldo4"), | |
573 | .desc.regulators_node = of_match_ptr("regulators"), | |
574 | .desc.ops = &da9062_ldo_ops, | |
575 | .desc.min_uV = (900) * 1000, | |
576 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
577 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
578 | + DA9062AA_VLDO_A_MIN_SEL, | |
4b7f4958 ST |
579 | .desc.enable_reg = DA9062AA_LDO4_CONT, |
580 | .desc.enable_mask = DA9062AA_LDO4_EN_MASK, | |
581 | .desc.vsel_reg = DA9062AA_VLDO4_A, | |
582 | .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, | |
fd5d1005 | 583 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4b7f4958 ST |
584 | .sleep = REG_FIELD(DA9062AA_VLDO4_A, |
585 | __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, | |
586 | sizeof(unsigned int) * 8 - | |
587 | __builtin_clz((DA9062AA_LDO4_SL_A_MASK)) - 1), | |
588 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO4_B, | |
589 | __builtin_ffs((int)DA9062AA_LDO4_SL_B_MASK) - 1, | |
590 | sizeof(unsigned int) * 8 - | |
591 | __builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1), | |
592 | .suspend_vsel_reg = DA9062AA_VLDO4_B, | |
a72865f0 MF |
593 | .suspend = REG_FIELD(DA9062AA_LDO4_CONT, |
594 | __builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1, | |
4b7f4958 | 595 | sizeof(unsigned int) * 8 - |
a72865f0 | 596 | __builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1), |
4b7f4958 ST |
597 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
598 | __builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1, | |
599 | sizeof(unsigned int) * 8 - | |
600 | __builtin_clz((DA9062AA_LDO4_ILIM_MASK)) - 1), | |
601 | }, | |
602 | }; | |
603 | ||
604 | /* DA9062 Regulator information */ | |
605 | static const struct da9062_regulator_info local_da9062_regulator_info[] = { | |
4068e518 T |
606 | { |
607 | .desc.id = DA9062_ID_BUCK1, | |
608 | .desc.name = "DA9062 BUCK1", | |
609 | .desc.of_match = of_match_ptr("buck1"), | |
610 | .desc.regulators_node = of_match_ptr("regulators"), | |
611 | .desc.ops = &da9062_buck_ops, | |
612 | .desc.min_uV = (300) * 1000, | |
613 | .desc.uV_step = (10) * 1000, | |
614 | .desc.n_voltages = ((1570) - (300))/(10) + 1, | |
958e9b82 AL |
615 | .desc.curr_table = da9062_buck_a_limits, |
616 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), | |
617 | .desc.csel_reg = DA9062AA_BUCK_ILIM_C, | |
618 | .desc.csel_mask = DA9062AA_BUCK1_ILIM_MASK, | |
4068e518 T |
619 | .desc.enable_reg = DA9062AA_BUCK1_CONT, |
620 | .desc.enable_mask = DA9062AA_BUCK1_EN_MASK, | |
621 | .desc.vsel_reg = DA9062AA_VBUCK1_A, | |
622 | .desc.vsel_mask = DA9062AA_VBUCK1_A_MASK, | |
623 | .desc.linear_min_sel = 0, | |
844e7492 | 624 | .desc.of_map_mode = da9062_map_buck_mode, |
4068e518 T |
625 | .sleep = REG_FIELD(DA9062AA_VBUCK1_A, |
626 | __builtin_ffs((int)DA9062AA_BUCK1_SL_A_MASK) - 1, | |
627 | sizeof(unsigned int) * 8 - | |
628 | __builtin_clz((DA9062AA_BUCK1_SL_A_MASK)) - 1), | |
629 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK1_B, | |
630 | __builtin_ffs((int)DA9062AA_BUCK1_SL_B_MASK) - 1, | |
631 | sizeof(unsigned int) * 8 - | |
632 | __builtin_clz((DA9062AA_BUCK1_SL_B_MASK)) - 1), | |
633 | .suspend_vsel_reg = DA9062AA_VBUCK1_B, | |
634 | .mode = REG_FIELD(DA9062AA_BUCK1_CFG, | |
635 | __builtin_ffs((int)DA9062AA_BUCK1_MODE_MASK) - 1, | |
636 | sizeof(unsigned int) * 8 - | |
637 | __builtin_clz((DA9062AA_BUCK1_MODE_MASK)) - 1), | |
a72865f0 MF |
638 | .suspend = REG_FIELD(DA9062AA_BUCK1_CONT, |
639 | __builtin_ffs((int)DA9062AA_BUCK1_CONF_MASK) - 1, | |
4068e518 | 640 | sizeof(unsigned int) * 8 - |
a72865f0 | 641 | __builtin_clz(DA9062AA_BUCK1_CONF_MASK) - 1), |
4068e518 T |
642 | }, |
643 | { | |
644 | .desc.id = DA9062_ID_BUCK2, | |
645 | .desc.name = "DA9062 BUCK2", | |
646 | .desc.of_match = of_match_ptr("buck2"), | |
647 | .desc.regulators_node = of_match_ptr("regulators"), | |
648 | .desc.ops = &da9062_buck_ops, | |
649 | .desc.min_uV = (300) * 1000, | |
650 | .desc.uV_step = (10) * 1000, | |
651 | .desc.n_voltages = ((1570) - (300))/(10) + 1, | |
958e9b82 AL |
652 | .desc.curr_table = da9062_buck_a_limits, |
653 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), | |
654 | .desc.csel_reg = DA9062AA_BUCK_ILIM_C, | |
655 | .desc.csel_mask = DA9062AA_BUCK2_ILIM_MASK, | |
4068e518 T |
656 | .desc.enable_reg = DA9062AA_BUCK2_CONT, |
657 | .desc.enable_mask = DA9062AA_BUCK2_EN_MASK, | |
658 | .desc.vsel_reg = DA9062AA_VBUCK2_A, | |
659 | .desc.vsel_mask = DA9062AA_VBUCK2_A_MASK, | |
660 | .desc.linear_min_sel = 0, | |
844e7492 | 661 | .desc.of_map_mode = da9062_map_buck_mode, |
4068e518 T |
662 | .sleep = REG_FIELD(DA9062AA_VBUCK2_A, |
663 | __builtin_ffs((int)DA9062AA_BUCK2_SL_A_MASK) - 1, | |
664 | sizeof(unsigned int) * 8 - | |
665 | __builtin_clz((DA9062AA_BUCK2_SL_A_MASK)) - 1), | |
666 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK2_B, | |
667 | __builtin_ffs((int)DA9062AA_BUCK2_SL_B_MASK) - 1, | |
668 | sizeof(unsigned int) * 8 - | |
669 | __builtin_clz((DA9062AA_BUCK2_SL_B_MASK)) - 1), | |
670 | .suspend_vsel_reg = DA9062AA_VBUCK2_B, | |
671 | .mode = REG_FIELD(DA9062AA_BUCK2_CFG, | |
672 | __builtin_ffs((int)DA9062AA_BUCK2_MODE_MASK) - 1, | |
673 | sizeof(unsigned int) * 8 - | |
674 | __builtin_clz((DA9062AA_BUCK2_MODE_MASK)) - 1), | |
a72865f0 MF |
675 | .suspend = REG_FIELD(DA9062AA_BUCK2_CONT, |
676 | __builtin_ffs((int)DA9062AA_BUCK2_CONF_MASK) - 1, | |
4068e518 | 677 | sizeof(unsigned int) * 8 - |
a72865f0 | 678 | __builtin_clz(DA9062AA_BUCK2_CONF_MASK) - 1), |
4068e518 T |
679 | }, |
680 | { | |
681 | .desc.id = DA9062_ID_BUCK3, | |
682 | .desc.name = "DA9062 BUCK3", | |
683 | .desc.of_match = of_match_ptr("buck3"), | |
684 | .desc.regulators_node = of_match_ptr("regulators"), | |
685 | .desc.ops = &da9062_buck_ops, | |
686 | .desc.min_uV = (800) * 1000, | |
687 | .desc.uV_step = (20) * 1000, | |
688 | .desc.n_voltages = ((3340) - (800))/(20) + 1, | |
958e9b82 AL |
689 | .desc.curr_table = da9062_buck_b_limits, |
690 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_b_limits), | |
691 | .desc.csel_reg = DA9062AA_BUCK_ILIM_A, | |
692 | .desc.csel_mask = DA9062AA_BUCK3_ILIM_MASK, | |
4068e518 T |
693 | .desc.enable_reg = DA9062AA_BUCK3_CONT, |
694 | .desc.enable_mask = DA9062AA_BUCK3_EN_MASK, | |
695 | .desc.vsel_reg = DA9062AA_VBUCK3_A, | |
696 | .desc.vsel_mask = DA9062AA_VBUCK3_A_MASK, | |
697 | .desc.linear_min_sel = 0, | |
844e7492 | 698 | .desc.of_map_mode = da9062_map_buck_mode, |
4068e518 T |
699 | .sleep = REG_FIELD(DA9062AA_VBUCK3_A, |
700 | __builtin_ffs((int)DA9062AA_BUCK3_SL_A_MASK) - 1, | |
701 | sizeof(unsigned int) * 8 - | |
702 | __builtin_clz((DA9062AA_BUCK3_SL_A_MASK)) - 1), | |
703 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK3_B, | |
704 | __builtin_ffs((int)DA9062AA_BUCK3_SL_B_MASK) - 1, | |
705 | sizeof(unsigned int) * 8 - | |
706 | __builtin_clz((DA9062AA_BUCK3_SL_B_MASK)) - 1), | |
707 | .suspend_vsel_reg = DA9062AA_VBUCK3_B, | |
708 | .mode = REG_FIELD(DA9062AA_BUCK3_CFG, | |
709 | __builtin_ffs((int)DA9062AA_BUCK3_MODE_MASK) - 1, | |
710 | sizeof(unsigned int) * 8 - | |
711 | __builtin_clz((DA9062AA_BUCK3_MODE_MASK)) - 1), | |
a72865f0 MF |
712 | .suspend = REG_FIELD(DA9062AA_BUCK3_CONT, |
713 | __builtin_ffs((int)DA9062AA_BUCK3_CONF_MASK) - 1, | |
4068e518 | 714 | sizeof(unsigned int) * 8 - |
a72865f0 | 715 | __builtin_clz(DA9062AA_BUCK3_CONF_MASK) - 1), |
4068e518 T |
716 | }, |
717 | { | |
718 | .desc.id = DA9062_ID_BUCK4, | |
719 | .desc.name = "DA9062 BUCK4", | |
720 | .desc.of_match = of_match_ptr("buck4"), | |
721 | .desc.regulators_node = of_match_ptr("regulators"), | |
722 | .desc.ops = &da9062_buck_ops, | |
723 | .desc.min_uV = (530) * 1000, | |
724 | .desc.uV_step = (10) * 1000, | |
725 | .desc.n_voltages = ((1800) - (530))/(10) + 1, | |
958e9b82 AL |
726 | .desc.curr_table = da9062_buck_a_limits, |
727 | .desc.n_current_limits = ARRAY_SIZE(da9062_buck_a_limits), | |
728 | .desc.csel_reg = DA9062AA_BUCK_ILIM_B, | |
729 | .desc.csel_mask = DA9062AA_BUCK4_ILIM_MASK, | |
4068e518 T |
730 | .desc.enable_reg = DA9062AA_BUCK4_CONT, |
731 | .desc.enable_mask = DA9062AA_BUCK4_EN_MASK, | |
732 | .desc.vsel_reg = DA9062AA_VBUCK4_A, | |
733 | .desc.vsel_mask = DA9062AA_VBUCK4_A_MASK, | |
734 | .desc.linear_min_sel = 0, | |
844e7492 | 735 | .desc.of_map_mode = da9062_map_buck_mode, |
4068e518 T |
736 | .sleep = REG_FIELD(DA9062AA_VBUCK4_A, |
737 | __builtin_ffs((int)DA9062AA_BUCK4_SL_A_MASK) - 1, | |
738 | sizeof(unsigned int) * 8 - | |
739 | __builtin_clz((DA9062AA_BUCK4_SL_A_MASK)) - 1), | |
740 | .suspend_sleep = REG_FIELD(DA9062AA_VBUCK4_B, | |
741 | __builtin_ffs((int)DA9062AA_BUCK4_SL_B_MASK) - 1, | |
742 | sizeof(unsigned int) * 8 - | |
743 | __builtin_clz((DA9062AA_BUCK4_SL_B_MASK)) - 1), | |
744 | .suspend_vsel_reg = DA9062AA_VBUCK4_B, | |
745 | .mode = REG_FIELD(DA9062AA_BUCK4_CFG, | |
746 | __builtin_ffs((int)DA9062AA_BUCK4_MODE_MASK) - 1, | |
747 | sizeof(unsigned int) * 8 - | |
748 | __builtin_clz((DA9062AA_BUCK4_MODE_MASK)) - 1), | |
a72865f0 MF |
749 | .suspend = REG_FIELD(DA9062AA_BUCK4_CONT, |
750 | __builtin_ffs((int)DA9062AA_BUCK4_CONF_MASK) - 1, | |
4068e518 | 751 | sizeof(unsigned int) * 8 - |
a72865f0 | 752 | __builtin_clz(DA9062AA_BUCK4_CONF_MASK) - 1), |
4068e518 T |
753 | }, |
754 | { | |
755 | .desc.id = DA9062_ID_LDO1, | |
756 | .desc.name = "DA9062 LDO1", | |
757 | .desc.of_match = of_match_ptr("ldo1"), | |
758 | .desc.regulators_node = of_match_ptr("regulators"), | |
759 | .desc.ops = &da9062_ldo_ops, | |
760 | .desc.min_uV = (900) * 1000, | |
761 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
762 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
763 | + DA9062AA_VLDO_A_MIN_SEL, | |
4068e518 T |
764 | .desc.enable_reg = DA9062AA_LDO1_CONT, |
765 | .desc.enable_mask = DA9062AA_LDO1_EN_MASK, | |
766 | .desc.vsel_reg = DA9062AA_VLDO1_A, | |
767 | .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, | |
fd5d1005 | 768 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4068e518 T |
769 | .sleep = REG_FIELD(DA9062AA_VLDO1_A, |
770 | __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, | |
771 | sizeof(unsigned int) * 8 - | |
772 | __builtin_clz((DA9062AA_LDO1_SL_A_MASK)) - 1), | |
773 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO1_B, | |
774 | __builtin_ffs((int)DA9062AA_LDO1_SL_B_MASK) - 1, | |
775 | sizeof(unsigned int) * 8 - | |
776 | __builtin_clz((DA9062AA_LDO1_SL_B_MASK)) - 1), | |
777 | .suspend_vsel_reg = DA9062AA_VLDO1_B, | |
a72865f0 MF |
778 | .suspend = REG_FIELD(DA9062AA_LDO1_CONT, |
779 | __builtin_ffs((int)DA9062AA_LDO1_CONF_MASK) - 1, | |
4068e518 | 780 | sizeof(unsigned int) * 8 - |
a72865f0 | 781 | __builtin_clz(DA9062AA_LDO1_CONF_MASK) - 1), |
4068e518 T |
782 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
783 | __builtin_ffs((int)DA9062AA_LDO1_ILIM_MASK) - 1, | |
784 | sizeof(unsigned int) * 8 - | |
785 | __builtin_clz((DA9062AA_LDO1_ILIM_MASK)) - 1), | |
786 | }, | |
787 | { | |
788 | .desc.id = DA9062_ID_LDO2, | |
789 | .desc.name = "DA9062 LDO2", | |
790 | .desc.of_match = of_match_ptr("ldo2"), | |
791 | .desc.regulators_node = of_match_ptr("regulators"), | |
792 | .desc.ops = &da9062_ldo_ops, | |
793 | .desc.min_uV = (900) * 1000, | |
794 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
795 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
796 | + DA9062AA_VLDO_A_MIN_SEL, | |
4068e518 T |
797 | .desc.enable_reg = DA9062AA_LDO2_CONT, |
798 | .desc.enable_mask = DA9062AA_LDO2_EN_MASK, | |
799 | .desc.vsel_reg = DA9062AA_VLDO2_A, | |
800 | .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, | |
fd5d1005 | 801 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4068e518 T |
802 | .sleep = REG_FIELD(DA9062AA_VLDO2_A, |
803 | __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, | |
804 | sizeof(unsigned int) * 8 - | |
805 | __builtin_clz((DA9062AA_LDO2_SL_A_MASK)) - 1), | |
806 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO2_B, | |
807 | __builtin_ffs((int)DA9062AA_LDO2_SL_B_MASK) - 1, | |
808 | sizeof(unsigned int) * 8 - | |
809 | __builtin_clz((DA9062AA_LDO2_SL_B_MASK)) - 1), | |
810 | .suspend_vsel_reg = DA9062AA_VLDO2_B, | |
a72865f0 MF |
811 | .suspend = REG_FIELD(DA9062AA_LDO2_CONT, |
812 | __builtin_ffs((int)DA9062AA_LDO2_CONF_MASK) - 1, | |
4068e518 | 813 | sizeof(unsigned int) * 8 - |
a72865f0 | 814 | __builtin_clz(DA9062AA_LDO2_CONF_MASK) - 1), |
4068e518 T |
815 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
816 | __builtin_ffs((int)DA9062AA_LDO2_ILIM_MASK) - 1, | |
817 | sizeof(unsigned int) * 8 - | |
818 | __builtin_clz((DA9062AA_LDO2_ILIM_MASK)) - 1), | |
819 | }, | |
820 | { | |
821 | .desc.id = DA9062_ID_LDO3, | |
822 | .desc.name = "DA9062 LDO3", | |
823 | .desc.of_match = of_match_ptr("ldo3"), | |
824 | .desc.regulators_node = of_match_ptr("regulators"), | |
825 | .desc.ops = &da9062_ldo_ops, | |
826 | .desc.min_uV = (900) * 1000, | |
827 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
828 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
829 | + DA9062AA_VLDO_A_MIN_SEL, | |
4068e518 T |
830 | .desc.enable_reg = DA9062AA_LDO3_CONT, |
831 | .desc.enable_mask = DA9062AA_LDO3_EN_MASK, | |
832 | .desc.vsel_reg = DA9062AA_VLDO3_A, | |
833 | .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, | |
fd5d1005 | 834 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4068e518 T |
835 | .sleep = REG_FIELD(DA9062AA_VLDO3_A, |
836 | __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, | |
837 | sizeof(unsigned int) * 8 - | |
838 | __builtin_clz((DA9062AA_LDO3_SL_A_MASK)) - 1), | |
839 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO3_B, | |
840 | __builtin_ffs((int)DA9062AA_LDO3_SL_B_MASK) - 1, | |
841 | sizeof(unsigned int) * 8 - | |
842 | __builtin_clz((DA9062AA_LDO3_SL_B_MASK)) - 1), | |
843 | .suspend_vsel_reg = DA9062AA_VLDO3_B, | |
a72865f0 MF |
844 | .suspend = REG_FIELD(DA9062AA_LDO3_CONT, |
845 | __builtin_ffs((int)DA9062AA_LDO3_CONF_MASK) - 1, | |
4068e518 | 846 | sizeof(unsigned int) * 8 - |
a72865f0 | 847 | __builtin_clz(DA9062AA_LDO3_CONF_MASK) - 1), |
4068e518 T |
848 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
849 | __builtin_ffs((int)DA9062AA_LDO3_ILIM_MASK) - 1, | |
850 | sizeof(unsigned int) * 8 - | |
851 | __builtin_clz((DA9062AA_LDO3_ILIM_MASK)) - 1), | |
852 | }, | |
853 | { | |
854 | .desc.id = DA9062_ID_LDO4, | |
855 | .desc.name = "DA9062 LDO4", | |
856 | .desc.of_match = of_match_ptr("ldo4"), | |
857 | .desc.regulators_node = of_match_ptr("regulators"), | |
858 | .desc.ops = &da9062_ldo_ops, | |
859 | .desc.min_uV = (900) * 1000, | |
860 | .desc.uV_step = (50) * 1000, | |
fd5d1005 FR |
861 | .desc.n_voltages = ((3600) - (900))/(50) + 1 |
862 | + DA9062AA_VLDO_A_MIN_SEL, | |
4068e518 T |
863 | .desc.enable_reg = DA9062AA_LDO4_CONT, |
864 | .desc.enable_mask = DA9062AA_LDO4_EN_MASK, | |
865 | .desc.vsel_reg = DA9062AA_VLDO4_A, | |
866 | .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, | |
fd5d1005 | 867 | .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, |
4068e518 T |
868 | .sleep = REG_FIELD(DA9062AA_VLDO4_A, |
869 | __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, | |
870 | sizeof(unsigned int) * 8 - | |
871 | __builtin_clz((DA9062AA_LDO4_SL_A_MASK)) - 1), | |
872 | .suspend_sleep = REG_FIELD(DA9062AA_VLDO4_B, | |
873 | __builtin_ffs((int)DA9062AA_LDO4_SL_B_MASK) - 1, | |
874 | sizeof(unsigned int) * 8 - | |
875 | __builtin_clz((DA9062AA_LDO4_SL_B_MASK)) - 1), | |
876 | .suspend_vsel_reg = DA9062AA_VLDO4_B, | |
a72865f0 MF |
877 | .suspend = REG_FIELD(DA9062AA_LDO4_CONT, |
878 | __builtin_ffs((int)DA9062AA_LDO4_CONF_MASK) - 1, | |
4068e518 | 879 | sizeof(unsigned int) * 8 - |
a72865f0 | 880 | __builtin_clz(DA9062AA_LDO4_CONF_MASK) - 1), |
4068e518 T |
881 | .oc_event = REG_FIELD(DA9062AA_STATUS_D, |
882 | __builtin_ffs((int)DA9062AA_LDO4_ILIM_MASK) - 1, | |
883 | sizeof(unsigned int) * 8 - | |
884 | __builtin_clz((DA9062AA_LDO4_ILIM_MASK)) - 1), | |
885 | }, | |
886 | }; | |
887 | ||
888 | /* Regulator interrupt handlers */ | |
889 | static irqreturn_t da9062_ldo_lim_event(int irq, void *data) | |
890 | { | |
891 | struct da9062_regulators *regulators = data; | |
892 | struct da9062 *hw = regulators->regulator[0].hw; | |
893 | struct da9062_regulator *regl; | |
894 | int handled = IRQ_NONE; | |
895 | int bits, i, ret; | |
896 | ||
897 | ret = regmap_read(hw->regmap, DA9062AA_STATUS_D, &bits); | |
898 | if (ret < 0) { | |
899 | dev_err(hw->dev, | |
900 | "Failed to read LDO overcurrent indicator\n"); | |
901 | goto ldo_lim_error; | |
902 | } | |
903 | ||
904 | for (i = regulators->n_regulators - 1; i >= 0; i--) { | |
905 | regl = ®ulators->regulator[i]; | |
906 | if (regl->info->oc_event.reg != DA9062AA_STATUS_D) | |
907 | continue; | |
908 | ||
909 | if (BIT(regl->info->oc_event.lsb) & bits) { | |
910 | regulator_notifier_call_chain(regl->rdev, | |
911 | REGULATOR_EVENT_OVER_CURRENT, NULL); | |
912 | handled = IRQ_HANDLED; | |
913 | } | |
914 | } | |
915 | ||
916 | ldo_lim_error: | |
917 | return handled; | |
918 | } | |
919 | ||
920 | static int da9062_regulator_probe(struct platform_device *pdev) | |
921 | { | |
922 | struct da9062 *chip = dev_get_drvdata(pdev->dev.parent); | |
4068e518 T |
923 | struct da9062_regulators *regulators; |
924 | struct da9062_regulator *regl; | |
925 | struct regulator_config config = { }; | |
4b7f4958 | 926 | const struct da9062_regulator_info *rinfo; |
4068e518 | 927 | int irq, n, ret; |
4b7f4958 ST |
928 | int max_regulators; |
929 | ||
930 | switch (chip->chip_type) { | |
931 | case COMPAT_TYPE_DA9061: | |
932 | max_regulators = DA9061_MAX_REGULATORS; | |
933 | rinfo = local_da9061_regulator_info; | |
934 | break; | |
935 | case COMPAT_TYPE_DA9062: | |
936 | max_regulators = DA9062_MAX_REGULATORS; | |
937 | rinfo = local_da9062_regulator_info; | |
938 | break; | |
939 | default: | |
940 | dev_err(chip->dev, "Unrecognised chip type\n"); | |
941 | return -ENODEV; | |
942 | } | |
4068e518 T |
943 | |
944 | /* Allocate memory required by usable regulators */ | |
97b047e7 GS |
945 | regulators = devm_kzalloc(&pdev->dev, struct_size(regulators, regulator, |
946 | max_regulators), GFP_KERNEL); | |
4068e518 T |
947 | if (!regulators) |
948 | return -ENOMEM; | |
949 | ||
4b7f4958 | 950 | regulators->n_regulators = max_regulators; |
4068e518 T |
951 | platform_set_drvdata(pdev, regulators); |
952 | ||
151b0379 | 953 | for (n = 0; n < regulators->n_regulators; n++) { |
4068e518 T |
954 | /* Initialise regulator structure */ |
955 | regl = ®ulators->regulator[n]; | |
956 | regl->hw = chip; | |
4b7f4958 | 957 | regl->info = &rinfo[n]; |
4068e518 T |
958 | regl->desc = regl->info->desc; |
959 | regl->desc.type = REGULATOR_VOLTAGE; | |
960 | regl->desc.owner = THIS_MODULE; | |
961 | ||
54129d64 | 962 | if (regl->info->mode.reg) { |
4068e518 T |
963 | regl->mode = devm_regmap_field_alloc( |
964 | &pdev->dev, | |
965 | chip->regmap, | |
966 | regl->info->mode); | |
54129d64 AL |
967 | if (IS_ERR(regl->mode)) |
968 | return PTR_ERR(regl->mode); | |
969 | } | |
970 | ||
971 | if (regl->info->suspend.reg) { | |
4068e518 T |
972 | regl->suspend = devm_regmap_field_alloc( |
973 | &pdev->dev, | |
974 | chip->regmap, | |
975 | regl->info->suspend); | |
54129d64 AL |
976 | if (IS_ERR(regl->suspend)) |
977 | return PTR_ERR(regl->suspend); | |
978 | } | |
979 | ||
980 | if (regl->info->sleep.reg) { | |
4068e518 T |
981 | regl->sleep = devm_regmap_field_alloc( |
982 | &pdev->dev, | |
983 | chip->regmap, | |
984 | regl->info->sleep); | |
54129d64 AL |
985 | if (IS_ERR(regl->sleep)) |
986 | return PTR_ERR(regl->sleep); | |
987 | } | |
988 | ||
989 | if (regl->info->suspend_sleep.reg) { | |
4068e518 T |
990 | regl->suspend_sleep = devm_regmap_field_alloc( |
991 | &pdev->dev, | |
992 | chip->regmap, | |
993 | regl->info->suspend_sleep); | |
54129d64 AL |
994 | if (IS_ERR(regl->suspend_sleep)) |
995 | return PTR_ERR(regl->suspend_sleep); | |
996 | } | |
997 | ||
4068e518 T |
998 | /* Register regulator */ |
999 | memset(&config, 0, sizeof(config)); | |
1000 | config.dev = chip->dev; | |
1001 | config.driver_data = regl; | |
1002 | config.regmap = chip->regmap; | |
1003 | ||
1004 | regl->rdev = devm_regulator_register(&pdev->dev, ®l->desc, | |
1005 | &config); | |
1006 | if (IS_ERR(regl->rdev)) { | |
1007 | dev_err(&pdev->dev, | |
1008 | "Failed to register %s regulator\n", | |
1009 | regl->desc.name); | |
1010 | return PTR_ERR(regl->rdev); | |
1011 | } | |
4068e518 T |
1012 | } |
1013 | ||
1014 | /* LDOs overcurrent event support */ | |
1015 | irq = platform_get_irq_byname(pdev, "LDO_LIM"); | |
47241933 | 1016 | if (irq < 0) |
4068e518 | 1017 | return irq; |
4068e518 T |
1018 | regulators->irq_ldo_lim = irq; |
1019 | ||
1020 | ret = devm_request_threaded_irq(&pdev->dev, irq, | |
1021 | NULL, da9062_ldo_lim_event, | |
1022 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
1023 | "LDO_LIM", regulators); | |
1024 | if (ret) { | |
1025 | dev_warn(&pdev->dev, | |
1026 | "Failed to request LDO_LIM IRQ.\n"); | |
1027 | regulators->irq_ldo_lim = -ENXIO; | |
1028 | } | |
1029 | ||
1030 | return 0; | |
1031 | } | |
1032 | ||
1033 | static struct platform_driver da9062_regulator_driver = { | |
1034 | .driver = { | |
1035 | .name = "da9062-regulators", | |
4068e518 T |
1036 | }, |
1037 | .probe = da9062_regulator_probe, | |
1038 | }; | |
1039 | ||
1040 | static int __init da9062_regulator_init(void) | |
1041 | { | |
1042 | return platform_driver_register(&da9062_regulator_driver); | |
1043 | } | |
1044 | subsys_initcall(da9062_regulator_init); | |
1045 | ||
1046 | static void __exit da9062_regulator_cleanup(void) | |
1047 | { | |
1048 | platform_driver_unregister(&da9062_regulator_driver); | |
1049 | } | |
1050 | module_exit(da9062_regulator_cleanup); | |
1051 | ||
1052 | /* Module information */ | |
1053 | MODULE_AUTHOR("S Twiss <stwiss.opensource@diasemi.com>"); | |
4b7f4958 | 1054 | MODULE_DESCRIPTION("REGULATOR device driver for Dialog DA9062 and DA9061"); |
4068e518 | 1055 | MODULE_LICENSE("GPL"); |
ea6254e5 | 1056 | MODULE_ALIAS("platform:da9062-regulators"); |