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[mirror_ubuntu-jammy-kernel.git] / drivers / regulator / da9121-regulator.c
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e6ff10f2 1// SPDX-License-Identifier: GPL-2.0-only
c860476b
AW		 2//
3// DA9121 Single-channel dual-phase 10A buck converter
4//
5// Copyright (C) 2020 Axis Communications AB
6//
7// DA9130 Single-channel dual-phase 10A buck converter (Automotive)
8// DA9217 Single-channel dual-phase 6A buck converter
9// DA9122 Dual-channel single-phase 5A buck converter
10// DA9131 Dual-channel single-phase 5A buck converter (Automotive)
11// DA9220 Dual-channel single-phase 3A buck converter
12// DA9132 Dual-channel single-phase 3A buck converter (Automotive)
13//
14// Copyright (C) 2020 Dialog Semiconductor
e6ff10f2
VW		 15
16#include <linux/of_device.h>
46c413d5 17#include <linux/of_gpio.h>
b4b27776 18#include <linux/gpio/consumer.h>
e6ff10f2
VW		 19#include <linux/regulator/of_regulator.h>
20#include <linux/regulator/machine.h>
21#include <linux/regulator/driver.h>
22#include <linux/module.h>
23#include <linux/regmap.h>
24#include <linux/err.h>
25#include <linux/i2c.h>
c860476b 26#include <linux/regulator/da9121.h>
40bb5b02
AW		 27#include <linux/interrupt.h>
28#include <linux/workqueue.h>
c860476b 29
86f162c9 30#include "da9121-regulator.h"
e6ff10f2 31
f3fbd556
AW		 32/* Chip data */
33struct da9121 {
34 struct device *dev;
40bb5b02 35 struct delayed_work work;
46c413d5 36 struct da9121_pdata *pdata;
c860476b 37 struct regmap *regmap;
9929900d 38 struct regulator_dev *rdev[DA9121_IDX_MAX];
40bb5b02
AW		 39 unsigned int persistent[2];
40 unsigned int passive_delay;
41 int chip_irq;
f3fbd556 42 int variant_id;
013592be 43 int subvariant_id;
f3fbd556
AW		 44};
45
46c413d5
AW		 46/* Define ranges for different variants, enabling translation to/from
47 * registers. Maximums give scope to allow for transients.
48 */
49struct da9121_range {
50 int val_min;
51 int val_max;
52 int val_stp;
53 int reg_min;
54 int reg_max;
55};
56
c8dbf2f2 57static struct da9121_range da9121_10A_2phase_current = {
46c413d5
AW		 58 .val_min = 7000000,
59 .val_max = 20000000,
60 .val_stp = 1000000,
61 .reg_min = 1,
62 .reg_max = 14,
63};
64
c8dbf2f2 65static struct da9121_range da9121_6A_2phase_current = {
46c413d5
AW		 66 .val_min = 7000000,
67 .val_max = 12000000,
68 .val_stp = 1000000,
69 .reg_min = 1,
70 .reg_max = 6,
71};
72
c8dbf2f2 73static struct da9121_range da9121_5A_1phase_current = {
46c413d5
AW		 74 .val_min = 3500000,
75 .val_max = 10000000,
76 .val_stp = 500000,
77 .reg_min = 1,
78 .reg_max = 14,
79};
80
c8dbf2f2 81static struct da9121_range da9121_3A_1phase_current = {
46c413d5
AW		 82 .val_min = 3500000,
83 .val_max = 6000000,
84 .val_stp = 500000,
85 .reg_min = 1,
86 .reg_max = 6,
87};
88
89struct da9121_variant_info {
90 int num_bucks;
91 int num_phases;
92 struct da9121_range *current_range;
93};
94
95static const struct da9121_variant_info variant_parameters[] = {
96 { 1, 2, &da9121_10A_2phase_current }, //DA9121_TYPE_DA9121_DA9130
97 { 2, 1, &da9121_3A_1phase_current }, //DA9121_TYPE_DA9220_DA9132
98 { 2, 1, &da9121_5A_1phase_current }, //DA9121_TYPE_DA9122_DA9131
99 { 1, 2, &da9121_6A_2phase_current }, //DA9121_TYPE_DA9217
100};
101
5c4b62af
AW		 102struct da9121_field {
103 unsigned int reg;
104 unsigned int msk;
105};
106
107static const struct da9121_field da9121_current_field[2] = {
108 { DA9121_REG_BUCK_BUCK1_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
109 { DA9xxx_REG_BUCK_BUCK2_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
110};
111
65ac9704
AW		 112static const struct da9121_field da9121_mode_field[2] = {
113 { DA9121_REG_BUCK_BUCK1_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
114 { DA9xxx_REG_BUCK_BUCK2_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
115};
116
40bb5b02
AW		 117struct status_event_data {
118 int buck_id; /* 0=core, 1/2-buck */
119 int reg_index; /* index for status/event/mask register selection */
120 int status_bit; /* bit masks... */
121 int event_bit;
122 int mask_bit;
123 unsigned long notification; /* Notification for status inception */
124 char *warn; /* if NULL, notify - otherwise dev_warn this string */
125};
126
127#define DA9121_STATUS(id, bank, name, notification, warning) \
128 { id, bank, \
129 DA9121_MASK_SYS_STATUS_##bank##_##name, \
130 DA9121_MASK_SYS_EVENT_##bank##_E_##name, \
131 DA9121_MASK_SYS_MASK_##bank##_M_##name, \
132 notification, warning }
133
134/* For second buck related event bits that are specific to DA9122, DA9220 variants */
135#define DA9xxx_STATUS(id, bank, name, notification, warning) \
136 { id, bank, \
137 DA9xxx_MASK_SYS_STATUS_##bank##_##name, \
138 DA9xxx_MASK_SYS_EVENT_##bank##_E_##name, \
139 DA9xxx_MASK_SYS_MASK_##bank##_M_##name, \
140 notification, warning }
141
142/* The status signals that may need servicing, depending on device variant.
143 * After assertion, they persist; so event is notified, the IRQ disabled,
144 * and status polled until clear again and IRQ is reenabled.
145 *
146 * SG/PG1/PG2 should be set when device first powers up and should never
147 * re-occur. When this driver starts, it is expected that these will have
148 * self-cleared for when the IRQs are enabled, so these should never be seen.
149 * If seen, the implication is that the device has reset.
150 *
151 * GPIO0/1/2 are not configured for use by default, so should not be seen.
152 */
c8dbf2f2 153static const struct status_event_data status_event_handling[] = {
40bb5b02
AW		 154 DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"),
155 DA9121_STATUS(0, 0, TEMP_CRIT, (REGULATOR_EVENT_OVER_TEMP|REGULATOR_EVENT_DISABLE), NULL),
156 DA9121_STATUS(0, 0, TEMP_WARN, REGULATOR_EVENT_OVER_TEMP, NULL),
157 DA9121_STATUS(1, 1, PG1, 0, "Handled E_PG1\n"),
158 DA9121_STATUS(1, 1, OV1, REGULATOR_EVENT_REGULATION_OUT, NULL),
159 DA9121_STATUS(1, 1, UV1, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
160 DA9121_STATUS(1, 1, OC1, REGULATOR_EVENT_OVER_CURRENT, NULL),
161 DA9xxx_STATUS(2, 1, PG2, 0, "Handled E_PG2\n"),
162 DA9xxx_STATUS(2, 1, OV2, REGULATOR_EVENT_REGULATION_OUT, NULL),
163 DA9xxx_STATUS(2, 1, UV2, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
164 DA9xxx_STATUS(2, 1, OC2, REGULATOR_EVENT_OVER_CURRENT, NULL),
165 DA9121_STATUS(0, 2, GPIO0, 0, "Handled E_GPIO0\n"),
166 DA9121_STATUS(0, 2, GPIO1, 0, "Handled E_GPIO1\n"),
167 DA9121_STATUS(0, 2, GPIO2, 0, "Handled E_GPIO2\n"),
168};
169
5c4b62af
AW		 170static int da9121_get_current_limit(struct regulator_dev *rdev)
171{
172 struct da9121 *chip = rdev_get_drvdata(rdev);
173 int id = rdev_get_id(rdev);
174 struct da9121_range *range =
175 variant_parameters[chip->variant_id].current_range;
176 unsigned int val = 0;
177 int ret = 0;
178
179 ret = regmap_read(chip->regmap, da9121_current_field[id].reg, &val);
180 if (ret < 0) {
181 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
182 goto error;
183 }
184
185 if (val < range->reg_min) {
186 ret = -EACCES;
187 goto error;
188 }
189
190 if (val > range->reg_max) {
191 ret = -EINVAL;
192 goto error;
193 }
194
195 return range->val_min + (range->val_stp * (val - range->reg_min));
196error:
197 return ret;
198}
199
200static int da9121_ceiling_selector(struct regulator_dev *rdev,
201 int min, int max,
202 unsigned int *selector)
203{
204 struct da9121 *chip = rdev_get_drvdata(rdev);
205 struct da9121_range *range =
206 variant_parameters[chip->variant_id].current_range;
207 unsigned int level;
208 unsigned int i = 0;
209 unsigned int sel = 0;
210 int ret = 0;
211
212 if (range->val_min > max || range->val_max < min) {
213 dev_err(chip->dev,
214 "Requested current out of regulator capability\n");
215 ret = -EINVAL;
216 goto error;
217 }
218
219 level = range->val_max;
220 for (i = range->reg_max; i >= range->reg_min; i--) {
221 if (level <= max) {
222 sel = i;
223 break;
224 }
225 level -= range->val_stp;
226 }
227
228 if (level < min) {
229 dev_err(chip->dev,
230 "Best match falls below minimum requested current\n");
231 ret = -EINVAL;
232 goto error;
233 }
234
235 *selector = sel;
236error:
237 return ret;
238}
239
240static int da9121_set_current_limit(struct regulator_dev *rdev,
241 int min_ua, int max_ua)
242{
243 struct da9121 *chip = rdev_get_drvdata(rdev);
244 int id = rdev_get_id(rdev);
245 struct da9121_range *range =
246 variant_parameters[chip->variant_id].current_range;
247 unsigned int sel = 0;
248 int ret = 0;
249
250 if (min_ua < range->val_min ||
251 max_ua > range->val_max) {
252 ret = -EINVAL;
253 goto error;
254 }
255
256 ret = da9121_ceiling_selector(rdev, min_ua, max_ua, &sel);
257 if (ret < 0)
258 goto error;
259
260 ret = regmap_update_bits(chip->regmap,
261 da9121_current_field[id].reg,
262 da9121_current_field[id].msk,
263 (unsigned int)sel);
264 if (ret < 0)
265 dev_err(chip->dev, "Cannot update BUCK current limit, err: %d\n", ret);
266
267error:
268 return ret;
269}
270
65ac9704
AW		 271static unsigned int da9121_map_mode(unsigned int mode)
272{
273 switch (mode) {
274 case DA9121_BUCK_MODE_FORCE_PWM:
275 return REGULATOR_MODE_FAST;
276 case DA9121_BUCK_MODE_FORCE_PWM_SHEDDING:
277 return REGULATOR_MODE_NORMAL;
278 case DA9121_BUCK_MODE_AUTO:
279 return REGULATOR_MODE_IDLE;
280 case DA9121_BUCK_MODE_FORCE_PFM:
281 return REGULATOR_MODE_STANDBY;
282 default:
0b1e5526 283 return REGULATOR_MODE_INVALID;
65ac9704
AW		 284 }
285}
286
287static int da9121_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
288{
289 struct da9121 *chip = rdev_get_drvdata(rdev);
290 int id = rdev_get_id(rdev);
291 unsigned int val;
292
293 switch (mode) {
294 case REGULATOR_MODE_FAST:
295 val = DA9121_BUCK_MODE_FORCE_PWM;
296 break;
297 case REGULATOR_MODE_NORMAL:
298 val = DA9121_BUCK_MODE_FORCE_PWM_SHEDDING;
299 break;
300 case REGULATOR_MODE_IDLE:
301 val = DA9121_BUCK_MODE_AUTO;
302 break;
303 case REGULATOR_MODE_STANDBY:
304 val = DA9121_BUCK_MODE_FORCE_PFM;
305 break;
306 default:
307 return -EINVAL;
308 }
309
310 return regmap_update_bits(chip->regmap,
311 da9121_mode_field[id].reg,
312 da9121_mode_field[id].msk,
313 val);
314}
315
316static unsigned int da9121_buck_get_mode(struct regulator_dev *rdev)
317{
318 struct da9121 *chip = rdev_get_drvdata(rdev);
319 int id = rdev_get_id(rdev);
0b1e5526 320 unsigned int val, mode;
65ac9704
AW		 321 int ret = 0;
322
323 ret = regmap_read(chip->regmap, da9121_mode_field[id].reg, &val);
324 if (ret < 0) {
325 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
326 return -EINVAL;
327 }
328
0b1e5526
AL		 329 mode = da9121_map_mode(val & da9121_mode_field[id].msk);
330 if (mode == REGULATOR_MODE_INVALID)
331 return -EINVAL;
332
333 return mode;
65ac9704
AW		 334}
335
e6ff10f2
VW		 336static const struct regulator_ops da9121_buck_ops = {
337 .enable = regulator_enable_regmap,
338 .disable = regulator_disable_regmap,
339 .is_enabled = regulator_is_enabled_regmap,
340 .set_voltage_sel = regulator_set_voltage_sel_regmap,
341 .get_voltage_sel = regulator_get_voltage_sel_regmap,
342 .list_voltage = regulator_list_voltage_linear,
5c4b62af
AW		 343 .get_current_limit = da9121_get_current_limit,
344 .set_current_limit = da9121_set_current_limit,
65ac9704
AW		 345 .set_mode = da9121_buck_set_mode,
346 .get_mode = da9121_buck_get_mode,
e6ff10f2
VW		 347};
348
91863239
AW		 349static struct of_regulator_match da9121_matches[] = {
350 [DA9121_IDX_BUCK1] = { .name = "buck1" },
351 [DA9121_IDX_BUCK2] = { .name = "buck2" },
352};
353
46c413d5
AW		 354static int da9121_of_parse_cb(struct device_node *np,
355 const struct regulator_desc *desc,
356 struct regulator_config *config)
357{
358 struct da9121 *chip = config->driver_data;
359 struct da9121_pdata *pdata;
360 struct gpio_desc *ena_gpiod;
361
362 if (chip->pdata == NULL) {
363 pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
364 if (!pdata)
365 return -ENOMEM;
366 } else {
367 pdata = chip->pdata;
368 }
369
370 pdata->num_buck++;
371
372 if (pdata->num_buck > variant_parameters[chip->variant_id].num_bucks) {
373 dev_err(chip->dev, "Error: excessive regulators for device\n");
374 return -ENODEV;
375 }
376
377 ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0,
378 GPIOD_OUT_HIGH |
379 GPIOD_FLAGS_BIT_NONEXCLUSIVE,
380 "da9121-enable");
381 if (!IS_ERR(ena_gpiod))
382 config->ena_gpiod = ena_gpiod;
383
384 if (variant_parameters[chip->variant_id].num_bucks == 2) {
385 uint32_t ripple_cancel;
386 uint32_t ripple_reg;
387 int ret;
388
9536ce63 389 if (of_property_read_u32(da9121_matches[pdata->num_buck-1].of_node,
46c413d5
AW		 390 "dlg,ripple-cancel", &ripple_cancel)) {
391 if (pdata->num_buck > 1)
392 ripple_reg = DA9xxx_REG_BUCK_BUCK2_7;
393 else
394 ripple_reg = DA9121_REG_BUCK_BUCK1_7;
395
396 ret = regmap_update_bits(chip->regmap, ripple_reg,
397 DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL,
398 ripple_cancel);
399 if (ret < 0)
400 dev_err(chip->dev, "Cannot set ripple mode, err: %d\n", ret);
401 }
402 }
403
404 return 0;
405}
406
c860476b
AW		 407#define DA9121_MIN_MV 300
408#define DA9121_MAX_MV 1900
409#define DA9121_STEP_MV 10
410#define DA9121_MIN_SEL (DA9121_MIN_MV / DA9121_STEP_MV)
411#define DA9121_N_VOLTAGES (((DA9121_MAX_MV - DA9121_MIN_MV) / DA9121_STEP_MV) \
412 + 1 + DA9121_MIN_SEL)
413
e6ff10f2 414static const struct regulator_desc da9121_reg = {
91863239 415 .id = DA9121_IDX_BUCK1,
e6ff10f2
VW		 416 .name = "da9121",
417 .of_match = "buck1",
46c413d5 418 .of_parse_cb = da9121_of_parse_cb,
e6ff10f2 419 .owner = THIS_MODULE,
91863239 420 .regulators_node = of_match_ptr("regulators"),
65ac9704 421 .of_map_mode = da9121_map_mode,
e6ff10f2
VW		 422 .ops = &da9121_buck_ops,
423 .type = REGULATOR_VOLTAGE,
424 .n_voltages = DA9121_N_VOLTAGES,
425 .min_uV = DA9121_MIN_MV * 1000,
426 .uV_step = DA9121_STEP_MV * 1000,
427 .linear_min_sel = DA9121_MIN_SEL,
86f162c9
AW		 428 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
429 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
430 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
431 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
e6ff10f2
VW		 432 /* Default value of BUCK_BUCK1_0.CH1_SRC_DVC_UP */
433 .ramp_delay = 20000,
434 /* tBUCK_EN */
435 .enable_time = 20,
436};
437
91863239
AW		 438static const struct regulator_desc da9220_reg[2] = {
439 {
440 .id = DA9121_IDX_BUCK1,
441 .name = "DA9220/DA9132 BUCK1",
442 .of_match = "buck1",
46c413d5 443 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 444 .owner = THIS_MODULE,
445 .regulators_node = of_match_ptr("regulators"),
65ac9704 446 .of_map_mode = da9121_map_mode,
91863239
AW		 447 .ops = &da9121_buck_ops,
448 .type = REGULATOR_VOLTAGE,
449 .n_voltages = DA9121_N_VOLTAGES,
450 .min_uV = DA9121_MIN_MV * 1000,
451 .uV_step = DA9121_STEP_MV * 1000,
452 .linear_min_sel = DA9121_MIN_SEL,
453 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
454 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
455 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
456 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
457 },
458 {
459 .id = DA9121_IDX_BUCK2,
460 .name = "DA9220/DA9132 BUCK2",
461 .of_match = "buck2",
46c413d5 462 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 463 .owner = THIS_MODULE,
464 .regulators_node = of_match_ptr("regulators"),
65ac9704 465 .of_map_mode = da9121_map_mode,
91863239
AW		 466 .ops = &da9121_buck_ops,
467 .type = REGULATOR_VOLTAGE,
468 .n_voltages = DA9121_N_VOLTAGES,
469 .min_uV = DA9121_MIN_MV * 1000,
470 .uV_step = DA9121_STEP_MV * 1000,
471 .linear_min_sel = DA9121_MIN_SEL,
472 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
473 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
474 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
475 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
476 }
477};
478
479static const struct regulator_desc da9122_reg[2] = {
480 {
481 .id = DA9121_IDX_BUCK1,
482 .name = "DA9122/DA9131 BUCK1",
483 .of_match = "buck1",
46c413d5 484 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 485 .owner = THIS_MODULE,
486 .regulators_node = of_match_ptr("regulators"),
65ac9704 487 .of_map_mode = da9121_map_mode,
91863239
AW		 488 .ops = &da9121_buck_ops,
489 .type = REGULATOR_VOLTAGE,
490 .n_voltages = DA9121_N_VOLTAGES,
491 .min_uV = DA9121_MIN_MV * 1000,
492 .uV_step = DA9121_STEP_MV * 1000,
493 .linear_min_sel = DA9121_MIN_SEL,
494 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
495 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
496 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
497 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
498 },
499 {
500 .id = DA9121_IDX_BUCK2,
501 .name = "DA9122/DA9131 BUCK2",
502 .of_match = "buck2",
46c413d5 503 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 504 .owner = THIS_MODULE,
505 .regulators_node = of_match_ptr("regulators"),
65ac9704 506 .of_map_mode = da9121_map_mode,
91863239
AW		 507 .ops = &da9121_buck_ops,
508 .type = REGULATOR_VOLTAGE,
509 .n_voltages = DA9121_N_VOLTAGES,
510 .min_uV = DA9121_MIN_MV * 1000,
511 .uV_step = DA9121_STEP_MV * 1000,
512 .linear_min_sel = DA9121_MIN_SEL,
513 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
514 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
515 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
516 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
517 }
518};
519
520static const struct regulator_desc da9217_reg = {
521 .id = DA9121_IDX_BUCK1,
522 .name = "DA9217 BUCK1",
523 .of_match = "buck1",
46c413d5 524 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 525 .owner = THIS_MODULE,
526 .regulators_node = of_match_ptr("regulators"),
65ac9704 527 .of_map_mode = da9121_map_mode,
91863239
AW		 528 .ops = &da9121_buck_ops,
529 .type = REGULATOR_VOLTAGE,
530 .n_voltages = DA9121_N_VOLTAGES,
531 .min_uV = DA9121_MIN_MV * 1000,
532 .uV_step = DA9121_STEP_MV * 1000,
533 .linear_min_sel = DA9121_MIN_SEL,
534 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
535 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
536 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
537 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
538};
539
540static const struct regulator_desc *local_da9121_regulators[][DA9121_IDX_MAX] = {
541 [DA9121_TYPE_DA9121_DA9130] = { &da9121_reg, NULL },
542 [DA9121_TYPE_DA9220_DA9132] = { &da9220_reg[0], &da9220_reg[1] },
543 [DA9121_TYPE_DA9122_DA9131] = { &da9122_reg[0], &da9122_reg[1] },
544 [DA9121_TYPE_DA9217] = { &da9217_reg, NULL },
545};
546
40bb5b02
AW		 547static void da9121_status_poll_on(struct work_struct *work)
548{
549 struct da9121 *chip = container_of(work, struct da9121, work.work);
550 int status[3] = {0};
551 int clear[3] = {0};
552 unsigned long delay;
553 int i;
554 int ret;
555
556 ret = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_STATUS_0, status, 2);
557 if (ret < 0) {
558 dev_err(chip->dev,
559 "Failed to read STATUS registers: %d\n", ret);
560 goto error;
561 }
562
563 /* Possible events are tested to be within range for the variant, potentially
564 * masked by the IRQ handler (not just warned about), as having been masked,
565 * and the respective state cleared - then flagged to unmask for next IRQ.
566 */
567 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
568 const struct status_event_data *item = &status_event_handling[i];
569 int reg_idx = item->reg_index;
570 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
571 bool supported = (item->warn == NULL);
572 bool persisting = (chip->persistent[reg_idx] & item->event_bit);
573 bool now_cleared = !(status[reg_idx] & item->status_bit);
574
575 if (relevant && supported && persisting && now_cleared) {
576 clear[reg_idx] |= item->mask_bit;
577 chip->persistent[reg_idx] &= ~item->event_bit;
578 }
579 }
580
581 for (i = 0; i < 2; i++) {
582 if (clear[i]) {
583 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
584 unsigned int mbit = clear[i];
585
586 ret = regmap_update_bits(chip->regmap, reg, mbit, 0);
587 if (ret < 0) {
588 dev_err(chip->dev,
589 "Failed to unmask 0x%02x %d\n",
590 reg, ret);
591 goto error;
592 }
593 }
594 }
595
596 if (chip->persistent[0] | chip->persistent[1]) {
597 delay = msecs_to_jiffies(chip->passive_delay);
598 queue_delayed_work(system_freezable_wq, &chip->work, delay);
599 }
600
601error:
602 return;
603}
604
605static irqreturn_t da9121_irq_handler(int irq, void *data)
606{
607 struct da9121 *chip = data;
608 struct regulator_dev *rdev;
609 int event[3] = {0};
610 int handled[3] = {0};
611 int mask[3] = {0};
612 int ret = IRQ_NONE;
613 int i;
614 int err;
615
616 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_EVENT_0, event, 3);
617 if (err < 0) {
618 dev_err(chip->dev, "Failed to read EVENT registers %d\n", err);
619 ret = IRQ_NONE;
620 goto error;
621 }
622
623 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_MASK_0, mask, 3);
624 if (err < 0) {
625 dev_err(chip->dev,
626 "Failed to read MASK registers: %d\n", ret);
627 ret = IRQ_NONE;
628 goto error;
629 }
630
631 rdev = chip->rdev[DA9121_IDX_BUCK1];
632
633 /* Possible events are tested to be within range for the variant, currently
634 * enabled, and having triggered this IRQ. The event may then be notified,
635 * or a warning given for unexpected events - those from device POR, and
636 * currently unsupported GPIO configurations.
637 */
638 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
639 const struct status_event_data *item = &status_event_handling[i];
640 int reg_idx = item->reg_index;
641 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
642 bool enabled = !(mask[reg_idx] & item->mask_bit);
643 bool active = (event[reg_idx] & item->event_bit);
644 bool notify = (item->warn == NULL);
645
646 if (relevant && enabled && active) {
647 if (notify) {
648 chip->persistent[reg_idx] |= item->event_bit;
649 regulator_notifier_call_chain(rdev, item->notification, NULL);
650 } else {
651 dev_warn(chip->dev, item->warn);
652 handled[reg_idx] |= item->event_bit;
653 ret = IRQ_HANDLED;
654 }
655 }
656 }
657
658 for (i = 0; i < 3; i++) {
659 if (event[i] != handled[i]) {
660 dev_warn(chip->dev,
661 "Unhandled event(s) in bank%d 0x%02x\n", i,
662 event[i] ^ handled[i]);
663 }
664 }
665
666 /* Mask the interrupts for persistent events OV, OC, UV, WARN, CRIT */
667 for (i = 0; i < 2; i++) {
668 if (handled[i]) {
669 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
670 unsigned int mbit = handled[i];
671
672 err = regmap_update_bits(chip->regmap, reg, mbit, mbit);
673 if (err < 0) {
674 dev_err(chip->dev,
675 "Failed to mask 0x%02x interrupt %d\n",
676 reg, err);
677 ret = IRQ_NONE;
678 goto error;
679 }
680 }
681 }
682
683 /* clear the events */
684 if (handled[0] | handled[1] | handled[2]) {
685 err = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_EVENT_0, handled, 3);
686 if (err < 0) {
687 dev_err(chip->dev, "Fail to write EVENTs %d\n", err);
688 ret = IRQ_NONE;
689 goto error;
690 }
691 }
692
693 queue_delayed_work(system_freezable_wq, &chip->work, 0);
694error:
695 return ret;
696}
697
9929900d
AW		 698static int da9121_set_regulator_config(struct da9121 *chip)
699{
700 struct regulator_config config = { };
701 unsigned int max_matches = variant_parameters[chip->variant_id].num_bucks;
702 int ret = 0;
703 int i;
704
705 for (i = 0; i < max_matches; i++) {
706 const struct regulator_desc *regl_desc =
707 local_da9121_regulators[chip->variant_id][i];
708
709 config.dev = chip->dev;
710 config.driver_data = chip;
711 config.regmap = chip->regmap;
712
713 chip->rdev[i] = devm_regulator_register(chip->dev,
714 regl_desc, &config);
715 if (IS_ERR(chip->rdev[i])) {
716 dev_err(chip->dev, "Failed to register regulator %s, %d/%d\n",
717 regl_desc->name, (i+1), max_matches);
718 ret = PTR_ERR(chip->rdev[i]);
719 goto error;
720 }
721 }
722
723error:
724 return ret;
725}
726
c860476b
AW		 727/* DA9121 chip register model */
728static const struct regmap_range da9121_1ch_readable_ranges[] = {
729 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
730 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
731 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
732 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
733 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
734};
735
736static const struct regmap_access_table da9121_1ch_readable_table = {
737 .yes_ranges = da9121_1ch_readable_ranges,
738 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_readable_ranges),
739};
740
741static const struct regmap_range da9121_2ch_readable_ranges[] = {
742 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
743 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
744 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
745 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_7),
746 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_7),
747 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
748};
749
750static const struct regmap_access_table da9121_2ch_readable_table = {
751 .yes_ranges = da9121_2ch_readable_ranges,
752 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_readable_ranges),
753};
754
755static const struct regmap_range da9121_1ch_writeable_ranges[] = {
756 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
757 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
758 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
759 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
760 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_6),
761};
762
763static const struct regmap_access_table da9121_1ch_writeable_table = {
764 .yes_ranges = da9121_1ch_writeable_ranges,
765 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_writeable_ranges),
766};
767
768static const struct regmap_range da9121_2ch_writeable_ranges[] = {
769 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
770 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
771 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
772 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
773 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_7),
774 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_2),
775 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_4, DA9xxx_REG_BUCK_BUCK2_7),
776};
777
778static const struct regmap_access_table da9121_2ch_writeable_table = {
779 .yes_ranges = da9121_2ch_writeable_ranges,
780 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_writeable_ranges),
781};
782
783
784static const struct regmap_range da9121_volatile_ranges[] = {
785 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2),
786 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
787 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
788};
789
790static const struct regmap_access_table da9121_volatile_table = {
791 .yes_ranges = da9121_volatile_ranges,
792 .n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges),
793};
794
795/* DA9121 regmap config for 1 channel variants */
796static struct regmap_config da9121_1ch_regmap_config = {
797 .reg_bits = 8,
798 .val_bits = 8,
799 .max_register = DA9121_REG_OTP_CONFIG_ID,
800 .rd_table = &da9121_1ch_readable_table,
801 .wr_table = &da9121_1ch_writeable_table,
802 .volatile_table = &da9121_volatile_table,
803 .cache_type = REGCACHE_RBTREE,
804};
805
806/* DA9121 regmap config for 2 channel variants */
807static struct regmap_config da9121_2ch_regmap_config = {
808 .reg_bits = 8,
809 .val_bits = 8,
810 .max_register = DA9121_REG_OTP_CONFIG_ID,
811 .rd_table = &da9121_2ch_readable_table,
812 .wr_table = &da9121_2ch_writeable_table,
813 .volatile_table = &da9121_volatile_table,
814 .cache_type = REGCACHE_RBTREE,
815};
816
817static int da9121_check_device_type(struct i2c_client *i2c, struct da9121 *chip)
818{
819 u32 device_id;
c860476b
AW		 820 u32 variant_id;
821 u8 variant_mrc, variant_vrc;
822 char *type;
c860476b
AW		 823 bool config_match = false;
824 int ret = 0;
825
826 ret = regmap_read(chip->regmap, DA9121_REG_OTP_DEVICE_ID, &device_id);
827 if (ret < 0) {
828 dev_err(chip->dev, "Cannot read device ID: %d\n", ret);
829 goto error;
830 }
831
832 ret = regmap_read(chip->regmap, DA9121_REG_OTP_VARIANT_ID, &variant_id);
833 if (ret < 0) {
834 dev_err(chip->dev, "Cannot read variant ID: %d\n", ret);
835 goto error;
836 }
837
838 if (device_id != DA9121_DEVICE_ID) {
839 dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
840 ret = -ENODEV;
841 goto error;
842 }
843
844 variant_vrc = variant_id & DA9121_MASK_OTP_VARIANT_ID_VRC;
845
013592be
AW		 846 switch (chip->subvariant_id) {
847 case DA9121_SUBTYPE_DA9121:
848 type = "DA9121";
849 config_match = (variant_vrc == DA9121_VARIANT_VRC);
c860476b 850 break;
013592be
AW		 851 case DA9121_SUBTYPE_DA9130:
852 type = "DA9130";
853 config_match = (variant_vrc == DA9130_VARIANT_VRC);
c860476b 854 break;
013592be
AW		 855 case DA9121_SUBTYPE_DA9220:
856 type = "DA9220";
857 config_match = (variant_vrc == DA9220_VARIANT_VRC);
c860476b 858 break;
013592be
AW		 859 case DA9121_SUBTYPE_DA9132:
860 type = "DA9132";
861 config_match = (variant_vrc == DA9132_VARIANT_VRC);
862 break;
863 case DA9121_SUBTYPE_DA9122:
864 type = "DA9122";
865 config_match = (variant_vrc == DA9122_VARIANT_VRC);
866 break;
867 case DA9121_SUBTYPE_DA9131:
868 type = "DA9131";
869 config_match = (variant_vrc == DA9131_VARIANT_VRC);
870 break;
871 case DA9121_SUBTYPE_DA9217:
c860476b 872 type = "DA9217";
013592be 873 config_match = (variant_vrc == DA9217_VARIANT_VRC);
c860476b
AW		 874 break;
875 default:
876 type = "Unknown";
877 break;
878 }
879
880 dev_info(chip->dev,
881 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n",
882 device_id, variant_id, type);
883
884 if (!config_match) {
416c29e9 885 dev_err(chip->dev, "Device tree configuration does not match detected device.\n");
c860476b
AW		 886 ret = -EINVAL;
887 goto error;
888 }
889
890 variant_mrc = (variant_id & DA9121_MASK_OTP_VARIANT_ID_MRC)
891 >> DA9121_SHIFT_OTP_VARIANT_ID_MRC;
892
893 if ((device_id == DA9121_DEVICE_ID) &&
894 (variant_mrc < DA9121_VARIANT_MRC_BASE)) {
895 dev_err(chip->dev,
896 "Cannot support variant MRC: 0x%02X\n", variant_mrc);
897 ret = -EINVAL;
898 }
899error:
900 return ret;
901}
902
903static int da9121_assign_chip_model(struct i2c_client *i2c,
904 struct da9121 *chip)
905{
906 struct regmap_config *regmap;
907 int ret = 0;
908
909 chip->dev = &i2c->dev;
910
013592be
AW		 911 /* Use configured subtype to select the regulator descriptor index and
912 * register map, common to both consumer and automotive grade variants
913 */
914 switch (chip->subvariant_id) {
915 case DA9121_SUBTYPE_DA9121:
916 case DA9121_SUBTYPE_DA9130:
917 chip->variant_id = DA9121_TYPE_DA9121_DA9130;
c860476b
AW		 918 regmap = &da9121_1ch_regmap_config;
919 break;
013592be
AW		 920 case DA9121_SUBTYPE_DA9217:
921 chip->variant_id = DA9121_TYPE_DA9217;
922 regmap = &da9121_1ch_regmap_config;
923 break;
924 case DA9121_SUBTYPE_DA9122:
925 case DA9121_SUBTYPE_DA9131:
926 chip->variant_id = DA9121_TYPE_DA9122_DA9131;
927 regmap = &da9121_2ch_regmap_config;
928 break;
929 case DA9121_SUBTYPE_DA9220:
930 case DA9121_SUBTYPE_DA9132:
931 chip->variant_id = DA9121_TYPE_DA9220_DA9132;
c860476b
AW		 932 regmap = &da9121_2ch_regmap_config;
933 break;
934 }
935
91863239
AW		 936 /* Set these up for of_regulator_match call which may want .of_map_modes */
937 da9121_matches[0].desc = local_da9121_regulators[chip->variant_id][0];
938 da9121_matches[1].desc = local_da9121_regulators[chip->variant_id][1];
939
c860476b
AW		 940 chip->regmap = devm_regmap_init_i2c(i2c, regmap);
941 if (IS_ERR(chip->regmap)) {
942 ret = PTR_ERR(chip->regmap);
943 dev_err(chip->dev, "Failed to configure a register map: %d\n",
944 ret);
8db06423 945 return ret;
c860476b
AW		 946 }
947
948 ret = da9121_check_device_type(i2c, chip);
949
950 return ret;
951}
952
40bb5b02
AW		 953static int da9121_config_irq(struct i2c_client *i2c,
954 struct da9121 *chip)
955{
956 unsigned int p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
957 const int mask_all[4] = { 0, 0, 0xFF, 0xFF };
958 int ret = 0;
959
960 chip->chip_irq = i2c->irq;
961
962 if (chip->chip_irq != 0) {
963 if (!of_property_read_u32(chip->dev->of_node,
964 "dlg,irq-polling-delay-passive-ms",
965 &p_delay)) {
966 if (p_delay < DA9121_MIN_POLLING_PERIOD_MS ||
967 p_delay > DA9121_MAX_POLLING_PERIOD_MS) {
968 dev_warn(chip->dev,
969 "Out-of-range polling period %d ms\n",
970 p_delay);
971 p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
972 }
973 }
974
975 chip->passive_delay = p_delay;
976
5e191d2e 977 ret = request_threaded_irq(chip->chip_irq, NULL,
40bb5b02
AW		 978 da9121_irq_handler,
979 IRQF_TRIGGER_LOW|IRQF_ONESHOT,
980 "da9121", chip);
981 if (ret != 0) {
982 dev_err(chip->dev, "Failed IRQ request: %d\n",
983 chip->chip_irq);
984 goto error;
985 }
986
987 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
988 if (ret != 0) {
989 dev_err(chip->dev, "Failed to set IRQ masks: %d\n",
990 ret);
5e191d2e 991 goto regmap_error;
40bb5b02
AW		 992 }
993
994 INIT_DELAYED_WORK(&chip->work, da9121_status_poll_on);
995 dev_info(chip->dev, "Interrupt polling period set at %d ms\n",
996 chip->passive_delay);
997 }
998error:
999 return ret;
5e191d2e
AW		 1000regmap_error:
1001 free_irq(chip->chip_irq, chip);
1002 return ret;
40bb5b02
AW		 1003}
1004
e6ff10f2 1005static const struct of_device_id da9121_dt_ids[] = {
013592be
AW		 1006 { .compatible = "dlg,da9121", .data = (void *) DA9121_SUBTYPE_DA9121 },
1007 { .compatible = "dlg,da9130", .data = (void *) DA9121_SUBTYPE_DA9130 },
1008 { .compatible = "dlg,da9217", .data = (void *) DA9121_SUBTYPE_DA9217 },
1009 { .compatible = "dlg,da9122", .data = (void *) DA9121_SUBTYPE_DA9122 },
1010 { .compatible = "dlg,da9131", .data = (void *) DA9121_SUBTYPE_DA9131 },
1011 { .compatible = "dlg,da9220", .data = (void *) DA9121_SUBTYPE_DA9220 },
1012 { .compatible = "dlg,da9132", .data = (void *) DA9121_SUBTYPE_DA9132 },
e6ff10f2
VW		 1013 { }
1014};
1015MODULE_DEVICE_TABLE(of, da9121_dt_ids);
1016
f3fbd556
AW		 1017static inline int da9121_of_get_id(struct device *dev)
1018{
1019 const struct of_device_id *id = of_match_device(da9121_dt_ids, dev);
1020
1021 if (!id) {
1022 dev_err(dev, "%s: Failed\n", __func__);
1023 return -EINVAL;
1024 }
1025 return (uintptr_t)id->data;
1026}
1027
e6ff10f2
VW		 1028static int da9121_i2c_probe(struct i2c_client *i2c,
1029 const struct i2c_device_id *id)
1030{
f3fbd556 1031 struct da9121 *chip;
40bb5b02 1032 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
f3fbd556 1033 int ret = 0;
e6ff10f2 1034
f3fbd556
AW		 1035 chip = devm_kzalloc(&i2c->dev, sizeof(struct da9121), GFP_KERNEL);
1036 if (!chip) {
1037 ret = -ENOMEM;
1038 goto error;
1039 }
1040
46c413d5 1041 chip->pdata = i2c->dev.platform_data;
013592be 1042 chip->subvariant_id = da9121_of_get_id(&i2c->dev);
f3fbd556 1043
c860476b
AW		 1044 ret = da9121_assign_chip_model(i2c, chip);
1045 if (ret < 0)
1046 goto error;
e6ff10f2 1047
40bb5b02
AW		 1048 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1049 if (ret != 0) {
1050 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1051 goto error;
1052 }
1053
9929900d 1054 ret = da9121_set_regulator_config(chip);
40bb5b02
AW		 1055 if (ret < 0)
1056 goto error;
1057
1058 ret = da9121_config_irq(i2c, chip);
e6ff10f2 1059
f3fbd556
AW		 1060error:
1061 return ret;
e6ff10f2
VW		 1062}
1063
40bb5b02
AW		 1064static int da9121_i2c_remove(struct i2c_client *i2c)
1065{
1066 struct da9121 *chip = i2c_get_clientdata(i2c);
1067 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
1068 int ret = 0;
1069
5e191d2e 1070 free_irq(chip->chip_irq, chip);
40bb5b02
AW		 1071 cancel_delayed_work_sync(&chip->work);
1072
1073 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1074 if (ret != 0)
1075 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1076 return ret;
1077}
1078
e6ff10f2 1079static const struct i2c_device_id da9121_i2c_id[] = {
f3fbd556
AW		 1080 {"da9121", DA9121_TYPE_DA9121_DA9130},
1081 {"da9130", DA9121_TYPE_DA9121_DA9130},
1082 {"da9217", DA9121_TYPE_DA9217},
1083 {"da9122", DA9121_TYPE_DA9122_DA9131},
1084 {"da9131", DA9121_TYPE_DA9122_DA9131},
1085 {"da9220", DA9121_TYPE_DA9220_DA9132},
1086 {"da9132", DA9121_TYPE_DA9220_DA9132},
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VW		 1087 {},
1088};
1089MODULE_DEVICE_TABLE(i2c, da9121_i2c_id);
1090
1091static struct i2c_driver da9121_regulator_driver = {
1092 .driver = {
1093 .name = "da9121",
1094 .of_match_table = of_match_ptr(da9121_dt_ids),
1095 },
1096 .probe = da9121_i2c_probe,
40bb5b02 1097 .remove = da9121_i2c_remove,
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VW		 1098 .id_table = da9121_i2c_id,
1099};
1100
1101module_i2c_driver(da9121_regulator_driver);
1102
1103MODULE_LICENSE("GPL v2");
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