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UBUNTU: Ubuntu-5.15.0-39.42
[mirror_ubuntu-jammy-kernel.git] / drivers / regulator / da9121-regulator.c
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e6ff10f2 1// SPDX-License-Identifier: GPL-2.0-only
c860476b
AW		 2//
3// DA9121 Single-channel dual-phase 10A buck converter
4//
5// Copyright (C) 2020 Axis Communications AB
6//
7// DA9130 Single-channel dual-phase 10A buck converter (Automotive)
8// DA9217 Single-channel dual-phase 6A buck converter
9// DA9122 Dual-channel single-phase 5A buck converter
10// DA9131 Dual-channel single-phase 5A buck converter (Automotive)
11// DA9220 Dual-channel single-phase 3A buck converter
12// DA9132 Dual-channel single-phase 3A buck converter (Automotive)
13//
14// Copyright (C) 2020 Dialog Semiconductor
e6ff10f2
VW		 15
16#include <linux/of_device.h>
46c413d5 17#include <linux/of_gpio.h>
b4b27776 18#include <linux/gpio/consumer.h>
e6ff10f2
VW		 19#include <linux/regulator/of_regulator.h>
20#include <linux/regulator/machine.h>
21#include <linux/regulator/driver.h>
22#include <linux/module.h>
23#include <linux/regmap.h>
24#include <linux/err.h>
25#include <linux/i2c.h>
c860476b 26#include <linux/regulator/da9121.h>
40bb5b02
AW		 27#include <linux/interrupt.h>
28#include <linux/workqueue.h>
c860476b 29
86f162c9 30#include "da9121-regulator.h"
e6ff10f2 31
f3fbd556
AW		 32/* Chip data */
33struct da9121 {
34 struct device *dev;
40bb5b02 35 struct delayed_work work;
46c413d5 36 struct da9121_pdata *pdata;
c860476b 37 struct regmap *regmap;
9929900d 38 struct regulator_dev *rdev[DA9121_IDX_MAX];
40bb5b02
AW		 39 unsigned int persistent[2];
40 unsigned int passive_delay;
41 int chip_irq;
f3fbd556 42 int variant_id;
013592be 43 int subvariant_id;
f3fbd556
AW		 44};
45
46c413d5
AW		 46/* Define ranges for different variants, enabling translation to/from
47 * registers. Maximums give scope to allow for transients.
48 */
49struct da9121_range {
50 int val_min;
51 int val_max;
52 int val_stp;
53 int reg_min;
54 int reg_max;
55};
56
c8dbf2f2 57static struct da9121_range da9121_10A_2phase_current = {
46c413d5
AW		 58 .val_min = 7000000,
59 .val_max = 20000000,
60 .val_stp = 1000000,
61 .reg_min = 1,
62 .reg_max = 14,
63};
64
c8dbf2f2 65static struct da9121_range da9121_6A_2phase_current = {
46c413d5
AW		 66 .val_min = 7000000,
67 .val_max = 12000000,
68 .val_stp = 1000000,
69 .reg_min = 1,
70 .reg_max = 6,
71};
72
c8dbf2f2 73static struct da9121_range da9121_5A_1phase_current = {
46c413d5
AW		 74 .val_min = 3500000,
75 .val_max = 10000000,
76 .val_stp = 500000,
77 .reg_min = 1,
78 .reg_max = 14,
79};
80
c8dbf2f2 81static struct da9121_range da9121_3A_1phase_current = {
46c413d5
AW		 82 .val_min = 3500000,
83 .val_max = 6000000,
84 .val_stp = 500000,
85 .reg_min = 1,
86 .reg_max = 6,
87};
88
89struct da9121_variant_info {
90 int num_bucks;
91 int num_phases;
92 struct da9121_range *current_range;
93};
94
95static const struct da9121_variant_info variant_parameters[] = {
96 { 1, 2, &da9121_10A_2phase_current }, //DA9121_TYPE_DA9121_DA9130
97 { 2, 1, &da9121_3A_1phase_current }, //DA9121_TYPE_DA9220_DA9132
98 { 2, 1, &da9121_5A_1phase_current }, //DA9121_TYPE_DA9122_DA9131
99 { 1, 2, &da9121_6A_2phase_current }, //DA9121_TYPE_DA9217
100};
101
5c4b62af
AW		 102struct da9121_field {
103 unsigned int reg;
104 unsigned int msk;
105};
106
107static const struct da9121_field da9121_current_field[2] = {
108 { DA9121_REG_BUCK_BUCK1_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
109 { DA9xxx_REG_BUCK_BUCK2_2, DA9121_MASK_BUCK_BUCKx_2_CHx_ILIM },
110};
111
65ac9704
AW		 112static const struct da9121_field da9121_mode_field[2] = {
113 { DA9121_REG_BUCK_BUCK1_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
114 { DA9xxx_REG_BUCK_BUCK2_4, DA9121_MASK_BUCK_BUCKx_4_CHx_A_MODE },
115};
116
40bb5b02
AW		 117struct status_event_data {
118 int buck_id; /* 0=core, 1/2-buck */
119 int reg_index; /* index for status/event/mask register selection */
120 int status_bit; /* bit masks... */
121 int event_bit;
122 int mask_bit;
123 unsigned long notification; /* Notification for status inception */
124 char *warn; /* if NULL, notify - otherwise dev_warn this string */
125};
126
127#define DA9121_STATUS(id, bank, name, notification, warning) \
128 { id, bank, \
129 DA9121_MASK_SYS_STATUS_##bank##_##name, \
130 DA9121_MASK_SYS_EVENT_##bank##_E_##name, \
131 DA9121_MASK_SYS_MASK_##bank##_M_##name, \
132 notification, warning }
133
134/* For second buck related event bits that are specific to DA9122, DA9220 variants */
135#define DA9xxx_STATUS(id, bank, name, notification, warning) \
136 { id, bank, \
137 DA9xxx_MASK_SYS_STATUS_##bank##_##name, \
138 DA9xxx_MASK_SYS_EVENT_##bank##_E_##name, \
139 DA9xxx_MASK_SYS_MASK_##bank##_M_##name, \
140 notification, warning }
141
142/* The status signals that may need servicing, depending on device variant.
143 * After assertion, they persist; so event is notified, the IRQ disabled,
144 * and status polled until clear again and IRQ is reenabled.
145 *
146 * SG/PG1/PG2 should be set when device first powers up and should never
147 * re-occur. When this driver starts, it is expected that these will have
148 * self-cleared for when the IRQs are enabled, so these should never be seen.
149 * If seen, the implication is that the device has reset.
150 *
151 * GPIO0/1/2 are not configured for use by default, so should not be seen.
152 */
c8dbf2f2 153static const struct status_event_data status_event_handling[] = {
40bb5b02
AW		 154 DA9xxx_STATUS(0, 0, SG, 0, "Handled E_SG\n"),
155 DA9121_STATUS(0, 0, TEMP_CRIT, (REGULATOR_EVENT_OVER_TEMP|REGULATOR_EVENT_DISABLE), NULL),
156 DA9121_STATUS(0, 0, TEMP_WARN, REGULATOR_EVENT_OVER_TEMP, NULL),
157 DA9121_STATUS(1, 1, PG1, 0, "Handled E_PG1\n"),
158 DA9121_STATUS(1, 1, OV1, REGULATOR_EVENT_REGULATION_OUT, NULL),
159 DA9121_STATUS(1, 1, UV1, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
160 DA9121_STATUS(1, 1, OC1, REGULATOR_EVENT_OVER_CURRENT, NULL),
161 DA9xxx_STATUS(2, 1, PG2, 0, "Handled E_PG2\n"),
162 DA9xxx_STATUS(2, 1, OV2, REGULATOR_EVENT_REGULATION_OUT, NULL),
163 DA9xxx_STATUS(2, 1, UV2, REGULATOR_EVENT_UNDER_VOLTAGE, NULL),
164 DA9xxx_STATUS(2, 1, OC2, REGULATOR_EVENT_OVER_CURRENT, NULL),
165 DA9121_STATUS(0, 2, GPIO0, 0, "Handled E_GPIO0\n"),
166 DA9121_STATUS(0, 2, GPIO1, 0, "Handled E_GPIO1\n"),
167 DA9121_STATUS(0, 2, GPIO2, 0, "Handled E_GPIO2\n"),
168};
169
5c4b62af
AW		 170static int da9121_get_current_limit(struct regulator_dev *rdev)
171{
172 struct da9121 *chip = rdev_get_drvdata(rdev);
173 int id = rdev_get_id(rdev);
174 struct da9121_range *range =
175 variant_parameters[chip->variant_id].current_range;
176 unsigned int val = 0;
177 int ret = 0;
178
179 ret = regmap_read(chip->regmap, da9121_current_field[id].reg, &val);
180 if (ret < 0) {
181 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
182 goto error;
183 }
184
185 if (val < range->reg_min) {
186 ret = -EACCES;
187 goto error;
188 }
189
190 if (val > range->reg_max) {
191 ret = -EINVAL;
192 goto error;
193 }
194
195 return range->val_min + (range->val_stp * (val - range->reg_min));
196error:
197 return ret;
198}
199
200static int da9121_ceiling_selector(struct regulator_dev *rdev,
201 int min, int max,
202 unsigned int *selector)
203{
204 struct da9121 *chip = rdev_get_drvdata(rdev);
205 struct da9121_range *range =
206 variant_parameters[chip->variant_id].current_range;
207 unsigned int level;
208 unsigned int i = 0;
209 unsigned int sel = 0;
210 int ret = 0;
211
212 if (range->val_min > max || range->val_max < min) {
213 dev_err(chip->dev,
214 "Requested current out of regulator capability\n");
215 ret = -EINVAL;
216 goto error;
217 }
218
219 level = range->val_max;
220 for (i = range->reg_max; i >= range->reg_min; i--) {
221 if (level <= max) {
222 sel = i;
223 break;
224 }
225 level -= range->val_stp;
226 }
227
228 if (level < min) {
229 dev_err(chip->dev,
230 "Best match falls below minimum requested current\n");
231 ret = -EINVAL;
232 goto error;
233 }
234
235 *selector = sel;
236error:
237 return ret;
238}
239
240static int da9121_set_current_limit(struct regulator_dev *rdev,
241 int min_ua, int max_ua)
242{
243 struct da9121 *chip = rdev_get_drvdata(rdev);
244 int id = rdev_get_id(rdev);
245 struct da9121_range *range =
246 variant_parameters[chip->variant_id].current_range;
247 unsigned int sel = 0;
248 int ret = 0;
249
250 if (min_ua < range->val_min ||
251 max_ua > range->val_max) {
252 ret = -EINVAL;
253 goto error;
254 }
255
5795f1b3
AW		 256 if (rdev->desc->ops->is_enabled(rdev)) {
257 ret = -EBUSY;
258 goto error;
259 }
260
5c4b62af
AW		 261 ret = da9121_ceiling_selector(rdev, min_ua, max_ua, &sel);
262 if (ret < 0)
263 goto error;
264
265 ret = regmap_update_bits(chip->regmap,
266 da9121_current_field[id].reg,
267 da9121_current_field[id].msk,
268 (unsigned int)sel);
269 if (ret < 0)
270 dev_err(chip->dev, "Cannot update BUCK current limit, err: %d\n", ret);
271
272error:
273 return ret;
274}
275
65ac9704
AW		 276static unsigned int da9121_map_mode(unsigned int mode)
277{
278 switch (mode) {
279 case DA9121_BUCK_MODE_FORCE_PWM:
280 return REGULATOR_MODE_FAST;
281 case DA9121_BUCK_MODE_FORCE_PWM_SHEDDING:
282 return REGULATOR_MODE_NORMAL;
283 case DA9121_BUCK_MODE_AUTO:
284 return REGULATOR_MODE_IDLE;
285 case DA9121_BUCK_MODE_FORCE_PFM:
286 return REGULATOR_MODE_STANDBY;
287 default:
0b1e5526 288 return REGULATOR_MODE_INVALID;
65ac9704
AW		 289 }
290}
291
292static int da9121_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
293{
294 struct da9121 *chip = rdev_get_drvdata(rdev);
295 int id = rdev_get_id(rdev);
296 unsigned int val;
297
298 switch (mode) {
299 case REGULATOR_MODE_FAST:
300 val = DA9121_BUCK_MODE_FORCE_PWM;
301 break;
302 case REGULATOR_MODE_NORMAL:
303 val = DA9121_BUCK_MODE_FORCE_PWM_SHEDDING;
304 break;
305 case REGULATOR_MODE_IDLE:
306 val = DA9121_BUCK_MODE_AUTO;
307 break;
308 case REGULATOR_MODE_STANDBY:
309 val = DA9121_BUCK_MODE_FORCE_PFM;
310 break;
311 default:
312 return -EINVAL;
313 }
314
315 return regmap_update_bits(chip->regmap,
316 da9121_mode_field[id].reg,
317 da9121_mode_field[id].msk,
318 val);
319}
320
321static unsigned int da9121_buck_get_mode(struct regulator_dev *rdev)
322{
323 struct da9121 *chip = rdev_get_drvdata(rdev);
324 int id = rdev_get_id(rdev);
0b1e5526 325 unsigned int val, mode;
65ac9704
AW		 326 int ret = 0;
327
328 ret = regmap_read(chip->regmap, da9121_mode_field[id].reg, &val);
329 if (ret < 0) {
330 dev_err(chip->dev, "Cannot read BUCK register: %d\n", ret);
331 return -EINVAL;
332 }
333
0b1e5526
AL		 334 mode = da9121_map_mode(val & da9121_mode_field[id].msk);
335 if (mode == REGULATOR_MODE_INVALID)
336 return -EINVAL;
337
338 return mode;
65ac9704
AW		 339}
340
e6ff10f2
VW		 341static const struct regulator_ops da9121_buck_ops = {
342 .enable = regulator_enable_regmap,
343 .disable = regulator_disable_regmap,
344 .is_enabled = regulator_is_enabled_regmap,
345 .set_voltage_sel = regulator_set_voltage_sel_regmap,
346 .get_voltage_sel = regulator_get_voltage_sel_regmap,
347 .list_voltage = regulator_list_voltage_linear,
5c4b62af
AW		 348 .get_current_limit = da9121_get_current_limit,
349 .set_current_limit = da9121_set_current_limit,
65ac9704
AW		 350 .set_mode = da9121_buck_set_mode,
351 .get_mode = da9121_buck_get_mode,
e6ff10f2
VW		 352};
353
91863239
AW		 354static struct of_regulator_match da9121_matches[] = {
355 [DA9121_IDX_BUCK1] = { .name = "buck1" },
356 [DA9121_IDX_BUCK2] = { .name = "buck2" },
357};
358
46c413d5
AW		 359static int da9121_of_parse_cb(struct device_node *np,
360 const struct regulator_desc *desc,
361 struct regulator_config *config)
362{
363 struct da9121 *chip = config->driver_data;
364 struct da9121_pdata *pdata;
365 struct gpio_desc *ena_gpiod;
366
367 if (chip->pdata == NULL) {
368 pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
369 if (!pdata)
370 return -ENOMEM;
371 } else {
372 pdata = chip->pdata;
373 }
374
375 pdata->num_buck++;
376
377 if (pdata->num_buck > variant_parameters[chip->variant_id].num_bucks) {
378 dev_err(chip->dev, "Error: excessive regulators for device\n");
379 return -ENODEV;
380 }
381
382 ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0,
383 GPIOD_OUT_HIGH |
384 GPIOD_FLAGS_BIT_NONEXCLUSIVE,
385 "da9121-enable");
386 if (!IS_ERR(ena_gpiod))
387 config->ena_gpiod = ena_gpiod;
388
389 if (variant_parameters[chip->variant_id].num_bucks == 2) {
390 uint32_t ripple_cancel;
391 uint32_t ripple_reg;
392 int ret;
393
9536ce63 394 if (of_property_read_u32(da9121_matches[pdata->num_buck-1].of_node,
46c413d5
AW		 395 "dlg,ripple-cancel", &ripple_cancel)) {
396 if (pdata->num_buck > 1)
397 ripple_reg = DA9xxx_REG_BUCK_BUCK2_7;
398 else
399 ripple_reg = DA9121_REG_BUCK_BUCK1_7;
400
401 ret = regmap_update_bits(chip->regmap, ripple_reg,
402 DA9xxx_MASK_BUCK_BUCKx_7_CHx_RIPPLE_CANCEL,
403 ripple_cancel);
404 if (ret < 0)
405 dev_err(chip->dev, "Cannot set ripple mode, err: %d\n", ret);
406 }
407 }
408
409 return 0;
410}
411
c860476b
AW		 412#define DA9121_MIN_MV 300
413#define DA9121_MAX_MV 1900
414#define DA9121_STEP_MV 10
415#define DA9121_MIN_SEL (DA9121_MIN_MV / DA9121_STEP_MV)
416#define DA9121_N_VOLTAGES (((DA9121_MAX_MV - DA9121_MIN_MV) / DA9121_STEP_MV) \
417 + 1 + DA9121_MIN_SEL)
418
e6ff10f2 419static const struct regulator_desc da9121_reg = {
91863239 420 .id = DA9121_IDX_BUCK1,
e6ff10f2
VW		 421 .name = "da9121",
422 .of_match = "buck1",
46c413d5 423 .of_parse_cb = da9121_of_parse_cb,
e6ff10f2 424 .owner = THIS_MODULE,
91863239 425 .regulators_node = of_match_ptr("regulators"),
65ac9704 426 .of_map_mode = da9121_map_mode,
e6ff10f2
VW		 427 .ops = &da9121_buck_ops,
428 .type = REGULATOR_VOLTAGE,
429 .n_voltages = DA9121_N_VOLTAGES,
430 .min_uV = DA9121_MIN_MV * 1000,
431 .uV_step = DA9121_STEP_MV * 1000,
432 .linear_min_sel = DA9121_MIN_SEL,
86f162c9
AW		 433 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
434 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
435 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
436 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
e6ff10f2
VW		 437 /* Default value of BUCK_BUCK1_0.CH1_SRC_DVC_UP */
438 .ramp_delay = 20000,
439 /* tBUCK_EN */
440 .enable_time = 20,
441};
442
91863239
AW		 443static const struct regulator_desc da9220_reg[2] = {
444 {
445 .id = DA9121_IDX_BUCK1,
446 .name = "DA9220/DA9132 BUCK1",
447 .of_match = "buck1",
46c413d5 448 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 449 .owner = THIS_MODULE,
450 .regulators_node = of_match_ptr("regulators"),
65ac9704 451 .of_map_mode = da9121_map_mode,
91863239
AW		 452 .ops = &da9121_buck_ops,
453 .type = REGULATOR_VOLTAGE,
454 .n_voltages = DA9121_N_VOLTAGES,
455 .min_uV = DA9121_MIN_MV * 1000,
456 .uV_step = DA9121_STEP_MV * 1000,
457 .linear_min_sel = DA9121_MIN_SEL,
458 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
459 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
460 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
461 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
462 },
463 {
464 .id = DA9121_IDX_BUCK2,
465 .name = "DA9220/DA9132 BUCK2",
466 .of_match = "buck2",
46c413d5 467 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 468 .owner = THIS_MODULE,
469 .regulators_node = of_match_ptr("regulators"),
65ac9704 470 .of_map_mode = da9121_map_mode,
91863239
AW		 471 .ops = &da9121_buck_ops,
472 .type = REGULATOR_VOLTAGE,
473 .n_voltages = DA9121_N_VOLTAGES,
474 .min_uV = DA9121_MIN_MV * 1000,
475 .uV_step = DA9121_STEP_MV * 1000,
476 .linear_min_sel = DA9121_MIN_SEL,
477 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
478 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
479 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
480 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
481 }
482};
483
484static const struct regulator_desc da9122_reg[2] = {
485 {
486 .id = DA9121_IDX_BUCK1,
487 .name = "DA9122/DA9131 BUCK1",
488 .of_match = "buck1",
46c413d5 489 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 490 .owner = THIS_MODULE,
491 .regulators_node = of_match_ptr("regulators"),
65ac9704 492 .of_map_mode = da9121_map_mode,
91863239
AW		 493 .ops = &da9121_buck_ops,
494 .type = REGULATOR_VOLTAGE,
495 .n_voltages = DA9121_N_VOLTAGES,
496 .min_uV = DA9121_MIN_MV * 1000,
497 .uV_step = DA9121_STEP_MV * 1000,
498 .linear_min_sel = DA9121_MIN_SEL,
499 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
500 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
501 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
502 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
503 },
504 {
505 .id = DA9121_IDX_BUCK2,
506 .name = "DA9122/DA9131 BUCK2",
507 .of_match = "buck2",
46c413d5 508 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 509 .owner = THIS_MODULE,
510 .regulators_node = of_match_ptr("regulators"),
65ac9704 511 .of_map_mode = da9121_map_mode,
91863239
AW		 512 .ops = &da9121_buck_ops,
513 .type = REGULATOR_VOLTAGE,
514 .n_voltages = DA9121_N_VOLTAGES,
515 .min_uV = DA9121_MIN_MV * 1000,
516 .uV_step = DA9121_STEP_MV * 1000,
517 .linear_min_sel = DA9121_MIN_SEL,
518 .enable_reg = DA9xxx_REG_BUCK_BUCK2_0,
519 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
520 .vsel_reg = DA9xxx_REG_BUCK_BUCK2_5,
521 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
522 }
523};
524
525static const struct regulator_desc da9217_reg = {
526 .id = DA9121_IDX_BUCK1,
527 .name = "DA9217 BUCK1",
528 .of_match = "buck1",
46c413d5 529 .of_parse_cb = da9121_of_parse_cb,
91863239
AW		 530 .owner = THIS_MODULE,
531 .regulators_node = of_match_ptr("regulators"),
65ac9704 532 .of_map_mode = da9121_map_mode,
91863239
AW		 533 .ops = &da9121_buck_ops,
534 .type = REGULATOR_VOLTAGE,
535 .n_voltages = DA9121_N_VOLTAGES,
536 .min_uV = DA9121_MIN_MV * 1000,
537 .uV_step = DA9121_STEP_MV * 1000,
538 .linear_min_sel = DA9121_MIN_SEL,
539 .enable_reg = DA9121_REG_BUCK_BUCK1_0,
540 .enable_mask = DA9121_MASK_BUCK_BUCKx_0_CHx_EN,
541 .vsel_reg = DA9121_REG_BUCK_BUCK1_5,
542 .vsel_mask = DA9121_MASK_BUCK_BUCKx_5_CHx_A_VOUT,
543};
544
545static const struct regulator_desc *local_da9121_regulators[][DA9121_IDX_MAX] = {
546 [DA9121_TYPE_DA9121_DA9130] = { &da9121_reg, NULL },
547 [DA9121_TYPE_DA9220_DA9132] = { &da9220_reg[0], &da9220_reg[1] },
548 [DA9121_TYPE_DA9122_DA9131] = { &da9122_reg[0], &da9122_reg[1] },
549 [DA9121_TYPE_DA9217] = { &da9217_reg, NULL },
550};
551
40bb5b02
AW		 552static void da9121_status_poll_on(struct work_struct *work)
553{
554 struct da9121 *chip = container_of(work, struct da9121, work.work);
555 int status[3] = {0};
556 int clear[3] = {0};
557 unsigned long delay;
558 int i;
559 int ret;
560
561 ret = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_STATUS_0, status, 2);
562 if (ret < 0) {
563 dev_err(chip->dev,
564 "Failed to read STATUS registers: %d\n", ret);
565 goto error;
566 }
567
568 /* Possible events are tested to be within range for the variant, potentially
569 * masked by the IRQ handler (not just warned about), as having been masked,
570 * and the respective state cleared - then flagged to unmask for next IRQ.
571 */
572 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
573 const struct status_event_data *item = &status_event_handling[i];
574 int reg_idx = item->reg_index;
575 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
576 bool supported = (item->warn == NULL);
577 bool persisting = (chip->persistent[reg_idx] & item->event_bit);
578 bool now_cleared = !(status[reg_idx] & item->status_bit);
579
580 if (relevant && supported && persisting && now_cleared) {
581 clear[reg_idx] |= item->mask_bit;
582 chip->persistent[reg_idx] &= ~item->event_bit;
583 }
584 }
585
586 for (i = 0; i < 2; i++) {
587 if (clear[i]) {
588 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
589 unsigned int mbit = clear[i];
590
591 ret = regmap_update_bits(chip->regmap, reg, mbit, 0);
592 if (ret < 0) {
593 dev_err(chip->dev,
594 "Failed to unmask 0x%02x %d\n",
595 reg, ret);
596 goto error;
597 }
598 }
599 }
600
601 if (chip->persistent[0] | chip->persistent[1]) {
602 delay = msecs_to_jiffies(chip->passive_delay);
603 queue_delayed_work(system_freezable_wq, &chip->work, delay);
604 }
605
606error:
607 return;
608}
609
610static irqreturn_t da9121_irq_handler(int irq, void *data)
611{
612 struct da9121 *chip = data;
613 struct regulator_dev *rdev;
614 int event[3] = {0};
615 int handled[3] = {0};
616 int mask[3] = {0};
617 int ret = IRQ_NONE;
618 int i;
619 int err;
620
621 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_EVENT_0, event, 3);
622 if (err < 0) {
623 dev_err(chip->dev, "Failed to read EVENT registers %d\n", err);
624 ret = IRQ_NONE;
625 goto error;
626 }
627
628 err = regmap_bulk_read(chip->regmap, DA9121_REG_SYS_MASK_0, mask, 3);
629 if (err < 0) {
630 dev_err(chip->dev,
631 "Failed to read MASK registers: %d\n", ret);
632 ret = IRQ_NONE;
633 goto error;
634 }
635
636 rdev = chip->rdev[DA9121_IDX_BUCK1];
637
638 /* Possible events are tested to be within range for the variant, currently
639 * enabled, and having triggered this IRQ. The event may then be notified,
640 * or a warning given for unexpected events - those from device POR, and
641 * currently unsupported GPIO configurations.
642 */
643 for (i = 0; i < ARRAY_SIZE(status_event_handling); i++) {
644 const struct status_event_data *item = &status_event_handling[i];
645 int reg_idx = item->reg_index;
646 bool relevant = (item->buck_id <= variant_parameters[chip->variant_id].num_bucks);
647 bool enabled = !(mask[reg_idx] & item->mask_bit);
648 bool active = (event[reg_idx] & item->event_bit);
649 bool notify = (item->warn == NULL);
650
651 if (relevant && enabled && active) {
652 if (notify) {
653 chip->persistent[reg_idx] |= item->event_bit;
654 regulator_notifier_call_chain(rdev, item->notification, NULL);
655 } else {
656 dev_warn(chip->dev, item->warn);
657 handled[reg_idx] |= item->event_bit;
658 ret = IRQ_HANDLED;
659 }
660 }
661 }
662
663 for (i = 0; i < 3; i++) {
664 if (event[i] != handled[i]) {
665 dev_warn(chip->dev,
666 "Unhandled event(s) in bank%d 0x%02x\n", i,
667 event[i] ^ handled[i]);
668 }
669 }
670
671 /* Mask the interrupts for persistent events OV, OC, UV, WARN, CRIT */
672 for (i = 0; i < 2; i++) {
673 if (handled[i]) {
674 unsigned int reg = DA9121_REG_SYS_MASK_0 + i;
675 unsigned int mbit = handled[i];
676
677 err = regmap_update_bits(chip->regmap, reg, mbit, mbit);
678 if (err < 0) {
679 dev_err(chip->dev,
680 "Failed to mask 0x%02x interrupt %d\n",
681 reg, err);
682 ret = IRQ_NONE;
683 goto error;
684 }
685 }
686 }
687
688 /* clear the events */
689 if (handled[0] | handled[1] | handled[2]) {
690 err = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_EVENT_0, handled, 3);
691 if (err < 0) {
692 dev_err(chip->dev, "Fail to write EVENTs %d\n", err);
693 ret = IRQ_NONE;
694 goto error;
695 }
696 }
697
698 queue_delayed_work(system_freezable_wq, &chip->work, 0);
699error:
700 return ret;
701}
702
9929900d
AW		 703static int da9121_set_regulator_config(struct da9121 *chip)
704{
705 struct regulator_config config = { };
706 unsigned int max_matches = variant_parameters[chip->variant_id].num_bucks;
707 int ret = 0;
708 int i;
709
710 for (i = 0; i < max_matches; i++) {
711 const struct regulator_desc *regl_desc =
712 local_da9121_regulators[chip->variant_id][i];
713
714 config.dev = chip->dev;
715 config.driver_data = chip;
716 config.regmap = chip->regmap;
717
718 chip->rdev[i] = devm_regulator_register(chip->dev,
719 regl_desc, &config);
720 if (IS_ERR(chip->rdev[i])) {
721 dev_err(chip->dev, "Failed to register regulator %s, %d/%d\n",
722 regl_desc->name, (i+1), max_matches);
723 ret = PTR_ERR(chip->rdev[i]);
724 goto error;
725 }
726 }
727
728error:
729 return ret;
730}
731
c860476b
AW		 732/* DA9121 chip register model */
733static const struct regmap_range da9121_1ch_readable_ranges[] = {
734 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
735 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
736 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
737 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
738 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
739};
740
741static const struct regmap_access_table da9121_1ch_readable_table = {
742 .yes_ranges = da9121_1ch_readable_ranges,
743 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_readable_ranges),
744};
745
746static const struct regmap_range da9121_2ch_readable_ranges[] = {
747 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_MASK_3),
748 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
749 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
750 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_7),
751 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_7),
752 regmap_reg_range(DA9121_REG_OTP_DEVICE_ID, DA9121_REG_OTP_CONFIG_ID),
753};
754
755static const struct regmap_access_table da9121_2ch_readable_table = {
756 .yes_ranges = da9121_2ch_readable_ranges,
757 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_readable_ranges),
758};
759
760static const struct regmap_range da9121_1ch_writeable_ranges[] = {
761 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
762 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
763 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
764 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
765 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_6),
766};
767
768static const struct regmap_access_table da9121_1ch_writeable_table = {
769 .yes_ranges = da9121_1ch_writeable_ranges,
770 .n_yes_ranges = ARRAY_SIZE(da9121_1ch_writeable_ranges),
771};
772
773static const struct regmap_range da9121_2ch_writeable_ranges[] = {
774 regmap_reg_range(DA9121_REG_SYS_EVENT_0, DA9121_REG_SYS_MASK_3),
775 regmap_reg_range(DA9121_REG_SYS_CONFIG_2, DA9121_REG_SYS_CONFIG_3),
776 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
777 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_2),
778 regmap_reg_range(DA9121_REG_BUCK_BUCK1_4, DA9121_REG_BUCK_BUCK1_7),
779 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_0, DA9xxx_REG_BUCK_BUCK2_2),
780 regmap_reg_range(DA9xxx_REG_BUCK_BUCK2_4, DA9xxx_REG_BUCK_BUCK2_7),
781};
782
783static const struct regmap_access_table da9121_2ch_writeable_table = {
784 .yes_ranges = da9121_2ch_writeable_ranges,
785 .n_yes_ranges = ARRAY_SIZE(da9121_2ch_writeable_ranges),
786};
787
788
789static const struct regmap_range da9121_volatile_ranges[] = {
790 regmap_reg_range(DA9121_REG_SYS_STATUS_0, DA9121_REG_SYS_EVENT_2),
791 regmap_reg_range(DA9121_REG_SYS_GPIO0_0, DA9121_REG_SYS_GPIO2_1),
792 regmap_reg_range(DA9121_REG_BUCK_BUCK1_0, DA9121_REG_BUCK_BUCK1_6),
793};
794
795static const struct regmap_access_table da9121_volatile_table = {
796 .yes_ranges = da9121_volatile_ranges,
797 .n_yes_ranges = ARRAY_SIZE(da9121_volatile_ranges),
798};
799
800/* DA9121 regmap config for 1 channel variants */
801static struct regmap_config da9121_1ch_regmap_config = {
802 .reg_bits = 8,
803 .val_bits = 8,
804 .max_register = DA9121_REG_OTP_CONFIG_ID,
805 .rd_table = &da9121_1ch_readable_table,
806 .wr_table = &da9121_1ch_writeable_table,
807 .volatile_table = &da9121_volatile_table,
808 .cache_type = REGCACHE_RBTREE,
809};
810
811/* DA9121 regmap config for 2 channel variants */
812static struct regmap_config da9121_2ch_regmap_config = {
813 .reg_bits = 8,
814 .val_bits = 8,
815 .max_register = DA9121_REG_OTP_CONFIG_ID,
816 .rd_table = &da9121_2ch_readable_table,
817 .wr_table = &da9121_2ch_writeable_table,
818 .volatile_table = &da9121_volatile_table,
819 .cache_type = REGCACHE_RBTREE,
820};
821
822static int da9121_check_device_type(struct i2c_client *i2c, struct da9121 *chip)
823{
824 u32 device_id;
c860476b
AW		 825 u32 variant_id;
826 u8 variant_mrc, variant_vrc;
827 char *type;
c860476b
AW		 828 bool config_match = false;
829 int ret = 0;
830
831 ret = regmap_read(chip->regmap, DA9121_REG_OTP_DEVICE_ID, &device_id);
832 if (ret < 0) {
833 dev_err(chip->dev, "Cannot read device ID: %d\n", ret);
834 goto error;
835 }
836
837 ret = regmap_read(chip->regmap, DA9121_REG_OTP_VARIANT_ID, &variant_id);
838 if (ret < 0) {
839 dev_err(chip->dev, "Cannot read variant ID: %d\n", ret);
840 goto error;
841 }
842
843 if (device_id != DA9121_DEVICE_ID) {
844 dev_err(chip->dev, "Invalid device ID: 0x%02x\n", device_id);
845 ret = -ENODEV;
846 goto error;
847 }
848
849 variant_vrc = variant_id & DA9121_MASK_OTP_VARIANT_ID_VRC;
850
013592be
AW		 851 switch (chip->subvariant_id) {
852 case DA9121_SUBTYPE_DA9121:
853 type = "DA9121";
854 config_match = (variant_vrc == DA9121_VARIANT_VRC);
c860476b 855 break;
013592be
AW		 856 case DA9121_SUBTYPE_DA9130:
857 type = "DA9130";
858 config_match = (variant_vrc == DA9130_VARIANT_VRC);
c860476b 859 break;
013592be
AW		 860 case DA9121_SUBTYPE_DA9220:
861 type = "DA9220";
862 config_match = (variant_vrc == DA9220_VARIANT_VRC);
c860476b 863 break;
013592be
AW		 864 case DA9121_SUBTYPE_DA9132:
865 type = "DA9132";
866 config_match = (variant_vrc == DA9132_VARIANT_VRC);
867 break;
868 case DA9121_SUBTYPE_DA9122:
869 type = "DA9122";
870 config_match = (variant_vrc == DA9122_VARIANT_VRC);
871 break;
872 case DA9121_SUBTYPE_DA9131:
873 type = "DA9131";
874 config_match = (variant_vrc == DA9131_VARIANT_VRC);
875 break;
876 case DA9121_SUBTYPE_DA9217:
c860476b 877 type = "DA9217";
013592be 878 config_match = (variant_vrc == DA9217_VARIANT_VRC);
c860476b
AW		 879 break;
880 default:
881 type = "Unknown";
882 break;
883 }
884
885 dev_info(chip->dev,
886 "Device detected (device-ID: 0x%02X, var-ID: 0x%02X, %s)\n",
887 device_id, variant_id, type);
888
889 if (!config_match) {
416c29e9 890 dev_err(chip->dev, "Device tree configuration does not match detected device.\n");
c860476b
AW		 891 ret = -EINVAL;
892 goto error;
893 }
894
895 variant_mrc = (variant_id & DA9121_MASK_OTP_VARIANT_ID_MRC)
896 >> DA9121_SHIFT_OTP_VARIANT_ID_MRC;
897
898 if ((device_id == DA9121_DEVICE_ID) &&
899 (variant_mrc < DA9121_VARIANT_MRC_BASE)) {
900 dev_err(chip->dev,
901 "Cannot support variant MRC: 0x%02X\n", variant_mrc);
902 ret = -EINVAL;
903 }
904error:
905 return ret;
906}
907
908static int da9121_assign_chip_model(struct i2c_client *i2c,
909 struct da9121 *chip)
910{
911 struct regmap_config *regmap;
912 int ret = 0;
913
914 chip->dev = &i2c->dev;
915
013592be
AW		 916 /* Use configured subtype to select the regulator descriptor index and
917 * register map, common to both consumer and automotive grade variants
918 */
919 switch (chip->subvariant_id) {
920 case DA9121_SUBTYPE_DA9121:
921 case DA9121_SUBTYPE_DA9130:
922 chip->variant_id = DA9121_TYPE_DA9121_DA9130;
c860476b
AW		 923 regmap = &da9121_1ch_regmap_config;
924 break;
013592be
AW		 925 case DA9121_SUBTYPE_DA9217:
926 chip->variant_id = DA9121_TYPE_DA9217;
927 regmap = &da9121_1ch_regmap_config;
928 break;
929 case DA9121_SUBTYPE_DA9122:
930 case DA9121_SUBTYPE_DA9131:
931 chip->variant_id = DA9121_TYPE_DA9122_DA9131;
932 regmap = &da9121_2ch_regmap_config;
933 break;
934 case DA9121_SUBTYPE_DA9220:
935 case DA9121_SUBTYPE_DA9132:
936 chip->variant_id = DA9121_TYPE_DA9220_DA9132;
c860476b
AW		 937 regmap = &da9121_2ch_regmap_config;
938 break;
939 }
940
91863239
AW		 941 /* Set these up for of_regulator_match call which may want .of_map_modes */
942 da9121_matches[0].desc = local_da9121_regulators[chip->variant_id][0];
943 da9121_matches[1].desc = local_da9121_regulators[chip->variant_id][1];
944
c860476b
AW		 945 chip->regmap = devm_regmap_init_i2c(i2c, regmap);
946 if (IS_ERR(chip->regmap)) {
947 ret = PTR_ERR(chip->regmap);
948 dev_err(chip->dev, "Failed to configure a register map: %d\n",
949 ret);
8db06423 950 return ret;
c860476b
AW		 951 }
952
953 ret = da9121_check_device_type(i2c, chip);
954
955 return ret;
956}
957
40bb5b02
AW		 958static int da9121_config_irq(struct i2c_client *i2c,
959 struct da9121 *chip)
960{
961 unsigned int p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
962 const int mask_all[4] = { 0, 0, 0xFF, 0xFF };
963 int ret = 0;
964
965 chip->chip_irq = i2c->irq;
966
967 if (chip->chip_irq != 0) {
968 if (!of_property_read_u32(chip->dev->of_node,
969 "dlg,irq-polling-delay-passive-ms",
970 &p_delay)) {
971 if (p_delay < DA9121_MIN_POLLING_PERIOD_MS ||
972 p_delay > DA9121_MAX_POLLING_PERIOD_MS) {
973 dev_warn(chip->dev,
974 "Out-of-range polling period %d ms\n",
975 p_delay);
976 p_delay = DA9121_DEFAULT_POLLING_PERIOD_MS;
977 }
978 }
979
980 chip->passive_delay = p_delay;
981
5e191d2e 982 ret = request_threaded_irq(chip->chip_irq, NULL,
40bb5b02
AW		 983 da9121_irq_handler,
984 IRQF_TRIGGER_LOW|IRQF_ONESHOT,
985 "da9121", chip);
986 if (ret != 0) {
987 dev_err(chip->dev, "Failed IRQ request: %d\n",
988 chip->chip_irq);
989 goto error;
990 }
991
992 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
993 if (ret != 0) {
994 dev_err(chip->dev, "Failed to set IRQ masks: %d\n",
995 ret);
5e191d2e 996 goto regmap_error;
40bb5b02
AW		 997 }
998
999 INIT_DELAYED_WORK(&chip->work, da9121_status_poll_on);
1000 dev_info(chip->dev, "Interrupt polling period set at %d ms\n",
1001 chip->passive_delay);
1002 }
1003error:
1004 return ret;
5e191d2e
AW		 1005regmap_error:
1006 free_irq(chip->chip_irq, chip);
1007 return ret;
40bb5b02
AW		 1008}
1009
e6ff10f2 1010static const struct of_device_id da9121_dt_ids[] = {
013592be
AW		 1011 { .compatible = "dlg,da9121", .data = (void *) DA9121_SUBTYPE_DA9121 },
1012 { .compatible = "dlg,da9130", .data = (void *) DA9121_SUBTYPE_DA9130 },
1013 { .compatible = "dlg,da9217", .data = (void *) DA9121_SUBTYPE_DA9217 },
1014 { .compatible = "dlg,da9122", .data = (void *) DA9121_SUBTYPE_DA9122 },
1015 { .compatible = "dlg,da9131", .data = (void *) DA9121_SUBTYPE_DA9131 },
1016 { .compatible = "dlg,da9220", .data = (void *) DA9121_SUBTYPE_DA9220 },
1017 { .compatible = "dlg,da9132", .data = (void *) DA9121_SUBTYPE_DA9132 },
e6ff10f2
VW		 1018 { }
1019};
1020MODULE_DEVICE_TABLE(of, da9121_dt_ids);
1021
f3fbd556
AW		 1022static inline int da9121_of_get_id(struct device *dev)
1023{
1024 const struct of_device_id *id = of_match_device(da9121_dt_ids, dev);
1025
1026 if (!id) {
1027 dev_err(dev, "%s: Failed\n", __func__);
1028 return -EINVAL;
1029 }
1030 return (uintptr_t)id->data;
1031}
1032
e6ff10f2
VW		 1033static int da9121_i2c_probe(struct i2c_client *i2c,
1034 const struct i2c_device_id *id)
1035{
f3fbd556 1036 struct da9121 *chip;
40bb5b02 1037 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
f3fbd556 1038 int ret = 0;
e6ff10f2 1039
f3fbd556
AW		 1040 chip = devm_kzalloc(&i2c->dev, sizeof(struct da9121), GFP_KERNEL);
1041 if (!chip) {
1042 ret = -ENOMEM;
1043 goto error;
1044 }
1045
46c413d5 1046 chip->pdata = i2c->dev.platform_data;
013592be 1047 chip->subvariant_id = da9121_of_get_id(&i2c->dev);
f3fbd556 1048
c860476b
AW		 1049 ret = da9121_assign_chip_model(i2c, chip);
1050 if (ret < 0)
1051 goto error;
e6ff10f2 1052
40bb5b02
AW		 1053 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1054 if (ret != 0) {
1055 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1056 goto error;
1057 }
1058
9929900d 1059 ret = da9121_set_regulator_config(chip);
40bb5b02
AW		 1060 if (ret < 0)
1061 goto error;
1062
1063 ret = da9121_config_irq(i2c, chip);
e6ff10f2 1064
f3fbd556
AW		 1065error:
1066 return ret;
e6ff10f2
VW		 1067}
1068
40bb5b02
AW		 1069static int da9121_i2c_remove(struct i2c_client *i2c)
1070{
1071 struct da9121 *chip = i2c_get_clientdata(i2c);
1072 const int mask_all[4] = { 0xFF, 0xFF, 0xFF, 0xFF };
1073 int ret = 0;
1074
5e191d2e 1075 free_irq(chip->chip_irq, chip);
40bb5b02
AW		 1076 cancel_delayed_work_sync(&chip->work);
1077
1078 ret = regmap_bulk_write(chip->regmap, DA9121_REG_SYS_MASK_0, mask_all, 4);
1079 if (ret != 0)
1080 dev_err(chip->dev, "Failed to set IRQ masks: %d\n", ret);
1081 return ret;
1082}
1083
e6ff10f2 1084static const struct i2c_device_id da9121_i2c_id[] = {
f3fbd556
AW		 1085 {"da9121", DA9121_TYPE_DA9121_DA9130},
1086 {"da9130", DA9121_TYPE_DA9121_DA9130},
1087 {"da9217", DA9121_TYPE_DA9217},
1088 {"da9122", DA9121_TYPE_DA9122_DA9131},
1089 {"da9131", DA9121_TYPE_DA9122_DA9131},
1090 {"da9220", DA9121_TYPE_DA9220_DA9132},
1091 {"da9132", DA9121_TYPE_DA9220_DA9132},
e6ff10f2
VW		 1092 {},
1093};
1094MODULE_DEVICE_TABLE(i2c, da9121_i2c_id);
1095
1096static struct i2c_driver da9121_regulator_driver = {
1097 .driver = {
1098 .name = "da9121",
1099 .of_match_table = of_match_ptr(da9121_dt_ids),
1100 },
1101 .probe = da9121_i2c_probe,
40bb5b02 1102 .remove = da9121_i2c_remove,
e6ff10f2
VW		 1103 .id_table = da9121_i2c_id,
1104};
1105
1106module_i2c_driver(da9121_regulator_driver);
1107
1108MODULE_LICENSE("GPL v2");
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