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5976f095 AL |
1 | /* |
2 | * Regulator driver for National Semiconductors LP3972 PMIC chip | |
3 | * | |
4 | * Based on lp3971.c | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | */ | |
11 | ||
12 | #include <linux/bug.h> | |
13 | #include <linux/err.h> | |
14 | #include <linux/i2c.h> | |
65602c32 | 15 | #include <linux/module.h> |
5976f095 AL |
16 | #include <linux/kernel.h> |
17 | #include <linux/regulator/driver.h> | |
18 | #include <linux/regulator/lp3972.h> | |
19 | #include <linux/slab.h> | |
20 | ||
21 | struct lp3972 { | |
22 | struct device *dev; | |
23 | struct mutex io_lock; | |
24 | struct i2c_client *i2c; | |
25 | int num_regulators; | |
26 | struct regulator_dev **rdev; | |
27 | }; | |
28 | ||
29 | /* LP3972 Control Registers */ | |
30 | #define LP3972_SCR_REG 0x07 | |
31 | #define LP3972_OVER1_REG 0x10 | |
32 | #define LP3972_OVSR1_REG 0x11 | |
33 | #define LP3972_OVER2_REG 0x12 | |
34 | #define LP3972_OVSR2_REG 0x13 | |
35 | #define LP3972_VCC1_REG 0x20 | |
36 | #define LP3972_ADTV1_REG 0x23 | |
37 | #define LP3972_ADTV2_REG 0x24 | |
38 | #define LP3972_AVRC_REG 0x25 | |
39 | #define LP3972_CDTC1_REG 0x26 | |
40 | #define LP3972_CDTC2_REG 0x27 | |
41 | #define LP3972_SDTV1_REG 0x29 | |
42 | #define LP3972_SDTV2_REG 0x2A | |
43 | #define LP3972_MDTV1_REG 0x32 | |
44 | #define LP3972_MDTV2_REG 0x33 | |
45 | #define LP3972_L2VCR_REG 0x39 | |
46 | #define LP3972_L34VCR_REG 0x3A | |
47 | #define LP3972_SCR1_REG 0x80 | |
48 | #define LP3972_SCR2_REG 0x81 | |
49 | #define LP3972_OEN3_REG 0x82 | |
50 | #define LP3972_OSR3_REG 0x83 | |
51 | #define LP3972_LOER4_REG 0x84 | |
52 | #define LP3972_B2TV_REG 0x85 | |
53 | #define LP3972_B3TV_REG 0x86 | |
54 | #define LP3972_B32RC_REG 0x87 | |
55 | #define LP3972_ISRA_REG 0x88 | |
56 | #define LP3972_BCCR_REG 0x89 | |
57 | #define LP3972_II1RR_REG 0x8E | |
58 | #define LP3972_II2RR_REG 0x8F | |
59 | ||
60 | #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG | |
61 | /* System control register 1 initial value, | |
62 | * bits 5, 6 and 7 are EPROM programmable */ | |
63 | #define SYS_CONTROL1_INIT_VAL 0x02 | |
64 | #define SYS_CONTROL1_INIT_MASK 0x1F | |
65 | ||
66 | #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG | |
67 | #define LP3972_VOL_CHANGE_FLAG_GO 0x01 | |
68 | #define LP3972_VOL_CHANGE_FLAG_MASK 0x03 | |
69 | ||
70 | /* LDO output enable mask */ | |
71 | #define LP3972_OEN3_L1EN BIT(0) | |
72 | #define LP3972_OVER2_LDO2_EN BIT(2) | |
73 | #define LP3972_OVER2_LDO3_EN BIT(3) | |
74 | #define LP3972_OVER2_LDO4_EN BIT(4) | |
75 | #define LP3972_OVER1_S_EN BIT(2) | |
76 | ||
77 | static const int ldo1_voltage_map[] = { | |
78 | 1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875, | |
79 | 1900, 1925, 1950, 1975, 2000, | |
80 | }; | |
81 | ||
82 | static const int ldo23_voltage_map[] = { | |
83 | 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, | |
84 | 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300, | |
85 | }; | |
86 | ||
87 | static const int ldo4_voltage_map[] = { | |
88 | 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350, | |
89 | 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300, | |
90 | }; | |
91 | ||
92 | static const int ldo5_voltage_map[] = { | |
93 | 0, 0, 0, 0, 0, 850, 875, 900, | |
94 | 925, 950, 975, 1000, 1025, 1050, 1075, 1100, | |
95 | 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300, | |
96 | 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500, | |
97 | }; | |
98 | ||
99 | static const int buck1_voltage_map[] = { | |
100 | 725, 750, 775, 800, 825, 850, 875, 900, | |
101 | 925, 950, 975, 1000, 1025, 1050, 1075, 1100, | |
102 | 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300, | |
103 | 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500, | |
104 | }; | |
105 | ||
106 | static const int buck23_voltage_map[] = { | |
107 | 0, 800, 850, 900, 950, 1000, 1050, 1100, | |
108 | 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500, | |
109 | 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800, | |
110 | 3000, 3300, | |
111 | }; | |
112 | ||
113 | static const int *ldo_voltage_map[] = { | |
114 | ldo1_voltage_map, | |
115 | ldo23_voltage_map, | |
116 | ldo23_voltage_map, | |
117 | ldo4_voltage_map, | |
118 | ldo5_voltage_map, | |
119 | }; | |
120 | ||
121 | static const int *buck_voltage_map[] = { | |
122 | buck1_voltage_map, | |
123 | buck23_voltage_map, | |
124 | buck23_voltage_map, | |
125 | }; | |
126 | ||
127 | static const int ldo_output_enable_mask[] = { | |
128 | LP3972_OEN3_L1EN, | |
129 | LP3972_OVER2_LDO2_EN, | |
130 | LP3972_OVER2_LDO3_EN, | |
131 | LP3972_OVER2_LDO4_EN, | |
132 | LP3972_OVER1_S_EN, | |
133 | }; | |
134 | ||
135 | static const int ldo_output_enable_addr[] = { | |
136 | LP3972_OEN3_REG, | |
137 | LP3972_OVER2_REG, | |
138 | LP3972_OVER2_REG, | |
139 | LP3972_OVER2_REG, | |
140 | LP3972_OVER1_REG, | |
141 | }; | |
142 | ||
143 | static const int ldo_vol_ctl_addr[] = { | |
144 | LP3972_MDTV1_REG, | |
145 | LP3972_L2VCR_REG, | |
146 | LP3972_L34VCR_REG, | |
147 | LP3972_L34VCR_REG, | |
148 | LP3972_SDTV1_REG, | |
149 | }; | |
150 | ||
151 | static const int buck_vol_enable_addr[] = { | |
152 | LP3972_OVER1_REG, | |
153 | LP3972_OEN3_REG, | |
154 | LP3972_OEN3_REG, | |
155 | }; | |
156 | ||
157 | static const int buck_base_addr[] = { | |
158 | LP3972_ADTV1_REG, | |
159 | LP3972_B2TV_REG, | |
160 | LP3972_B3TV_REG, | |
161 | }; | |
162 | ||
163 | #define LP3972_LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[x]) | |
164 | #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x]) | |
165 | #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x]) | |
166 | ||
167 | /* LDO voltage control registers shift: | |
168 | LP3972_LDO1 -> 0, LP3972_LDO2 -> 4 | |
169 | LP3972_LDO3 -> 0, LP3972_LDO4 -> 4 | |
170 | LP3972_LDO5 -> 0 | |
171 | */ | |
172 | #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2) | |
173 | #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x]) | |
174 | #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6) | |
175 | ||
176 | #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f) | |
177 | #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00) | |
178 | #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c) | |
179 | ||
180 | #define LP3972_BUCK_VOL_VALUE_MAP(x) (buck_voltage_map[x]) | |
181 | #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x]) | |
182 | #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x]) | |
183 | #define LP3972_BUCK_VOL_MASK 0x1f | |
184 | #define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00) | |
185 | #define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f) | |
186 | ||
187 | static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count, | |
188 | u16 *dest) | |
189 | { | |
190 | int ret; | |
191 | ||
192 | if (count != 1) | |
193 | return -EIO; | |
194 | ret = i2c_smbus_read_byte_data(i2c, reg); | |
195 | if (ret < 0) | |
993af7c0 | 196 | return ret; |
5976f095 AL |
197 | |
198 | *dest = ret; | |
199 | return 0; | |
200 | } | |
201 | ||
202 | static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count, | |
203 | const u16 *src) | |
204 | { | |
205 | if (count != 1) | |
206 | return -EIO; | |
207 | return i2c_smbus_write_byte_data(i2c, reg, *src); | |
208 | } | |
209 | ||
210 | static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg) | |
211 | { | |
212 | u16 val = 0; | |
213 | ||
214 | mutex_lock(&lp3972->io_lock); | |
215 | ||
216 | lp3972_i2c_read(lp3972->i2c, reg, 1, &val); | |
217 | ||
218 | dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, | |
993af7c0 | 219 | (unsigned)val & 0xff); |
5976f095 AL |
220 | |
221 | mutex_unlock(&lp3972->io_lock); | |
222 | ||
223 | return val & 0xff; | |
224 | } | |
225 | ||
226 | static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) | |
227 | { | |
228 | u16 tmp; | |
229 | int ret; | |
230 | ||
231 | mutex_lock(&lp3972->io_lock); | |
232 | ||
233 | ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp); | |
234 | tmp = (tmp & ~mask) | val; | |
235 | if (ret == 0) { | |
236 | ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp); | |
237 | dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, | |
993af7c0 | 238 | (unsigned)val & 0xff); |
5976f095 AL |
239 | } |
240 | mutex_unlock(&lp3972->io_lock); | |
241 | ||
242 | return ret; | |
243 | } | |
244 | ||
245 | static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index) | |
246 | { | |
247 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
24c896f5 AL |
248 | |
249 | if (index < LP3972_LDO_VOL_MIN_IDX(ldo) || | |
250 | index > LP3972_LDO_VOL_MAX_IDX(ldo)) | |
251 | return -EINVAL; | |
252 | ||
5976f095 AL |
253 | return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index]; |
254 | } | |
255 | ||
256 | static int lp3972_ldo_is_enabled(struct regulator_dev *dev) | |
257 | { | |
258 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
259 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
260 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); | |
261 | u16 val; | |
262 | ||
263 | val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo)); | |
264 | return !!(val & mask); | |
265 | } | |
266 | ||
267 | static int lp3972_ldo_enable(struct regulator_dev *dev) | |
268 | { | |
269 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
270 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
271 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); | |
272 | ||
273 | return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), | |
274 | mask, mask); | |
275 | } | |
276 | ||
277 | static int lp3972_ldo_disable(struct regulator_dev *dev) | |
278 | { | |
279 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
280 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
281 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); | |
282 | ||
283 | return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), | |
284 | mask, 0); | |
285 | } | |
286 | ||
287 | static int lp3972_ldo_get_voltage(struct regulator_dev *dev) | |
288 | { | |
289 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
290 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
291 | u16 mask = LP3972_LDO_VOL_MASK(ldo); | |
292 | u16 val, reg; | |
293 | ||
294 | reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo)); | |
295 | val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask; | |
296 | ||
297 | return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val]; | |
298 | } | |
299 | ||
24c896f5 AL |
300 | static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev, |
301 | unsigned int selector) | |
5976f095 AL |
302 | { |
303 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
304 | int ldo = rdev_get_id(dev) - LP3972_LDO1; | |
5976f095 AL |
305 | int shift, ret; |
306 | ||
5976f095 AL |
307 | shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo); |
308 | ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo), | |
24c896f5 | 309 | LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift); |
5976f095 AL |
310 | |
311 | if (ret) | |
312 | return ret; | |
313 | ||
993af7c0 AL |
314 | /* |
315 | * LDO1 and LDO5 support voltage control by either target voltage1 | |
316 | * or target voltage2 register. | |
317 | * We use target voltage1 register for LDO1 and LDO5 in this driver. | |
318 | * We need to update voltage change control register(0x20) to enable | |
319 | * LDO1 and LDO5 to change to their programmed target values. | |
320 | */ | |
5976f095 AL |
321 | switch (ldo) { |
322 | case LP3972_LDO1: | |
323 | case LP3972_LDO5: | |
324 | shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo); | |
325 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, | |
326 | LP3972_VOL_CHANGE_FLAG_MASK << shift, | |
327 | LP3972_VOL_CHANGE_FLAG_GO << shift); | |
328 | if (ret) | |
329 | return ret; | |
330 | ||
331 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, | |
332 | LP3972_VOL_CHANGE_FLAG_MASK << shift, 0); | |
333 | break; | |
334 | } | |
335 | ||
336 | return ret; | |
337 | } | |
338 | ||
339 | static struct regulator_ops lp3972_ldo_ops = { | |
340 | .list_voltage = lp3972_ldo_list_voltage, | |
341 | .is_enabled = lp3972_ldo_is_enabled, | |
342 | .enable = lp3972_ldo_enable, | |
343 | .disable = lp3972_ldo_disable, | |
344 | .get_voltage = lp3972_ldo_get_voltage, | |
24c896f5 | 345 | .set_voltage_sel = lp3972_ldo_set_voltage_sel, |
5976f095 AL |
346 | }; |
347 | ||
348 | static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index) | |
349 | { | |
350 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
24c896f5 AL |
351 | |
352 | if (index < LP3972_BUCK_VOL_MIN_IDX(buck) || | |
353 | index > LP3972_BUCK_VOL_MAX_IDX(buck)) | |
354 | return -EINVAL; | |
355 | ||
5976f095 AL |
356 | return 1000 * buck_voltage_map[buck][index]; |
357 | } | |
358 | ||
359 | static int lp3972_dcdc_is_enabled(struct regulator_dev *dev) | |
360 | { | |
361 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
362 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
363 | u16 mask = 1 << (buck * 2); | |
364 | u16 val; | |
365 | ||
366 | val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck)); | |
367 | return !!(val & mask); | |
368 | } | |
369 | ||
370 | static int lp3972_dcdc_enable(struct regulator_dev *dev) | |
371 | { | |
372 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
373 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
374 | u16 mask = 1 << (buck * 2); | |
375 | u16 val; | |
376 | ||
377 | val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), | |
378 | mask, mask); | |
379 | return val; | |
380 | } | |
381 | ||
382 | static int lp3972_dcdc_disable(struct regulator_dev *dev) | |
383 | { | |
384 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
385 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
386 | u16 mask = 1 << (buck * 2); | |
387 | u16 val; | |
388 | ||
389 | val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), | |
390 | mask, 0); | |
391 | return val; | |
392 | } | |
393 | ||
394 | static int lp3972_dcdc_get_voltage(struct regulator_dev *dev) | |
395 | { | |
396 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
397 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
398 | u16 reg; | |
399 | int val; | |
400 | ||
401 | reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck)); | |
402 | reg &= LP3972_BUCK_VOL_MASK; | |
403 | if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck)) | |
404 | val = 1000 * buck_voltage_map[buck][reg]; | |
405 | else { | |
406 | val = 0; | |
993af7c0 AL |
407 | dev_warn(&dev->dev, "chip reported incorrect voltage value." |
408 | " reg = %d\n", reg); | |
5976f095 AL |
409 | } |
410 | ||
411 | return val; | |
412 | } | |
413 | ||
24c896f5 AL |
414 | static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev, |
415 | unsigned int selector) | |
5976f095 AL |
416 | { |
417 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); | |
418 | int buck = rdev_get_id(dev) - LP3972_DCDC1; | |
5976f095 AL |
419 | int ret; |
420 | ||
5976f095 | 421 | ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck), |
24c896f5 | 422 | LP3972_BUCK_VOL_MASK, selector); |
5976f095 AL |
423 | if (ret) |
424 | return ret; | |
425 | ||
426 | if (buck != 0) | |
427 | return ret; | |
428 | ||
429 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, | |
430 | LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO); | |
431 | if (ret) | |
432 | return ret; | |
433 | ||
434 | return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, | |
435 | LP3972_VOL_CHANGE_FLAG_MASK, 0); | |
436 | } | |
437 | ||
438 | static struct regulator_ops lp3972_dcdc_ops = { | |
439 | .list_voltage = lp3972_dcdc_list_voltage, | |
440 | .is_enabled = lp3972_dcdc_is_enabled, | |
441 | .enable = lp3972_dcdc_enable, | |
442 | .disable = lp3972_dcdc_disable, | |
443 | .get_voltage = lp3972_dcdc_get_voltage, | |
24c896f5 | 444 | .set_voltage_sel = lp3972_dcdc_set_voltage_sel, |
5976f095 AL |
445 | }; |
446 | ||
1bdcf110 | 447 | static const struct regulator_desc regulators[] = { |
5976f095 AL |
448 | { |
449 | .name = "LDO1", | |
450 | .id = LP3972_LDO1, | |
451 | .ops = &lp3972_ldo_ops, | |
452 | .n_voltages = ARRAY_SIZE(ldo1_voltage_map), | |
453 | .type = REGULATOR_VOLTAGE, | |
454 | .owner = THIS_MODULE, | |
455 | }, | |
456 | { | |
457 | .name = "LDO2", | |
458 | .id = LP3972_LDO2, | |
459 | .ops = &lp3972_ldo_ops, | |
460 | .n_voltages = ARRAY_SIZE(ldo23_voltage_map), | |
461 | .type = REGULATOR_VOLTAGE, | |
462 | .owner = THIS_MODULE, | |
463 | }, | |
464 | { | |
465 | .name = "LDO3", | |
466 | .id = LP3972_LDO3, | |
467 | .ops = &lp3972_ldo_ops, | |
468 | .n_voltages = ARRAY_SIZE(ldo23_voltage_map), | |
469 | .type = REGULATOR_VOLTAGE, | |
470 | .owner = THIS_MODULE, | |
471 | }, | |
472 | { | |
473 | .name = "LDO4", | |
474 | .id = LP3972_LDO4, | |
475 | .ops = &lp3972_ldo_ops, | |
476 | .n_voltages = ARRAY_SIZE(ldo4_voltage_map), | |
477 | .type = REGULATOR_VOLTAGE, | |
478 | .owner = THIS_MODULE, | |
479 | }, | |
480 | { | |
481 | .name = "LDO5", | |
482 | .id = LP3972_LDO5, | |
483 | .ops = &lp3972_ldo_ops, | |
484 | .n_voltages = ARRAY_SIZE(ldo5_voltage_map), | |
485 | .type = REGULATOR_VOLTAGE, | |
486 | .owner = THIS_MODULE, | |
487 | }, | |
488 | { | |
489 | .name = "DCDC1", | |
490 | .id = LP3972_DCDC1, | |
491 | .ops = &lp3972_dcdc_ops, | |
492 | .n_voltages = ARRAY_SIZE(buck1_voltage_map), | |
493 | .type = REGULATOR_VOLTAGE, | |
494 | .owner = THIS_MODULE, | |
495 | }, | |
496 | { | |
497 | .name = "DCDC2", | |
498 | .id = LP3972_DCDC2, | |
499 | .ops = &lp3972_dcdc_ops, | |
500 | .n_voltages = ARRAY_SIZE(buck23_voltage_map), | |
501 | .type = REGULATOR_VOLTAGE, | |
502 | .owner = THIS_MODULE, | |
503 | }, | |
504 | { | |
505 | .name = "DCDC3", | |
506 | .id = LP3972_DCDC3, | |
507 | .ops = &lp3972_dcdc_ops, | |
508 | .n_voltages = ARRAY_SIZE(buck23_voltage_map), | |
509 | .type = REGULATOR_VOLTAGE, | |
510 | .owner = THIS_MODULE, | |
511 | }, | |
512 | }; | |
513 | ||
993af7c0 | 514 | static int __devinit setup_regulators(struct lp3972 *lp3972, |
5976f095 AL |
515 | struct lp3972_platform_data *pdata) |
516 | { | |
517 | int i, err; | |
518 | ||
519 | lp3972->num_regulators = pdata->num_regulators; | |
520 | lp3972->rdev = kcalloc(pdata->num_regulators, | |
521 | sizeof(struct regulator_dev *), GFP_KERNEL); | |
522 | if (!lp3972->rdev) { | |
523 | err = -ENOMEM; | |
524 | goto err_nomem; | |
525 | } | |
526 | ||
527 | /* Instantiate the regulators */ | |
528 | for (i = 0; i < pdata->num_regulators; i++) { | |
529 | struct lp3972_regulator_subdev *reg = &pdata->regulators[i]; | |
c172708d MB |
530 | struct regulator_config config = { }; |
531 | ||
532 | config.dev = lp3972->dev; | |
533 | config.init_data = reg->initdata; | |
534 | config.driver_data = lp3972; | |
5976f095 | 535 | |
c172708d MB |
536 | lp3972->rdev[i] = regulator_register(®ulators[reg->id], |
537 | &config); | |
5976f095 AL |
538 | if (IS_ERR(lp3972->rdev[i])) { |
539 | err = PTR_ERR(lp3972->rdev[i]); | |
540 | dev_err(lp3972->dev, "regulator init failed: %d\n", | |
541 | err); | |
542 | goto error; | |
543 | } | |
544 | } | |
545 | ||
546 | return 0; | |
547 | error: | |
548 | while (--i >= 0) | |
549 | regulator_unregister(lp3972->rdev[i]); | |
550 | kfree(lp3972->rdev); | |
551 | lp3972->rdev = NULL; | |
552 | err_nomem: | |
553 | return err; | |
554 | } | |
555 | ||
556 | static int __devinit lp3972_i2c_probe(struct i2c_client *i2c, | |
557 | const struct i2c_device_id *id) | |
558 | { | |
559 | struct lp3972 *lp3972; | |
560 | struct lp3972_platform_data *pdata = i2c->dev.platform_data; | |
561 | int ret; | |
562 | u16 val; | |
563 | ||
564 | if (!pdata) { | |
565 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); | |
566 | return -ENODEV; | |
567 | } | |
568 | ||
569 | lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL); | |
570 | if (!lp3972) | |
571 | return -ENOMEM; | |
572 | ||
573 | lp3972->i2c = i2c; | |
574 | lp3972->dev = &i2c->dev; | |
575 | ||
576 | mutex_init(&lp3972->io_lock); | |
577 | ||
578 | /* Detect LP3972 */ | |
579 | ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val); | |
993af7c0 AL |
580 | if (ret == 0 && |
581 | (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) { | |
5976f095 | 582 | ret = -ENODEV; |
993af7c0 AL |
583 | dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val); |
584 | } | |
5976f095 | 585 | if (ret < 0) { |
993af7c0 | 586 | dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret); |
5976f095 AL |
587 | goto err_detect; |
588 | } | |
589 | ||
590 | ret = setup_regulators(lp3972, pdata); | |
591 | if (ret < 0) | |
592 | goto err_detect; | |
593 | ||
594 | i2c_set_clientdata(i2c, lp3972); | |
595 | return 0; | |
596 | ||
597 | err_detect: | |
598 | kfree(lp3972); | |
599 | return ret; | |
600 | } | |
601 | ||
602 | static int __devexit lp3972_i2c_remove(struct i2c_client *i2c) | |
603 | { | |
604 | struct lp3972 *lp3972 = i2c_get_clientdata(i2c); | |
605 | int i; | |
606 | ||
607 | for (i = 0; i < lp3972->num_regulators; i++) | |
608 | regulator_unregister(lp3972->rdev[i]); | |
609 | kfree(lp3972->rdev); | |
610 | kfree(lp3972); | |
611 | ||
612 | return 0; | |
613 | } | |
614 | ||
615 | static const struct i2c_device_id lp3972_i2c_id[] = { | |
616 | { "lp3972", 0 }, | |
617 | { } | |
618 | }; | |
619 | MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id); | |
620 | ||
621 | static struct i2c_driver lp3972_i2c_driver = { | |
622 | .driver = { | |
623 | .name = "lp3972", | |
624 | .owner = THIS_MODULE, | |
625 | }, | |
626 | .probe = lp3972_i2c_probe, | |
627 | .remove = __devexit_p(lp3972_i2c_remove), | |
628 | .id_table = lp3972_i2c_id, | |
629 | }; | |
630 | ||
631 | static int __init lp3972_module_init(void) | |
632 | { | |
633 | return i2c_add_driver(&lp3972_i2c_driver); | |
634 | } | |
635 | subsys_initcall(lp3972_module_init); | |
636 | ||
637 | static void __exit lp3972_module_exit(void) | |
638 | { | |
639 | i2c_del_driver(&lp3972_i2c_driver); | |
640 | } | |
641 | module_exit(lp3972_module_exit); | |
642 | ||
643 | MODULE_LICENSE("GPL"); | |
644 | MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>"); | |
645 | MODULE_DESCRIPTION("LP3972 PMIC driver"); |