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af8b5fc3
KM		 1/*
2 * Copyright 2012 Texas Instruments
3 *
4 * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/i2c.h>
15#include <linux/regmap.h>
16#include <linux/err.h>
17#include <linux/gpio.h>
7e6213f4 18#include <linux/delay.h>
af8b5fc3
KM		 19#include <linux/regulator/lp872x.h>
20#include <linux/regulator/driver.h>
21#include <linux/platform_device.h>
00fd6e61
KM		 22#include <linux/of.h>
23#include <linux/of_gpio.h>
24#include <linux/regulator/of_regulator.h>
af8b5fc3
KM		 25
26/* Registers : LP8720/8725 shared */
27#define LP872X_GENERAL_CFG 0x00
28#define LP872X_LDO1_VOUT 0x01
29#define LP872X_LDO2_VOUT 0x02
30#define LP872X_LDO3_VOUT 0x03
31#define LP872X_LDO4_VOUT 0x04
32#define LP872X_LDO5_VOUT 0x05
33
34/* Registers : LP8720 */
35#define LP8720_BUCK_VOUT1 0x06
36#define LP8720_BUCK_VOUT2 0x07
37#define LP8720_ENABLE 0x08
38
39/* Registers : LP8725 */
40#define LP8725_LILO1_VOUT 0x06
41#define LP8725_LILO2_VOUT 0x07
42#define LP8725_BUCK1_VOUT1 0x08
43#define LP8725_BUCK1_VOUT2 0x09
44#define LP8725_BUCK2_VOUT1 0x0A
45#define LP8725_BUCK2_VOUT2 0x0B
46#define LP8725_BUCK_CTRL 0x0C
47#define LP8725_LDO_CTRL 0x0D
48
49/* Mask/shift : LP8720/LP8725 shared */
50#define LP872X_VOUT_M 0x1F
51#define LP872X_START_DELAY_M 0xE0
52#define LP872X_START_DELAY_S 5
53#define LP872X_EN_LDO1_M BIT(0)
54#define LP872X_EN_LDO2_M BIT(1)
55#define LP872X_EN_LDO3_M BIT(2)
56#define LP872X_EN_LDO4_M BIT(3)
57#define LP872X_EN_LDO5_M BIT(4)
58
59/* Mask/shift : LP8720 */
60#define LP8720_TIMESTEP_S 0 /* Addr 00h */
61#define LP8720_TIMESTEP_M BIT(0)
62#define LP8720_EXT_DVS_M BIT(2)
63#define LP8720_BUCK_FPWM_S 5 /* Addr 07h */
64#define LP8720_BUCK_FPWM_M BIT(5)
65#define LP8720_EN_BUCK_M BIT(5) /* Addr 08h */
66#define LP8720_DVS_SEL_M BIT(7)
67
68/* Mask/shift : LP8725 */
69#define LP8725_TIMESTEP_M 0xC0 /* Addr 00h */
70#define LP8725_TIMESTEP_S 6
71#define LP8725_BUCK1_EN_M BIT(0)
72#define LP8725_DVS1_M BIT(2)
73#define LP8725_DVS2_M BIT(3)
74#define LP8725_BUCK2_EN_M BIT(4)
75#define LP8725_BUCK_CL_M 0xC0 /* Addr 09h, 0Bh */
76#define LP8725_BUCK_CL_S 6
77#define LP8725_BUCK1_FPWM_S 1 /* Addr 0Ch */
78#define LP8725_BUCK1_FPWM_M BIT(1)
79#define LP8725_BUCK2_FPWM_S 5
80#define LP8725_BUCK2_FPWM_M BIT(5)
81#define LP8725_EN_LILO1_M BIT(5) /* Addr 0Dh */
82#define LP8725_EN_LILO2_M BIT(6)
83
84/* PWM mode */
85#define LP872X_FORCE_PWM 1
86#define LP872X_AUTO_PWM 0
87
88#define LP8720_NUM_REGULATORS 6
89#define LP8725_NUM_REGULATORS 9
90#define EXTERN_DVS_USED 0
91#define MAX_DELAY 6
92
b158fba6
KM		 93/* Default DVS Mode */
94#define LP8720_DEFAULT_DVS 0
95#define LP8725_DEFAULT_DVS BIT(2)
96
af8b5fc3
KM		 97/* dump registers in regmap-debugfs */
98#define MAX_REGISTERS 0x0F
99
100enum lp872x_id {
101 LP8720,
102 LP8725,
103};
104
105struct lp872x {
106 struct regmap *regmap;
107 struct device *dev;
108 enum lp872x_id chipid;
109 struct lp872x_platform_data *pdata;
af8b5fc3
KM		 110 int num_regulators;
111 enum lp872x_dvs_state dvs_pin;
af8b5fc3
KM		 112};
113
114/* LP8720/LP8725 shared voltage table for LDOs */
115static const unsigned int lp872x_ldo_vtbl[] = {
116 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, 1550000,
117 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000, 2000000,
118 2100000, 2200000, 2300000, 2400000, 2500000, 2600000, 2650000, 2700000,
119 2750000, 2800000, 2850000, 2900000, 2950000, 3000000, 3100000, 3300000,
120};
121
122/* LP8720 LDO4 voltage table */
123static const unsigned int lp8720_ldo4_vtbl[] = {
124 800000, 850000, 900000, 1000000, 1100000, 1200000, 1250000, 1300000,
125 1350000, 1400000, 1450000, 1500000, 1550000, 1600000, 1650000, 1700000,
126 1750000, 1800000, 1850000, 1900000, 2000000, 2100000, 2200000, 2300000,
127 2400000, 2500000, 2600000, 2650000, 2700000, 2750000, 2800000, 2850000,
128};
129
130/* LP8725 LILO(Low Input Low Output) voltage table */
131static const unsigned int lp8725_lilo_vtbl[] = {
132 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000,
133 1200000, 1250000, 1300000, 1350000, 1400000, 1500000, 1600000, 1700000,
134 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
135 2600000, 2700000, 2800000, 2850000, 2900000, 3000000, 3100000, 3300000,
136};
137
138/* LP8720 BUCK voltage table */
139#define EXT_R 0 /* external resistor divider */
140static const unsigned int lp8720_buck_vtbl[] = {
141 EXT_R, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
142 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
143 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000, 1900000,
144 1950000, 2000000, 2050000, 2100000, 2150000, 2200000, 2250000, 2300000,
145};
146
147/* LP8725 BUCK voltage table */
148static const unsigned int lp8725_buck_vtbl[] = {
149 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, 1150000,
150 1200000, 1250000, 1300000, 1350000, 1400000, 1500000, 1600000, 1700000,
151 1750000, 1800000, 1850000, 1900000, 2000000, 2100000, 2200000, 2300000,
152 2400000, 2500000, 2600000, 2700000, 2800000, 2850000, 2900000, 3000000,
153};
154
155/* LP8725 BUCK current limit */
156static const unsigned int lp8725_buck_uA[] = {
157 460000, 780000, 1050000, 1370000,
158};
159
160static int lp872x_read_byte(struct lp872x *lp, u8 addr, u8 *data)
161{
162 int ret;
163 unsigned int val;
164
165 ret = regmap_read(lp->regmap, addr, &val);
166 if (ret < 0) {
167 dev_err(lp->dev, "failed to read 0x%.2x\n", addr);
168 return ret;
169 }
170
171 *data = (u8)val;
172 return 0;
173}
174
175static inline int lp872x_write_byte(struct lp872x *lp, u8 addr, u8 data)
176{
177 return regmap_write(lp->regmap, addr, data);
178}
179
180static inline int lp872x_update_bits(struct lp872x *lp, u8 addr,
181 unsigned int mask, u8 data)
182{
183 return regmap_update_bits(lp->regmap, addr, mask, data);
184}
185
af8b5fc3
KM		 186static int lp872x_get_timestep_usec(struct lp872x *lp)
187{
188 enum lp872x_id chip = lp->chipid;
189 u8 val, mask, shift;
190 int *time_usec, size, ret;
191 int lp8720_time_usec[] = { 25, 50 };
192 int lp8725_time_usec[] = { 32, 64, 128, 256 };
193
194 switch (chip) {
195 case LP8720:
196 mask = LP8720_TIMESTEP_M;
197 shift = LP8720_TIMESTEP_S;
198 time_usec = &lp8720_time_usec[0];
199 size = ARRAY_SIZE(lp8720_time_usec);
200 break;
201 case LP8725:
202 mask = LP8725_TIMESTEP_M;
203 shift = LP8725_TIMESTEP_S;
204 time_usec = &lp8725_time_usec[0];
205 size = ARRAY_SIZE(lp8725_time_usec);
206 break;
207 default:
208 return -EINVAL;
209 }
210
211 ret = lp872x_read_byte(lp, LP872X_GENERAL_CFG, &val);
212 if (ret)
ad5ec6cd 213 return ret;
af8b5fc3
KM		 214
215 val = (val & mask) >> shift;
216 if (val >= size)
217 return -EINVAL;
218
219 return *(time_usec + val);
220}
221
222static int lp872x_regulator_enable_time(struct regulator_dev *rdev)
223{
224 struct lp872x *lp = rdev_get_drvdata(rdev);
2c129927 225 enum lp872x_regulator_id rid = rdev_get_id(rdev);
af8b5fc3 226 int time_step_us = lp872x_get_timestep_usec(lp);
2c129927 227 int ret;
af8b5fc3
KM		 228 u8 addr, val;
229
230 if (time_step_us < 0)
ad5ec6cd 231 return time_step_us;
af8b5fc3 232
2c129927
AL		 233 switch (rid) {
234 case LP8720_ID_LDO1 ... LP8720_ID_BUCK:
235 addr = LP872X_LDO1_VOUT + rid;
af8b5fc3 236 break;
2c129927
AL		 237 case LP8725_ID_LDO1 ... LP8725_ID_BUCK1:
238 addr = LP872X_LDO1_VOUT + rid - LP8725_ID_BASE;
af8b5fc3
KM		 239 break;
240 case LP8725_ID_BUCK2:
241 addr = LP8725_BUCK2_VOUT1;
242 break;
243 default:
244 return -EINVAL;
245 }
246
247 ret = lp872x_read_byte(lp, addr, &val);
248 if (ret)
249 return ret;
250
251 val = (val & LP872X_START_DELAY_M) >> LP872X_START_DELAY_S;
252
253 return val > MAX_DELAY ? 0 : val * time_step_us;
254}
255
9d6da6fc
KM		 256static void lp872x_set_dvs(struct lp872x *lp, enum lp872x_dvs_sel dvs_sel,
257 int gpio)
af8b5fc3 258{
af8b5fc3
KM		 259 enum lp872x_dvs_state state;
260
261 state = dvs_sel == SEL_V1 ? DVS_HIGH : DVS_LOW;
262 gpio_set_value(gpio, state);
263 lp->dvs_pin = state;
264}
265
266static u8 lp872x_select_buck_vout_addr(struct lp872x *lp,
267 enum lp872x_regulator_id buck)
268{
269 u8 val, addr;
270
271 if (lp872x_read_byte(lp, LP872X_GENERAL_CFG, &val))
272 return 0;
273
274 switch (buck) {
275 case LP8720_ID_BUCK:
276 if (val & LP8720_EXT_DVS_M) {
277 addr = (lp->dvs_pin == DVS_HIGH) ?
278 LP8720_BUCK_VOUT1 : LP8720_BUCK_VOUT2;
279 } else {
280 if (lp872x_read_byte(lp, LP8720_ENABLE, &val))
281 return 0;
282
283 addr = val & LP8720_DVS_SEL_M ?
284 LP8720_BUCK_VOUT1 : LP8720_BUCK_VOUT2;
285 }
286 break;
287 case LP8725_ID_BUCK1:
288 if (val & LP8725_DVS1_M)
289 addr = LP8725_BUCK1_VOUT1;
290 else
291 addr = (lp->dvs_pin == DVS_HIGH) ?
292 LP8725_BUCK1_VOUT1 : LP8725_BUCK1_VOUT2;
293 break;
294 case LP8725_ID_BUCK2:
295 addr = val & LP8725_DVS2_M ?
296 LP8725_BUCK2_VOUT1 : LP8725_BUCK2_VOUT2;
297 break;
298 default:
299 return 0;
300 }
301
302 return addr;
303}
304
305static bool lp872x_is_valid_buck_addr(u8 addr)
306{
307 switch (addr) {
308 case LP8720_BUCK_VOUT1:
309 case LP8720_BUCK_VOUT2:
310 case LP8725_BUCK1_VOUT1:
311 case LP8725_BUCK1_VOUT2:
312 case LP8725_BUCK2_VOUT1:
313 case LP8725_BUCK2_VOUT2:
314 return true;
315 default:
316 return false;
317 }
318}
319
320static int lp872x_buck_set_voltage_sel(struct regulator_dev *rdev,
321 unsigned selector)
322{
323 struct lp872x *lp = rdev_get_drvdata(rdev);
324 enum lp872x_regulator_id buck = rdev_get_id(rdev);
325 u8 addr, mask = LP872X_VOUT_M;
9d6da6fc 326 struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL;
af8b5fc3
KM		 327
328 if (dvs && gpio_is_valid(dvs->gpio))
9d6da6fc 329 lp872x_set_dvs(lp, dvs->vsel, dvs->gpio);
af8b5fc3
KM		 330
331 addr = lp872x_select_buck_vout_addr(lp, buck);
332 if (!lp872x_is_valid_buck_addr(addr))
333 return -EINVAL;
334
335 return lp872x_update_bits(lp, addr, mask, selector);
336}
337
338static int lp872x_buck_get_voltage_sel(struct regulator_dev *rdev)
339{
340 struct lp872x *lp = rdev_get_drvdata(rdev);
341 enum lp872x_regulator_id buck = rdev_get_id(rdev);
342 u8 addr, val;
343 int ret;
344
345 addr = lp872x_select_buck_vout_addr(lp, buck);
346 if (!lp872x_is_valid_buck_addr(addr))
347 return -EINVAL;
348
349 ret = lp872x_read_byte(lp, addr, &val);
350 if (ret)
351 return ret;
352
353 return val & LP872X_VOUT_M;
354}
355
356static int lp8725_buck_set_current_limit(struct regulator_dev *rdev,
357 int min_uA, int max_uA)
358{
359 struct lp872x *lp = rdev_get_drvdata(rdev);
360 enum lp872x_regulator_id buck = rdev_get_id(rdev);
4e1d67ed
AL		 361 int i;
362 u8 addr;
af8b5fc3
KM		 363
364 switch (buck) {
365 case LP8725_ID_BUCK1:
366 addr = LP8725_BUCK1_VOUT2;
367 break;
368 case LP8725_ID_BUCK2:
369 addr = LP8725_BUCK2_VOUT2;
370 break;
371 default:
372 return -EINVAL;
373 }
374
37a6f43d 375 for (i = ARRAY_SIZE(lp8725_buck_uA) - 1; i >= 0; i--) {
af8b5fc3
KM		 376 if (lp8725_buck_uA[i] >= min_uA &&
377 lp8725_buck_uA[i] <= max_uA)
4e1d67ed
AL		 378 return lp872x_update_bits(lp, addr,
379 LP8725_BUCK_CL_M,
380 i << LP8725_BUCK_CL_S);
381 }
af8b5fc3 382
4e1d67ed 383 return -EINVAL;
af8b5fc3
KM		 384}
385
386static int lp8725_buck_get_current_limit(struct regulator_dev *rdev)
387{
388 struct lp872x *lp = rdev_get_drvdata(rdev);
389 enum lp872x_regulator_id buck = rdev_get_id(rdev);
390 u8 addr, val;
391 int ret;
392
393 switch (buck) {
394 case LP8725_ID_BUCK1:
395 addr = LP8725_BUCK1_VOUT2;
396 break;
397 case LP8725_ID_BUCK2:
398 addr = LP8725_BUCK2_VOUT2;
399 break;
400 default:
401 return -EINVAL;
402 }
403
404 ret = lp872x_read_byte(lp, addr, &val);
405 if (ret)
406 return ret;
407
408 val = (val & LP8725_BUCK_CL_M) >> LP8725_BUCK_CL_S;
409
410 return (val < ARRAY_SIZE(lp8725_buck_uA)) ?
411 lp8725_buck_uA[val] : -EINVAL;
412}
413
414static int lp872x_buck_set_mode(struct regulator_dev *rdev, unsigned int mode)
415{
416 struct lp872x *lp = rdev_get_drvdata(rdev);
417 enum lp872x_regulator_id buck = rdev_get_id(rdev);
418 u8 addr, mask, shift, val;
419
420 switch (buck) {
421 case LP8720_ID_BUCK:
422 addr = LP8720_BUCK_VOUT2;
423 mask = LP8720_BUCK_FPWM_M;
424 shift = LP8720_BUCK_FPWM_S;
425 break;
426 case LP8725_ID_BUCK1:
427 addr = LP8725_BUCK_CTRL;
428 mask = LP8725_BUCK1_FPWM_M;
429 shift = LP8725_BUCK1_FPWM_S;
430 break;
431 case LP8725_ID_BUCK2:
432 addr = LP8725_BUCK_CTRL;
433 mask = LP8725_BUCK2_FPWM_M;
434 shift = LP8725_BUCK2_FPWM_S;
435 break;
436 default:
437 return -EINVAL;
438 }
439
440 if (mode == REGULATOR_MODE_FAST)
441 val = LP872X_FORCE_PWM << shift;
442 else if (mode == REGULATOR_MODE_NORMAL)
443 val = LP872X_AUTO_PWM << shift;
444 else
445 return -EINVAL;
446
447 return lp872x_update_bits(lp, addr, mask, val);
448}
449
450static unsigned int lp872x_buck_get_mode(struct regulator_dev *rdev)
451{
452 struct lp872x *lp = rdev_get_drvdata(rdev);
453 enum lp872x_regulator_id buck = rdev_get_id(rdev);
454 u8 addr, mask, val;
455 int ret;
456
457 switch (buck) {
458 case LP8720_ID_BUCK:
459 addr = LP8720_BUCK_VOUT2;
460 mask = LP8720_BUCK_FPWM_M;
461 break;
462 case LP8725_ID_BUCK1:
463 addr = LP8725_BUCK_CTRL;
464 mask = LP8725_BUCK1_FPWM_M;
465 break;
466 case LP8725_ID_BUCK2:
467 addr = LP8725_BUCK_CTRL;
468 mask = LP8725_BUCK2_FPWM_M;
469 break;
470 default:
471 return -EINVAL;
472 }
473
474 ret = lp872x_read_byte(lp, addr, &val);
475 if (ret)
476 return ret;
477
478 return val & mask ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
479}
480
481static struct regulator_ops lp872x_ldo_ops = {
482 .list_voltage = regulator_list_voltage_table,
a32f9e02 483 .map_voltage = regulator_map_voltage_ascend,
af8b5fc3
KM		 484 .set_voltage_sel = regulator_set_voltage_sel_regmap,
485 .get_voltage_sel = regulator_get_voltage_sel_regmap,
486 .enable = regulator_enable_regmap,
487 .disable = regulator_disable_regmap,
488 .is_enabled = regulator_is_enabled_regmap,
489 .enable_time = lp872x_regulator_enable_time,
490};
491
492static struct regulator_ops lp8720_buck_ops = {
493 .list_voltage = regulator_list_voltage_table,
a32f9e02 494 .map_voltage = regulator_map_voltage_ascend,
af8b5fc3
KM		 495 .set_voltage_sel = lp872x_buck_set_voltage_sel,
496 .get_voltage_sel = lp872x_buck_get_voltage_sel,
497 .enable = regulator_enable_regmap,
498 .disable = regulator_disable_regmap,
499 .is_enabled = regulator_is_enabled_regmap,
500 .enable_time = lp872x_regulator_enable_time,
501 .set_mode = lp872x_buck_set_mode,
502 .get_mode = lp872x_buck_get_mode,
503};
504
505static struct regulator_ops lp8725_buck_ops = {
506 .list_voltage = regulator_list_voltage_table,
a32f9e02 507 .map_voltage = regulator_map_voltage_ascend,
af8b5fc3
KM		 508 .set_voltage_sel = lp872x_buck_set_voltage_sel,
509 .get_voltage_sel = lp872x_buck_get_voltage_sel,
510 .enable = regulator_enable_regmap,
511 .disable = regulator_disable_regmap,
512 .is_enabled = regulator_is_enabled_regmap,
513 .enable_time = lp872x_regulator_enable_time,
514 .set_mode = lp872x_buck_set_mode,
515 .get_mode = lp872x_buck_get_mode,
516 .set_current_limit = lp8725_buck_set_current_limit,
517 .get_current_limit = lp8725_buck_get_current_limit,
518};
519
520static struct regulator_desc lp8720_regulator_desc[] = {
521 {
522 .name = "ldo1",
1f97fe47 523 .of_match = of_match_ptr("ldo1"),
af8b5fc3
KM		 524 .id = LP8720_ID_LDO1,
525 .ops = &lp872x_ldo_ops,
526 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
527 .volt_table = lp872x_ldo_vtbl,
528 .type = REGULATOR_VOLTAGE,
529 .owner = THIS_MODULE,
530 .vsel_reg = LP872X_LDO1_VOUT,
531 .vsel_mask = LP872X_VOUT_M,
532 .enable_reg = LP8720_ENABLE,
533 .enable_mask = LP872X_EN_LDO1_M,
534 },
535 {
536 .name = "ldo2",
1f97fe47 537 .of_match = of_match_ptr("ldo2"),
af8b5fc3
KM		 538 .id = LP8720_ID_LDO2,
539 .ops = &lp872x_ldo_ops,
540 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
541 .volt_table = lp872x_ldo_vtbl,
542 .type = REGULATOR_VOLTAGE,
543 .owner = THIS_MODULE,
544 .vsel_reg = LP872X_LDO2_VOUT,
545 .vsel_mask = LP872X_VOUT_M,
546 .enable_reg = LP8720_ENABLE,
547 .enable_mask = LP872X_EN_LDO2_M,
548 },
549 {
550 .name = "ldo3",
1f97fe47 551 .of_match = of_match_ptr("ldo3"),
af8b5fc3
KM		 552 .id = LP8720_ID_LDO3,
553 .ops = &lp872x_ldo_ops,
554 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
555 .volt_table = lp872x_ldo_vtbl,
556 .type = REGULATOR_VOLTAGE,
557 .owner = THIS_MODULE,
558 .vsel_reg = LP872X_LDO3_VOUT,
559 .vsel_mask = LP872X_VOUT_M,
560 .enable_reg = LP8720_ENABLE,
561 .enable_mask = LP872X_EN_LDO3_M,
562 },
563 {
564 .name = "ldo4",
1f97fe47 565 .of_match = of_match_ptr("ldo4"),
af8b5fc3
KM		 566 .id = LP8720_ID_LDO4,
567 .ops = &lp872x_ldo_ops,
568 .n_voltages = ARRAY_SIZE(lp8720_ldo4_vtbl),
569 .volt_table = lp8720_ldo4_vtbl,
570 .type = REGULATOR_VOLTAGE,
571 .owner = THIS_MODULE,
572 .vsel_reg = LP872X_LDO4_VOUT,
573 .vsel_mask = LP872X_VOUT_M,
574 .enable_reg = LP8720_ENABLE,
575 .enable_mask = LP872X_EN_LDO4_M,
576 },
577 {
578 .name = "ldo5",
1f97fe47 579 .of_match = of_match_ptr("ldo5"),
af8b5fc3
KM		 580 .id = LP8720_ID_LDO5,
581 .ops = &lp872x_ldo_ops,
582 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
583 .volt_table = lp872x_ldo_vtbl,
584 .type = REGULATOR_VOLTAGE,
585 .owner = THIS_MODULE,
586 .vsel_reg = LP872X_LDO5_VOUT,
587 .vsel_mask = LP872X_VOUT_M,
588 .enable_reg = LP8720_ENABLE,
589 .enable_mask = LP872X_EN_LDO5_M,
590 },
591 {
592 .name = "buck",
1f97fe47 593 .of_match = of_match_ptr("buck"),
af8b5fc3
KM		 594 .id = LP8720_ID_BUCK,
595 .ops = &lp8720_buck_ops,
596 .n_voltages = ARRAY_SIZE(lp8720_buck_vtbl),
597 .volt_table = lp8720_buck_vtbl,
598 .type = REGULATOR_VOLTAGE,
599 .owner = THIS_MODULE,
600 .enable_reg = LP8720_ENABLE,
601 .enable_mask = LP8720_EN_BUCK_M,
602 },
603};
604
605static struct regulator_desc lp8725_regulator_desc[] = {
606 {
607 .name = "ldo1",
1f97fe47 608 .of_match = of_match_ptr("ldo1"),
af8b5fc3
KM		 609 .id = LP8725_ID_LDO1,
610 .ops = &lp872x_ldo_ops,
611 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
612 .volt_table = lp872x_ldo_vtbl,
613 .type = REGULATOR_VOLTAGE,
614 .owner = THIS_MODULE,
615 .vsel_reg = LP872X_LDO1_VOUT,
616 .vsel_mask = LP872X_VOUT_M,
617 .enable_reg = LP8725_LDO_CTRL,
618 .enable_mask = LP872X_EN_LDO1_M,
619 },
620 {
621 .name = "ldo2",
1f97fe47 622 .of_match = of_match_ptr("ldo2"),
af8b5fc3
KM		 623 .id = LP8725_ID_LDO2,
624 .ops = &lp872x_ldo_ops,
625 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
626 .volt_table = lp872x_ldo_vtbl,
627 .type = REGULATOR_VOLTAGE,
628 .owner = THIS_MODULE,
629 .vsel_reg = LP872X_LDO2_VOUT,
630 .vsel_mask = LP872X_VOUT_M,
631 .enable_reg = LP8725_LDO_CTRL,
632 .enable_mask = LP872X_EN_LDO2_M,
633 },
634 {
635 .name = "ldo3",
1f97fe47 636 .of_match = of_match_ptr("ldo3"),
af8b5fc3
KM		 637 .id = LP8725_ID_LDO3,
638 .ops = &lp872x_ldo_ops,
639 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
640 .volt_table = lp872x_ldo_vtbl,
641 .type = REGULATOR_VOLTAGE,
642 .owner = THIS_MODULE,
643 .vsel_reg = LP872X_LDO3_VOUT,
644 .vsel_mask = LP872X_VOUT_M,
645 .enable_reg = LP8725_LDO_CTRL,
646 .enable_mask = LP872X_EN_LDO3_M,
647 },
648 {
649 .name = "ldo4",
1f97fe47 650 .of_match = of_match_ptr("ldo4"),
af8b5fc3
KM		 651 .id = LP8725_ID_LDO4,
652 .ops = &lp872x_ldo_ops,
653 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
654 .volt_table = lp872x_ldo_vtbl,
655 .type = REGULATOR_VOLTAGE,
656 .owner = THIS_MODULE,
657 .vsel_reg = LP872X_LDO4_VOUT,
658 .vsel_mask = LP872X_VOUT_M,
659 .enable_reg = LP8725_LDO_CTRL,
660 .enable_mask = LP872X_EN_LDO4_M,
661 },
662 {
663 .name = "ldo5",
1f97fe47 664 .of_match = of_match_ptr("ldo5"),
af8b5fc3
KM		 665 .id = LP8725_ID_LDO5,
666 .ops = &lp872x_ldo_ops,
667 .n_voltages = ARRAY_SIZE(lp872x_ldo_vtbl),
668 .volt_table = lp872x_ldo_vtbl,
669 .type = REGULATOR_VOLTAGE,
670 .owner = THIS_MODULE,
671 .vsel_reg = LP872X_LDO5_VOUT,
672 .vsel_mask = LP872X_VOUT_M,
673 .enable_reg = LP8725_LDO_CTRL,
674 .enable_mask = LP872X_EN_LDO5_M,
675 },
676 {
677 .name = "lilo1",
1f97fe47 678 .of_match = of_match_ptr("lilo1"),
af8b5fc3
KM		 679 .id = LP8725_ID_LILO1,
680 .ops = &lp872x_ldo_ops,
681 .n_voltages = ARRAY_SIZE(lp8725_lilo_vtbl),
682 .volt_table = lp8725_lilo_vtbl,
683 .type = REGULATOR_VOLTAGE,
684 .owner = THIS_MODULE,
685 .vsel_reg = LP8725_LILO1_VOUT,
686 .vsel_mask = LP872X_VOUT_M,
687 .enable_reg = LP8725_LDO_CTRL,
688 .enable_mask = LP8725_EN_LILO1_M,
689 },
690 {
691 .name = "lilo2",
1f97fe47 692 .of_match = of_match_ptr("lilo2"),
af8b5fc3
KM		 693 .id = LP8725_ID_LILO2,
694 .ops = &lp872x_ldo_ops,
695 .n_voltages = ARRAY_SIZE(lp8725_lilo_vtbl),
696 .volt_table = lp8725_lilo_vtbl,
697 .type = REGULATOR_VOLTAGE,
698 .owner = THIS_MODULE,
699 .vsel_reg = LP8725_LILO2_VOUT,
700 .vsel_mask = LP872X_VOUT_M,
701 .enable_reg = LP8725_LDO_CTRL,
702 .enable_mask = LP8725_EN_LILO2_M,
703 },
704 {
705 .name = "buck1",
1f97fe47 706 .of_match = of_match_ptr("buck1"),
af8b5fc3
KM		 707 .id = LP8725_ID_BUCK1,
708 .ops = &lp8725_buck_ops,
709 .n_voltages = ARRAY_SIZE(lp8725_buck_vtbl),
710 .volt_table = lp8725_buck_vtbl,
711 .type = REGULATOR_VOLTAGE,
712 .owner = THIS_MODULE,
713 .enable_reg = LP872X_GENERAL_CFG,
714 .enable_mask = LP8725_BUCK1_EN_M,
715 },
716 {
717 .name = "buck2",
1f97fe47 718 .of_match = of_match_ptr("buck2"),
af8b5fc3
KM		 719 .id = LP8725_ID_BUCK2,
720 .ops = &lp8725_buck_ops,
721 .n_voltages = ARRAY_SIZE(lp8725_buck_vtbl),
722 .volt_table = lp8725_buck_vtbl,
723 .type = REGULATOR_VOLTAGE,
724 .owner = THIS_MODULE,
725 .enable_reg = LP872X_GENERAL_CFG,
726 .enable_mask = LP8725_BUCK2_EN_M,
727 },
728};
729
af8b5fc3
KM		 730static int lp872x_init_dvs(struct lp872x *lp)
731{
732 int ret, gpio;
b158fba6 733 struct lp872x_dvs *dvs = lp->pdata ? lp->pdata->dvs : NULL;
af8b5fc3 734 enum lp872x_dvs_state pinstate;
b158fba6
KM		 735 u8 mask[] = { LP8720_EXT_DVS_M, LP8725_DVS1_M | LP8725_DVS2_M };
736 u8 default_dvs_mode[] = { LP8720_DEFAULT_DVS, LP8725_DEFAULT_DVS };
737
738 if (!dvs)
739 goto set_default_dvs_mode;
af8b5fc3 740
af8b5fc3 741 gpio = dvs->gpio;
690f44ba 742 if (!gpio_is_valid(gpio))
00fd6e61 743 goto set_default_dvs_mode;
af8b5fc3
KM		 744
745 pinstate = dvs->init_state;
746 ret = devm_gpio_request_one(lp->dev, gpio, pinstate, "LP872X DVS");
747 if (ret) {
748 dev_err(lp->dev, "gpio request err: %d\n", ret);
749 return ret;
750 }
751
752 lp->dvs_pin = pinstate;
af8b5fc3
KM		 753
754 return 0;
b158fba6
KM		 755
756set_default_dvs_mode:
757 return lp872x_update_bits(lp, LP872X_GENERAL_CFG, mask[lp->chipid],
758 default_dvs_mode[lp->chipid]);
af8b5fc3
KM		 759}
760
7e6213f4
PK		 761static int lp872x_hw_enable(struct lp872x *lp)
762{
763 int ret, gpio;
764
765 if (!lp->pdata)
766 return -EINVAL;
767
768 gpio = lp->pdata->enable_gpio;
769 if (!gpio_is_valid(gpio))
770 return 0;
771
772 /* Always set enable GPIO high. */
773 ret = devm_gpio_request_one(lp->dev, gpio, GPIOF_OUT_INIT_HIGH, "LP872X EN");
774 if (ret) {
775 dev_err(lp->dev, "gpio request err: %d\n", ret);
776 return ret;
777 }
778
779 /* Each chip has a different enable delay. */
780 if (lp->chipid == LP8720)
781 usleep_range(LP8720_ENABLE_DELAY, 1.5 * LP8720_ENABLE_DELAY);
782 else
783 usleep_range(LP8725_ENABLE_DELAY, 1.5 * LP8725_ENABLE_DELAY);
784
785 return 0;
786}
787
af8b5fc3
KM		 788static int lp872x_config(struct lp872x *lp)
789{
790 struct lp872x_platform_data *pdata = lp->pdata;
791 int ret;
792
86b3fef0
KM		 793 if (!pdata || !pdata->update_config)
794 goto init_dvs;
af8b5fc3
KM		 795
796 ret = lp872x_write_byte(lp, LP872X_GENERAL_CFG, pdata->general_config);
797 if (ret)
798 return ret;
799
86b3fef0 800init_dvs:
af8b5fc3
KM		 801 return lp872x_init_dvs(lp);
802}
803
804static struct regulator_init_data
5bae0628 805*lp872x_find_regulator_init_data(int id, struct lp872x *lp)
af8b5fc3 806{
9ffaa868 807 struct lp872x_platform_data *pdata = lp->pdata;
5bae0628 808 int i;
af8b5fc3 809
9ffaa868
KM		 810 if (!pdata)
811 return NULL;
812
5bae0628 813 for (i = 0; i < lp->num_regulators; i++) {
9ffaa868
KM		 814 if (pdata->regulator_data[i].id == id)
815 return pdata->regulator_data[i].init_data;
5bae0628 816 }
af8b5fc3 817
5bae0628 818 return NULL;
af8b5fc3
KM		 819}
820
821static int lp872x_regulator_register(struct lp872x *lp)
822{
823 struct regulator_desc *desc;
824 struct regulator_config cfg = { };
825 struct regulator_dev *rdev;
ed602534 826 int i;
af8b5fc3 827
37a6f43d 828 for (i = 0; i < lp->num_regulators; i++) {
af8b5fc3
KM		 829 desc = (lp->chipid == LP8720) ? &lp8720_regulator_desc[i] :
830 &lp8725_regulator_desc[i];
831
832 cfg.dev = lp->dev;
5bae0628 833 cfg.init_data = lp872x_find_regulator_init_data(desc->id, lp);
af8b5fc3
KM		 834 cfg.driver_data = lp;
835 cfg.regmap = lp->regmap;
836
ed602534 837 rdev = devm_regulator_register(lp->dev, desc, &cfg);
af8b5fc3
KM		 838 if (IS_ERR(rdev)) {
839 dev_err(lp->dev, "regulator register err");
ed602534 840 return PTR_ERR(rdev);
af8b5fc3 841 }
af8b5fc3
KM		 842 }
843
844 return 0;
af8b5fc3
KM		 845}
846
847static const struct regmap_config lp872x_regmap_config = {
848 .reg_bits = 8,
849 .val_bits = 8,
850 .max_register = MAX_REGISTERS,
851};
852
00fd6e61
KM		 853#ifdef CONFIG_OF
854
855#define LP872X_VALID_OPMODE (REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL)
856
857static struct of_regulator_match lp8720_matches[] = {
858 { .name = "ldo1", .driver_data = (void *)LP8720_ID_LDO1, },
859 { .name = "ldo2", .driver_data = (void *)LP8720_ID_LDO2, },
860 { .name = "ldo3", .driver_data = (void *)LP8720_ID_LDO3, },
861 { .name = "ldo4", .driver_data = (void *)LP8720_ID_LDO4, },
862 { .name = "ldo5", .driver_data = (void *)LP8720_ID_LDO5, },
863 { .name = "buck", .driver_data = (void *)LP8720_ID_BUCK, },
864};
865
866static struct of_regulator_match lp8725_matches[] = {
867 { .name = "ldo1", .driver_data = (void *)LP8725_ID_LDO1, },
868 { .name = "ldo2", .driver_data = (void *)LP8725_ID_LDO2, },
869 { .name = "ldo3", .driver_data = (void *)LP8725_ID_LDO3, },
870 { .name = "ldo4", .driver_data = (void *)LP8725_ID_LDO4, },
871 { .name = "ldo5", .driver_data = (void *)LP8725_ID_LDO5, },
872 { .name = "lilo1", .driver_data = (void *)LP8725_ID_LILO1, },
873 { .name = "lilo2", .driver_data = (void *)LP8725_ID_LILO2, },
874 { .name = "buck1", .driver_data = (void *)LP8725_ID_BUCK1, },
875 { .name = "buck2", .driver_data = (void *)LP8725_ID_BUCK2, },
876};
877
878static struct lp872x_platform_data
879*lp872x_populate_pdata_from_dt(struct device *dev, enum lp872x_id which)
880{
881 struct device_node *np = dev->of_node;
882 struct lp872x_platform_data *pdata;
883 struct of_regulator_match *match;
00fd6e61
KM		 884 int num_matches;
885 int count;
886 int i;
887 u8 dvs_state;
888
889 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
890 if (!pdata)
804486b1 891 return ERR_PTR(-ENOMEM);
00fd6e61
KM		 892
893 of_property_read_u8(np, "ti,general-config", &pdata->general_config);
894 if (of_find_property(np, "ti,update-config", NULL))
895 pdata->update_config = true;
896
897 pdata->dvs = devm_kzalloc(dev, sizeof(struct lp872x_dvs), GFP_KERNEL);
898 if (!pdata->dvs)
804486b1 899 return ERR_PTR(-ENOMEM);
00fd6e61
KM		 900
901 pdata->dvs->gpio = of_get_named_gpio(np, "ti,dvs-gpio", 0);
902 of_property_read_u8(np, "ti,dvs-vsel", (u8 *)&pdata->dvs->vsel);
903 of_property_read_u8(np, "ti,dvs-state", &dvs_state);
904 pdata->dvs->init_state = dvs_state ? DVS_HIGH : DVS_LOW;
905
7e6213f4
PK		 906 pdata->enable_gpio = of_get_named_gpio(np, "enable-gpios", 0);
907
00fd6e61
KM		 908 if (of_get_child_count(np) == 0)
909 goto out;
910
911 switch (which) {
912 case LP8720:
913 match = lp8720_matches;
914 num_matches = ARRAY_SIZE(lp8720_matches);
915 break;
916 case LP8725:
917 match = lp8725_matches;
918 num_matches = ARRAY_SIZE(lp8725_matches);
919 break;
920 default:
921 goto out;
922 }
923
924 count = of_regulator_match(dev, np, match, num_matches);
925 if (count <= 0)
926 goto out;
927
928 for (i = 0; i < num_matches; i++) {
37a6f43d
MK		 929 pdata->regulator_data[i].id =
930 (enum lp872x_regulator_id)match[i].driver_data;
00fd6e61 931 pdata->regulator_data[i].init_data = match[i].init_data;
00fd6e61
KM		 932 }
933out:
934 return pdata;
935}
936#else
937static struct lp872x_platform_data
938*lp872x_populate_pdata_from_dt(struct device *dev, enum lp872x_id which)
939{
940 return NULL;
941}
942#endif
943
af8b5fc3
KM		 944static int lp872x_probe(struct i2c_client *cl, const struct i2c_device_id *id)
945{
946 struct lp872x *lp;
d9ffae15 947 struct lp872x_platform_data *pdata;
8538c407 948 int ret;
af8b5fc3
KM		 949 const int lp872x_num_regulators[] = {
950 [LP8720] = LP8720_NUM_REGULATORS,
951 [LP8725] = LP8725_NUM_REGULATORS,
952 };
953
804486b1 954 if (cl->dev.of_node) {
d9ffae15 955 pdata = lp872x_populate_pdata_from_dt(&cl->dev,
00fd6e61 956 (enum lp872x_id)id->driver_data);
804486b1
MK		 957 if (IS_ERR(pdata))
958 return PTR_ERR(pdata);
959 } else {
d9ffae15 960 pdata = dev_get_platdata(&cl->dev);
804486b1 961 }
00fd6e61 962
af8b5fc3
KM		 963 lp = devm_kzalloc(&cl->dev, sizeof(struct lp872x), GFP_KERNEL);
964 if (!lp)
8538c407 965 return -ENOMEM;
af8b5fc3 966
8538c407 967 lp->num_regulators = lp872x_num_regulators[id->driver_data];
af8b5fc3
KM		 968
969 lp->regmap = devm_regmap_init_i2c(cl, &lp872x_regmap_config);
970 if (IS_ERR(lp->regmap)) {
971 ret = PTR_ERR(lp->regmap);
972 dev_err(&cl->dev, "regmap init i2c err: %d\n", ret);
8538c407 973 return ret;
af8b5fc3
KM		 974 }
975
976 lp->dev = &cl->dev;
d9ffae15 977 lp->pdata = pdata;
af8b5fc3 978 lp->chipid = id->driver_data;
af8b5fc3
KM		 979 i2c_set_clientdata(cl, lp);
980
7e6213f4
PK		 981 ret = lp872x_hw_enable(lp);
982 if (ret)
983 return ret;
984
af8b5fc3
KM		 985 ret = lp872x_config(lp);
986 if (ret)
8538c407 987 return ret;
af8b5fc3
KM		 988
989 return lp872x_regulator_register(lp);
af8b5fc3
KM		 990}
991
00fd6e61
KM		 992static const struct of_device_id lp872x_dt_ids[] = {
993 { .compatible = "ti,lp8720", },
994 { .compatible = "ti,lp8725", },
995 { }
996};
997MODULE_DEVICE_TABLE(of, lp872x_dt_ids);
998
af8b5fc3
KM		 999static const struct i2c_device_id lp872x_ids[] = {
1000 {"lp8720", LP8720},
1001 {"lp8725", LP8725},
1002 { }
1003};
1004MODULE_DEVICE_TABLE(i2c, lp872x_ids);
1005
1006static struct i2c_driver lp872x_driver = {
1007 .driver = {
1008 .name = "lp872x",
00fd6e61 1009 .of_match_table = of_match_ptr(lp872x_dt_ids),
af8b5fc3
KM		 1010 },
1011 .probe = lp872x_probe,
af8b5fc3
KM		 1012 .id_table = lp872x_ids,
1013};
1014
1015module_i2c_driver(lp872x_driver);
1016
1017MODULE_DESCRIPTION("TI/National Semiconductor LP872x PMU Regulator Driver");
1018MODULE_AUTHOR("Milo Kim");
1019MODULE_LICENSE("GPL");
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