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3eb2c7ec PZ |
1 | /* |
2 | * Linear Technology LTC3589,LTC3589-1 regulator support | |
3 | * | |
4 | * Copyright (c) 2014 Philipp Zabel <p.zabel@pengutronix.de>, Pengutronix | |
5 | * | |
6 | * See file CREDITS for list of people who contributed to this | |
7 | * project. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 | |
11 | * as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | */ | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/interrupt.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/of.h> | |
25 | #include <linux/regmap.h> | |
26 | #include <linux/regulator/driver.h> | |
27 | #include <linux/regulator/of_regulator.h> | |
28 | ||
29 | #define DRIVER_NAME "ltc3589" | |
30 | ||
31 | #define LTC3589_IRQSTAT 0x02 | |
32 | #define LTC3589_SCR1 0x07 | |
33 | #define LTC3589_OVEN 0x10 | |
34 | #define LTC3589_SCR2 0x12 | |
35 | #define LTC3589_PGSTAT 0x13 | |
36 | #define LTC3589_VCCR 0x20 | |
37 | #define LTC3589_CLIRQ 0x21 | |
38 | #define LTC3589_B1DTV1 0x23 | |
39 | #define LTC3589_B1DTV2 0x24 | |
40 | #define LTC3589_VRRCR 0x25 | |
41 | #define LTC3589_B2DTV1 0x26 | |
42 | #define LTC3589_B2DTV2 0x27 | |
43 | #define LTC3589_B3DTV1 0x29 | |
44 | #define LTC3589_B3DTV2 0x2a | |
45 | #define LTC3589_L2DTV1 0x32 | |
46 | #define LTC3589_L2DTV2 0x33 | |
47 | ||
48 | #define LTC3589_IRQSTAT_PGOOD_TIMEOUT BIT(3) | |
49 | #define LTC3589_IRQSTAT_UNDERVOLT_WARN BIT(4) | |
50 | #define LTC3589_IRQSTAT_UNDERVOLT_FAULT BIT(5) | |
51 | #define LTC3589_IRQSTAT_THERMAL_WARN BIT(6) | |
52 | #define LTC3589_IRQSTAT_THERMAL_FAULT BIT(7) | |
53 | ||
54 | #define LTC3589_OVEN_SW1 BIT(0) | |
55 | #define LTC3589_OVEN_SW2 BIT(1) | |
56 | #define LTC3589_OVEN_SW3 BIT(2) | |
57 | #define LTC3589_OVEN_BB_OUT BIT(3) | |
58 | #define LTC3589_OVEN_LDO2 BIT(4) | |
59 | #define LTC3589_OVEN_LDO3 BIT(5) | |
60 | #define LTC3589_OVEN_LDO4 BIT(6) | |
61 | #define LTC3589_OVEN_SW_CTRL BIT(7) | |
62 | ||
63 | #define LTC3589_VCCR_SW1_GO BIT(0) | |
64 | #define LTC3589_VCCR_SW2_GO BIT(2) | |
65 | #define LTC3589_VCCR_SW3_GO BIT(4) | |
66 | #define LTC3589_VCCR_LDO2_GO BIT(6) | |
67 | ||
68 | enum ltc3589_variant { | |
69 | LTC3589, | |
70 | LTC3589_1, | |
71 | LTC3589_2, | |
72 | }; | |
73 | ||
74 | enum ltc3589_reg { | |
75 | LTC3589_SW1, | |
76 | LTC3589_SW2, | |
77 | LTC3589_SW3, | |
78 | LTC3589_BB_OUT, | |
79 | LTC3589_LDO1, | |
80 | LTC3589_LDO2, | |
81 | LTC3589_LDO3, | |
82 | LTC3589_LDO4, | |
83 | LTC3589_NUM_REGULATORS, | |
84 | }; | |
85 | ||
86 | struct ltc3589_regulator { | |
87 | struct regulator_desc desc; | |
88 | ||
89 | /* External feedback voltage divider */ | |
90 | unsigned int r1; | |
91 | unsigned int r2; | |
92 | }; | |
93 | ||
94 | struct ltc3589 { | |
95 | struct regmap *regmap; | |
96 | struct device *dev; | |
97 | enum ltc3589_variant variant; | |
98 | struct ltc3589_regulator regulator_descs[LTC3589_NUM_REGULATORS]; | |
99 | struct regulator_dev *regulators[LTC3589_NUM_REGULATORS]; | |
100 | }; | |
101 | ||
102 | static const int ltc3589_ldo4[] = { | |
103 | 2800000, 2500000, 1800000, 3300000, | |
104 | }; | |
105 | ||
106 | static const int ltc3589_12_ldo4[] = { | |
107 | 1200000, 1800000, 2500000, 3200000, | |
108 | }; | |
109 | ||
110 | static int ltc3589_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) | |
111 | { | |
112 | struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); | |
113 | int sel, shift; | |
114 | ||
115 | if (unlikely(ramp_delay <= 0)) | |
116 | return -EINVAL; | |
117 | ||
118 | /* VRRCR slew rate offsets are the same as VCCR go bit offsets */ | |
119 | shift = ffs(rdev->desc->apply_bit) - 1; | |
120 | ||
121 | /* The slew rate can be set to 0.88, 1.75, 3.5, or 7 mV/uS */ | |
122 | for (sel = 0; sel < 4; sel++) { | |
123 | if ((880 << sel) >= ramp_delay) { | |
124 | return regmap_update_bits(ltc3589->regmap, | |
125 | LTC3589_VRRCR, | |
126 | 0x3 << shift, sel << shift); | |
127 | } | |
128 | } | |
129 | return -EINVAL; | |
130 | } | |
131 | ||
132 | static int ltc3589_set_suspend_voltage(struct regulator_dev *rdev, int uV) | |
133 | { | |
134 | struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); | |
135 | int sel; | |
136 | ||
137 | sel = regulator_map_voltage_linear(rdev, uV, uV); | |
138 | if (sel < 0) | |
139 | return sel; | |
140 | ||
141 | /* DTV2 register follows right after the corresponding DTV1 register */ | |
142 | return regmap_update_bits(ltc3589->regmap, rdev->desc->vsel_reg + 1, | |
143 | rdev->desc->vsel_mask, sel); | |
144 | } | |
145 | ||
146 | static int ltc3589_set_suspend_mode(struct regulator_dev *rdev, | |
147 | unsigned int mode) | |
148 | { | |
149 | struct ltc3589 *ltc3589 = rdev_get_drvdata(rdev); | |
150 | int mask, bit = 0; | |
151 | ||
152 | /* VCCR reference selects are right next to the VCCR go bits */ | |
153 | mask = rdev->desc->apply_bit << 1; | |
154 | ||
155 | if (mode == REGULATOR_MODE_STANDBY) | |
156 | bit = mask; /* Select DTV2 */ | |
157 | ||
158 | mask |= rdev->desc->apply_bit; | |
159 | bit |= rdev->desc->apply_bit; | |
160 | return regmap_update_bits(ltc3589->regmap, LTC3589_VCCR, mask, bit); | |
161 | } | |
162 | ||
3eb2c7ec PZ |
163 | /* SW1, SW2, SW3, LDO2 */ |
164 | static struct regulator_ops ltc3589_linear_regulator_ops = { | |
165 | .enable = regulator_enable_regmap, | |
166 | .disable = regulator_disable_regmap, | |
167 | .is_enabled = regulator_is_enabled_regmap, | |
168 | .list_voltage = regulator_list_voltage_linear, | |
169 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
170 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
171 | .set_ramp_delay = ltc3589_set_ramp_delay, | |
172 | .set_voltage_time_sel = regulator_set_voltage_time_sel, | |
173 | .set_suspend_voltage = ltc3589_set_suspend_voltage, | |
174 | .set_suspend_mode = ltc3589_set_suspend_mode, | |
175 | }; | |
176 | ||
177 | /* BB_OUT, LDO3 */ | |
178 | static struct regulator_ops ltc3589_fixed_regulator_ops = { | |
179 | .enable = regulator_enable_regmap, | |
180 | .disable = regulator_disable_regmap, | |
181 | .is_enabled = regulator_is_enabled_regmap, | |
3eb2c7ec PZ |
182 | }; |
183 | ||
184 | /* LDO1 */ | |
c0c14e6a | 185 | static struct regulator_ops ltc3589_fixed_standby_regulator_ops = { |
3eb2c7ec PZ |
186 | }; |
187 | ||
188 | /* LDO4 */ | |
189 | static struct regulator_ops ltc3589_table_regulator_ops = { | |
190 | .enable = regulator_enable_regmap, | |
191 | .disable = regulator_disable_regmap, | |
192 | .is_enabled = regulator_is_enabled_regmap, | |
193 | .list_voltage = regulator_list_voltage_table, | |
194 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
195 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
196 | }; | |
197 | ||
198 | ||
199 | #define LTC3589_REG(_name, _ops, en_bit, dtv1_reg, dtv_mask, go_bit) \ | |
200 | [LTC3589_ ## _name] = { \ | |
201 | .desc = { \ | |
202 | .name = #_name, \ | |
203 | .n_voltages = (dtv_mask) + 1, \ | |
204 | .min_uV = (go_bit) ? 362500 : 0, \ | |
205 | .uV_step = (go_bit) ? 12500 : 0, \ | |
206 | .ramp_delay = (go_bit) ? 1750 : 0, \ | |
207 | .fixed_uV = (dtv_mask) ? 0 : 800000, \ | |
208 | .ops = <c3589_ ## _ops ## _regulator_ops, \ | |
209 | .type = REGULATOR_VOLTAGE, \ | |
210 | .id = LTC3589_ ## _name, \ | |
211 | .owner = THIS_MODULE, \ | |
212 | .vsel_reg = (dtv1_reg), \ | |
213 | .vsel_mask = (dtv_mask), \ | |
214 | .apply_reg = (go_bit) ? LTC3589_VCCR : 0, \ | |
215 | .apply_bit = (go_bit), \ | |
216 | .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \ | |
217 | .enable_mask = (en_bit), \ | |
218 | }, \ | |
219 | } | |
220 | ||
221 | #define LTC3589_LINEAR_REG(_name, _dtv1) \ | |
222 | LTC3589_REG(_name, linear, LTC3589_OVEN_ ## _name, \ | |
223 | LTC3589_ ## _dtv1, 0x1f, \ | |
224 | LTC3589_VCCR_ ## _name ## _GO) | |
225 | ||
226 | #define LTC3589_FIXED_REG(_name) \ | |
227 | LTC3589_REG(_name, fixed, LTC3589_OVEN_ ## _name, 0, 0, 0) | |
228 | ||
229 | static struct ltc3589_regulator ltc3589_regulators[LTC3589_NUM_REGULATORS] = { | |
230 | LTC3589_LINEAR_REG(SW1, B1DTV1), | |
231 | LTC3589_LINEAR_REG(SW2, B2DTV1), | |
232 | LTC3589_LINEAR_REG(SW3, B3DTV1), | |
233 | LTC3589_FIXED_REG(BB_OUT), | |
c0c14e6a | 234 | LTC3589_REG(LDO1, fixed_standby, 0, 0, 0, 0), |
3eb2c7ec PZ |
235 | LTC3589_LINEAR_REG(LDO2, L2DTV1), |
236 | LTC3589_FIXED_REG(LDO3), | |
237 | LTC3589_REG(LDO4, table, LTC3589_OVEN_LDO4, LTC3589_L2DTV2, 0x60, 0), | |
238 | }; | |
239 | ||
240 | #ifdef CONFIG_OF | |
241 | static struct of_regulator_match ltc3589_matches[LTC3589_NUM_REGULATORS] = { | |
242 | { .name = "sw1", }, | |
243 | { .name = "sw2", }, | |
244 | { .name = "sw3", }, | |
245 | { .name = "bb-out", }, | |
246 | { .name = "ldo1", }, /* standby */ | |
247 | { .name = "ldo2", }, | |
248 | { .name = "ldo3", }, | |
249 | { .name = "ldo4", }, | |
250 | }; | |
251 | ||
252 | static int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589) | |
253 | { | |
254 | struct device *dev = ltc3589->dev; | |
255 | struct device_node *node; | |
256 | int i, ret; | |
257 | ||
73d23ca7 | 258 | node = of_get_child_by_name(dev->of_node, "regulators"); |
3eb2c7ec PZ |
259 | if (!node) { |
260 | dev_err(dev, "regulators node not found\n"); | |
261 | return -EINVAL; | |
262 | } | |
263 | ||
264 | ret = of_regulator_match(dev, node, ltc3589_matches, | |
265 | ARRAY_SIZE(ltc3589_matches)); | |
266 | of_node_put(node); | |
267 | if (ret < 0) { | |
268 | dev_err(dev, "Error parsing regulator init data: %d\n", ret); | |
269 | return ret; | |
270 | } | |
271 | if (ret != LTC3589_NUM_REGULATORS) { | |
272 | dev_err(dev, "Only %d regulators described in device tree\n", | |
273 | ret); | |
274 | return -EINVAL; | |
275 | } | |
276 | ||
277 | /* Parse feedback voltage dividers. LDO3 and LDO4 don't have them */ | |
278 | for (i = 0; i < LTC3589_LDO3; i++) { | |
279 | struct ltc3589_regulator *desc = <c3589->regulator_descs[i]; | |
280 | struct device_node *np = ltc3589_matches[i].of_node; | |
281 | u32 vdiv[2]; | |
282 | ||
283 | ret = of_property_read_u32_array(np, "lltc,fb-voltage-divider", | |
284 | vdiv, 2); | |
285 | if (ret) { | |
286 | dev_err(dev, "Failed to parse voltage divider: %d\n", | |
287 | ret); | |
288 | return ret; | |
289 | } | |
290 | ||
291 | desc->r1 = vdiv[0]; | |
292 | desc->r2 = vdiv[1]; | |
293 | } | |
294 | ||
295 | return 0; | |
296 | } | |
297 | ||
298 | static inline struct regulator_init_data *match_init_data(int index) | |
299 | { | |
300 | return ltc3589_matches[index].init_data; | |
301 | } | |
302 | ||
303 | static inline struct device_node *match_of_node(int index) | |
304 | { | |
305 | return ltc3589_matches[index].of_node; | |
306 | } | |
307 | #else | |
308 | static inline int ltc3589_parse_regulators_dt(struct ltc3589 *ltc3589) | |
309 | { | |
310 | return 0; | |
311 | } | |
312 | ||
313 | static inline struct regulator_init_data *match_init_data(int index) | |
314 | { | |
315 | return NULL; | |
316 | } | |
317 | ||
318 | static inline struct device_node *match_of_node(int index) | |
319 | { | |
320 | return NULL; | |
321 | } | |
322 | #endif | |
323 | ||
324 | static bool ltc3589_writeable_reg(struct device *dev, unsigned int reg) | |
325 | { | |
326 | switch (reg) { | |
327 | case LTC3589_IRQSTAT: | |
328 | case LTC3589_SCR1: | |
329 | case LTC3589_OVEN: | |
330 | case LTC3589_SCR2: | |
331 | case LTC3589_VCCR: | |
332 | case LTC3589_CLIRQ: | |
333 | case LTC3589_B1DTV1: | |
334 | case LTC3589_B1DTV2: | |
335 | case LTC3589_VRRCR: | |
336 | case LTC3589_B2DTV1: | |
337 | case LTC3589_B2DTV2: | |
338 | case LTC3589_B3DTV1: | |
339 | case LTC3589_B3DTV2: | |
340 | case LTC3589_L2DTV1: | |
341 | case LTC3589_L2DTV2: | |
342 | return true; | |
343 | } | |
344 | return false; | |
345 | } | |
346 | ||
347 | static bool ltc3589_readable_reg(struct device *dev, unsigned int reg) | |
348 | { | |
349 | switch (reg) { | |
350 | case LTC3589_IRQSTAT: | |
351 | case LTC3589_SCR1: | |
352 | case LTC3589_OVEN: | |
353 | case LTC3589_SCR2: | |
354 | case LTC3589_PGSTAT: | |
355 | case LTC3589_VCCR: | |
356 | case LTC3589_B1DTV1: | |
357 | case LTC3589_B1DTV2: | |
358 | case LTC3589_VRRCR: | |
359 | case LTC3589_B2DTV1: | |
360 | case LTC3589_B2DTV2: | |
361 | case LTC3589_B3DTV1: | |
362 | case LTC3589_B3DTV2: | |
363 | case LTC3589_L2DTV1: | |
364 | case LTC3589_L2DTV2: | |
365 | return true; | |
366 | } | |
367 | return false; | |
368 | } | |
369 | ||
370 | static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg) | |
371 | { | |
372 | switch (reg) { | |
373 | case LTC3589_IRQSTAT: | |
374 | case LTC3589_PGSTAT: | |
c5bb725a | 375 | case LTC3589_VCCR: |
3eb2c7ec PZ |
376 | return true; |
377 | } | |
378 | return false; | |
379 | } | |
380 | ||
ec867726 | 381 | static const struct reg_default ltc3589_reg_defaults[] = { |
3eb2c7ec PZ |
382 | { LTC3589_SCR1, 0x00 }, |
383 | { LTC3589_OVEN, 0x00 }, | |
384 | { LTC3589_SCR2, 0x00 }, | |
385 | { LTC3589_VCCR, 0x00 }, | |
386 | { LTC3589_B1DTV1, 0x19 }, | |
387 | { LTC3589_B1DTV2, 0x19 }, | |
388 | { LTC3589_VRRCR, 0xff }, | |
389 | { LTC3589_B2DTV1, 0x19 }, | |
390 | { LTC3589_B2DTV2, 0x19 }, | |
391 | { LTC3589_B3DTV1, 0x19 }, | |
392 | { LTC3589_B3DTV2, 0x19 }, | |
393 | { LTC3589_L2DTV1, 0x19 }, | |
394 | { LTC3589_L2DTV2, 0x19 }, | |
395 | }; | |
396 | ||
397 | static const struct regmap_config ltc3589_regmap_config = { | |
398 | .reg_bits = 8, | |
399 | .val_bits = 8, | |
400 | .writeable_reg = ltc3589_writeable_reg, | |
401 | .readable_reg = ltc3589_readable_reg, | |
402 | .volatile_reg = ltc3589_volatile_reg, | |
403 | .max_register = LTC3589_L2DTV2, | |
404 | .reg_defaults = ltc3589_reg_defaults, | |
405 | .num_reg_defaults = ARRAY_SIZE(ltc3589_reg_defaults), | |
406 | .use_single_rw = true, | |
407 | .cache_type = REGCACHE_RBTREE, | |
408 | }; | |
409 | ||
410 | ||
411 | static irqreturn_t ltc3589_isr(int irq, void *dev_id) | |
412 | { | |
413 | struct ltc3589 *ltc3589 = dev_id; | |
414 | unsigned int i, irqstat, event; | |
415 | ||
416 | regmap_read(ltc3589->regmap, LTC3589_IRQSTAT, &irqstat); | |
417 | ||
418 | if (irqstat & LTC3589_IRQSTAT_THERMAL_WARN) { | |
419 | event = REGULATOR_EVENT_OVER_TEMP; | |
420 | for (i = 0; i < LTC3589_NUM_REGULATORS; i++) | |
421 | regulator_notifier_call_chain(ltc3589->regulators[i], | |
422 | event, NULL); | |
423 | } | |
424 | ||
425 | if (irqstat & LTC3589_IRQSTAT_UNDERVOLT_WARN) { | |
426 | event = REGULATOR_EVENT_UNDER_VOLTAGE; | |
427 | for (i = 0; i < LTC3589_NUM_REGULATORS; i++) | |
428 | regulator_notifier_call_chain(ltc3589->regulators[i], | |
429 | event, NULL); | |
430 | } | |
431 | ||
432 | /* Clear warning condition */ | |
433 | regmap_write(ltc3589->regmap, LTC3589_CLIRQ, 0); | |
434 | ||
435 | return IRQ_HANDLED; | |
436 | } | |
437 | ||
438 | static inline unsigned int ltc3589_scale(unsigned int uV, u32 r1, u32 r2) | |
439 | { | |
440 | uint64_t tmp; | |
441 | if (uV == 0) | |
442 | return 0; | |
443 | tmp = (uint64_t)uV * r1; | |
444 | do_div(tmp, r2); | |
445 | return uV + (unsigned int)tmp; | |
446 | } | |
447 | ||
448 | static void ltc3589_apply_fb_voltage_divider(struct ltc3589_regulator *rdesc) | |
449 | { | |
450 | struct regulator_desc *desc = &rdesc->desc; | |
451 | ||
452 | if (!rdesc->r1 || !rdesc->r2) | |
453 | return; | |
454 | ||
455 | desc->min_uV = ltc3589_scale(desc->min_uV, rdesc->r1, rdesc->r2); | |
456 | desc->uV_step = ltc3589_scale(desc->uV_step, rdesc->r1, rdesc->r2); | |
457 | desc->fixed_uV = ltc3589_scale(desc->fixed_uV, rdesc->r1, rdesc->r2); | |
458 | } | |
459 | ||
460 | static int ltc3589_probe(struct i2c_client *client, | |
461 | const struct i2c_device_id *id) | |
462 | { | |
463 | struct device *dev = &client->dev; | |
464 | struct ltc3589_regulator *descs; | |
465 | struct ltc3589 *ltc3589; | |
466 | int i, ret; | |
467 | ||
468 | ltc3589 = devm_kzalloc(dev, sizeof(*ltc3589), GFP_KERNEL); | |
469 | if (!ltc3589) | |
470 | return -ENOMEM; | |
471 | ||
472 | i2c_set_clientdata(client, ltc3589); | |
473 | ltc3589->variant = id->driver_data; | |
474 | ltc3589->dev = dev; | |
475 | ||
476 | descs = ltc3589->regulator_descs; | |
477 | memcpy(descs, ltc3589_regulators, sizeof(ltc3589_regulators)); | |
478 | if (ltc3589->variant == LTC3589) { | |
479 | descs[LTC3589_LDO3].desc.fixed_uV = 1800000; | |
480 | descs[LTC3589_LDO4].desc.volt_table = ltc3589_ldo4; | |
481 | } else { | |
482 | descs[LTC3589_LDO3].desc.fixed_uV = 2800000; | |
483 | descs[LTC3589_LDO4].desc.volt_table = ltc3589_12_ldo4; | |
484 | } | |
485 | ||
486 | ltc3589->regmap = devm_regmap_init_i2c(client, <c3589_regmap_config); | |
487 | if (IS_ERR(ltc3589->regmap)) { | |
488 | ret = PTR_ERR(ltc3589->regmap); | |
489 | dev_err(dev, "failed to initialize regmap: %d\n", ret); | |
490 | return ret; | |
491 | } | |
492 | ||
493 | ret = ltc3589_parse_regulators_dt(ltc3589); | |
494 | if (ret) | |
495 | return ret; | |
496 | ||
497 | for (i = 0; i < LTC3589_NUM_REGULATORS; i++) { | |
498 | struct ltc3589_regulator *rdesc = <c3589->regulator_descs[i]; | |
499 | struct regulator_desc *desc = &rdesc->desc; | |
500 | struct regulator_init_data *init_data; | |
501 | struct regulator_config config = { }; | |
502 | ||
503 | init_data = match_init_data(i); | |
504 | ||
505 | if (i < LTC3589_LDO3) | |
506 | ltc3589_apply_fb_voltage_divider(rdesc); | |
507 | ||
508 | config.dev = dev; | |
509 | config.init_data = init_data; | |
510 | config.driver_data = ltc3589; | |
511 | config.of_node = match_of_node(i); | |
512 | ||
513 | ltc3589->regulators[i] = devm_regulator_register(dev, desc, | |
514 | &config); | |
515 | if (IS_ERR(ltc3589->regulators[i])) { | |
516 | ret = PTR_ERR(ltc3589->regulators[i]); | |
517 | dev_err(dev, "failed to register regulator %s: %d\n", | |
518 | desc->name, ret); | |
519 | return ret; | |
520 | } | |
521 | } | |
522 | ||
523 | ret = devm_request_threaded_irq(dev, client->irq, NULL, ltc3589_isr, | |
524 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
525 | client->name, ltc3589); | |
526 | if (ret) { | |
527 | dev_err(dev, "Failed to request IRQ: %d\n", ret); | |
528 | return ret; | |
529 | } | |
530 | ||
531 | return 0; | |
532 | } | |
533 | ||
534 | static struct i2c_device_id ltc3589_i2c_id[] = { | |
535 | { "ltc3589", LTC3589 }, | |
536 | { "ltc3589-1", LTC3589_1 }, | |
537 | { "ltc3589-2", LTC3589_2 }, | |
538 | { } | |
539 | }; | |
540 | MODULE_DEVICE_TABLE(i2c, ltc3589_i2c_id); | |
541 | ||
542 | static struct i2c_driver ltc3589_driver = { | |
543 | .driver = { | |
544 | .name = DRIVER_NAME, | |
3eb2c7ec PZ |
545 | }, |
546 | .probe = ltc3589_probe, | |
547 | .id_table = ltc3589_i2c_id, | |
548 | }; | |
549 | module_i2c_driver(ltc3589_driver); | |
550 | ||
551 | MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>"); | |
552 | MODULE_DESCRIPTION("Regulator driver for Linear Technology LTC3589(-1,2)"); | |
553 | MODULE_LICENSE("GPL v2"); |