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[mirror_ubuntu-hirsute-kernel.git] / drivers / regulator / pcap-regulator.c
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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
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2/*
3 * PCAP2 Regulator Driver
4 *
5 * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
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6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/init.h>
11#include <linux/err.h>
12#include <linux/platform_device.h>
13#include <linux/regulator/driver.h>
14#include <linux/regulator/machine.h>
15#include <linux/mfd/ezx-pcap.h>
16
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17static const unsigned int V1_table[] = {
18 2775000, 1275000, 1600000, 1725000, 1825000, 1925000, 2075000, 2275000,
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19};
20
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21static const unsigned int V2_table[] = {
22 2500000, 2775000,
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23};
24
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25static const unsigned int V3_table[] = {
26 1075000, 1275000, 1550000, 1725000, 1876000, 1950000, 2075000, 2275000,
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27};
28
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29static const unsigned int V4_table[] = {
30 1275000, 1550000, 1725000, 1875000, 1950000, 2075000, 2275000, 2775000,
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31};
32
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33static const unsigned int V5_table[] = {
34 1875000, 2275000, 2475000, 2775000,
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35};
36
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37static const unsigned int V6_table[] = {
38 2475000, 2775000,
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39};
40
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41static const unsigned int V7_table[] = {
42 1875000, 2775000,
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43};
44
45#define V8_table V4_table
46
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47static const unsigned int V9_table[] = {
48 1575000, 1875000, 2475000, 2775000,
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49};
50
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51static const unsigned int V10_table[] = {
52 5000000,
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53};
54
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55static const unsigned int VAUX1_table[] = {
56 1875000, 2475000, 2775000, 3000000,
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57};
58
59#define VAUX2_table VAUX1_table
60
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61static const unsigned int VAUX3_table[] = {
62 1200000, 1200000, 1200000, 1200000, 1400000, 1600000, 1800000, 2000000,
63 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, 3600000,
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64};
65
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66static const unsigned int VAUX4_table[] = {
67 1800000, 1800000, 3000000, 5000000,
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68};
69
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70static const unsigned int VSIM_table[] = {
71 1875000, 3000000,
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72};
73
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74static const unsigned int VSIM2_table[] = {
75 1875000,
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76};
77
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78static const unsigned int VVIB_table[] = {
79 1300000, 1800000, 2000000, 3000000,
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80};
81
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82static const unsigned int SW1_table[] = {
83 900000, 950000, 1000000, 1050000, 1100000, 1150000, 1200000, 1250000,
84 1300000, 1350000, 1400000, 1450000, 1500000, 1600000, 1875000, 2250000,
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85};
86
87#define SW2_table SW1_table
88
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89struct pcap_regulator {
90 const u8 reg;
91 const u8 en;
92 const u8 index;
93 const u8 stby;
94 const u8 lowpwr;
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95};
96
97#define NA 0xff
98
99#define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
100 [_vreg] = { \
101 .reg = _reg, \
102 .en = _en, \
103 .index = _index, \
104 .stby = _stby, \
105 .lowpwr = _lowpwr, \
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106 }
107
108static struct pcap_regulator vreg_table[] = {
109 VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
110 VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
111 VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
112 VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
113 /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
114 VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
115
116 VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
117 VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
118 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
119 VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
120 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
121
122 VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
123 /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
124 VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
125 VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
126 VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
127 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
128 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
129 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
130
131 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
132 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
133 /* SW3 STBY is on PCAP_REG_AUXVREG */
134 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
135
136 /* SWxS used to control SWx voltage on standby */
137/* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
138 VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */
139};
140
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141static int pcap_regulator_set_voltage_sel(struct regulator_dev *rdev,
142 unsigned selector)
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143{
144 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
145 void *pcap = rdev_get_drvdata(rdev);
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146
147 /* the regulator doesn't support voltage switching */
c49af956 148 if (rdev->desc->n_voltages == 1)
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149 return -EINVAL;
150
d5ec9635 151 return ezx_pcap_set_bits(pcap, vreg->reg,
c49af956 152 (rdev->desc->n_voltages - 1) << vreg->index,
d5ec9635 153 selector << vreg->index);
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154}
155
3cbff37e 156static int pcap_regulator_get_voltage_sel(struct regulator_dev *rdev)
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157{
158 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
159 void *pcap = rdev_get_drvdata(rdev);
160 u32 tmp;
39b1772a 161
c49af956 162 if (rdev->desc->n_voltages == 1)
3cbff37e 163 return 0;
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164
165 ezx_pcap_read(pcap, vreg->reg, &tmp);
c49af956 166 tmp = ((tmp >> vreg->index) & (rdev->desc->n_voltages - 1));
3cbff37e 167 return tmp;
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168}
169
170static int pcap_regulator_enable(struct regulator_dev *rdev)
171{
172 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
173 void *pcap = rdev_get_drvdata(rdev);
174
175 if (vreg->en == NA)
176 return -EINVAL;
177
178 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
179}
180
181static int pcap_regulator_disable(struct regulator_dev *rdev)
182{
183 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
184 void *pcap = rdev_get_drvdata(rdev);
185
186 if (vreg->en == NA)
187 return -EINVAL;
188
189 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
190}
191
192static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
193{
194 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
195 void *pcap = rdev_get_drvdata(rdev);
196 u32 tmp;
197
198 if (vreg->en == NA)
199 return -EINVAL;
200
201 ezx_pcap_read(pcap, vreg->reg, &tmp);
202 return (tmp >> vreg->en) & 1;
203}
204
00804e6a 205static const struct regulator_ops pcap_regulator_ops = {
c49af956 206 .list_voltage = regulator_list_voltage_table,
d5ec9635 207 .set_voltage_sel = pcap_regulator_set_voltage_sel,
3cbff37e 208 .get_voltage_sel = pcap_regulator_get_voltage_sel,
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209 .enable = pcap_regulator_enable,
210 .disable = pcap_regulator_disable,
211 .is_enabled = pcap_regulator_is_enabled,
212};
213
214#define VREG(_vreg) \
215 [_vreg] = { \
216 .name = #_vreg, \
217 .id = _vreg, \
218 .n_voltages = ARRAY_SIZE(_vreg##_table), \
c49af956 219 .volt_table = _vreg##_table, \
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220 .ops = &pcap_regulator_ops, \
221 .type = REGULATOR_VOLTAGE, \
222 .owner = THIS_MODULE, \
223 }
224
0d2fbc51 225static const struct regulator_desc pcap_regulators[] = {
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226 VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
227 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
228 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
229};
230
a5023574 231static int pcap_regulator_probe(struct platform_device *pdev)
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232{
233 struct regulator_dev *rdev;
70fde5cb 234 void *pcap = dev_get_drvdata(pdev->dev.parent);
c172708d 235 struct regulator_config config = { };
39b1772a 236
c172708d 237 config.dev = &pdev->dev;
dff91d0b 238 config.init_data = dev_get_platdata(&pdev->dev);
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239 config.driver_data = pcap;
240
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241 rdev = devm_regulator_register(&pdev->dev, &pcap_regulators[pdev->id],
242 &config);
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243 if (IS_ERR(rdev))
244 return PTR_ERR(rdev);
245
246 platform_set_drvdata(pdev, rdev);
247
248 return 0;
249}
250
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251static struct platform_driver pcap_regulator_driver = {
252 .driver = {
6a74857d 253 .name = "pcap-regulator",
39b1772a 254 },
6a74857d 255 .probe = pcap_regulator_probe,
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256};
257
258static int __init pcap_regulator_init(void)
259{
260 return platform_driver_register(&pcap_regulator_driver);
261}
262
263static void __exit pcap_regulator_exit(void)
264{
265 platform_driver_unregister(&pcap_regulator_driver);
266}
267
e397e7ed 268subsys_initcall(pcap_regulator_init);
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269module_exit(pcap_regulator_exit);
270
271MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
272MODULE_DESCRIPTION("PCAP2 Regulator Driver");
273MODULE_LICENSE("GPL");