[mirror_ubuntu-artful-kernel.git] / drivers / regulator / pfuze100-regulator.c

/*
 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/regulator/of_regulator.h>
#include <linux/platform_device.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/pfuze100.h>
#include <linux/i2c.h>
#include <linux/slab.h>
#include <linux/regmap.h>

#define PFUZE_NUMREGS		128
#define PFUZE100_VOL_OFFSET	0
#define PFUZE100_STANDBY_OFFSET	1
#define PFUZE100_MODE_OFFSET	3
#define PFUZE100_CONF_OFFSET	4

#define PFUZE100_DEVICEID	0x0
#define PFUZE100_REVID		0x3
#define PFUZE100_FABID		0x4

#define PFUZE100_SW1ABVOL	0x20
#define PFUZE100_SW1CVOL	0x2e
#define PFUZE100_SW2VOL		0x35
#define PFUZE100_SW3AVOL	0x3c
#define PFUZE100_SW3BVOL	0x43
#define PFUZE100_SW4VOL		0x4a
#define PFUZE100_SWBSTCON1	0x66
#define PFUZE100_VREFDDRCON	0x6a
#define PFUZE100_VSNVSVOL	0x6b
#define PFUZE100_VGEN1VOL	0x6c
#define PFUZE100_VGEN2VOL	0x6d
#define PFUZE100_VGEN3VOL	0x6e
#define PFUZE100_VGEN4VOL	0x6f
#define PFUZE100_VGEN5VOL	0x70
#define PFUZE100_VGEN6VOL	0x71

struct pfuze_regulator {
	struct regulator_desc desc;
	unsigned char stby_reg;
	unsigned char stby_mask;
};

struct pfuze_chip {
	struct regmap *regmap;
	struct device *dev;
	struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
	struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
};

static const int pfuze100_swbst[] = {
	5000000, 5050000, 5100000, 5150000,
};

static const int pfuze100_vsnvs[] = {
	1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
};

static const struct i2c_device_id pfuze_device_id[] = {
	{.name = "pfuze100"},
	{},
};
MODULE_DEVICE_TABLE(i2c, pfuze_device_id);

static const struct of_device_id pfuze_dt_ids[] = {
	{ .compatible = "fsl,pfuze100" },
	{},
};
MODULE_DEVICE_TABLE(of, pfuze_dt_ids);

static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
{
	struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
	int id = rdev->desc->id;
	unsigned int ramp_bits;
	int ret;

	if (id < PFUZE100_SWBST) {
		ramp_delay = 12500 / ramp_delay;
		ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
		ret = regmap_update_bits(pfuze100->regmap,
					 rdev->desc->vsel_reg + 4,
					 0xc0, ramp_bits << 6);
		if (ret < 0)
			dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
	} else
		ret = -EACCES;

	return ret;
}

static struct regulator_ops pfuze100_ldo_regulator_ops = {
	.enable = regulator_enable_regmap,
	.disable = regulator_disable_regmap,
	.is_enabled = regulator_is_enabled_regmap,
	.list_voltage = regulator_list_voltage_linear,
	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	.get_voltage_sel = regulator_get_voltage_sel_regmap,
};

static struct regulator_ops pfuze100_fixed_regulator_ops = {
	.list_voltage = regulator_list_voltage_linear,
};

static struct regulator_ops pfuze100_sw_regulator_ops = {
	.list_voltage = regulator_list_voltage_linear,
	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	.get_voltage_sel = regulator_get_voltage_sel_regmap,
	.set_voltage_time_sel = regulator_set_voltage_time_sel,
	.set_ramp_delay = pfuze100_set_ramp_delay,
};

static struct regulator_ops pfuze100_swb_regulator_ops = {
	.list_voltage = regulator_list_voltage_table,
	.map_voltage = regulator_map_voltage_ascend,
	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	.get_voltage_sel = regulator_get_voltage_sel_regmap,

};

#define PFUZE100_FIXED_REG(_name, base, voltage)	\
	[PFUZE100_ ## _name] = {	\
		.desc = {	\
			.name = #_name,	\
			.n_voltages = 1,	\
			.ops = &pfuze100_fixed_regulator_ops,	\
			.type = REGULATOR_VOLTAGE,	\
			.id = PFUZE100_ ## _name,	\
			.owner = THIS_MODULE,	\
			.min_uV = (voltage),	\
			.enable_reg = (base),	\
			.enable_mask = 0x10,	\
		},	\
	}

#define PFUZE100_SW_REG(_name, base, min, max, step)	\
	[PFUZE100_ ## _name] = {	\
		.desc = {	\
			.name = #_name,\
			.n_voltages = ((max) - (min)) / (step) + 1,	\
			.ops = &pfuze100_sw_regulator_ops,	\
			.type = REGULATOR_VOLTAGE,	\
			.id = PFUZE100_ ## _name,	\
			.owner = THIS_MODULE,	\
			.min_uV = (min),	\
			.uV_step = (step),	\
			.vsel_reg = (base) + PFUZE100_VOL_OFFSET,	\
			.vsel_mask = 0x3f,	\
		},	\
		.stby_reg = (base) + PFUZE100_STANDBY_OFFSET,	\
		.stby_mask = 0x3f,	\
	}

#define PFUZE100_SWB_REG(_name, base, mask, voltages)	\
	[PFUZE100_ ## _name] = {	\
		.desc = {	\
			.name = #_name,	\
			.n_voltages = ARRAY_SIZE(voltages),	\
			.ops = &pfuze100_swb_regulator_ops,	\
			.type = REGULATOR_VOLTAGE,	\
			.id = PFUZE100_ ## _name,	\
			.owner = THIS_MODULE,	\
			.volt_table = voltages,	\
			.vsel_reg = (base),	\
			.vsel_mask = (mask),	\
		},	\
	}

#define PFUZE100_VGEN_REG(_name, base, min, max, step)	\
	[PFUZE100_ ## _name] = {	\
		.desc = {	\
			.name = #_name,	\
			.n_voltages = ((max) - (min)) / (step) + 1,	\
			.ops = &pfuze100_ldo_regulator_ops,	\
			.type = REGULATOR_VOLTAGE,	\
			.id = PFUZE100_ ## _name,	\
			.owner = THIS_MODULE,	\
			.min_uV = (min),	\
			.uV_step = (step),	\
			.vsel_reg = (base),	\
			.vsel_mask = 0xf,	\
			.enable_reg = (base),	\
			.enable_mask = 0x10,	\
		},	\
		.stby_reg = (base),	\
		.stby_mask = 0x20,	\
	}

static struct pfuze_regulator pfuze100_regulators[] = {
	PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
	PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
	PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
	PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
	PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
	PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
	PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
	PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
	PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000),
	PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
	PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
	PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
	PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
	PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
	PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
};

#ifdef CONFIG_OF
static struct of_regulator_match pfuze100_matches[] = {
	{ .name = "sw1ab",	},
	{ .name = "sw1c",	},
	{ .name = "sw2",	},
	{ .name = "sw3a",	},
	{ .name = "sw3b",	},
	{ .name = "sw4",	},
	{ .name = "swbst",	},
	{ .name = "vsnvs",	},
	{ .name = "vrefddr",	},
	{ .name = "vgen1",	},
	{ .name = "vgen2",	},
	{ .name = "vgen3",	},
	{ .name = "vgen4",	},
	{ .name = "vgen5",	},
	{ .name = "vgen6",	},
};

static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
{
	struct device *dev = chip->dev;
	struct device_node *np, *parent;
	int ret;

	np = of_node_get(dev->parent->of_node);
	if (!np)
		return 0;

	parent = of_find_node_by_name(np, "regulators");
	if (!parent) {
		dev_err(dev, "regulators node not found\n");
		return -EINVAL;
	}

	ret = of_regulator_match(dev, parent, pfuze100_matches,
				 ARRAY_SIZE(pfuze100_matches));

	of_node_put(parent);
	if (ret < 0) {
		dev_err(dev, "Error parsing regulator init data: %d\n",
			ret);
		return ret;
	}

	return 0;
}

static inline struct regulator_init_data *match_init_data(int index)
{
	return pfuze100_matches[index].init_data;
}

static inline struct device_node *match_of_node(int index)
{
	return pfuze100_matches[index].of_node;
}
#else
static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
{
	return 0;
}

static inline struct regulator_init_data *match_init_data(int index)
{
	return NULL;
}

static inline struct device_node *match_of_node(int index)
{
	return NULL;
}
#endif

static int pfuze_identify(struct pfuze_chip *pfuze_chip)
{
	unsigned int value;
	int ret;

	ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
	if (ret)
		return ret;

	switch (value & 0x0f) {
		/* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
		case 0x8:
			dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
		case 0x0:
			break;
		default:
			dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
			return -ENODEV;
	}

	ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
	if (ret)
		return ret;
	dev_info(pfuze_chip->dev,
		 "Full lay: %x, Metal lay: %x\n",
		 (value & 0xf0) >> 4, value & 0x0f);

	ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
	if (ret)
		return ret;
	dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
		 (value & 0xc) >> 2, value & 0x3);

	return 0;
}

static const struct regmap_config pfuze_regmap_config = {
	.reg_bits = 8,
	.val_bits = 8,
	.max_register = PFUZE_NUMREGS - 1,
	.cache_type = REGCACHE_RBTREE,
};

static int pfuze100_regulator_probe(struct i2c_client *client,
				    const struct i2c_device_id *id)
{
	struct pfuze_chip *pfuze_chip;
	struct pfuze_regulator_platform_data *pdata =
	    dev_get_platdata(&client->dev);
	struct regulator_config config = { };
	int i, ret;

	pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
			GFP_KERNEL);
	if (!pfuze_chip)
		return -ENOMEM;

	i2c_set_clientdata(client, pfuze_chip);

	memcpy(pfuze_chip->regulator_descs, pfuze100_regulators,
		sizeof(pfuze_chip->regulator_descs));

	pfuze_chip->dev = &client->dev;

	pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
	if (IS_ERR(pfuze_chip->regmap)) {
		ret = PTR_ERR(pfuze_chip->regmap);
		dev_err(&client->dev,
			"regmap allocation failed with err %d\n", ret);
		return ret;
	}

	ret = pfuze_identify(pfuze_chip);
	if (ret) {
		dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
		return ret;
	}

	ret = pfuze_parse_regulators_dt(pfuze_chip);
	if (ret)
		return ret;

	for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) {
		struct regulator_init_data *init_data;
		struct regulator_desc *desc;
		int val;

		desc = &pfuze_chip->regulator_descs[i].desc;

		if (pdata)
			init_data = pdata->init_data[i];
		else
			init_data = match_init_data(i);

		/* SW2~SW4 high bit check and modify the voltage value table */
		if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) {
			regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
			if (val & 0x40) {
				desc->min_uV = 800000;
				desc->uV_step = 50000;
				desc->n_voltages = 51;
			}
		}

		config.dev = &client->dev;
		config.init_data = init_data;
		config.driver_data = pfuze_chip;
		config.of_node = match_of_node(i);

		pfuze_chip->regulators[i] = regulator_register(desc, &config);
		if (IS_ERR(pfuze_chip->regulators[i])) {
			dev_err(&client->dev, "register regulator%s failed\n",
				pfuze100_regulators[i].desc.name);
			ret = PTR_ERR(pfuze_chip->regulators[i]);
			while (--i >= 0)
				regulator_unregister(pfuze_chip->regulators[i]);
			return ret;
		}
	}

	return 0;
}

static int pfuze100_regulator_remove(struct i2c_client *client)
{
	int i;
	struct pfuze_chip *pfuze_chip = i2c_get_clientdata(client);

	for (i = 0; i < PFUZE100_MAX_REGULATOR; i++)
		regulator_unregister(pfuze_chip->regulators[i]);

	return 0;
}

static struct i2c_driver pfuze_driver = {
	.id_table = pfuze_device_id,
	.driver = {
		.name = "pfuze100-regulator",
		.owner = THIS_MODULE,
		.of_match_table = pfuze_dt_ids,
	},
	.probe = pfuze100_regulator_probe,
	.remove = pfuze100_regulator_remove,
};
module_i2c_driver(pfuze_driver);

MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100 PMIC");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("i2c:pfuze100-regulator");
Commit	Line	Data
3784b6d6 RG	1	/*
	2	* Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	17	*/
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/init.h>
	21	#include <linux/err.h>
	22	#include <linux/of.h>
	23	#include <linux/of_device.h>
	24	#include <linux/regulator/of_regulator.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/regulator/driver.h>
	27	#include <linux/regulator/machine.h>
	28	#include <linux/regulator/pfuze100.h>
	29	#include <linux/i2c.h>
	30	#include <linux/slab.h>
	31	#include <linux/regmap.h>
	32
	33	#define PFUZE_NUMREGS 128
	34	#define PFUZE100_VOL_OFFSET 0
	35	#define PFUZE100_STANDBY_OFFSET 1
	36	#define PFUZE100_MODE_OFFSET 3
	37	#define PFUZE100_CONF_OFFSET 4
	38
	39	#define PFUZE100_DEVICEID 0x0
	40	#define PFUZE100_REVID 0x3
a1b6fa85	41	#define PFUZE100_FABID 0x4
3784b6d6 RG	42
	43	#define PFUZE100_SW1ABVOL 0x20
	44	#define PFUZE100_SW1CVOL 0x2e
	45	#define PFUZE100_SW2VOL 0x35
	46	#define PFUZE100_SW3AVOL 0x3c
	47	#define PFUZE100_SW3BVOL 0x43
	48	#define PFUZE100_SW4VOL 0x4a
	49	#define PFUZE100_SWBSTCON1 0x66
	50	#define PFUZE100_VREFDDRCON 0x6a
	51	#define PFUZE100_VSNVSVOL 0x6b
	52	#define PFUZE100_VGEN1VOL 0x6c
	53	#define PFUZE100_VGEN2VOL 0x6d
	54	#define PFUZE100_VGEN3VOL 0x6e
	55	#define PFUZE100_VGEN4VOL 0x6f
	56	#define PFUZE100_VGEN5VOL 0x70
	57	#define PFUZE100_VGEN6VOL 0x71
	58
	59	struct pfuze_regulator {
	60	struct regulator_desc desc;
	61	unsigned char stby_reg;
	62	unsigned char stby_mask;
	63	};
	64
	65	struct pfuze_chip {
	66	struct regmap *regmap;
	67	struct device *dev;
	68	struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
	69	struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
	70	};
	71
	72	static const int pfuze100_swbst[] = {
	73	5000000, 5050000, 5100000, 5150000,
	74	};
	75
	76	static const int pfuze100_vsnvs[] = {
	77	1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
	78	};
	79
	80	static const struct i2c_device_id pfuze_device_id[] = {
	81	{.name = "pfuze100"},
	82	{},
	83	};
	84	MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
	85
	86	static const struct of_device_id pfuze_dt_ids[] = {
	87	{ .compatible = "fsl,pfuze100" },
	88	{},
	89	};
	90	MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
	91
	92	static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
	93	{
	94	struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
	95	int id = rdev->desc->id;
e5656669	96	unsigned int ramp_bits;
3784b6d6 RG	97	int ret;
	98
	99	if (id < PFUZE100_SWBST) {
e5656669	100	ramp_delay = 12500 / ramp_delay;
3784b6d6	101	ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
e5656669 AL	102	ret = regmap_update_bits(pfuze100->regmap,
	103	rdev->desc->vsel_reg + 4,
	104	0xc0, ramp_bits << 6);
3784b6d6 RG	105	if (ret < 0)
	106	dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
	107	} else
	108	ret = -EACCES;
	109
	110	return ret;
	111	}
	112
	113	static struct regulator_ops pfuze100_ldo_regulator_ops = {
	114	.enable = regulator_enable_regmap,
	115	.disable = regulator_disable_regmap,
	116	.is_enabled = regulator_is_enabled_regmap,
	117	.list_voltage = regulator_list_voltage_linear,
	118	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	119	.get_voltage_sel = regulator_get_voltage_sel_regmap,
	120	};
	121
	122	static struct regulator_ops pfuze100_fixed_regulator_ops = {
	123	.list_voltage = regulator_list_voltage_linear,
	124	};
	125
	126	static struct regulator_ops pfuze100_sw_regulator_ops = {
	127	.list_voltage = regulator_list_voltage_linear,
	128	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	129	.get_voltage_sel = regulator_get_voltage_sel_regmap,
	130	.set_voltage_time_sel = regulator_set_voltage_time_sel,
	131	.set_ramp_delay = pfuze100_set_ramp_delay,
	132	};
	133
	134	static struct regulator_ops pfuze100_swb_regulator_ops = {
	135	.list_voltage = regulator_list_voltage_table,
2e04cc41	136	.map_voltage = regulator_map_voltage_ascend,
3784b6d6 RG	137	.set_voltage_sel = regulator_set_voltage_sel_regmap,
	138	.get_voltage_sel = regulator_get_voltage_sel_regmap,
	139
	140	};
	141
	142	#define PFUZE100_FIXED_REG(_name, base, voltage) \
	143	[PFUZE100_ ## _name] = { \
	144	.desc = { \
	145	.name = #_name, \
	146	.n_voltages = 1, \
	147	.ops = &pfuze100_fixed_regulator_ops, \
	148	.type = REGULATOR_VOLTAGE, \
	149	.id = PFUZE100_ ## _name, \
	150	.owner = THIS_MODULE, \
	151	.min_uV = (voltage), \
	152	.enable_reg = (base), \
	153	.enable_mask = 0x10, \
	154	}, \
	155	}
	156
	157	#define PFUZE100_SW_REG(_name, base, min, max, step) \
	158	[PFUZE100_ ## _name] = { \
	159	.desc = { \
	160	.name = #_name,\
	161	.n_voltages = ((max) - (min)) / (step) + 1, \
	162	.ops = &pfuze100_sw_regulator_ops, \
	163	.type = REGULATOR_VOLTAGE, \
	164	.id = PFUZE100_ ## _name, \
	165	.owner = THIS_MODULE, \
	166	.min_uV = (min), \
	167	.uV_step = (step), \
	168	.vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
	169	.vsel_mask = 0x3f, \
	170	}, \
	171	.stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
	172	.stby_mask = 0x3f, \
	173	}
	174
	175	#define PFUZE100_SWB_REG(_name, base, mask, voltages) \
	176	[PFUZE100_ ## _name] = { \
	177	.desc = { \
	178	.name = #_name, \
	179	.n_voltages = ARRAY_SIZE(voltages), \
	180	.ops = &pfuze100_swb_regulator_ops, \
	181	.type = REGULATOR_VOLTAGE, \
	182	.id = PFUZE100_ ## _name, \
	183	.owner = THIS_MODULE, \
	184	.volt_table = voltages, \
	185	.vsel_reg = (base), \
	186	.vsel_mask = (mask), \
	187	}, \
	188	}
	189
	190	#define PFUZE100_VGEN_REG(_name, base, min, max, step) \
	191	[PFUZE100_ ## _name] = { \
	192	.desc = { \
	193	.name = #_name, \
	194	.n_voltages = ((max) - (min)) / (step) + 1, \
	195	.ops = &pfuze100_ldo_regulator_ops, \
	196	.type = REGULATOR_VOLTAGE, \
	197	.id = PFUZE100_ ## _name, \
	198	.owner = THIS_MODULE, \
	199	.min_uV = (min), \
	200	.uV_step = (step), \
201	.vsel_reg = (base), \
202	.vsel_mask = 0xf, \
203	.enable_reg = (base), \
204	.enable_mask = 0x10, \
205	}, \
206	.stby_reg = (base), \
207	.stby_mask = 0x20, \
208	}
209
210	static struct pfuze_regulator pfuze100_regulators[] = {
211	PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
212	PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
213	PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
214	PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
215	PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
216	PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
217	PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
218	PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
219	PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000),
220	PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
221	PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
222	PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
223	PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
224	PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
225	PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
226	};
227
228	#ifdef CONFIG_OF
229	static struct of_regulator_match pfuze100_matches[] = {
230	{ .name = "sw1ab", },
231	{ .name = "sw1c", },
232	{ .name = "sw2", },
233	{ .name = "sw3a", },
234	{ .name = "sw3b", },
235	{ .name = "sw4", },
236	{ .name = "swbst", },
237	{ .name = "vsnvs", },
238	{ .name = "vrefddr", },
239	{ .name = "vgen1", },
240	{ .name = "vgen2", },
241	{ .name = "vgen3", },
242	{ .name = "vgen4", },
243	{ .name = "vgen5", },
244	{ .name = "vgen6", },
245	};
246
247	static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
248	{
249	struct device *dev = chip->dev;
250	struct device_node np, parent;
251	int ret;
252
253	np = of_node_get(dev->parent->of_node);
254	if (!np)
255	return 0;
256
257	parent = of_find_node_by_name(np, "regulators");
258	if (!parent) {
259	dev_err(dev, "regulators node not found\n");
260	return -EINVAL;
261	}
262
263	ret = of_regulator_match(dev, parent, pfuze100_matches,
264	ARRAY_SIZE(pfuze100_matches));
265
266	of_node_put(parent);
267	if (ret < 0) {
268	dev_err(dev, "Error parsing regulator init data: %d\n",
269	ret);
270	return ret;
271	}
272
273	return 0;
274	}
275
276	static inline struct regulator_init_data *match_init_data(int index)
277	{
278	return pfuze100_matches[index].init_data;
279	}
280
281	static inline struct device_node *match_of_node(int index)
282	{
283	return pfuze100_matches[index].of_node;
284	}
285	#else
286	static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
287	{
205c97bc	288	return 0;
3784b6d6 RG	289	}
	290
	291	static inline struct regulator_init_data *match_init_data(int index)
	292	{
	293	return NULL;
	294	}
	295
	296	static inline struct device_node *match_of_node(int index)
	297	{
	298	return NULL;
	299	}
	300	#endif
	301
	302	static int pfuze_identify(struct pfuze_chip *pfuze_chip)
	303	{
	304	unsigned int value;
	305	int ret;
	306
	307	ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
	308	if (ret)
	309	return ret;
	310
236c427c TH	311	switch (value & 0x0f) {
	312	/* Freescale misprogrammed 1-3% of parts prior to week 8 of 2013 as ID=8 */
	313	case 0x8:
	314	dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
	315	case 0x0:
	316	break;
	317	default:
	318	dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
	319	return -ENODEV;
3784b6d6 RG	320	}
	321
	322	ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
	323	if (ret)
	324	return ret;
	325	dev_info(pfuze_chip->dev,
	326	"Full lay: %x, Metal lay: %x\n",
	327	(value & 0xf0) >> 4, value & 0x0f);
	328
	329	ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
	330	if (ret)
	331	return ret;
	332	dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
	333	(value & 0xc) >> 2, value & 0x3);
	334
	335	return 0;
	336	}
	337
	338	static const struct regmap_config pfuze_regmap_config = {
	339	.reg_bits = 8,
	340	.val_bits = 8,
6b8430c3	341	.max_register = PFUZE_NUMREGS - 1,
3784b6d6 RG	342	.cache_type = REGCACHE_RBTREE,
	343	};
	344
	345	static int pfuze100_regulator_probe(struct i2c_client *client,
	346	const struct i2c_device_id *id)
	347	{
	348	struct pfuze_chip *pfuze_chip;
	349	struct pfuze_regulator_platform_data *pdata =
	350	dev_get_platdata(&client->dev);
	351	struct regulator_config config = { };
	352	int i, ret;
	353
	354	pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
	355	GFP_KERNEL);
	356	if (!pfuze_chip)
	357	return -ENOMEM;
	358
8c86ab25	359	i2c_set_clientdata(client, pfuze_chip);
3784b6d6 RG	360
	361	memcpy(pfuze_chip->regulator_descs, pfuze100_regulators,
	362	sizeof(pfuze_chip->regulator_descs));
	363
	364	pfuze_chip->dev = &client->dev;
	365
	366	pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
	367	if (IS_ERR(pfuze_chip->regmap)) {
	368	ret = PTR_ERR(pfuze_chip->regmap);
	369	dev_err(&client->dev,
	370	"regmap allocation failed with err %d\n", ret);
	371	return ret;
	372	}
	373
	374	ret = pfuze_identify(pfuze_chip);
	375	if (ret) {
	376	dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
	377	return ret;
	378	}
	379
	380	ret = pfuze_parse_regulators_dt(pfuze_chip);
	381	if (ret)
	382	return ret;
	383
	384	for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) {
	385	struct regulator_init_data *init_data;
d9493234	386	struct regulator_desc *desc;
3784b6d6 RG	387	int val;
3784b6d6 RG	388
d9493234 AL	389	desc = &pfuze_chip->regulator_descs[i].desc;
d9493234 AL	390
3784b6d6 RG	391	if (pdata)
	392	init_data = pdata->init_data[i];
	393	else
	394	init_data = match_init_data(i);
	395
	396	/* SW2~SW4 high bit check and modify the voltage value table */
	397	if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) {
d9493234	398	regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
3784b6d6	399	if (val & 0x40) {
d9493234 AL	400	desc->min_uV = 800000;
	401	desc->uV_step = 50000;
	402	desc->n_voltages = 51;
3784b6d6 RG	403	}
	404	}
	405
	406	config.dev = &client->dev;
	407	config.init_data = init_data;
	408	config.driver_data = pfuze_chip;
	409	config.of_node = match_of_node(i);
	410
d9493234	411	pfuze_chip->regulators[i] = regulator_register(desc, &config);
3784b6d6 RG	412	if (IS_ERR(pfuze_chip->regulators[i])) {
	413	dev_err(&client->dev, "register regulator%s failed\n",
	414	pfuze100_regulators[i].desc.name);
	415	ret = PTR_ERR(pfuze_chip->regulators[i]);
	416	while (--i >= 0)
	417	regulator_unregister(pfuze_chip->regulators[i]);
	418	return ret;
	419	}
	420	}
	421
	422	return 0;
	423	}
	424
	425	static int pfuze100_regulator_remove(struct i2c_client *client)
	426	{
	427	int i;
8c86ab25	428	struct pfuze_chip *pfuze_chip = i2c_get_clientdata(client);
3784b6d6 RG	429
	430	for (i = 0; i < PFUZE100_MAX_REGULATOR; i++)
	431	regulator_unregister(pfuze_chip->regulators[i]);
	432
	433	return 0;
	434	}
	435
	436	static struct i2c_driver pfuze_driver = {
	437	.id_table = pfuze_device_id,
	438	.driver = {
	439	.name = "pfuze100-regulator",
	440	.owner = THIS_MODULE,
	441	.of_match_table = pfuze_dt_ids,
	442	},
	443	.probe = pfuze100_regulator_probe,
	444	.remove = pfuze100_regulator_remove,
	445	};
	446	module_i2c_driver(pfuze_driver);
	447
	448	MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
	449	MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100 PMIC");
12d20fc2	450	MODULE_LICENSE("GPL v2");
40839bff	451	MODULE_ALIAS("i2c:pfuze100-regulator");