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1 | /* |
2 | * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/err.h> | |
22 | #include <linux/of.h> | |
23 | #include <linux/of_device.h> | |
24 | #include <linux/regulator/of_regulator.h> | |
25 | #include <linux/platform_device.h> | |
26 | #include <linux/regulator/driver.h> | |
27 | #include <linux/regulator/machine.h> | |
28 | #include <linux/regulator/pfuze100.h> | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/slab.h> | |
31 | #include <linux/regmap.h> | |
32 | ||
33 | #define PFUZE_NUMREGS 128 | |
34 | #define PFUZE100_VOL_OFFSET 0 | |
35 | #define PFUZE100_STANDBY_OFFSET 1 | |
36 | #define PFUZE100_MODE_OFFSET 3 | |
37 | #define PFUZE100_CONF_OFFSET 4 | |
38 | ||
39 | #define PFUZE100_DEVICEID 0x0 | |
40 | #define PFUZE100_REVID 0x3 | |
41 | #define PFUZE100_FABID 0x3 | |
42 | ||
43 | #define PFUZE100_SW1ABVOL 0x20 | |
44 | #define PFUZE100_SW1CVOL 0x2e | |
45 | #define PFUZE100_SW2VOL 0x35 | |
46 | #define PFUZE100_SW3AVOL 0x3c | |
47 | #define PFUZE100_SW3BVOL 0x43 | |
48 | #define PFUZE100_SW4VOL 0x4a | |
49 | #define PFUZE100_SWBSTCON1 0x66 | |
50 | #define PFUZE100_VREFDDRCON 0x6a | |
51 | #define PFUZE100_VSNVSVOL 0x6b | |
52 | #define PFUZE100_VGEN1VOL 0x6c | |
53 | #define PFUZE100_VGEN2VOL 0x6d | |
54 | #define PFUZE100_VGEN3VOL 0x6e | |
55 | #define PFUZE100_VGEN4VOL 0x6f | |
56 | #define PFUZE100_VGEN5VOL 0x70 | |
57 | #define PFUZE100_VGEN6VOL 0x71 | |
58 | ||
59 | struct pfuze_regulator { | |
60 | struct regulator_desc desc; | |
61 | unsigned char stby_reg; | |
62 | unsigned char stby_mask; | |
63 | }; | |
64 | ||
65 | struct pfuze_chip { | |
66 | struct regmap *regmap; | |
67 | struct device *dev; | |
68 | struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR]; | |
69 | struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR]; | |
70 | }; | |
71 | ||
72 | static const int pfuze100_swbst[] = { | |
73 | 5000000, 5050000, 5100000, 5150000, | |
74 | }; | |
75 | ||
76 | static const int pfuze100_vsnvs[] = { | |
77 | 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000, | |
78 | }; | |
79 | ||
80 | static const struct i2c_device_id pfuze_device_id[] = { | |
81 | {.name = "pfuze100"}, | |
82 | {}, | |
83 | }; | |
84 | MODULE_DEVICE_TABLE(i2c, pfuze_device_id); | |
85 | ||
86 | static const struct of_device_id pfuze_dt_ids[] = { | |
87 | { .compatible = "fsl,pfuze100" }, | |
88 | {}, | |
89 | }; | |
90 | MODULE_DEVICE_TABLE(of, pfuze_dt_ids); | |
91 | ||
92 | static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) | |
93 | { | |
94 | struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev); | |
95 | int id = rdev->desc->id; | |
96 | unsigned int val, ramp_bits, reg; | |
97 | int ret; | |
98 | ||
99 | if (id < PFUZE100_SWBST) { | |
100 | if (id == PFUZE100_SW1AB) | |
101 | reg = PFUZE100_SW1ABVOL; | |
102 | else | |
103 | reg = PFUZE100_SW1CVOL + (id - PFUZE100_SW1C) * 7; | |
104 | regmap_read(pfuze100->regmap, reg, &val); | |
105 | ||
106 | if (id <= PFUZE100_SW1C) | |
107 | ramp_delay = 25000 / (2 * ramp_delay); | |
108 | else if (val & 0x40) | |
109 | ramp_delay = 50000 / (4 * ramp_delay); | |
110 | else | |
111 | ramp_delay = 25000 / (2 * ramp_delay); | |
112 | ||
113 | ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3); | |
114 | ret = regmap_update_bits(pfuze100->regmap, reg + 4 , 0xc0, | |
115 | ramp_bits << 6); | |
116 | if (ret < 0) | |
117 | dev_err(pfuze100->dev, "ramp failed, err %d\n", ret); | |
118 | } else | |
119 | ret = -EACCES; | |
120 | ||
121 | return ret; | |
122 | } | |
123 | ||
124 | static struct regulator_ops pfuze100_ldo_regulator_ops = { | |
125 | .enable = regulator_enable_regmap, | |
126 | .disable = regulator_disable_regmap, | |
127 | .is_enabled = regulator_is_enabled_regmap, | |
128 | .list_voltage = regulator_list_voltage_linear, | |
129 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
130 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
131 | }; | |
132 | ||
133 | static struct regulator_ops pfuze100_fixed_regulator_ops = { | |
134 | .list_voltage = regulator_list_voltage_linear, | |
135 | }; | |
136 | ||
137 | static struct regulator_ops pfuze100_sw_regulator_ops = { | |
138 | .list_voltage = regulator_list_voltage_linear, | |
139 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
140 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
141 | .set_voltage_time_sel = regulator_set_voltage_time_sel, | |
142 | .set_ramp_delay = pfuze100_set_ramp_delay, | |
143 | }; | |
144 | ||
145 | static struct regulator_ops pfuze100_swb_regulator_ops = { | |
146 | .list_voltage = regulator_list_voltage_table, | |
147 | .set_voltage_sel = regulator_set_voltage_sel_regmap, | |
148 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
149 | ||
150 | }; | |
151 | ||
152 | #define PFUZE100_FIXED_REG(_name, base, voltage) \ | |
153 | [PFUZE100_ ## _name] = { \ | |
154 | .desc = { \ | |
155 | .name = #_name, \ | |
156 | .n_voltages = 1, \ | |
157 | .ops = &pfuze100_fixed_regulator_ops, \ | |
158 | .type = REGULATOR_VOLTAGE, \ | |
159 | .id = PFUZE100_ ## _name, \ | |
160 | .owner = THIS_MODULE, \ | |
161 | .min_uV = (voltage), \ | |
162 | .enable_reg = (base), \ | |
163 | .enable_mask = 0x10, \ | |
164 | }, \ | |
165 | } | |
166 | ||
167 | #define PFUZE100_SW_REG(_name, base, min, max, step) \ | |
168 | [PFUZE100_ ## _name] = { \ | |
169 | .desc = { \ | |
170 | .name = #_name,\ | |
171 | .n_voltages = ((max) - (min)) / (step) + 1, \ | |
172 | .ops = &pfuze100_sw_regulator_ops, \ | |
173 | .type = REGULATOR_VOLTAGE, \ | |
174 | .id = PFUZE100_ ## _name, \ | |
175 | .owner = THIS_MODULE, \ | |
176 | .min_uV = (min), \ | |
177 | .uV_step = (step), \ | |
178 | .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \ | |
179 | .vsel_mask = 0x3f, \ | |
180 | }, \ | |
181 | .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \ | |
182 | .stby_mask = 0x3f, \ | |
183 | } | |
184 | ||
185 | #define PFUZE100_SWB_REG(_name, base, mask, voltages) \ | |
186 | [PFUZE100_ ## _name] = { \ | |
187 | .desc = { \ | |
188 | .name = #_name, \ | |
189 | .n_voltages = ARRAY_SIZE(voltages), \ | |
190 | .ops = &pfuze100_swb_regulator_ops, \ | |
191 | .type = REGULATOR_VOLTAGE, \ | |
192 | .id = PFUZE100_ ## _name, \ | |
193 | .owner = THIS_MODULE, \ | |
194 | .volt_table = voltages, \ | |
195 | .vsel_reg = (base), \ | |
196 | .vsel_mask = (mask), \ | |
197 | }, \ | |
198 | } | |
199 | ||
200 | #define PFUZE100_VGEN_REG(_name, base, min, max, step) \ | |
201 | [PFUZE100_ ## _name] = { \ | |
202 | .desc = { \ | |
203 | .name = #_name, \ | |
204 | .n_voltages = ((max) - (min)) / (step) + 1, \ | |
205 | .ops = &pfuze100_ldo_regulator_ops, \ | |
206 | .type = REGULATOR_VOLTAGE, \ | |
207 | .id = PFUZE100_ ## _name, \ | |
208 | .owner = THIS_MODULE, \ | |
209 | .min_uV = (min), \ | |
210 | .uV_step = (step), \ | |
211 | .vsel_reg = (base), \ | |
212 | .vsel_mask = 0xf, \ | |
213 | .enable_reg = (base), \ | |
214 | .enable_mask = 0x10, \ | |
215 | }, \ | |
216 | .stby_reg = (base), \ | |
217 | .stby_mask = 0x20, \ | |
218 | } | |
219 | ||
220 | static struct pfuze_regulator pfuze100_regulators[] = { | |
221 | PFUZE100_SW_REG(SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000), | |
222 | PFUZE100_SW_REG(SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000), | |
223 | PFUZE100_SW_REG(SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000), | |
224 | PFUZE100_SW_REG(SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000), | |
225 | PFUZE100_SW_REG(SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000), | |
226 | PFUZE100_SW_REG(SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000), | |
227 | PFUZE100_SWB_REG(SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst), | |
228 | PFUZE100_SWB_REG(VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs), | |
229 | PFUZE100_FIXED_REG(VREFDDR, PFUZE100_VREFDDRCON, 750000), | |
230 | PFUZE100_VGEN_REG(VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000), | |
231 | PFUZE100_VGEN_REG(VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000), | |
232 | PFUZE100_VGEN_REG(VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000), | |
233 | PFUZE100_VGEN_REG(VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000), | |
234 | PFUZE100_VGEN_REG(VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000), | |
235 | PFUZE100_VGEN_REG(VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000), | |
236 | }; | |
237 | ||
238 | #ifdef CONFIG_OF | |
239 | static struct of_regulator_match pfuze100_matches[] = { | |
240 | { .name = "sw1ab", }, | |
241 | { .name = "sw1c", }, | |
242 | { .name = "sw2", }, | |
243 | { .name = "sw3a", }, | |
244 | { .name = "sw3b", }, | |
245 | { .name = "sw4", }, | |
246 | { .name = "swbst", }, | |
247 | { .name = "vsnvs", }, | |
248 | { .name = "vrefddr", }, | |
249 | { .name = "vgen1", }, | |
250 | { .name = "vgen2", }, | |
251 | { .name = "vgen3", }, | |
252 | { .name = "vgen4", }, | |
253 | { .name = "vgen5", }, | |
254 | { .name = "vgen6", }, | |
255 | }; | |
256 | ||
257 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | |
258 | { | |
259 | struct device *dev = chip->dev; | |
260 | struct device_node *np, *parent; | |
261 | int ret; | |
262 | ||
263 | np = of_node_get(dev->parent->of_node); | |
264 | if (!np) | |
265 | return 0; | |
266 | ||
267 | parent = of_find_node_by_name(np, "regulators"); | |
268 | if (!parent) { | |
269 | dev_err(dev, "regulators node not found\n"); | |
270 | return -EINVAL; | |
271 | } | |
272 | ||
273 | ret = of_regulator_match(dev, parent, pfuze100_matches, | |
274 | ARRAY_SIZE(pfuze100_matches)); | |
275 | ||
276 | of_node_put(parent); | |
277 | if (ret < 0) { | |
278 | dev_err(dev, "Error parsing regulator init data: %d\n", | |
279 | ret); | |
280 | return ret; | |
281 | } | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
286 | static inline struct regulator_init_data *match_init_data(int index) | |
287 | { | |
288 | return pfuze100_matches[index].init_data; | |
289 | } | |
290 | ||
291 | static inline struct device_node *match_of_node(int index) | |
292 | { | |
293 | return pfuze100_matches[index].of_node; | |
294 | } | |
295 | #else | |
296 | static int pfuze_parse_regulators_dt(struct pfuze_chip *chip) | |
297 | { | |
298 | return NULL; | |
299 | } | |
300 | ||
301 | static inline struct regulator_init_data *match_init_data(int index) | |
302 | { | |
303 | return NULL; | |
304 | } | |
305 | ||
306 | static inline struct device_node *match_of_node(int index) | |
307 | { | |
308 | return NULL; | |
309 | } | |
310 | #endif | |
311 | ||
312 | static int pfuze_identify(struct pfuze_chip *pfuze_chip) | |
313 | { | |
314 | unsigned int value; | |
315 | int ret; | |
316 | ||
317 | ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value); | |
318 | if (ret) | |
319 | return ret; | |
320 | ||
321 | if (value & 0x0f) { | |
322 | dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value); | |
323 | return -ENODEV; | |
324 | } | |
325 | ||
326 | ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value); | |
327 | if (ret) | |
328 | return ret; | |
329 | dev_info(pfuze_chip->dev, | |
330 | "Full lay: %x, Metal lay: %x\n", | |
331 | (value & 0xf0) >> 4, value & 0x0f); | |
332 | ||
333 | ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value); | |
334 | if (ret) | |
335 | return ret; | |
336 | dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n", | |
337 | (value & 0xc) >> 2, value & 0x3); | |
338 | ||
339 | return 0; | |
340 | } | |
341 | ||
342 | static const struct regmap_config pfuze_regmap_config = { | |
343 | .reg_bits = 8, | |
344 | .val_bits = 8, | |
345 | .max_register = PFUZE_NUMREGS, | |
346 | .cache_type = REGCACHE_RBTREE, | |
347 | }; | |
348 | ||
349 | static int pfuze100_regulator_probe(struct i2c_client *client, | |
350 | const struct i2c_device_id *id) | |
351 | { | |
352 | struct pfuze_chip *pfuze_chip; | |
353 | struct pfuze_regulator_platform_data *pdata = | |
354 | dev_get_platdata(&client->dev); | |
355 | struct regulator_config config = { }; | |
356 | int i, ret; | |
357 | ||
358 | pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip), | |
359 | GFP_KERNEL); | |
360 | if (!pfuze_chip) | |
361 | return -ENOMEM; | |
362 | ||
363 | dev_set_drvdata(&client->dev, pfuze_chip); | |
364 | ||
365 | memcpy(pfuze_chip->regulator_descs, pfuze100_regulators, | |
366 | sizeof(pfuze_chip->regulator_descs)); | |
367 | ||
368 | pfuze_chip->dev = &client->dev; | |
369 | ||
370 | pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config); | |
371 | if (IS_ERR(pfuze_chip->regmap)) { | |
372 | ret = PTR_ERR(pfuze_chip->regmap); | |
373 | dev_err(&client->dev, | |
374 | "regmap allocation failed with err %d\n", ret); | |
375 | return ret; | |
376 | } | |
377 | ||
378 | ret = pfuze_identify(pfuze_chip); | |
379 | if (ret) { | |
380 | dev_err(&client->dev, "unrecognized pfuze chip ID!\n"); | |
381 | return ret; | |
382 | } | |
383 | ||
384 | ret = pfuze_parse_regulators_dt(pfuze_chip); | |
385 | if (ret) | |
386 | return ret; | |
387 | ||
388 | for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) { | |
389 | struct regulator_init_data *init_data; | |
390 | int val; | |
391 | ||
392 | if (pdata) | |
393 | init_data = pdata->init_data[i]; | |
394 | else | |
395 | init_data = match_init_data(i); | |
396 | ||
397 | /* SW2~SW4 high bit check and modify the voltage value table */ | |
398 | if (i > PFUZE100_SW1C && i < PFUZE100_SWBST) { | |
399 | regmap_read(pfuze_chip->regmap, PFUZE100_SW2VOL + | |
400 | (i - PFUZE100_SW2) * 7, &val); | |
401 | if (val & 0x40) { | |
402 | pfuze_chip->regulator_descs[i].desc.min_uV | |
403 | = 800000; | |
404 | pfuze_chip->regulator_descs[i].desc.uV_step | |
405 | = 50000; | |
406 | } | |
407 | } | |
408 | ||
409 | config.dev = &client->dev; | |
410 | config.init_data = init_data; | |
411 | config.driver_data = pfuze_chip; | |
412 | config.of_node = match_of_node(i); | |
413 | ||
414 | pfuze_chip->regulators[i] = regulator_register(&pfuze_chip | |
415 | ->regulator_descs[i].desc, &config); | |
416 | if (IS_ERR(pfuze_chip->regulators[i])) { | |
417 | dev_err(&client->dev, "register regulator%s failed\n", | |
418 | pfuze100_regulators[i].desc.name); | |
419 | ret = PTR_ERR(pfuze_chip->regulators[i]); | |
420 | while (--i >= 0) | |
421 | regulator_unregister(pfuze_chip->regulators[i]); | |
422 | return ret; | |
423 | } | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
429 | static int pfuze100_regulator_remove(struct i2c_client *client) | |
430 | { | |
431 | int i; | |
432 | struct pfuze_chip *pfuze_chip = dev_get_drvdata(&client->dev); | |
433 | ||
434 | for (i = 0; i < PFUZE100_MAX_REGULATOR; i++) | |
435 | regulator_unregister(pfuze_chip->regulators[i]); | |
436 | ||
437 | return 0; | |
438 | } | |
439 | ||
440 | static struct i2c_driver pfuze_driver = { | |
441 | .id_table = pfuze_device_id, | |
442 | .driver = { | |
443 | .name = "pfuze100-regulator", | |
444 | .owner = THIS_MODULE, | |
445 | .of_match_table = pfuze_dt_ids, | |
446 | }, | |
447 | .probe = pfuze100_regulator_probe, | |
448 | .remove = pfuze100_regulator_remove, | |
449 | }; | |
450 | module_i2c_driver(pfuze_driver); | |
451 | ||
452 | MODULE_AUTHOR("Robin Gong <b38343@freescale.com>"); | |
453 | MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100 PMIC"); | |
454 | MODULE_ALIAS("pfuze100-regulator"); |