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97fb5e8d | 1 | // SPDX-License-Identifier: GPL-2.0-only |
da65e367 BA |
2 | /* |
3 | * Copyright (c) 2015, Sony Mobile Communications AB. | |
4 | * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. | |
da65e367 BA |
5 | */ |
6 | ||
7 | #include <linux/module.h> | |
8 | #include <linux/of.h> | |
9 | #include <linux/of_device.h> | |
10 | #include <linux/platform_device.h> | |
11 | #include <linux/regulator/driver.h> | |
da65e367 BA |
12 | #include <linux/soc/qcom/smd-rpm.h> |
13 | ||
14 | struct qcom_rpm_reg { | |
15 | struct device *dev; | |
16 | ||
17 | struct qcom_smd_rpm *rpm; | |
18 | ||
19 | u32 type; | |
20 | u32 id; | |
21 | ||
22 | struct regulator_desc desc; | |
23 | ||
24 | int is_enabled; | |
25 | int uV; | |
fd805d99 BA |
26 | u32 load; |
27 | ||
28 | unsigned int enabled_updated:1; | |
29 | unsigned int uv_updated:1; | |
30 | unsigned int load_updated:1; | |
da65e367 BA |
31 | }; |
32 | ||
33 | struct rpm_regulator_req { | |
2c652a98 SB |
34 | __le32 key; |
35 | __le32 nbytes; | |
36 | __le32 value; | |
da65e367 BA |
37 | }; |
38 | ||
39 | #define RPM_KEY_SWEN 0x6e657773 /* "swen" */ | |
40 | #define RPM_KEY_UV 0x00007675 /* "uv" */ | |
41 | #define RPM_KEY_MA 0x0000616d /* "ma" */ | |
42 | ||
fd805d99 | 43 | static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) |
da65e367 | 44 | { |
fd805d99 BA |
45 | struct rpm_regulator_req req[3]; |
46 | int reqlen = 0; | |
47 | int ret; | |
48 | ||
49 | if (vreg->enabled_updated) { | |
50 | req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN); | |
51 | req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); | |
52 | req[reqlen].value = cpu_to_le32(vreg->is_enabled); | |
53 | reqlen++; | |
54 | } | |
55 | ||
56 | if (vreg->uv_updated && vreg->is_enabled) { | |
57 | req[reqlen].key = cpu_to_le32(RPM_KEY_UV); | |
58 | req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); | |
59 | req[reqlen].value = cpu_to_le32(vreg->uV); | |
60 | reqlen++; | |
61 | } | |
62 | ||
63 | if (vreg->load_updated && vreg->is_enabled) { | |
64 | req[reqlen].key = cpu_to_le32(RPM_KEY_MA); | |
65 | req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); | |
66 | req[reqlen].value = cpu_to_le32(vreg->load / 1000); | |
67 | reqlen++; | |
68 | } | |
69 | ||
70 | if (!reqlen) | |
71 | return 0; | |
72 | ||
73 | ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE, | |
74 | vreg->type, vreg->id, | |
75 | req, sizeof(req[0]) * reqlen); | |
76 | if (!ret) { | |
77 | vreg->enabled_updated = 0; | |
78 | vreg->uv_updated = 0; | |
79 | vreg->load_updated = 0; | |
80 | } | |
81 | ||
82 | return ret; | |
da65e367 BA |
83 | } |
84 | ||
85 | static int rpm_reg_enable(struct regulator_dev *rdev) | |
86 | { | |
87 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
da65e367 BA |
88 | int ret; |
89 | ||
fd805d99 BA |
90 | vreg->is_enabled = 1; |
91 | vreg->enabled_updated = 1; | |
da65e367 | 92 | |
fd805d99 BA |
93 | ret = rpm_reg_write_active(vreg); |
94 | if (ret) | |
95 | vreg->is_enabled = 0; | |
da65e367 BA |
96 | |
97 | return ret; | |
98 | } | |
99 | ||
100 | static int rpm_reg_is_enabled(struct regulator_dev *rdev) | |
101 | { | |
102 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
103 | ||
104 | return vreg->is_enabled; | |
105 | } | |
106 | ||
107 | static int rpm_reg_disable(struct regulator_dev *rdev) | |
108 | { | |
109 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
da65e367 BA |
110 | int ret; |
111 | ||
fd805d99 BA |
112 | vreg->is_enabled = 0; |
113 | vreg->enabled_updated = 1; | |
da65e367 | 114 | |
fd805d99 BA |
115 | ret = rpm_reg_write_active(vreg); |
116 | if (ret) | |
117 | vreg->is_enabled = 1; | |
da65e367 BA |
118 | |
119 | return ret; | |
120 | } | |
121 | ||
122 | static int rpm_reg_get_voltage(struct regulator_dev *rdev) | |
123 | { | |
124 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
125 | ||
126 | return vreg->uV; | |
127 | } | |
128 | ||
129 | static int rpm_reg_set_voltage(struct regulator_dev *rdev, | |
130 | int min_uV, | |
131 | int max_uV, | |
132 | unsigned *selector) | |
133 | { | |
134 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
fd805d99 BA |
135 | int ret; |
136 | int old_uV = vreg->uV; | |
da65e367 | 137 | |
fd805d99 BA |
138 | vreg->uV = min_uV; |
139 | vreg->uv_updated = 1; | |
da65e367 | 140 | |
fd805d99 BA |
141 | ret = rpm_reg_write_active(vreg); |
142 | if (ret) | |
143 | vreg->uV = old_uV; | |
da65e367 BA |
144 | |
145 | return ret; | |
146 | } | |
147 | ||
148 | static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) | |
149 | { | |
150 | struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); | |
fd805d99 BA |
151 | u32 old_load = vreg->load; |
152 | int ret; | |
da65e367 | 153 | |
fd805d99 BA |
154 | vreg->load = load_uA; |
155 | vreg->load_updated = 1; | |
156 | ret = rpm_reg_write_active(vreg); | |
157 | if (ret) | |
158 | vreg->load = old_load; | |
da65e367 | 159 | |
fd805d99 | 160 | return ret; |
da65e367 BA |
161 | } |
162 | ||
163 | static const struct regulator_ops rpm_smps_ldo_ops = { | |
164 | .enable = rpm_reg_enable, | |
165 | .disable = rpm_reg_disable, | |
166 | .is_enabled = rpm_reg_is_enabled, | |
a8a47540 | 167 | .list_voltage = regulator_list_voltage_linear_range, |
da65e367 BA |
168 | |
169 | .get_voltage = rpm_reg_get_voltage, | |
170 | .set_voltage = rpm_reg_set_voltage, | |
171 | ||
172 | .set_load = rpm_reg_set_load, | |
173 | }; | |
174 | ||
d1e44b6b SK |
175 | static const struct regulator_ops rpm_smps_ldo_ops_fixed = { |
176 | .enable = rpm_reg_enable, | |
177 | .disable = rpm_reg_disable, | |
178 | .is_enabled = rpm_reg_is_enabled, | |
179 | ||
180 | .get_voltage = rpm_reg_get_voltage, | |
181 | .set_voltage = rpm_reg_set_voltage, | |
182 | ||
183 | .set_load = rpm_reg_set_load, | |
184 | }; | |
185 | ||
da65e367 BA |
186 | static const struct regulator_ops rpm_switch_ops = { |
187 | .enable = rpm_reg_enable, | |
188 | .disable = rpm_reg_disable, | |
189 | .is_enabled = rpm_reg_is_enabled, | |
190 | }; | |
191 | ||
3cdb741e BA |
192 | static const struct regulator_ops rpm_bob_ops = { |
193 | .enable = rpm_reg_enable, | |
194 | .disable = rpm_reg_disable, | |
195 | .is_enabled = rpm_reg_is_enabled, | |
196 | ||
197 | .get_voltage = rpm_reg_get_voltage, | |
198 | .set_voltage = rpm_reg_set_voltage, | |
199 | }; | |
200 | ||
47894c85 K |
201 | static const struct regulator_ops rpm_mp5496_ops = { |
202 | .enable = rpm_reg_enable, | |
203 | .disable = rpm_reg_disable, | |
204 | .is_enabled = rpm_reg_is_enabled, | |
205 | .list_voltage = regulator_list_voltage_linear_range, | |
206 | ||
207 | .set_voltage = rpm_reg_set_voltage, | |
208 | }; | |
209 | ||
ee01d0c9 | 210 | static const struct regulator_desc pma8084_hfsmps = { |
60ab7f41 | 211 | .linear_ranges = (struct linear_range[]) { |
ee01d0c9 AG |
212 | REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), |
213 | REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), | |
214 | }, | |
215 | .n_linear_ranges = 2, | |
216 | .n_voltages = 159, | |
217 | .ops = &rpm_smps_ldo_ops, | |
218 | }; | |
219 | ||
220 | static const struct regulator_desc pma8084_ftsmps = { | |
60ab7f41 | 221 | .linear_ranges = (struct linear_range[]) { |
ee01d0c9 | 222 | REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), |
c488f007 | 223 | REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), |
ee01d0c9 AG |
224 | }, |
225 | .n_linear_ranges = 2, | |
c488f007 | 226 | .n_voltages = 262, |
ee01d0c9 AG |
227 | .ops = &rpm_smps_ldo_ops, |
228 | }; | |
229 | ||
230 | static const struct regulator_desc pma8084_pldo = { | |
60ab7f41 | 231 | .linear_ranges = (struct linear_range[]) { |
c488f007 SB |
232 | REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), |
233 | REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), | |
234 | REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), | |
ee01d0c9 | 235 | }, |
c488f007 SB |
236 | .n_linear_ranges = 3, |
237 | .n_voltages = 164, | |
ee01d0c9 AG |
238 | .ops = &rpm_smps_ldo_ops, |
239 | }; | |
240 | ||
241 | static const struct regulator_desc pma8084_nldo = { | |
60ab7f41 | 242 | .linear_ranges = (struct linear_range[]) { |
ee01d0c9 AG |
243 | REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), |
244 | }, | |
245 | .n_linear_ranges = 1, | |
246 | .n_voltages = 64, | |
247 | .ops = &rpm_smps_ldo_ops, | |
248 | }; | |
249 | ||
250 | static const struct regulator_desc pma8084_switch = { | |
251 | .ops = &rpm_switch_ops, | |
252 | }; | |
253 | ||
da65e367 | 254 | static const struct regulator_desc pm8x41_hfsmps = { |
60ab7f41 | 255 | .linear_ranges = (struct linear_range[]) { |
da65e367 | 256 | REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), |
b7a8524c | 257 | REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), |
da65e367 BA |
258 | }, |
259 | .n_linear_ranges = 2, | |
260 | .n_voltages = 159, | |
261 | .ops = &rpm_smps_ldo_ops, | |
262 | }; | |
263 | ||
264 | static const struct regulator_desc pm8841_ftsmps = { | |
60ab7f41 | 265 | .linear_ranges = (struct linear_range[]) { |
da65e367 | 266 | REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), |
29028477 | 267 | REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), |
da65e367 BA |
268 | }, |
269 | .n_linear_ranges = 2, | |
29028477 | 270 | .n_voltages = 262, |
da65e367 BA |
271 | .ops = &rpm_smps_ldo_ops, |
272 | }; | |
273 | ||
274 | static const struct regulator_desc pm8941_boost = { | |
60ab7f41 | 275 | .linear_ranges = (struct linear_range[]) { |
29028477 | 276 | REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), |
da65e367 BA |
277 | }, |
278 | .n_linear_ranges = 1, | |
29028477 | 279 | .n_voltages = 31, |
da65e367 BA |
280 | .ops = &rpm_smps_ldo_ops, |
281 | }; | |
282 | ||
283 | static const struct regulator_desc pm8941_pldo = { | |
60ab7f41 | 284 | .linear_ranges = (struct linear_range[]) { |
29028477 SB |
285 | REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), |
286 | REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), | |
287 | REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), | |
da65e367 | 288 | }, |
29028477 SB |
289 | .n_linear_ranges = 3, |
290 | .n_voltages = 164, | |
da65e367 BA |
291 | .ops = &rpm_smps_ldo_ops, |
292 | }; | |
293 | ||
294 | static const struct regulator_desc pm8941_nldo = { | |
60ab7f41 | 295 | .linear_ranges = (struct linear_range[]) { |
da65e367 BA |
296 | REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), |
297 | }, | |
298 | .n_linear_ranges = 1, | |
299 | .n_voltages = 64, | |
300 | .ops = &rpm_smps_ldo_ops, | |
301 | }; | |
302 | ||
303 | static const struct regulator_desc pm8941_lnldo = { | |
304 | .fixed_uV = 1740000, | |
5a286aae | 305 | .n_voltages = 1, |
d1e44b6b | 306 | .ops = &rpm_smps_ldo_ops_fixed, |
da65e367 BA |
307 | }; |
308 | ||
309 | static const struct regulator_desc pm8941_switch = { | |
310 | .ops = &rpm_switch_ops, | |
311 | }; | |
312 | ||
57d65676 | 313 | static const struct regulator_desc pm8916_pldo = { |
60ab7f41 | 314 | .linear_ranges = (struct linear_range[]) { |
57d65676 AG |
315 | REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500), |
316 | }, | |
317 | .n_linear_ranges = 1, | |
318 | .n_voltages = 209, | |
319 | .ops = &rpm_smps_ldo_ops, | |
320 | }; | |
321 | ||
322 | static const struct regulator_desc pm8916_nldo = { | |
60ab7f41 | 323 | .linear_ranges = (struct linear_range[]) { |
57d65676 AG |
324 | REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), |
325 | }, | |
326 | .n_linear_ranges = 1, | |
327 | .n_voltages = 94, | |
328 | .ops = &rpm_smps_ldo_ops, | |
329 | }; | |
330 | ||
331 | static const struct regulator_desc pm8916_buck_lvo_smps = { | |
60ab7f41 | 332 | .linear_ranges = (struct linear_range[]) { |
57d65676 AG |
333 | REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), |
334 | REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000), | |
335 | }, | |
336 | .n_linear_ranges = 2, | |
337 | .n_voltages = 128, | |
338 | .ops = &rpm_smps_ldo_ops, | |
339 | }; | |
340 | ||
341 | static const struct regulator_desc pm8916_buck_hvo_smps = { | |
60ab7f41 | 342 | .linear_ranges = (struct linear_range[]) { |
57d65676 AG |
343 | REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000), |
344 | }, | |
345 | .n_linear_ranges = 1, | |
346 | .n_voltages = 32, | |
347 | .ops = &rpm_smps_ldo_ops, | |
348 | }; | |
349 | ||
e44adca5 | 350 | static const struct regulator_desc pm8950_hfsmps = { |
60ab7f41 | 351 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
352 | REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), |
353 | REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000), | |
354 | }, | |
355 | .n_linear_ranges = 2, | |
356 | .n_voltages = 128, | |
357 | .ops = &rpm_smps_ldo_ops, | |
358 | }; | |
359 | ||
360 | static const struct regulator_desc pm8950_ftsmps2p5 = { | |
60ab7f41 | 361 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
362 | REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000), |
363 | REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000), | |
364 | }, | |
365 | .n_linear_ranges = 2, | |
366 | .n_voltages = 461, | |
367 | .ops = &rpm_smps_ldo_ops, | |
368 | }; | |
369 | ||
370 | static const struct regulator_desc pm8950_ult_nldo = { | |
60ab7f41 | 371 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
372 | REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500), |
373 | }, | |
374 | .n_linear_ranges = 1, | |
375 | .n_voltages = 203, | |
376 | .ops = &rpm_smps_ldo_ops, | |
377 | }; | |
378 | ||
379 | static const struct regulator_desc pm8950_ult_pldo = { | |
60ab7f41 | 380 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
381 | REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), |
382 | }, | |
383 | .n_linear_ranges = 1, | |
384 | .n_voltages = 128, | |
385 | .ops = &rpm_smps_ldo_ops, | |
386 | }; | |
387 | ||
388 | static const struct regulator_desc pm8950_pldo_lv = { | |
60ab7f41 | 389 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
390 | REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000), |
391 | }, | |
392 | .n_linear_ranges = 1, | |
393 | .n_voltages = 17, | |
394 | .ops = &rpm_smps_ldo_ops, | |
395 | }; | |
396 | ||
397 | static const struct regulator_desc pm8950_pldo = { | |
60ab7f41 | 398 | .linear_ranges = (struct linear_range[]) { |
e44adca5 ADR |
399 | REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500), |
400 | }, | |
401 | .n_linear_ranges = 1, | |
402 | .n_voltages = 165, | |
403 | .ops = &rpm_smps_ldo_ops, | |
404 | }; | |
405 | ||
b1a2fb10 VL |
406 | static const struct regulator_desc pm8953_lnldo = { |
407 | .linear_ranges = (struct linear_range[]) { | |
408 | REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000), | |
409 | REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000), | |
410 | }, | |
411 | .n_linear_ranges = 2, | |
412 | .n_voltages = 16, | |
413 | .ops = &rpm_smps_ldo_ops, | |
414 | }; | |
415 | ||
416 | static const struct regulator_desc pm8953_ult_nldo = { | |
417 | .linear_ranges = (struct linear_range[]) { | |
418 | REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), | |
419 | }, | |
420 | .n_linear_ranges = 1, | |
421 | .n_voltages = 94, | |
422 | .ops = &rpm_smps_ldo_ops, | |
423 | }; | |
e44adca5 | 424 | |
14a16992 | 425 | static const struct regulator_desc pm8994_hfsmps = { |
60ab7f41 | 426 | .linear_ranges = (struct linear_range[]) { |
14a16992 RN |
427 | REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), |
428 | REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), | |
429 | }, | |
430 | .n_linear_ranges = 2, | |
431 | .n_voltages = 159, | |
432 | .ops = &rpm_smps_ldo_ops, | |
433 | }; | |
434 | ||
435 | static const struct regulator_desc pm8994_ftsmps = { | |
60ab7f41 | 436 | .linear_ranges = (struct linear_range[]) { |
14a16992 RN |
437 | REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), |
438 | REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), | |
439 | }, | |
440 | .n_linear_ranges = 2, | |
441 | .n_voltages = 350, | |
442 | .ops = &rpm_smps_ldo_ops, | |
443 | }; | |
444 | ||
445 | static const struct regulator_desc pm8994_nldo = { | |
60ab7f41 | 446 | .linear_ranges = (struct linear_range[]) { |
14a16992 RN |
447 | REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), |
448 | }, | |
449 | .n_linear_ranges = 1, | |
450 | .n_voltages = 64, | |
451 | .ops = &rpm_smps_ldo_ops, | |
452 | }; | |
453 | ||
454 | static const struct regulator_desc pm8994_pldo = { | |
60ab7f41 | 455 | .linear_ranges = (struct linear_range[]) { |
14a16992 RN |
456 | REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), |
457 | REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), | |
458 | REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), | |
459 | }, | |
460 | .n_linear_ranges = 3, | |
461 | .n_voltages = 164, | |
462 | .ops = &rpm_smps_ldo_ops, | |
463 | }; | |
464 | ||
465 | static const struct regulator_desc pm8994_switch = { | |
466 | .ops = &rpm_switch_ops, | |
467 | }; | |
468 | ||
469 | static const struct regulator_desc pm8994_lnldo = { | |
470 | .fixed_uV = 1740000, | |
471 | .n_voltages = 1, | |
472 | .ops = &rpm_smps_ldo_ops_fixed, | |
473 | }; | |
474 | ||
86332c34 | 475 | static const struct regulator_desc pmi8994_ftsmps = { |
60ab7f41 | 476 | .linear_ranges = (struct linear_range[]) { |
86332c34 BA |
477 | REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), |
478 | REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), | |
479 | }, | |
480 | .n_linear_ranges = 2, | |
481 | .n_voltages = 350, | |
482 | .ops = &rpm_smps_ldo_ops, | |
483 | }; | |
484 | ||
485 | static const struct regulator_desc pmi8994_hfsmps = { | |
60ab7f41 | 486 | .linear_ranges = (struct linear_range[]) { |
86332c34 BA |
487 | REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500), |
488 | REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000), | |
489 | }, | |
490 | .n_linear_ranges = 2, | |
491 | .n_voltages = 142, | |
492 | .ops = &rpm_smps_ldo_ops, | |
493 | }; | |
494 | ||
495 | static const struct regulator_desc pmi8994_bby = { | |
60ab7f41 | 496 | .linear_ranges = (struct linear_range[]) { |
86332c34 BA |
497 | REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000), |
498 | }, | |
499 | .n_linear_ranges = 1, | |
500 | .n_voltages = 45, | |
501 | .ops = &rpm_bob_ops, | |
502 | }; | |
503 | ||
3cdb741e | 504 | static const struct regulator_desc pm8998_ftsmps = { |
60ab7f41 | 505 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
506 | REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), |
507 | }, | |
508 | .n_linear_ranges = 1, | |
509 | .n_voltages = 259, | |
510 | .ops = &rpm_smps_ldo_ops, | |
511 | }; | |
512 | ||
513 | static const struct regulator_desc pm8998_hfsmps = { | |
60ab7f41 | 514 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
515 | REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), |
516 | }, | |
517 | .n_linear_ranges = 1, | |
518 | .n_voltages = 216, | |
519 | .ops = &rpm_smps_ldo_ops, | |
520 | }; | |
521 | ||
522 | static const struct regulator_desc pm8998_nldo = { | |
60ab7f41 | 523 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
524 | REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), |
525 | }, | |
526 | .n_linear_ranges = 1, | |
527 | .n_voltages = 128, | |
528 | .ops = &rpm_smps_ldo_ops, | |
529 | }; | |
530 | ||
531 | static const struct regulator_desc pm8998_pldo = { | |
60ab7f41 | 532 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
533 | REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), |
534 | }, | |
535 | .n_linear_ranges = 1, | |
536 | .n_voltages = 256, | |
537 | .ops = &rpm_smps_ldo_ops, | |
538 | }; | |
539 | ||
540 | static const struct regulator_desc pm8998_pldo_lv = { | |
60ab7f41 | 541 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
542 | REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), |
543 | }, | |
544 | .n_linear_ranges = 1, | |
545 | .n_voltages = 128, | |
546 | .ops = &rpm_smps_ldo_ops, | |
547 | }; | |
548 | ||
549 | static const struct regulator_desc pm8998_switch = { | |
550 | .ops = &rpm_switch_ops, | |
551 | }; | |
552 | ||
553 | static const struct regulator_desc pmi8998_bob = { | |
60ab7f41 | 554 | .linear_ranges = (struct linear_range[]) { |
3cdb741e BA |
555 | REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), |
556 | }, | |
557 | .n_linear_ranges = 1, | |
558 | .n_voltages = 84, | |
559 | .ops = &rpm_bob_ops, | |
560 | }; | |
561 | ||
6d849653 ADR |
562 | static const struct regulator_desc pm660_ftsmps = { |
563 | .linear_ranges = (struct linear_range[]) { | |
564 | REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000), | |
565 | }, | |
566 | .n_linear_ranges = 1, | |
567 | .n_voltages = 200, | |
568 | .ops = &rpm_smps_ldo_ops, | |
569 | }; | |
570 | ||
571 | static const struct regulator_desc pm660_hfsmps = { | |
572 | .linear_ranges = (struct linear_range[]) { | |
573 | REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000), | |
574 | }, | |
575 | .n_linear_ranges = 1, | |
576 | .n_voltages = 217, | |
577 | .ops = &rpm_smps_ldo_ops, | |
578 | }; | |
579 | ||
580 | static const struct regulator_desc pm660_ht_nldo = { | |
581 | .linear_ranges = (struct linear_range[]) { | |
582 | REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000), | |
583 | }, | |
584 | .n_linear_ranges = 1, | |
585 | .n_voltages = 125, | |
586 | .ops = &rpm_smps_ldo_ops, | |
587 | }; | |
588 | ||
589 | static const struct regulator_desc pm660_ht_lvpldo = { | |
590 | .linear_ranges = (struct linear_range[]) { | |
591 | REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), | |
592 | }, | |
593 | .n_linear_ranges = 1, | |
594 | .n_voltages = 63, | |
595 | .ops = &rpm_smps_ldo_ops, | |
596 | }; | |
597 | ||
598 | static const struct regulator_desc pm660_nldo660 = { | |
599 | .linear_ranges = (struct linear_range[]) { | |
600 | REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), | |
601 | }, | |
602 | .n_linear_ranges = 1, | |
603 | .n_voltages = 124, | |
604 | .ops = &rpm_smps_ldo_ops, | |
605 | }; | |
606 | ||
607 | static const struct regulator_desc pm660_pldo660 = { | |
608 | .linear_ranges = (struct linear_range[]) { | |
609 | REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), | |
610 | }, | |
611 | .n_linear_ranges = 1, | |
612 | .n_voltages = 256, | |
613 | .ops = &rpm_smps_ldo_ops, | |
614 | }; | |
615 | ||
616 | static const struct regulator_desc pm660l_bob = { | |
617 | .linear_ranges = (struct linear_range[]) { | |
618 | REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000), | |
619 | }, | |
620 | .n_linear_ranges = 1, | |
621 | .n_voltages = 85, | |
622 | .ops = &rpm_bob_ops, | |
623 | }; | |
624 | ||
f589d95b | 625 | static const struct regulator_desc pms405_hfsmps3 = { |
60ab7f41 | 626 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
627 | REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), |
628 | }, | |
629 | .n_linear_ranges = 1, | |
630 | .n_voltages = 216, | |
631 | .ops = &rpm_smps_ldo_ops, | |
632 | }; | |
633 | ||
634 | static const struct regulator_desc pms405_nldo300 = { | |
60ab7f41 | 635 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
636 | REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), |
637 | }, | |
638 | .n_linear_ranges = 1, | |
639 | .n_voltages = 128, | |
640 | .ops = &rpm_smps_ldo_ops, | |
641 | }; | |
642 | ||
643 | static const struct regulator_desc pms405_nldo1200 = { | |
60ab7f41 | 644 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
645 | REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), |
646 | }, | |
647 | .n_linear_ranges = 1, | |
648 | .n_voltages = 128, | |
649 | .ops = &rpm_smps_ldo_ops, | |
650 | }; | |
651 | ||
652 | static const struct regulator_desc pms405_pldo50 = { | |
60ab7f41 | 653 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
654 | REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), |
655 | }, | |
656 | .n_linear_ranges = 1, | |
657 | .n_voltages = 129, | |
658 | .ops = &rpm_smps_ldo_ops, | |
659 | }; | |
660 | ||
661 | static const struct regulator_desc pms405_pldo150 = { | |
60ab7f41 | 662 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
663 | REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), |
664 | }, | |
665 | .n_linear_ranges = 1, | |
666 | .n_voltages = 129, | |
667 | .ops = &rpm_smps_ldo_ops, | |
668 | }; | |
669 | ||
670 | static const struct regulator_desc pms405_pldo600 = { | |
60ab7f41 | 671 | .linear_ranges = (struct linear_range[]) { |
f589d95b BA |
672 | REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000), |
673 | }, | |
674 | .n_linear_ranges = 1, | |
675 | .n_voltages = 99, | |
676 | .ops = &rpm_smps_ldo_ops, | |
677 | }; | |
678 | ||
47894c85 K |
679 | static const struct regulator_desc mp5496_smpa2 = { |
680 | .linear_ranges = (struct linear_range[]) { | |
681 | REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500), | |
682 | }, | |
683 | .n_linear_ranges = 1, | |
684 | .n_voltages = 28, | |
685 | .ops = &rpm_mp5496_ops, | |
686 | }; | |
687 | ||
688 | static const struct regulator_desc mp5496_ldoa2 = { | |
689 | .linear_ranges = (struct linear_range[]) { | |
690 | REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000), | |
691 | }, | |
692 | .n_linear_ranges = 1, | |
693 | .n_voltages = 61, | |
694 | .ops = &rpm_mp5496_ops, | |
695 | }; | |
696 | ||
da65e367 BA |
697 | struct rpm_regulator_data { |
698 | const char *name; | |
699 | u32 type; | |
700 | u32 id; | |
701 | const struct regulator_desc *desc; | |
702 | const char *supply; | |
703 | }; | |
704 | ||
47894c85 K |
705 | static const struct rpm_regulator_data rpm_mp5496_regulators[] = { |
706 | { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" }, | |
707 | { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" }, | |
708 | {} | |
709 | }; | |
710 | ||
da65e367 BA |
711 | static const struct rpm_regulator_data rpm_pm8841_regulators[] = { |
712 | { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, | |
713 | { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, | |
714 | { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" }, | |
715 | { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" }, | |
716 | { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" }, | |
717 | { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" }, | |
718 | { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" }, | |
719 | { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" }, | |
720 | {} | |
721 | }; | |
722 | ||
57d65676 AG |
723 | static const struct rpm_regulator_data rpm_pm8916_regulators[] = { |
724 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, | |
725 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" }, | |
726 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" }, | |
727 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" }, | |
728 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" }, | |
729 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" }, | |
730 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" }, | |
731 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" }, | |
732 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" }, | |
733 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" }, | |
734 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" }, | |
735 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, | |
736 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, | |
737 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
738 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
739 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
740 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
741 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
742 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
743 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
744 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
745 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, | |
746 | {} | |
747 | }; | |
748 | ||
da65e367 BA |
749 | static const struct rpm_regulator_data rpm_pm8941_regulators[] = { |
750 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, | |
751 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, | |
752 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" }, | |
753 | { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost }, | |
754 | ||
755 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" }, | |
756 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" }, | |
757 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" }, | |
758 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" }, | |
759 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" }, | |
760 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, | |
761 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" }, | |
762 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, | |
763 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, | |
764 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, | |
765 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" }, | |
766 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, | |
767 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, | |
768 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, | |
769 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, | |
770 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, | |
771 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, | |
772 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, | |
773 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, | |
774 | { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, | |
775 | { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" }, | |
776 | { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, | |
777 | { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, | |
778 | { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, | |
779 | ||
780 | { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" }, | |
781 | { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" }, | |
782 | { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" }, | |
783 | ||
784 | { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, | |
785 | { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, | |
786 | ||
787 | {} | |
788 | }; | |
789 | ||
ee01d0c9 AG |
790 | static const struct rpm_regulator_data rpm_pma8084_regulators[] = { |
791 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, | |
792 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, | |
793 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, | |
794 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, | |
795 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, | |
796 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, | |
797 | { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, | |
798 | { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, | |
799 | { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, | |
800 | { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, | |
801 | { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, | |
802 | { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, | |
803 | ||
804 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, | |
805 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, | |
806 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, | |
807 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, | |
808 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, | |
809 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, | |
810 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, | |
811 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, | |
812 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
813 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
814 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, | |
815 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, | |
816 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
817 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, | |
818 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, | |
819 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, | |
820 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, | |
821 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, | |
822 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, | |
823 | { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
824 | { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, | |
825 | { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, | |
826 | { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
827 | { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, | |
828 | { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, | |
829 | { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, | |
830 | { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, | |
831 | ||
832 | { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, | |
833 | { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, | |
834 | { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, | |
835 | { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, | |
836 | { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, | |
837 | ||
838 | {} | |
839 | }; | |
840 | ||
e44adca5 ADR |
841 | static const struct rpm_regulator_data rpm_pm8950_regulators[] = { |
842 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, | |
843 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, | |
844 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" }, | |
845 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" }, | |
846 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, | |
847 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" }, | |
848 | ||
849 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" }, | |
850 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" }, | |
851 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" }, | |
852 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, | |
853 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, | |
854 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, | |
855 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, | |
856 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, | |
857 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, | |
858 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"}, | |
859 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, | |
860 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, | |
861 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, | |
862 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, | |
863 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, | |
864 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"}, | |
865 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, | |
866 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, | |
867 | { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"}, | |
868 | { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"}, | |
869 | { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"}, | |
870 | { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"}, | |
871 | { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"}, | |
872 | {} | |
873 | }; | |
874 | ||
b1a2fb10 VL |
875 | static const struct rpm_regulator_data rpm_pm8953_regulators[] = { |
876 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" }, | |
877 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" }, | |
878 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, | |
879 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, | |
880 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, | |
881 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" }, | |
882 | { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, | |
883 | ||
884 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" }, | |
885 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" }, | |
886 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" }, | |
887 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
888 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
889 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
890 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
891 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
892 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, | |
893 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, | |
894 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
895 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
896 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
897 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
898 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, | |
899 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
900 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, | |
901 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, | |
902 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" }, | |
903 | { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" }, | |
904 | { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" }, | |
905 | { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, | |
906 | { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" }, | |
907 | {} | |
908 | }; | |
909 | ||
14a16992 RN |
910 | static const struct rpm_regulator_data rpm_pm8994_regulators[] = { |
911 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" }, | |
912 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" }, | |
913 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, | |
914 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, | |
915 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" }, | |
916 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" }, | |
917 | { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" }, | |
918 | { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" }, | |
919 | { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" }, | |
920 | { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" }, | |
921 | { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" }, | |
922 | { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" }, | |
923 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" }, | |
924 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" }, | |
925 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" }, | |
926 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" }, | |
927 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" }, | |
928 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" }, | |
929 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" }, | |
930 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" }, | |
931 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, | |
932 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, | |
933 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" }, | |
934 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" }, | |
935 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, | |
936 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" }, | |
937 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" }, | |
938 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" }, | |
939 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" }, | |
940 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, | |
941 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, | |
942 | { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" }, | |
943 | { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" }, | |
944 | { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, | |
945 | { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, | |
946 | { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, | |
947 | { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" }, | |
948 | { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" }, | |
949 | { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" }, | |
950 | { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" }, | |
951 | { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" }, | |
952 | { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" }, | |
953 | { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" }, | |
954 | { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" }, | |
955 | { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" }, | |
956 | { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" }, | |
957 | ||
958 | {} | |
959 | }; | |
960 | ||
86332c34 BA |
961 | static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { |
962 | { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, | |
963 | { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, | |
0d46f698 | 964 | { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, |
86332c34 BA |
965 | { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, |
966 | {} | |
967 | }; | |
968 | ||
3cdb741e BA |
969 | static const struct rpm_regulator_data rpm_pm8998_regulators[] = { |
970 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, | |
971 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, | |
972 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, | |
973 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, | |
974 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, | |
975 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" }, | |
976 | { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" }, | |
977 | { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" }, | |
978 | { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" }, | |
979 | { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" }, | |
980 | { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" }, | |
981 | { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" }, | |
982 | { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" }, | |
983 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" }, | |
984 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" }, | |
985 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" }, | |
986 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" }, | |
987 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" }, | |
988 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" }, | |
989 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, | |
990 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" }, | |
991 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" }, | |
992 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" }, | |
993 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" }, | |
994 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, | |
995 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" }, | |
996 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, | |
997 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, | |
998 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" }, | |
999 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" }, | |
1000 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" }, | |
1001 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" }, | |
1002 | { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" }, | |
1003 | { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" }, | |
1004 | { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" }, | |
1005 | { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" }, | |
1006 | { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" }, | |
1007 | { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" }, | |
1008 | { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" }, | |
1009 | { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" }, | |
1010 | { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" }, | |
1011 | { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" }, | |
1012 | { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" }, | |
1013 | {} | |
1014 | }; | |
1015 | ||
1016 | static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { | |
1017 | { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, | |
1018 | {} | |
1019 | }; | |
1020 | ||
6d849653 ADR |
1021 | static const struct rpm_regulator_data rpm_pm660_regulators[] = { |
1022 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, | |
1023 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, | |
1024 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, | |
1025 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, | |
1026 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, | |
1027 | { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, | |
1028 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, | |
1029 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, | |
1030 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, | |
1031 | /* l4 is unaccessible on PM660 */ | |
1032 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, | |
1033 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, | |
1034 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, | |
1035 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1036 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1037 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1038 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1039 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1040 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1041 | { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, | |
1042 | { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, | |
1043 | { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, | |
1044 | { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, | |
1045 | { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, | |
1046 | { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, | |
1047 | { } | |
1048 | }; | |
1049 | ||
1050 | static const struct rpm_regulator_data rpm_pm660l_regulators[] = { | |
1051 | { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, | |
1052 | { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, | |
1053 | { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, | |
1054 | { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, | |
1055 | { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, | |
1056 | { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, | |
1057 | { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, | |
1058 | { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, | |
1059 | { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, | |
1060 | { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, | |
1061 | { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, | |
1062 | { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, | |
1063 | { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, | |
1064 | { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, | |
1065 | { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, | |
1066 | { } | |
1067 | }; | |
1068 | ||
f589d95b BA |
1069 | static const struct rpm_regulator_data rpm_pms405_regulators[] = { |
1070 | { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" }, | |
1071 | { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" }, | |
1072 | { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" }, | |
1073 | { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" }, | |
1074 | { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" }, | |
1075 | { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" }, | |
1076 | { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" }, | |
1077 | { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" }, | |
1078 | { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" }, | |
1079 | { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" }, | |
1080 | { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" }, | |
1081 | { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" }, | |
1082 | { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" }, | |
1083 | { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" }, | |
1084 | { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" }, | |
1085 | { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, | |
1086 | { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, | |
1087 | { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, | |
1088 | {} | |
1089 | }; | |
1090 | ||
da65e367 | 1091 | static const struct of_device_id rpm_of_match[] = { |
47894c85 | 1092 | { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, |
da65e367 | 1093 | { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, |
57d65676 | 1094 | { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, |
da65e367 | 1095 | { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, |
e44adca5 | 1096 | { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, |
b1a2fb10 | 1097 | { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, |
14a16992 | 1098 | { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, |
3cdb741e | 1099 | { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, |
6d849653 ADR |
1100 | { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, |
1101 | { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, | |
ee01d0c9 | 1102 | { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, |
86332c34 | 1103 | { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, |
3cdb741e | 1104 | { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, |
f589d95b | 1105 | { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, |
da65e367 BA |
1106 | {} |
1107 | }; | |
1108 | MODULE_DEVICE_TABLE(of, rpm_of_match); | |
1109 | ||
1110 | static int rpm_reg_probe(struct platform_device *pdev) | |
1111 | { | |
1112 | const struct rpm_regulator_data *reg; | |
1113 | const struct of_device_id *match; | |
1114 | struct regulator_config config = { }; | |
1115 | struct regulator_dev *rdev; | |
1116 | struct qcom_rpm_reg *vreg; | |
1117 | struct qcom_smd_rpm *rpm; | |
1118 | ||
1119 | rpm = dev_get_drvdata(pdev->dev.parent); | |
1120 | if (!rpm) { | |
1121 | dev_err(&pdev->dev, "unable to retrieve handle to rpm\n"); | |
1122 | return -ENODEV; | |
1123 | } | |
1124 | ||
1125 | match = of_match_device(rpm_of_match, &pdev->dev); | |
e3b53b8a GS |
1126 | if (!match) { |
1127 | dev_err(&pdev->dev, "failed to match device\n"); | |
1128 | return -ENODEV; | |
1129 | } | |
1130 | ||
da65e367 BA |
1131 | for (reg = match->data; reg->name; reg++) { |
1132 | vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); | |
1133 | if (!vreg) | |
1134 | return -ENOMEM; | |
1135 | ||
1136 | vreg->dev = &pdev->dev; | |
1137 | vreg->type = reg->type; | |
1138 | vreg->id = reg->id; | |
1139 | vreg->rpm = rpm; | |
1140 | ||
1141 | memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc)); | |
1142 | ||
1143 | vreg->desc.id = -1; | |
1144 | vreg->desc.owner = THIS_MODULE; | |
1145 | vreg->desc.type = REGULATOR_VOLTAGE; | |
1146 | vreg->desc.name = reg->name; | |
1147 | vreg->desc.supply_name = reg->supply; | |
1148 | vreg->desc.of_match = reg->name; | |
1149 | ||
1150 | config.dev = &pdev->dev; | |
1151 | config.driver_data = vreg; | |
1152 | rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); | |
1153 | if (IS_ERR(rdev)) { | |
1154 | dev_err(&pdev->dev, "failed to register %s\n", reg->name); | |
1155 | return PTR_ERR(rdev); | |
1156 | } | |
1157 | } | |
1158 | ||
1159 | return 0; | |
1160 | } | |
1161 | ||
1162 | static struct platform_driver rpm_reg_driver = { | |
1163 | .probe = rpm_reg_probe, | |
1164 | .driver = { | |
1165 | .name = "qcom_rpm_smd_regulator", | |
1166 | .of_match_table = rpm_of_match, | |
1167 | }, | |
1168 | }; | |
1169 | ||
1170 | static int __init rpm_reg_init(void) | |
1171 | { | |
1172 | return platform_driver_register(&rpm_reg_driver); | |
1173 | } | |
1174 | subsys_initcall(rpm_reg_init); | |
1175 | ||
1176 | static void __exit rpm_reg_exit(void) | |
1177 | { | |
1178 | platform_driver_unregister(&rpm_reg_driver); | |
1179 | } | |
1180 | module_exit(rpm_reg_exit) | |
1181 | ||
1182 | MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); | |
1183 | MODULE_LICENSE("GPL v2"); |