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[mirror_ubuntu-bionic-kernel.git] / drivers / regulator / qcom_spmi-regulator.c
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e92a4047
SB		 1/*
2 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/err.h>
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/bitops.h>
20#include <linux/slab.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/platform_device.h>
24#include <linux/ktime.h>
25#include <linux/regulator/driver.h>
26#include <linux/regmap.h>
27#include <linux/list.h>
28
e2adfacd
SB		 29/* Pin control enable input pins. */
30#define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
31#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
32#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
33#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
34#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
35#define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
36
37/* Pin control high power mode input pins. */
38#define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
39#define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
40#define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
41#define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
42#define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08
43#define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10
44#define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20
45
46/*
47 * Used with enable parameters to specify that hardware default register values
48 * should be left unaltered.
49 */
50#define SPMI_REGULATOR_USE_HW_DEFAULT 2
51
52/* Soft start strength of a voltage switch type regulator */
53enum spmi_vs_soft_start_str {
54 SPMI_VS_SOFT_START_STR_0P05_UA = 0,
55 SPMI_VS_SOFT_START_STR_0P25_UA,
56 SPMI_VS_SOFT_START_STR_0P55_UA,
57 SPMI_VS_SOFT_START_STR_0P75_UA,
58 SPMI_VS_SOFT_START_STR_HW_DEFAULT,
59};
60
61/**
62 * struct spmi_regulator_init_data - spmi-regulator initialization data
63 * @pin_ctrl_enable: Bit mask specifying which hardware pins should be
64 * used to enable the regulator, if any
65 * Value should be an ORing of
66 * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If
67 * the bit specified by
68 * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
69 * set, then pin control enable hardware registers
70 * will not be modified.
71 * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be
72 * used to force the regulator into high power
73 * mode, if any
74 * Value should be an ORing of
75 * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If
76 * the bit specified by
77 * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
78 * set, then pin control mode hardware registers
79 * will not be modified.
80 * @vs_soft_start_strength: This parameter sets the soft start strength for
81 * voltage switch type regulators. Its value
82 * should be one of SPMI_VS_SOFT_START_STR_*. If
83 * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,
84 * then the soft start strength will be left at its
85 * default hardware value.
86 */
87struct spmi_regulator_init_data {
88 unsigned pin_ctrl_enable;
89 unsigned pin_ctrl_hpm;
90 enum spmi_vs_soft_start_str vs_soft_start_strength;
91};
92
e92a4047
SB		 93/* These types correspond to unique register layouts. */
94enum spmi_regulator_logical_type {
95 SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
96 SPMI_REGULATOR_LOGICAL_TYPE_LDO,
97 SPMI_REGULATOR_LOGICAL_TYPE_VS,
98 SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
99 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
100 SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
101 SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
102 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
103 SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
104 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
105};
106
107enum spmi_regulator_type {
108 SPMI_REGULATOR_TYPE_BUCK = 0x03,
109 SPMI_REGULATOR_TYPE_LDO = 0x04,
110 SPMI_REGULATOR_TYPE_VS = 0x05,
111 SPMI_REGULATOR_TYPE_BOOST = 0x1b,
112 SPMI_REGULATOR_TYPE_FTS = 0x1c,
113 SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f,
114 SPMI_REGULATOR_TYPE_ULT_LDO = 0x21,
115 SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22,
116};
117
118enum spmi_regulator_subtype {
119 SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08,
120 SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09,
121 SPMI_REGULATOR_SUBTYPE_N50 = 0x01,
122 SPMI_REGULATOR_SUBTYPE_N150 = 0x02,
123 SPMI_REGULATOR_SUBTYPE_N300 = 0x03,
124 SPMI_REGULATOR_SUBTYPE_N600 = 0x04,
125 SPMI_REGULATOR_SUBTYPE_N1200 = 0x05,
126 SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06,
127 SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07,
128 SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14,
129 SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15,
130 SPMI_REGULATOR_SUBTYPE_P50 = 0x08,
131 SPMI_REGULATOR_SUBTYPE_P150 = 0x09,
132 SPMI_REGULATOR_SUBTYPE_P300 = 0x0a,
133 SPMI_REGULATOR_SUBTYPE_P600 = 0x0b,
134 SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c,
135 SPMI_REGULATOR_SUBTYPE_LN = 0x10,
136 SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28,
137 SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29,
138 SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a,
139 SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b,
140 SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c,
141 SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d,
142 SPMI_REGULATOR_SUBTYPE_LV100 = 0x01,
143 SPMI_REGULATOR_SUBTYPE_LV300 = 0x02,
144 SPMI_REGULATOR_SUBTYPE_MV300 = 0x08,
145 SPMI_REGULATOR_SUBTYPE_MV500 = 0x09,
146 SPMI_REGULATOR_SUBTYPE_HDMI = 0x10,
147 SPMI_REGULATOR_SUBTYPE_OTG = 0x11,
148 SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01,
149 SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08,
150 SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09,
151 SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01,
152 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d,
153 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e,
154 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f,
155 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10,
156};
157
158enum spmi_common_regulator_registers {
159 SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01,
160 SPMI_COMMON_REG_TYPE = 0x04,
161 SPMI_COMMON_REG_SUBTYPE = 0x05,
162 SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40,
163 SPMI_COMMON_REG_VOLTAGE_SET = 0x41,
164 SPMI_COMMON_REG_MODE = 0x45,
165 SPMI_COMMON_REG_ENABLE = 0x46,
166 SPMI_COMMON_REG_PULL_DOWN = 0x48,
167 SPMI_COMMON_REG_SOFT_START = 0x4c,
168 SPMI_COMMON_REG_STEP_CTRL = 0x61,
169};
170
171enum spmi_vs_registers {
172 SPMI_VS_REG_OCP = 0x4a,
173 SPMI_VS_REG_SOFT_START = 0x4c,
174};
175
176enum spmi_boost_registers {
177 SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a,
178};
179
180enum spmi_boost_byp_registers {
181 SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b,
182};
183
184/* Used for indexing into ctrl_reg. These are offets from 0x40 */
185enum spmi_common_control_register_index {
186 SPMI_COMMON_IDX_VOLTAGE_RANGE = 0,
187 SPMI_COMMON_IDX_VOLTAGE_SET = 1,
188 SPMI_COMMON_IDX_MODE = 5,
189 SPMI_COMMON_IDX_ENABLE = 6,
190};
191
192/* Common regulator control register layout */
193#define SPMI_COMMON_ENABLE_MASK 0x80
194#define SPMI_COMMON_ENABLE 0x80
195#define SPMI_COMMON_DISABLE 0x00
196#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08
197#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04
198#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02
199#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01
200#define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f
201
202/* Common regulator mode register layout */
203#define SPMI_COMMON_MODE_HPM_MASK 0x80
204#define SPMI_COMMON_MODE_AUTO_MASK 0x40
205#define SPMI_COMMON_MODE_BYPASS_MASK 0x20
206#define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10
207#define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08
208#define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04
209#define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02
210#define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01
211#define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f
212
213/* Common regulator pull down control register layout */
214#define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80
215
216/* LDO regulator current limit control register layout */
217#define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80
218
219/* LDO regulator soft start control register layout */
220#define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80
221
222/* VS regulator over current protection control register layout */
223#define SPMI_VS_OCP_OVERRIDE 0x01
224#define SPMI_VS_OCP_NO_OVERRIDE 0x00
225
226/* VS regulator soft start control register layout */
227#define SPMI_VS_SOFT_START_ENABLE_MASK 0x80
228#define SPMI_VS_SOFT_START_SEL_MASK 0x03
229
230/* Boost regulator current limit control register layout */
231#define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80
232#define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07
233
234#define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10
235#define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30
236#define SPMI_VS_OCP_FALL_DELAY_US 90
237#define SPMI_VS_OCP_FAULT_DELAY_US 20000
238
239#define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18
240#define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3
241#define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07
242#define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0
243
244/* Clock rate in kHz of the FTSMPS regulator reference clock. */
245#define SPMI_FTSMPS_CLOCK_RATE 19200
246
247/* Minimum voltage stepper delay for each step. */
248#define SPMI_FTSMPS_STEP_DELAY 8
2cf7b99c 249#define SPMI_DEFAULT_STEP_DELAY 20
e92a4047
SB		 250
251/*
252 * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
253 * adjust the step rate in order to account for oscillator variance.
254 */
255#define SPMI_FTSMPS_STEP_MARGIN_NUM 4
256#define SPMI_FTSMPS_STEP_MARGIN_DEN 5
257
e92a4047
SB		 258/* VSET value to decide the range of ULT SMPS */
259#define ULT_SMPS_RANGE_SPLIT 0x60
260
261/**
262 * struct spmi_voltage_range - regulator set point voltage mapping description
263 * @min_uV: Minimum programmable output voltage resulting from
264 * set point register value 0x00
265 * @max_uV: Maximum programmable output voltage
266 * @step_uV: Output voltage increase resulting from the set point
267 * register value increasing by 1
268 * @set_point_min_uV: Minimum allowed voltage
269 * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order
270 * to pick which range should be used in the case of
271 * overlapping set points.
272 * @n_voltages: Number of preferred voltage set points present in this
273 * range
274 * @range_sel: Voltage range register value corresponding to this range
275 *
276 * The following relationships must be true for the values used in this struct:
277 * (max_uV - min_uV) % step_uV == 0
278 * (set_point_min_uV - min_uV) % step_uV == 0*
279 * (set_point_max_uV - min_uV) % step_uV == 0*
280 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
281 *
282 * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
283 * specify that the voltage range has meaning, but is not preferred.
284 */
285struct spmi_voltage_range {
286 int min_uV;
287 int max_uV;
288 int step_uV;
289 int set_point_min_uV;
290 int set_point_max_uV;
291 unsigned n_voltages;
292 u8 range_sel;
293};
294
295/*
296 * The ranges specified in the spmi_voltage_set_points struct must be listed
297 * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
298 */
299struct spmi_voltage_set_points {
300 struct spmi_voltage_range *range;
301 int count;
302 unsigned n_voltages;
303};
304
305struct spmi_regulator {
306 struct regulator_desc desc;
307 struct device *dev;
308 struct delayed_work ocp_work;
309 struct regmap *regmap;
310 struct spmi_voltage_set_points *set_points;
311 enum spmi_regulator_logical_type logical_type;
312 int ocp_irq;
313 int ocp_count;
314 int ocp_max_retries;
315 int ocp_retry_delay_ms;
316 int hpm_min_load;
317 int slew_rate;
318 ktime_t vs_enable_time;
319 u16 base;
320 struct list_head node;
321};
322
323struct spmi_regulator_mapping {
324 enum spmi_regulator_type type;
325 enum spmi_regulator_subtype subtype;
326 enum spmi_regulator_logical_type logical_type;
327 u32 revision_min;
328 u32 revision_max;
329 struct regulator_ops *ops;
330 struct spmi_voltage_set_points *set_points;
331 int hpm_min_load;
332};
333
334struct spmi_regulator_data {
335 const char *name;
336 u16 base;
337 const char *supply;
338 const char *ocp;
339 u16 force_type;
340};
341
342#define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
343 _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
344 { \
345 .type = SPMI_REGULATOR_TYPE_##_type, \
346 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \
347 .revision_min = _dig_major_min, \
348 .revision_max = _dig_major_max, \
349 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
350 .ops = &spmi_##_ops_val##_ops, \
351 .set_points = &_set_points_val##_set_points, \
352 .hpm_min_load = _hpm_min_load, \
353 }
354
355#define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
356 { \
357 .type = SPMI_REGULATOR_TYPE_VS, \
358 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \
359 .revision_min = _dig_major_min, \
360 .revision_max = _dig_major_max, \
361 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \
362 .ops = &spmi_vs_ops, \
363 }
364
365#define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
366 _set_point_max_uV, _max_uV, _step_uV) \
367 { \
368 .min_uV = _min_uV, \
369 .max_uV = _max_uV, \
370 .set_point_min_uV = _set_point_min_uV, \
371 .set_point_max_uV = _set_point_max_uV, \
372 .step_uV = _step_uV, \
373 .range_sel = _range_sel, \
374 }
375
376#define DEFINE_SPMI_SET_POINTS(name) \
377struct spmi_voltage_set_points name##_set_points = { \
378 .range = name##_ranges, \
379 .count = ARRAY_SIZE(name##_ranges), \
380}
381
382/*
383 * These tables contain the physically available PMIC regulator voltage setpoint
384 * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed
385 * to ensure that the setpoints available to software are monotonically
386 * increasing and unique. The set_voltage callback functions expect these
387 * properties to hold.
388 */
389static struct spmi_voltage_range pldo_ranges[] = {
390 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500),
391 SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
392 SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
393};
394
395static struct spmi_voltage_range nldo1_ranges[] = {
396 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500),
397};
398
399static struct spmi_voltage_range nldo2_ranges[] = {
400 SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500),
401 SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250),
402 SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500),
403};
404
405static struct spmi_voltage_range nldo3_ranges[] = {
406 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500),
407 SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500),
408 SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500),
409};
410
411static struct spmi_voltage_range ln_ldo_ranges[] = {
412 SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000),
413 SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
414};
415
416static struct spmi_voltage_range smps_ranges[] = {
417 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500),
418 SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
419};
420
421static struct spmi_voltage_range ftsmps_ranges[] = {
422 SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000),
423 SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000),
424};
425
426static struct spmi_voltage_range ftsmps2p5_ranges[] = {
427 SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000),
428 SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000),
429};
430
431static struct spmi_voltage_range boost_ranges[] = {
432 SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
433};
434
435static struct spmi_voltage_range boost_byp_ranges[] = {
436 SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
437};
438
439static struct spmi_voltage_range ult_lo_smps_ranges[] = {
440 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500),
441 SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000),
442};
443
444static struct spmi_voltage_range ult_ho_smps_ranges[] = {
445 SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
446};
447
448static struct spmi_voltage_range ult_nldo_ranges[] = {
449 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500),
450};
451
452static struct spmi_voltage_range ult_pldo_ranges[] = {
453 SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
454};
455
456static DEFINE_SPMI_SET_POINTS(pldo);
457static DEFINE_SPMI_SET_POINTS(nldo1);
458static DEFINE_SPMI_SET_POINTS(nldo2);
459static DEFINE_SPMI_SET_POINTS(nldo3);
460static DEFINE_SPMI_SET_POINTS(ln_ldo);
461static DEFINE_SPMI_SET_POINTS(smps);
462static DEFINE_SPMI_SET_POINTS(ftsmps);
463static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
464static DEFINE_SPMI_SET_POINTS(boost);
465static DEFINE_SPMI_SET_POINTS(boost_byp);
466static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
467static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
468static DEFINE_SPMI_SET_POINTS(ult_nldo);
469static DEFINE_SPMI_SET_POINTS(ult_pldo);
470
471static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
472 int len)
473{
474 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
475}
476
477static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
478 u8 *buf, int len)
479{
480 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
481}
482
483static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
484 u8 mask)
485{
486 return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
487}
488
489static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev)
490{
491 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
492 u8 reg;
493
494 spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, &reg, 1);
495
496 return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE;
497}
498
499static int spmi_regulator_common_enable(struct regulator_dev *rdev)
500{
501 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
502
503 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
504 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
505}
506
507static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
508{
509 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
510
511 if (vreg->ocp_irq) {
512 vreg->ocp_count = 0;
513 vreg->vs_enable_time = ktime_get();
514 }
515
516 return spmi_regulator_common_enable(rdev);
517}
518
e2adfacd
SB		 519static int spmi_regulator_vs_ocp(struct regulator_dev *rdev)
520{
521 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
522 u8 reg = SPMI_VS_OCP_OVERRIDE;
523
524 return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, &reg, 1);
525}
526
e92a4047
SB		 527static int spmi_regulator_common_disable(struct regulator_dev *rdev)
528{
529 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
530
531 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
532 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
533}
534
535static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
1b5b1968 536 int min_uV, int max_uV)
e92a4047
SB		 537{
538 const struct spmi_voltage_range *range;
539 int uV = min_uV;
540 int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
1b5b1968 541 int selector, voltage_sel;
e92a4047
SB		 542
543 /* Check if request voltage is outside of physically settable range. */
544 lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
545 lim_max_uV =
546 vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
547
548 if (uV < lim_min_uV && max_uV >= lim_min_uV)
549 uV = lim_min_uV;
550
551 if (uV < lim_min_uV || uV > lim_max_uV) {
552 dev_err(vreg->dev,
553 "request v=[%d, %d] is outside possible v=[%d, %d]\n",
554 min_uV, max_uV, lim_min_uV, lim_max_uV);
555 return -EINVAL;
556 }
557
558 /* Find the range which uV is inside of. */
559 for (i = vreg->set_points->count - 1; i > 0; i--) {
560 range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
561 if (uV > range_max_uV && range_max_uV > 0)
562 break;
563 }
564
565 range_id = i;
566 range = &vreg->set_points->range[range_id];
e92a4047
SB		 567
568 /*
569 * Force uV to be an allowed set point by applying a ceiling function to
570 * the uV value.
571 */
1b5b1968
SB		 572 voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
573 uV = voltage_sel * range->step_uV + range->min_uV;
e92a4047
SB		 574
575 if (uV > max_uV) {
576 dev_err(vreg->dev,
577 "request v=[%d, %d] cannot be met by any set point; "
578 "next set point: %d\n",
579 min_uV, max_uV, uV);
580 return -EINVAL;
581 }
582
1b5b1968 583 selector = 0;
e92a4047 584 for (i = 0; i < range_id; i++)
1b5b1968
SB		 585 selector += vreg->set_points->range[i].n_voltages;
586 selector += (uV - range->set_point_min_uV) / range->step_uV;
e92a4047 587
1b5b1968
SB		 588 return selector;
589}
590
591static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg,
592 unsigned selector, u8 *range_sel,
593 u8 *voltage_sel)
594{
595 const struct spmi_voltage_range *range, *end;
ab953b9d 596 unsigned offset;
1b5b1968
SB		 597
598 range = vreg->set_points->range;
599 end = range + vreg->set_points->count;
600
601 for (; range < end; range++) {
602 if (selector < range->n_voltages) {
ab953b9d
SB		 603 /*
604 * hardware selectors between set point min and real
605 * min are invalid so we ignore them
606 */
607 offset = range->set_point_min_uV - range->min_uV;
608 offset /= range->step_uV;
609 *voltage_sel = selector + offset;
1b5b1968
SB		 610 *range_sel = range->range_sel;
611 return 0;
612 }
613
614 selector -= range->n_voltages;
615 }
616
617 return -EINVAL;
618}
619
620static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel,
621 const struct spmi_voltage_range *range)
622{
ab953b9d
SB		 623 unsigned sw_sel = 0;
624 unsigned offset, max_hw_sel;
1b5b1968 625 const struct spmi_voltage_range *r = vreg->set_points->range;
ab953b9d
SB		 626 const struct spmi_voltage_range *end = r + vreg->set_points->count;
627
628 for (; r < end; r++) {
629 if (r == range && range->n_voltages) {
630 /*
631 * hardware selectors between set point min and real
632 * min and between set point max and real max are
633 * invalid so we return an error if they're
634 * programmed into the hardware
635 */
636 offset = range->set_point_min_uV - range->min_uV;
637 offset /= range->step_uV;
638 if (hw_sel < offset)
639 return -EINVAL;
640
641 max_hw_sel = range->set_point_max_uV - range->min_uV;
642 max_hw_sel /= range->step_uV;
643 if (hw_sel > max_hw_sel)
644 return -EINVAL;
645
646 return sw_sel + hw_sel - offset;
647 }
1b5b1968 648 sw_sel += r->n_voltages;
1b5b1968
SB		 649 }
650
ab953b9d 651 return -EINVAL;
e92a4047
SB		 652}
653
654static const struct spmi_voltage_range *
655spmi_regulator_find_range(struct spmi_regulator *vreg)
656{
657 u8 range_sel;
658 const struct spmi_voltage_range *range, *end;
659
660 range = vreg->set_points->range;
661 end = range + vreg->set_points->count;
662
663 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
664
665 for (; range < end; range++)
666 if (range->range_sel == range_sel)
667 return range;
668
669 return NULL;
670}
671
672static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
1b5b1968 673 int min_uV, int max_uV)
e92a4047
SB		 674{
675 const struct spmi_voltage_range *range;
676 int uV = min_uV;
1b5b1968 677 int i, selector;
e92a4047
SB		 678
679 range = spmi_regulator_find_range(vreg);
680 if (!range)
681 goto different_range;
682
683 if (uV < range->min_uV && max_uV >= range->min_uV)
684 uV = range->min_uV;
685
686 if (uV < range->min_uV || uV > range->max_uV) {
687 /* Current range doesn't support the requested voltage. */
688 goto different_range;
689 }
690
691 /*
692 * Force uV to be an allowed set point by applying a ceiling function to
693 * the uV value.
694 */
1b5b1968
SB		 695 uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
696 uV = uV * range->step_uV + range->min_uV;
e92a4047
SB		 697
698 if (uV > max_uV) {
699 /*
700 * No set point in the current voltage range is within the
701 * requested min_uV to max_uV range.
702 */
703 goto different_range;
704 }
705
1b5b1968 706 selector = 0;
e92a4047
SB		 707 for (i = 0; i < vreg->set_points->count; i++) {
708 if (uV >= vreg->set_points->range[i].set_point_min_uV
9b2dfee3 709 && uV <= vreg->set_points->range[i].set_point_max_uV) {
1b5b1968 710 selector +=
e92a4047
SB		 711 (uV - vreg->set_points->range[i].set_point_min_uV)
712 / vreg->set_points->range[i].step_uV;
713 break;
9b2dfee3 714 }
e92a4047 715
1b5b1968 716 selector += vreg->set_points->range[i].n_voltages;
e92a4047
SB		 717 }
718
1b5b1968 719 if (selector >= vreg->set_points->n_voltages)
e92a4047
SB		 720 goto different_range;
721
b1d21a24 722 return selector;
e92a4047
SB		 723
724different_range:
1b5b1968 725 return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
e92a4047
SB		 726}
727
1b5b1968
SB		 728static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev,
729 int min_uV, int max_uV)
e92a4047
SB		 730{
731 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
e92a4047
SB		 732
733 /*
734 * Favor staying in the current voltage range if possible. This avoids
735 * voltage spikes that occur when changing the voltage range.
736 */
1b5b1968
SB		 737 return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV);
738}
739
740static int
741spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector)
742{
743 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
744 int ret;
745 u8 buf[2];
746 u8 range_sel, voltage_sel;
747
748 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
e92a4047
SB		 749 if (ret)
750 return ret;
751
752 buf[0] = range_sel;
753 buf[1] = voltage_sel;
754 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
755}
756
757static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
758 unsigned int old_selector, unsigned int new_selector)
759{
760 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
761 const struct spmi_voltage_range *range;
762 int diff_uV;
763
764 range = spmi_regulator_find_range(vreg);
765 if (!range)
766 return -EINVAL;
767
768 diff_uV = abs(new_selector - old_selector) * range->step_uV;
769
770 return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
771}
772
773static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
774{
775 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
776 const struct spmi_voltage_range *range;
777 u8 voltage_sel;
778
779 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
780
781 range = spmi_regulator_find_range(vreg);
782 if (!range)
1b5b1968 783 return -EINVAL;
e92a4047 784
1b5b1968 785 return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
e92a4047
SB		 786}
787
1b5b1968
SB		 788static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev,
789 int min_uV, int max_uV)
e92a4047
SB		 790{
791 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
e92a4047 792
1b5b1968
SB		 793 return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
794}
795
796static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
797 unsigned selector)
798{
799 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
800 u8 sel = selector;
e92a4047
SB		 801
802 /*
803 * Certain types of regulators do not have a range select register so
804 * only voltage set register needs to be written.
805 */
806 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
807}
808
809static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
810{
811 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
1b5b1968
SB		 812 u8 selector;
813 int ret;
e92a4047 814
1b5b1968
SB		 815 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1);
816 if (ret)
817 return ret;
e92a4047 818
1b5b1968 819 return selector;
e92a4047
SB		 820}
821
822static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
1b5b1968 823 unsigned selector)
e92a4047
SB		 824{
825 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
826 int ret;
827 u8 range_sel, voltage_sel;
828
1b5b1968 829 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
e92a4047
SB		 830 if (ret)
831 return ret;
832
833 /*
834 * Calculate VSET based on range
835 * In case of range 0: voltage_sel is a 7 bit value, can be written
836 * witout any modification.
837 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
838 * [011].
839 */
840 if (range_sel == 1)
841 voltage_sel |= ULT_SMPS_RANGE_SPLIT;
842
0f94bffa 843 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
1b5b1968 844 voltage_sel, 0xff);
e92a4047
SB		 845}
846
847static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
848{
849 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
850 const struct spmi_voltage_range *range;
851 u8 voltage_sel;
852
853 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
854
855 range = spmi_regulator_find_range(vreg);
856 if (!range)
1b5b1968 857 return -EINVAL;
e92a4047
SB		 858
859 if (range->range_sel == 1)
860 voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
861
1b5b1968 862 return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
e92a4047
SB		 863}
864
865static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
866 unsigned selector)
867{
868 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
869 int uV = 0;
870 int i;
871
872 if (selector >= vreg->set_points->n_voltages)
873 return 0;
874
875 for (i = 0; i < vreg->set_points->count; i++) {
9b2dfee3 876 if (selector < vreg->set_points->range[i].n_voltages) {
e92a4047
SB		 877 uV = selector * vreg->set_points->range[i].step_uV
878 + vreg->set_points->range[i].set_point_min_uV;
879 break;
9b2dfee3 880 }
e92a4047
SB		 881
882 selector -= vreg->set_points->range[i].n_voltages;
883 }
884
885 return uV;
886}
887
888static int
889spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
890{
891 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
892 u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
893 u8 val = 0;
894
895 if (enable)
896 val = mask;
897
898 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
899}
900
901static int
902spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
903{
904 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
905 u8 val;
906 int ret;
907
908 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
909 *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
910
911 return ret;
912}
913
914static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
915{
916 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
917 u8 reg;
918
919 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
920
921 if (reg & SPMI_COMMON_MODE_HPM_MASK)
922 return REGULATOR_MODE_NORMAL;
923
e2adfacd
SB		 924 if (reg & SPMI_COMMON_MODE_AUTO_MASK)
925 return REGULATOR_MODE_FAST;
926
e92a4047
SB		 927 return REGULATOR_MODE_IDLE;
928}
929
930static int
931spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
932{
933 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
e2adfacd 934 u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
e92a4047
SB		 935 u8 val = 0;
936
937 if (mode == REGULATOR_MODE_NORMAL)
e2adfacd
SB		 938 val = SPMI_COMMON_MODE_HPM_MASK;
939 else if (mode == REGULATOR_MODE_FAST)
940 val = SPMI_COMMON_MODE_AUTO_MASK;
e92a4047
SB		 941
942 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
943}
944
945static int
946spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
947{
948 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
949 unsigned int mode;
950
951 if (load_uA >= vreg->hpm_min_load)
952 mode = REGULATOR_MODE_NORMAL;
953 else
954 mode = REGULATOR_MODE_IDLE;
955
956 return spmi_regulator_common_set_mode(rdev, mode);
957}
958
959static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
960{
961 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
962 unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
963
964 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
965 mask, mask);
966}
967
968static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
969{
970 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
971 unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
972
973 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
974 mask, mask);
975}
976
977static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
978{
979 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
980 enum spmi_regulator_logical_type type = vreg->logical_type;
981 unsigned int current_reg;
982 u8 reg;
983 u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
984 SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
985 int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
986
987 if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
988 current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
989 else
990 current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
991
992 if (ilim_uA > max || ilim_uA <= 0)
993 return -EINVAL;
994
995 reg = (ilim_uA - 1) / 500;
996 reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
997
998 return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
999}
1000
1001static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
1002{
1003 int ret;
1004
1005 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
1006 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
1007
1008 vreg->vs_enable_time = ktime_get();
1009
1010 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
1011 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
1012
1013 return ret;
1014}
1015
1016static void spmi_regulator_vs_ocp_work(struct work_struct *work)
1017{
1018 struct delayed_work *dwork = to_delayed_work(work);
1019 struct spmi_regulator *vreg
1020 = container_of(dwork, struct spmi_regulator, ocp_work);
1021
1022 spmi_regulator_vs_clear_ocp(vreg);
1023}
1024
1025static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
1026{
1027 struct spmi_regulator *vreg = data;
1028 ktime_t ocp_irq_time;
1029 s64 ocp_trigger_delay_us;
1030
1031 ocp_irq_time = ktime_get();
1032 ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
1033 vreg->vs_enable_time);
1034
1035 /*
1036 * Reset the OCP count if there is a large delay between switch enable
1037 * and when OCP triggers. This is indicative of a hotplug event as
1038 * opposed to a fault.
1039 */
1040 if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
1041 vreg->ocp_count = 0;
1042
1043 /* Wait for switch output to settle back to 0 V after OCP triggered. */
1044 udelay(SPMI_VS_OCP_FALL_DELAY_US);
1045
1046 vreg->ocp_count++;
1047
1048 if (vreg->ocp_count == 1) {
1049 /* Immediately clear the over current condition. */
1050 spmi_regulator_vs_clear_ocp(vreg);
1051 } else if (vreg->ocp_count <= vreg->ocp_max_retries) {
1052 /* Schedule the over current clear task to run later. */
1053 schedule_delayed_work(&vreg->ocp_work,
1054 msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
1055 } else {
1056 dev_err(vreg->dev,
1057 "OCP triggered %d times; no further retries\n",
1058 vreg->ocp_count);
1059 }
1060
1061 return IRQ_HANDLED;
1062}
1063
1064static struct regulator_ops spmi_smps_ops = {
1065 .enable = spmi_regulator_common_enable,
1066 .disable = spmi_regulator_common_disable,
1067 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968 1068 .set_voltage_sel = spmi_regulator_common_set_voltage,
2cf7b99c 1069 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
1b5b1968
SB		 1070 .get_voltage_sel = spmi_regulator_common_get_voltage,
1071 .map_voltage = spmi_regulator_common_map_voltage,
e92a4047
SB		 1072 .list_voltage = spmi_regulator_common_list_voltage,
1073 .set_mode = spmi_regulator_common_set_mode,
1074 .get_mode = spmi_regulator_common_get_mode,
1075 .set_load = spmi_regulator_common_set_load,
1076 .set_pull_down = spmi_regulator_common_set_pull_down,
1077};
1078
1079static struct regulator_ops spmi_ldo_ops = {
1080 .enable = spmi_regulator_common_enable,
1081 .disable = spmi_regulator_common_disable,
1082 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968
SB		 1083 .set_voltage_sel = spmi_regulator_common_set_voltage,
1084 .get_voltage_sel = spmi_regulator_common_get_voltage,
1085 .map_voltage = spmi_regulator_common_map_voltage,
e92a4047
SB		 1086 .list_voltage = spmi_regulator_common_list_voltage,
1087 .set_mode = spmi_regulator_common_set_mode,
1088 .get_mode = spmi_regulator_common_get_mode,
1089 .set_load = spmi_regulator_common_set_load,
1090 .set_bypass = spmi_regulator_common_set_bypass,
1091 .get_bypass = spmi_regulator_common_get_bypass,
1092 .set_pull_down = spmi_regulator_common_set_pull_down,
1093 .set_soft_start = spmi_regulator_common_set_soft_start,
1094};
1095
1096static struct regulator_ops spmi_ln_ldo_ops = {
1097 .enable = spmi_regulator_common_enable,
1098 .disable = spmi_regulator_common_disable,
1099 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968
SB		 1100 .set_voltage_sel = spmi_regulator_common_set_voltage,
1101 .get_voltage_sel = spmi_regulator_common_get_voltage,
1102 .map_voltage = spmi_regulator_common_map_voltage,
e92a4047
SB		 1103 .list_voltage = spmi_regulator_common_list_voltage,
1104 .set_bypass = spmi_regulator_common_set_bypass,
1105 .get_bypass = spmi_regulator_common_get_bypass,
1106};
1107
1108static struct regulator_ops spmi_vs_ops = {
1109 .enable = spmi_regulator_vs_enable,
1110 .disable = spmi_regulator_common_disable,
1111 .is_enabled = spmi_regulator_common_is_enabled,
1112 .set_pull_down = spmi_regulator_common_set_pull_down,
1113 .set_soft_start = spmi_regulator_common_set_soft_start,
e2adfacd 1114 .set_over_current_protection = spmi_regulator_vs_ocp,
919163f6
SB		 1115 .set_mode = spmi_regulator_common_set_mode,
1116 .get_mode = spmi_regulator_common_get_mode,
e92a4047
SB		 1117};
1118
1119static struct regulator_ops spmi_boost_ops = {
1120 .enable = spmi_regulator_common_enable,
1121 .disable = spmi_regulator_common_disable,
1122 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968
SB		 1123 .set_voltage_sel = spmi_regulator_single_range_set_voltage,
1124 .get_voltage_sel = spmi_regulator_single_range_get_voltage,
1125 .map_voltage = spmi_regulator_single_map_voltage,
e92a4047
SB		 1126 .list_voltage = spmi_regulator_common_list_voltage,
1127 .set_input_current_limit = spmi_regulator_set_ilim,
1128};
1129
1130static struct regulator_ops spmi_ftsmps_ops = {
1131 .enable = spmi_regulator_common_enable,
1132 .disable = spmi_regulator_common_disable,
1133 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968 1134 .set_voltage_sel = spmi_regulator_common_set_voltage,
e92a4047 1135 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
1b5b1968
SB		 1136 .get_voltage_sel = spmi_regulator_common_get_voltage,
1137 .map_voltage = spmi_regulator_common_map_voltage,
e92a4047
SB		 1138 .list_voltage = spmi_regulator_common_list_voltage,
1139 .set_mode = spmi_regulator_common_set_mode,
1140 .get_mode = spmi_regulator_common_get_mode,
1141 .set_load = spmi_regulator_common_set_load,
1142 .set_pull_down = spmi_regulator_common_set_pull_down,
1143};
1144
1145static struct regulator_ops spmi_ult_lo_smps_ops = {
1146 .enable = spmi_regulator_common_enable,
1147 .disable = spmi_regulator_common_disable,
1148 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968 1149 .set_voltage_sel = spmi_regulator_ult_lo_smps_set_voltage,
2cf7b99c 1150 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
1b5b1968 1151 .get_voltage_sel = spmi_regulator_ult_lo_smps_get_voltage,
e92a4047
SB		 1152 .list_voltage = spmi_regulator_common_list_voltage,
1153 .set_mode = spmi_regulator_common_set_mode,
1154 .get_mode = spmi_regulator_common_get_mode,
1155 .set_load = spmi_regulator_common_set_load,
1156 .set_pull_down = spmi_regulator_common_set_pull_down,
1157};
1158
1159static struct regulator_ops spmi_ult_ho_smps_ops = {
1160 .enable = spmi_regulator_common_enable,
1161 .disable = spmi_regulator_common_disable,
1162 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968 1163 .set_voltage_sel = spmi_regulator_single_range_set_voltage,
2cf7b99c 1164 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
1b5b1968
SB		 1165 .get_voltage_sel = spmi_regulator_single_range_get_voltage,
1166 .map_voltage = spmi_regulator_single_map_voltage,
e92a4047
SB		 1167 .list_voltage = spmi_regulator_common_list_voltage,
1168 .set_mode = spmi_regulator_common_set_mode,
1169 .get_mode = spmi_regulator_common_get_mode,
1170 .set_load = spmi_regulator_common_set_load,
1171 .set_pull_down = spmi_regulator_common_set_pull_down,
1172};
1173
1174static struct regulator_ops spmi_ult_ldo_ops = {
1175 .enable = spmi_regulator_common_enable,
1176 .disable = spmi_regulator_common_disable,
1177 .is_enabled = spmi_regulator_common_is_enabled,
1b5b1968
SB		 1178 .set_voltage_sel = spmi_regulator_single_range_set_voltage,
1179 .get_voltage_sel = spmi_regulator_single_range_get_voltage,
1180 .map_voltage = spmi_regulator_single_map_voltage,
e92a4047
SB		 1181 .list_voltage = spmi_regulator_common_list_voltage,
1182 .set_mode = spmi_regulator_common_set_mode,
1183 .get_mode = spmi_regulator_common_get_mode,
1184 .set_load = spmi_regulator_common_set_load,
1185 .set_bypass = spmi_regulator_common_set_bypass,
1186 .get_bypass = spmi_regulator_common_get_bypass,
1187 .set_pull_down = spmi_regulator_common_set_pull_down,
1188 .set_soft_start = spmi_regulator_common_set_soft_start,
1189};
1190
1191/* Maximum possible digital major revision value */
1192#define INF 0xFF
1193
1194static const struct spmi_regulator_mapping supported_regulators[] = {
1195 /* type subtype dig_min dig_max ltype ops setpoints hpm_min */
1196 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000),
1197 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000),
1198 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000),
1199 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000),
1200 SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000),
1201 SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000),
1202 SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000),
1203 SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000),
1204 SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000),
1205 SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000),
1206 SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000),
1207 SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000),
1208 SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000),
1209 SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000),
1210 SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000),
1211 SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0),
1212 SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000),
1213 SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000),
1214 SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000),
1215 SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000),
1216 SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000),
1217 SPMI_VREG_VS(LV100, 0, INF),
1218 SPMI_VREG_VS(LV300, 0, INF),
1219 SPMI_VREG_VS(MV300, 0, INF),
1220 SPMI_VREG_VS(MV500, 0, INF),
1221 SPMI_VREG_VS(HDMI, 0, INF),
1222 SPMI_VREG_VS(OTG, 0, INF),
1223 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0),
1224 SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1225 SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1226 SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1227 SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1228 ult_lo_smps, 100000),
1229 SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1230 ult_lo_smps, 100000),
1231 SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1232 ult_lo_smps, 100000),
1233 SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1234 ult_ho_smps, 100000),
1235 SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1236 SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1237 SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1238 SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1239 SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1240 SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1241 SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1242 SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1243 SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1244 SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1245};
1246
1247static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1248{
1249 unsigned int n;
1250 struct spmi_voltage_range *range = points->range;
1251
1252 for (; range < points->range + points->count; range++) {
1253 n = 0;
1254 if (range->set_point_max_uV) {
1255 n = range->set_point_max_uV - range->set_point_min_uV;
419d06a1 1256 n = (n / range->step_uV) + 1;
e92a4047
SB		 1257 }
1258 range->n_voltages = n;
1259 points->n_voltages += n;
1260 }
1261}
1262
1263static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1264{
1265 const struct spmi_regulator_mapping *mapping;
1266 int ret, i;
1267 u32 dig_major_rev;
1268 u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1269 u8 type, subtype;
1270
1271 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1272 ARRAY_SIZE(version));
1273 if (ret) {
6ee5c044 1274 dev_dbg(vreg->dev, "could not read version registers\n");
e92a4047
SB		 1275 return ret;
1276 }
1277 dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV
1278 - SPMI_COMMON_REG_DIG_MAJOR_REV];
1279 if (!force_type) {
1280 type = version[SPMI_COMMON_REG_TYPE -
1281 SPMI_COMMON_REG_DIG_MAJOR_REV];
1282 subtype = version[SPMI_COMMON_REG_SUBTYPE -
1283 SPMI_COMMON_REG_DIG_MAJOR_REV];
1284 } else {
1285 type = force_type >> 8;
1286 subtype = force_type;
1287 }
1288
1289 for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1290 mapping = &supported_regulators[i];
1291 if (mapping->type == type && mapping->subtype == subtype
1292 && mapping->revision_min <= dig_major_rev
1293 && mapping->revision_max >= dig_major_rev)
1294 goto found;
1295 }
1296
1297 dev_err(vreg->dev,
1298 "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1299 vreg->desc.name, type, subtype, dig_major_rev);
1300
1301 return -ENODEV;
1302
1303found:
1304 vreg->logical_type = mapping->logical_type;
1305 vreg->set_points = mapping->set_points;
1306 vreg->hpm_min_load = mapping->hpm_min_load;
1307 vreg->desc.ops = mapping->ops;
1308
1309 if (mapping->set_points) {
1310 if (!mapping->set_points->n_voltages)
1311 spmi_calculate_num_voltages(mapping->set_points);
1312 vreg->desc.n_voltages = mapping->set_points->n_voltages;
1313 }
1314
1315 return 0;
1316}
1317
2cf7b99c 1318static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
e92a4047
SB		 1319{
1320 int ret;
1321 u8 reg = 0;
2cf7b99c 1322 int step, delay, slew_rate, step_delay;
e92a4047
SB		 1323 const struct spmi_voltage_range *range;
1324
1325 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1326 if (ret) {
1327 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1328 return ret;
1329 }
1330
1331 range = spmi_regulator_find_range(vreg);
1332 if (!range)
1333 return -EINVAL;
1334
2cf7b99c
SB		 1335 switch (vreg->logical_type) {
1336 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1337 step_delay = SPMI_FTSMPS_STEP_DELAY;
1338 break;
1339 default:
1340 step_delay = SPMI_DEFAULT_STEP_DELAY;
1341 break;
1342 }
1343
e92a4047
SB		 1344 step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1345 step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1346
1347 delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1348 delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1349
1350 /* slew_rate has units of uV/us */
1351 slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
2cf7b99c 1352 slew_rate /= 1000 * (step_delay << delay);
e92a4047
SB		 1353 slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1354 slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1355
1356 /* Ensure that the slew rate is greater than 0 */
1357 vreg->slew_rate = max(slew_rate, 1);
1358
1359 return ret;
1360}
1361
e2adfacd
SB		 1362static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
1363 const struct spmi_regulator_init_data *data)
1364{
1365 int ret;
1366 enum spmi_regulator_logical_type type;
1367 u8 ctrl_reg[8], reg, mask;
1368
1369 type = vreg->logical_type;
1370
1371 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1372 if (ret)
1373 return ret;
1374
1375 /* Set up enable pin control. */
1376 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1377 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
1378 || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
1379 && !(data->pin_ctrl_enable
1380 & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1381 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1382 ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1383 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1384 data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1385 }
1386
1387 /* Set up mode pin control. */
1388 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1389 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
1390 && !(data->pin_ctrl_hpm
1391 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1392 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1393 ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1394 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1395 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1396 }
1397
1398 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
1399 && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1400 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1401 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1402 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1403 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1404 }
1405
1406 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
1407 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
1408 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
1409 && !(data->pin_ctrl_hpm
1410 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1411 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1412 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1413 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1414 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1415 }
1416
1417 /* Write back any control register values that were modified. */
1418 ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1419 if (ret)
1420 return ret;
1421
1422 /* Set soft start strength and over current protection for VS. */
1423 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {
1424 if (data->vs_soft_start_strength
1425 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {
1426 reg = data->vs_soft_start_strength
1427 & SPMI_VS_SOFT_START_SEL_MASK;
1428 mask = SPMI_VS_SOFT_START_SEL_MASK;
1429 return spmi_vreg_update_bits(vreg,
1430 SPMI_VS_REG_SOFT_START,
1431 reg, mask);
1432 }
1433 }
1434
1435 return 0;
1436}
1437
1438static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,
1439 struct device_node *node, struct spmi_regulator_init_data *data)
1440{
1441 /*
1442 * Initialize configuration parameters to use hardware default in case
1443 * no value is specified via device tree.
1444 */
1445 data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;
1446 data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;
1447 data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT;
1448
1449 /* These bindings are optional, so it is okay if they aren't found. */
1450 of_property_read_u32(node, "qcom,ocp-max-retries",
1451 &vreg->ocp_max_retries);
1452 of_property_read_u32(node, "qcom,ocp-retry-delay",
1453 &vreg->ocp_retry_delay_ms);
1454 of_property_read_u32(node, "qcom,pin-ctrl-enable",
1455 &data->pin_ctrl_enable);
1456 of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);
1457 of_property_read_u32(node, "qcom,vs-soft-start-strength",
1458 &data->vs_soft_start_strength);
1459}
1460
e92a4047
SB		 1461static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1462{
e2adfacd 1463 if (mode == 1)
e92a4047 1464 return REGULATOR_MODE_NORMAL;
e2adfacd
SB		 1465 if (mode == 2)
1466 return REGULATOR_MODE_FAST;
e92a4047
SB		 1467
1468 return REGULATOR_MODE_IDLE;
1469}
1470
1471static int spmi_regulator_of_parse(struct device_node *node,
1472 const struct regulator_desc *desc,
1473 struct regulator_config *config)
1474{
e2adfacd 1475 struct spmi_regulator_init_data data = { };
e92a4047
SB		 1476 struct spmi_regulator *vreg = config->driver_data;
1477 struct device *dev = config->dev;
1478 int ret;
1479
e2adfacd
SB		 1480 spmi_regulator_get_dt_config(vreg, node, &data);
1481
1482 if (!vreg->ocp_max_retries)
1483 vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1484 if (!vreg->ocp_retry_delay_ms)
1485 vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1486
1487 ret = spmi_regulator_init_registers(vreg, &data);
1488 if (ret) {
1489 dev_err(dev, "common initialization failed, ret=%d\n", ret);
1490 return ret;
1491 }
e92a4047 1492
2cf7b99c
SB		 1493 switch (vreg->logical_type) {
1494 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1495 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1496 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1497 case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1498 ret = spmi_regulator_init_slew_rate(vreg);
e92a4047
SB		 1499 if (ret)
1500 return ret;
2cf7b99c
SB		 1501 default:
1502 break;
e92a4047
SB		 1503 }
1504
1505 if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1506 vreg->ocp_irq = 0;
1507
1508 if (vreg->ocp_irq) {
1509 ret = devm_request_irq(dev, vreg->ocp_irq,
1510 spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1511 vreg);
1512 if (ret < 0) {
1513 dev_err(dev, "failed to request irq %d, ret=%d\n",
1514 vreg->ocp_irq, ret);
1515 return ret;
1516 }
1517
1518 INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work);
1519 }
1520
1521 return 0;
1522}
1523
1524static const struct spmi_regulator_data pm8941_regulators[] = {
1525 { "s1", 0x1400, "vdd_s1", },
1526 { "s2", 0x1700, "vdd_s2", },
1527 { "s3", 0x1a00, "vdd_s3", },
c333dfe8 1528 { "s4", 0xa000, },
e92a4047
SB		 1529 { "l1", 0x4000, "vdd_l1_l3", },
1530 { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1531 { "l3", 0x4200, "vdd_l1_l3", },
1532 { "l4", 0x4300, "vdd_l4_l11", },
1533 { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1534 { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1535 { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1536 { "l8", 0x4700, "vdd_l8_l16_l18_19", },
1537 { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1538 { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1539 { "l11", 0x4a00, "vdd_l4_l11", },
1540 { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1541 { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1542 { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1543 { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1544 { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1545 { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1546 { "l18", 0x5100, "vdd_l8_l16_l18_19", },
1547 { "l19", 0x5200, "vdd_l8_l16_l18_19", },
1548 { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1549 { "l21", 0x5400, "vdd_l21", },
1550 { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1551 { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1552 { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1553 { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1554 { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1555 { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
93bfe79b
SB		 1556 { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1557 { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
e92a4047
SB		 1558 { }
1559};
1560
1561static const struct spmi_regulator_data pm8841_regulators[] = {
1562 { "s1", 0x1400, "vdd_s1", },
1563 { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1564 { "s3", 0x1a00, "vdd_s3", },
1565 { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1566 { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1567 { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1568 { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1569 { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1570 { }
1571};
1572
1573static const struct spmi_regulator_data pm8916_regulators[] = {
1574 { "s1", 0x1400, "vdd_s1", },
1575 { "s2", 0x1700, "vdd_s2", },
1576 { "s3", 0x1a00, "vdd_s3", },
1577 { "s4", 0x1d00, "vdd_s4", },
1578 { "l1", 0x4000, "vdd_l1_l3", },
1579 { "l2", 0x4100, "vdd_l2", },
1580 { "l3", 0x4200, "vdd_l1_l3", },
1581 { "l4", 0x4300, "vdd_l4_l5_l6", },
1582 { "l5", 0x4400, "vdd_l4_l5_l6", },
1583 { "l6", 0x4500, "vdd_l4_l5_l6", },
1584 { "l7", 0x4600, "vdd_l7", },
1585 { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1586 { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1587 { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1588 { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1589 { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1590 { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1591 { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1592 { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1593 { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1594 { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1595 { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1596 { }
1597};
1598
50314e55
SB		 1599static const struct spmi_regulator_data pm8994_regulators[] = {
1600 { "s1", 0x1400, "vdd_s1", },
1601 { "s2", 0x1700, "vdd_s2", },
1602 { "s3", 0x1a00, "vdd_s3", },
1603 { "s4", 0x1d00, "vdd_s4", },
1604 { "s5", 0x2000, "vdd_s5", },
1605 { "s6", 0x2300, "vdd_s6", },
1606 { "s7", 0x2600, "vdd_s7", },
1607 { "s8", 0x2900, "vdd_s8", },
1608 { "s9", 0x2c00, "vdd_s9", },
1609 { "s10", 0x2f00, "vdd_s10", },
1610 { "s11", 0x3200, "vdd_s11", },
1611 { "s12", 0x3500, "vdd_s12", },
1612 { "l1", 0x4000, "vdd_l1", },
1613 { "l2", 0x4100, "vdd_l2_l26_l28", },
1614 { "l3", 0x4200, "vdd_l3_l11", },
1615 { "l4", 0x4300, "vdd_l4_l27_l31", },
1616 { "l5", 0x4400, "vdd_l5_l7", },
1617 { "l6", 0x4500, "vdd_l6_l12_l32", },
1618 { "l7", 0x4600, "vdd_l5_l7", },
1619 { "l8", 0x4700, "vdd_l8_l16_l30", },
1620 { "l9", 0x4800, "vdd_l9_l10_l18_l22", },
1621 { "l10", 0x4900, "vdd_l9_l10_l18_l22", },
1622 { "l11", 0x4a00, "vdd_l3_l11", },
1623 { "l12", 0x4b00, "vdd_l6_l12_l32", },
1624 { "l13", 0x4c00, "vdd_l13_l19_l23_l24", },
1625 { "l14", 0x4d00, "vdd_l14_l15", },
1626 { "l15", 0x4e00, "vdd_l14_l15", },
1627 { "l16", 0x4f00, "vdd_l8_l16_l30", },
1628 { "l17", 0x5000, "vdd_l17_l29", },
1629 { "l18", 0x5100, "vdd_l9_l10_l18_l22", },
1630 { "l19", 0x5200, "vdd_l13_l19_l23_l24", },
1631 { "l20", 0x5300, "vdd_l20_l21", },
1632 { "l21", 0x5400, "vdd_l20_l21", },
1633 { "l22", 0x5500, "vdd_l9_l10_l18_l22", },
1634 { "l23", 0x5600, "vdd_l13_l19_l23_l24", },
1635 { "l24", 0x5700, "vdd_l13_l19_l23_l24", },
1636 { "l25", 0x5800, "vdd_l25", },
1637 { "l26", 0x5900, "vdd_l2_l26_l28", },
1638 { "l27", 0x5a00, "vdd_l4_l27_l31", },
1639 { "l28", 0x5b00, "vdd_l2_l26_l28", },
1640 { "l29", 0x5c00, "vdd_l17_l29", },
1641 { "l30", 0x5d00, "vdd_l8_l16_l30", },
1642 { "l31", 0x5e00, "vdd_l4_l27_l31", },
1643 { "l32", 0x5f00, "vdd_l6_l12_l32", },
1644 { "lvs1", 0x8000, "vdd_lvs_1_2", },
1645 { "lvs2", 0x8100, "vdd_lvs_1_2", },
1646 { }
1647};
1648
ca5cd8c9
RN		 1649static const struct spmi_regulator_data pmi8994_regulators[] = {
1650 { "s1", 0x1400, "vdd_s1", },
1651 { "s2", 0x1700, "vdd_s2", },
1652 { "s3", 0x1a00, "vdd_s3", },
1653 { "l1", 0x4000, "vdd_l1", },
1654 { }
1655};
1656
e92a4047
SB		 1657static const struct of_device_id qcom_spmi_regulator_match[] = {
1658 { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
1659 { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
1660 { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
50314e55 1661 { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
ca5cd8c9 1662 { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators },
e92a4047
SB		 1663 { }
1664};
1665MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
1666
1667static int qcom_spmi_regulator_probe(struct platform_device *pdev)
1668{
1669 const struct spmi_regulator_data *reg;
1670 const struct of_device_id *match;
1671 struct regulator_config config = { };
1672 struct regulator_dev *rdev;
1673 struct spmi_regulator *vreg;
1674 struct regmap *regmap;
1675 const char *name;
1676 struct device *dev = &pdev->dev;
1677 int ret;
1678 struct list_head *vreg_list;
1679
1680 vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
1681 if (!vreg_list)
1682 return -ENOMEM;
1683 INIT_LIST_HEAD(vreg_list);
1684 platform_set_drvdata(pdev, vreg_list);
1685
1686 regmap = dev_get_regmap(dev->parent, NULL);
1687 if (!regmap)
1688 return -ENODEV;
1689
1690 match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
1691 if (!match)
1692 return -ENODEV;
1693
1694 for (reg = match->data; reg->name; reg++) {
1695 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1696 if (!vreg)
1697 return -ENOMEM;
1698
1699 vreg->dev = dev;
1700 vreg->base = reg->base;
1701 vreg->regmap = regmap;
1702
1703 if (reg->ocp) {
1704 vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
1705 if (vreg->ocp_irq < 0) {
1706 ret = vreg->ocp_irq;
1707 goto err;
1708 }
1709 }
1710
1711 vreg->desc.id = -1;
1712 vreg->desc.owner = THIS_MODULE;
1713 vreg->desc.type = REGULATOR_VOLTAGE;
1714 vreg->desc.name = name = reg->name;
1715 vreg->desc.supply_name = reg->supply;
1716 vreg->desc.of_match = reg->name;
1717 vreg->desc.of_parse_cb = spmi_regulator_of_parse;
1718 vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
1719
1720 ret = spmi_regulator_match(vreg, reg->force_type);
1721 if (ret)
6ee5c044 1722 continue;
e92a4047
SB		 1723
1724 config.dev = dev;
1725 config.driver_data = vreg;
1726 rdev = devm_regulator_register(dev, &vreg->desc, &config);
1727 if (IS_ERR(rdev)) {
1728 dev_err(dev, "failed to register %s\n", name);
1729 ret = PTR_ERR(rdev);
1730 goto err;
1731 }
1732
1733 INIT_LIST_HEAD(&vreg->node);
1734 list_add(&vreg->node, vreg_list);
1735 }
1736
1737 return 0;
1738
1739err:
1740 list_for_each_entry(vreg, vreg_list, node)
1741 if (vreg->ocp_irq)
1742 cancel_delayed_work_sync(&vreg->ocp_work);
1743 return ret;
1744}
1745
1746static int qcom_spmi_regulator_remove(struct platform_device *pdev)
1747{
1748 struct spmi_regulator *vreg;
1749 struct list_head *vreg_list = platform_get_drvdata(pdev);
1750
1751 list_for_each_entry(vreg, vreg_list, node)
1752 if (vreg->ocp_irq)
1753 cancel_delayed_work_sync(&vreg->ocp_work);
1754
1755 return 0;
1756}
1757
1758static struct platform_driver qcom_spmi_regulator_driver = {
1759 .driver = {
1760 .name = "qcom-spmi-regulator",
1761 .of_match_table = qcom_spmi_regulator_match,
1762 },
1763 .probe = qcom_spmi_regulator_probe,
1764 .remove = qcom_spmi_regulator_remove,
1765};
1766module_platform_driver(qcom_spmi_regulator_driver);
1767
1768MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
1769MODULE_LICENSE("GPL v2");
1770MODULE_ALIAS("platform:qcom-spmi-regulator");
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