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regulator: qcom_spmi: Add slewing delays for all SMPS types
[mirror_ubuntu-artful-kernel.git] / drivers / regulator / qcom_spmi-regulator.c
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e92a4047
SB		 1/*
2 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/err.h>
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/bitops.h>
20#include <linux/slab.h>
21#include <linux/of.h>
22#include <linux/of_device.h>
23#include <linux/platform_device.h>
24#include <linux/ktime.h>
25#include <linux/regulator/driver.h>
26#include <linux/regmap.h>
27#include <linux/list.h>
28
e2adfacd
SB		 29/* Pin control enable input pins. */
30#define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
31#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
32#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
33#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
34#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
35#define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
36
37/* Pin control high power mode input pins. */
38#define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
39#define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
40#define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
41#define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
42#define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08
43#define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10
44#define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20
45
46/*
47 * Used with enable parameters to specify that hardware default register values
48 * should be left unaltered.
49 */
50#define SPMI_REGULATOR_USE_HW_DEFAULT 2
51
52/* Soft start strength of a voltage switch type regulator */
53enum spmi_vs_soft_start_str {
54 SPMI_VS_SOFT_START_STR_0P05_UA = 0,
55 SPMI_VS_SOFT_START_STR_0P25_UA,
56 SPMI_VS_SOFT_START_STR_0P55_UA,
57 SPMI_VS_SOFT_START_STR_0P75_UA,
58 SPMI_VS_SOFT_START_STR_HW_DEFAULT,
59};
60
61/**
62 * struct spmi_regulator_init_data - spmi-regulator initialization data
63 * @pin_ctrl_enable: Bit mask specifying which hardware pins should be
64 * used to enable the regulator, if any
65 * Value should be an ORing of
66 * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If
67 * the bit specified by
68 * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
69 * set, then pin control enable hardware registers
70 * will not be modified.
71 * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be
72 * used to force the regulator into high power
73 * mode, if any
74 * Value should be an ORing of
75 * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If
76 * the bit specified by
77 * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
78 * set, then pin control mode hardware registers
79 * will not be modified.
80 * @vs_soft_start_strength: This parameter sets the soft start strength for
81 * voltage switch type regulators. Its value
82 * should be one of SPMI_VS_SOFT_START_STR_*. If
83 * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,
84 * then the soft start strength will be left at its
85 * default hardware value.
86 */
87struct spmi_regulator_init_data {
88 unsigned pin_ctrl_enable;
89 unsigned pin_ctrl_hpm;
90 enum spmi_vs_soft_start_str vs_soft_start_strength;
91};
92
e92a4047
SB		 93/* These types correspond to unique register layouts. */
94enum spmi_regulator_logical_type {
95 SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
96 SPMI_REGULATOR_LOGICAL_TYPE_LDO,
97 SPMI_REGULATOR_LOGICAL_TYPE_VS,
98 SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
99 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
100 SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
101 SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
102 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
103 SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
104 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
105};
106
107enum spmi_regulator_type {
108 SPMI_REGULATOR_TYPE_BUCK = 0x03,
109 SPMI_REGULATOR_TYPE_LDO = 0x04,
110 SPMI_REGULATOR_TYPE_VS = 0x05,
111 SPMI_REGULATOR_TYPE_BOOST = 0x1b,
112 SPMI_REGULATOR_TYPE_FTS = 0x1c,
113 SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f,
114 SPMI_REGULATOR_TYPE_ULT_LDO = 0x21,
115 SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22,
116};
117
118enum spmi_regulator_subtype {
119 SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08,
120 SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09,
121 SPMI_REGULATOR_SUBTYPE_N50 = 0x01,
122 SPMI_REGULATOR_SUBTYPE_N150 = 0x02,
123 SPMI_REGULATOR_SUBTYPE_N300 = 0x03,
124 SPMI_REGULATOR_SUBTYPE_N600 = 0x04,
125 SPMI_REGULATOR_SUBTYPE_N1200 = 0x05,
126 SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06,
127 SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07,
128 SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14,
129 SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15,
130 SPMI_REGULATOR_SUBTYPE_P50 = 0x08,
131 SPMI_REGULATOR_SUBTYPE_P150 = 0x09,
132 SPMI_REGULATOR_SUBTYPE_P300 = 0x0a,
133 SPMI_REGULATOR_SUBTYPE_P600 = 0x0b,
134 SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c,
135 SPMI_REGULATOR_SUBTYPE_LN = 0x10,
136 SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28,
137 SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29,
138 SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a,
139 SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b,
140 SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c,
141 SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d,
142 SPMI_REGULATOR_SUBTYPE_LV100 = 0x01,
143 SPMI_REGULATOR_SUBTYPE_LV300 = 0x02,
144 SPMI_REGULATOR_SUBTYPE_MV300 = 0x08,
145 SPMI_REGULATOR_SUBTYPE_MV500 = 0x09,
146 SPMI_REGULATOR_SUBTYPE_HDMI = 0x10,
147 SPMI_REGULATOR_SUBTYPE_OTG = 0x11,
148 SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01,
149 SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08,
150 SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09,
151 SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01,
152 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d,
153 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e,
154 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f,
155 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10,
156};
157
158enum spmi_common_regulator_registers {
159 SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01,
160 SPMI_COMMON_REG_TYPE = 0x04,
161 SPMI_COMMON_REG_SUBTYPE = 0x05,
162 SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40,
163 SPMI_COMMON_REG_VOLTAGE_SET = 0x41,
164 SPMI_COMMON_REG_MODE = 0x45,
165 SPMI_COMMON_REG_ENABLE = 0x46,
166 SPMI_COMMON_REG_PULL_DOWN = 0x48,
167 SPMI_COMMON_REG_SOFT_START = 0x4c,
168 SPMI_COMMON_REG_STEP_CTRL = 0x61,
169};
170
171enum spmi_vs_registers {
172 SPMI_VS_REG_OCP = 0x4a,
173 SPMI_VS_REG_SOFT_START = 0x4c,
174};
175
176enum spmi_boost_registers {
177 SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a,
178};
179
180enum spmi_boost_byp_registers {
181 SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b,
182};
183
184/* Used for indexing into ctrl_reg. These are offets from 0x40 */
185enum spmi_common_control_register_index {
186 SPMI_COMMON_IDX_VOLTAGE_RANGE = 0,
187 SPMI_COMMON_IDX_VOLTAGE_SET = 1,
188 SPMI_COMMON_IDX_MODE = 5,
189 SPMI_COMMON_IDX_ENABLE = 6,
190};
191
192/* Common regulator control register layout */
193#define SPMI_COMMON_ENABLE_MASK 0x80
194#define SPMI_COMMON_ENABLE 0x80
195#define SPMI_COMMON_DISABLE 0x00
196#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08
197#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04
198#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02
199#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01
200#define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f
201
202/* Common regulator mode register layout */
203#define SPMI_COMMON_MODE_HPM_MASK 0x80
204#define SPMI_COMMON_MODE_AUTO_MASK 0x40
205#define SPMI_COMMON_MODE_BYPASS_MASK 0x20
206#define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10
207#define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08
208#define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04
209#define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02
210#define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01
211#define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f
212
213/* Common regulator pull down control register layout */
214#define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80
215
216/* LDO regulator current limit control register layout */
217#define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80
218
219/* LDO regulator soft start control register layout */
220#define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80
221
222/* VS regulator over current protection control register layout */
223#define SPMI_VS_OCP_OVERRIDE 0x01
224#define SPMI_VS_OCP_NO_OVERRIDE 0x00
225
226/* VS regulator soft start control register layout */
227#define SPMI_VS_SOFT_START_ENABLE_MASK 0x80
228#define SPMI_VS_SOFT_START_SEL_MASK 0x03
229
230/* Boost regulator current limit control register layout */
231#define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80
232#define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07
233
234#define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10
235#define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30
236#define SPMI_VS_OCP_FALL_DELAY_US 90
237#define SPMI_VS_OCP_FAULT_DELAY_US 20000
238
239#define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18
240#define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3
241#define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07
242#define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0
243
244/* Clock rate in kHz of the FTSMPS regulator reference clock. */
245#define SPMI_FTSMPS_CLOCK_RATE 19200
246
247/* Minimum voltage stepper delay for each step. */
248#define SPMI_FTSMPS_STEP_DELAY 8
ead0307b 249#define SPMI_DEFAULT_STEP_DELAY 20
e92a4047
SB		 250
251/*
252 * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
253 * adjust the step rate in order to account for oscillator variance.
254 */
255#define SPMI_FTSMPS_STEP_MARGIN_NUM 4
256#define SPMI_FTSMPS_STEP_MARGIN_DEN 5
257
258/*
259 * This voltage in uV is returned by get_voltage functions when there is no way
260 * to determine the current voltage level. It is needed because the regulator
261 * framework treats a 0 uV voltage as an error.
262 */
263#define VOLTAGE_UNKNOWN 1
264
265/* VSET value to decide the range of ULT SMPS */
266#define ULT_SMPS_RANGE_SPLIT 0x60
267
268/**
269 * struct spmi_voltage_range - regulator set point voltage mapping description
270 * @min_uV: Minimum programmable output voltage resulting from
271 * set point register value 0x00
272 * @max_uV: Maximum programmable output voltage
273 * @step_uV: Output voltage increase resulting from the set point
274 * register value increasing by 1
275 * @set_point_min_uV: Minimum allowed voltage
276 * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order
277 * to pick which range should be used in the case of
278 * overlapping set points.
279 * @n_voltages: Number of preferred voltage set points present in this
280 * range
281 * @range_sel: Voltage range register value corresponding to this range
282 *
283 * The following relationships must be true for the values used in this struct:
284 * (max_uV - min_uV) % step_uV == 0
285 * (set_point_min_uV - min_uV) % step_uV == 0*
286 * (set_point_max_uV - min_uV) % step_uV == 0*
287 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
288 *
289 * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
290 * specify that the voltage range has meaning, but is not preferred.
291 */
292struct spmi_voltage_range {
293 int min_uV;
294 int max_uV;
295 int step_uV;
296 int set_point_min_uV;
297 int set_point_max_uV;
298 unsigned n_voltages;
299 u8 range_sel;
300};
301
302/*
303 * The ranges specified in the spmi_voltage_set_points struct must be listed
304 * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
305 */
306struct spmi_voltage_set_points {
307 struct spmi_voltage_range *range;
308 int count;
309 unsigned n_voltages;
310};
311
312struct spmi_regulator {
313 struct regulator_desc desc;
314 struct device *dev;
315 struct delayed_work ocp_work;
316 struct regmap *regmap;
317 struct spmi_voltage_set_points *set_points;
318 enum spmi_regulator_logical_type logical_type;
319 int ocp_irq;
320 int ocp_count;
321 int ocp_max_retries;
322 int ocp_retry_delay_ms;
323 int hpm_min_load;
324 int slew_rate;
325 ktime_t vs_enable_time;
326 u16 base;
327 struct list_head node;
328};
329
330struct spmi_regulator_mapping {
331 enum spmi_regulator_type type;
332 enum spmi_regulator_subtype subtype;
333 enum spmi_regulator_logical_type logical_type;
334 u32 revision_min;
335 u32 revision_max;
336 struct regulator_ops *ops;
337 struct spmi_voltage_set_points *set_points;
338 int hpm_min_load;
339};
340
341struct spmi_regulator_data {
342 const char *name;
343 u16 base;
344 const char *supply;
345 const char *ocp;
346 u16 force_type;
347};
348
349#define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
350 _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
351 { \
352 .type = SPMI_REGULATOR_TYPE_##_type, \
353 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \
354 .revision_min = _dig_major_min, \
355 .revision_max = _dig_major_max, \
356 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
357 .ops = &spmi_##_ops_val##_ops, \
358 .set_points = &_set_points_val##_set_points, \
359 .hpm_min_load = _hpm_min_load, \
360 }
361
362#define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
363 { \
364 .type = SPMI_REGULATOR_TYPE_VS, \
365 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \
366 .revision_min = _dig_major_min, \
367 .revision_max = _dig_major_max, \
368 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \
369 .ops = &spmi_vs_ops, \
370 }
371
372#define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
373 _set_point_max_uV, _max_uV, _step_uV) \
374 { \
375 .min_uV = _min_uV, \
376 .max_uV = _max_uV, \
377 .set_point_min_uV = _set_point_min_uV, \
378 .set_point_max_uV = _set_point_max_uV, \
379 .step_uV = _step_uV, \
380 .range_sel = _range_sel, \
381 }
382
383#define DEFINE_SPMI_SET_POINTS(name) \
384struct spmi_voltage_set_points name##_set_points = { \
385 .range = name##_ranges, \
386 .count = ARRAY_SIZE(name##_ranges), \
387}
388
389/*
390 * These tables contain the physically available PMIC regulator voltage setpoint
391 * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed
392 * to ensure that the setpoints available to software are monotonically
393 * increasing and unique. The set_voltage callback functions expect these
394 * properties to hold.
395 */
396static struct spmi_voltage_range pldo_ranges[] = {
397 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500),
398 SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
399 SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
400};
401
402static struct spmi_voltage_range nldo1_ranges[] = {
403 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500),
404};
405
406static struct spmi_voltage_range nldo2_ranges[] = {
407 SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500),
408 SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250),
409 SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500),
410};
411
412static struct spmi_voltage_range nldo3_ranges[] = {
413 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500),
414 SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500),
415 SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500),
416};
417
418static struct spmi_voltage_range ln_ldo_ranges[] = {
419 SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000),
420 SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
421};
422
423static struct spmi_voltage_range smps_ranges[] = {
424 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500),
425 SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
426};
427
428static struct spmi_voltage_range ftsmps_ranges[] = {
429 SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000),
430 SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000),
431};
432
433static struct spmi_voltage_range ftsmps2p5_ranges[] = {
434 SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000),
435 SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000),
436};
437
438static struct spmi_voltage_range boost_ranges[] = {
439 SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
440};
441
442static struct spmi_voltage_range boost_byp_ranges[] = {
443 SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
444};
445
446static struct spmi_voltage_range ult_lo_smps_ranges[] = {
447 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500),
448 SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000),
449};
450
451static struct spmi_voltage_range ult_ho_smps_ranges[] = {
452 SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
453};
454
455static struct spmi_voltage_range ult_nldo_ranges[] = {
456 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500),
457};
458
459static struct spmi_voltage_range ult_pldo_ranges[] = {
460 SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
461};
462
463static DEFINE_SPMI_SET_POINTS(pldo);
464static DEFINE_SPMI_SET_POINTS(nldo1);
465static DEFINE_SPMI_SET_POINTS(nldo2);
466static DEFINE_SPMI_SET_POINTS(nldo3);
467static DEFINE_SPMI_SET_POINTS(ln_ldo);
468static DEFINE_SPMI_SET_POINTS(smps);
469static DEFINE_SPMI_SET_POINTS(ftsmps);
470static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
471static DEFINE_SPMI_SET_POINTS(boost);
472static DEFINE_SPMI_SET_POINTS(boost_byp);
473static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
474static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
475static DEFINE_SPMI_SET_POINTS(ult_nldo);
476static DEFINE_SPMI_SET_POINTS(ult_pldo);
477
478static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
479 int len)
480{
481 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
482}
483
484static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
485 u8 *buf, int len)
486{
487 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
488}
489
490static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
491 u8 mask)
492{
493 return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
494}
495
496static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev)
497{
498 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
499 u8 reg;
500
501 spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, &reg, 1);
502
503 return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE;
504}
505
506static int spmi_regulator_common_enable(struct regulator_dev *rdev)
507{
508 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
509
510 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
511 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
512}
513
514static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
515{
516 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
517
518 if (vreg->ocp_irq) {
519 vreg->ocp_count = 0;
520 vreg->vs_enable_time = ktime_get();
521 }
522
523 return spmi_regulator_common_enable(rdev);
524}
525
e2adfacd
SB		 526static int spmi_regulator_vs_ocp(struct regulator_dev *rdev)
527{
528 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
529 u8 reg = SPMI_VS_OCP_OVERRIDE;
530
531 return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, &reg, 1);
532}
533
e92a4047
SB		 534static int spmi_regulator_common_disable(struct regulator_dev *rdev)
535{
536 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
537
538 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
539 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
540}
541
542static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
543 int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel,
544 unsigned *selector)
545{
546 const struct spmi_voltage_range *range;
547 int uV = min_uV;
548 int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
549
550 /* Check if request voltage is outside of physically settable range. */
551 lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
552 lim_max_uV =
553 vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
554
555 if (uV < lim_min_uV && max_uV >= lim_min_uV)
556 uV = lim_min_uV;
557
558 if (uV < lim_min_uV || uV > lim_max_uV) {
559 dev_err(vreg->dev,
560 "request v=[%d, %d] is outside possible v=[%d, %d]\n",
561 min_uV, max_uV, lim_min_uV, lim_max_uV);
562 return -EINVAL;
563 }
564
565 /* Find the range which uV is inside of. */
566 for (i = vreg->set_points->count - 1; i > 0; i--) {
567 range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
568 if (uV > range_max_uV && range_max_uV > 0)
569 break;
570 }
571
572 range_id = i;
573 range = &vreg->set_points->range[range_id];
574 *range_sel = range->range_sel;
575
576 /*
577 * Force uV to be an allowed set point by applying a ceiling function to
578 * the uV value.
579 */
5d506a5a 580 *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
e92a4047
SB		 581 uV = *voltage_sel * range->step_uV + range->min_uV;
582
583 if (uV > max_uV) {
584 dev_err(vreg->dev,
585 "request v=[%d, %d] cannot be met by any set point; "
586 "next set point: %d\n",
587 min_uV, max_uV, uV);
588 return -EINVAL;
589 }
590
591 *selector = 0;
592 for (i = 0; i < range_id; i++)
593 *selector += vreg->set_points->range[i].n_voltages;
594 *selector += (uV - range->set_point_min_uV) / range->step_uV;
595
596 return 0;
597}
598
599static const struct spmi_voltage_range *
600spmi_regulator_find_range(struct spmi_regulator *vreg)
601{
602 u8 range_sel;
603 const struct spmi_voltage_range *range, *end;
604
605 range = vreg->set_points->range;
606 end = range + vreg->set_points->count;
607
608 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
609
610 for (; range < end; range++)
611 if (range->range_sel == range_sel)
612 return range;
613
614 return NULL;
615}
616
617static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
618 int min_uV, int max_uV, u8 *range_sel, u8 *voltage_sel,
619 unsigned *selector)
620{
621 const struct spmi_voltage_range *range;
622 int uV = min_uV;
623 int i;
624
625 range = spmi_regulator_find_range(vreg);
626 if (!range)
627 goto different_range;
628
629 if (uV < range->min_uV && max_uV >= range->min_uV)
630 uV = range->min_uV;
631
632 if (uV < range->min_uV || uV > range->max_uV) {
633 /* Current range doesn't support the requested voltage. */
634 goto different_range;
635 }
636
637 /*
638 * Force uV to be an allowed set point by applying a ceiling function to
639 * the uV value.
640 */
641 *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
642 uV = *voltage_sel * range->step_uV + range->min_uV;
643
644 if (uV > max_uV) {
645 /*
646 * No set point in the current voltage range is within the
647 * requested min_uV to max_uV range.
648 */
649 goto different_range;
650 }
651
652 *selector = 0;
653 for (i = 0; i < vreg->set_points->count; i++) {
654 if (uV >= vreg->set_points->range[i].set_point_min_uV
9b2dfee3 655 && uV <= vreg->set_points->range[i].set_point_max_uV) {
e92a4047
SB		 656 *selector +=
657 (uV - vreg->set_points->range[i].set_point_min_uV)
658 / vreg->set_points->range[i].step_uV;
659 break;
9b2dfee3 660 }
e92a4047
SB		 661
662 *selector += vreg->set_points->range[i].n_voltages;
663 }
664
665 if (*selector >= vreg->set_points->n_voltages)
666 goto different_range;
667
668 return 0;
669
670different_range:
671 return spmi_regulator_select_voltage(vreg, min_uV, max_uV,
672 range_sel, voltage_sel, selector);
673}
674
675static int spmi_regulator_common_set_voltage(struct regulator_dev *rdev,
676 int min_uV, int max_uV, unsigned *selector)
677{
678 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
679 int ret;
680 u8 buf[2];
681 u8 range_sel, voltage_sel;
682
683 /*
684 * Favor staying in the current voltage range if possible. This avoids
685 * voltage spikes that occur when changing the voltage range.
686 */
687 ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV,
688 &range_sel, &voltage_sel, selector);
689 if (ret)
690 return ret;
691
692 buf[0] = range_sel;
693 buf[1] = voltage_sel;
694 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
695}
696
697static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
698 unsigned int old_selector, unsigned int new_selector)
699{
700 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
701 const struct spmi_voltage_range *range;
702 int diff_uV;
703
704 range = spmi_regulator_find_range(vreg);
705 if (!range)
706 return -EINVAL;
707
708 diff_uV = abs(new_selector - old_selector) * range->step_uV;
709
710 return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
711}
712
713static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
714{
715 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
716 const struct spmi_voltage_range *range;
717 u8 voltage_sel;
718
719 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
720
721 range = spmi_regulator_find_range(vreg);
722 if (!range)
723 return VOLTAGE_UNKNOWN;
724
725 return range->step_uV * voltage_sel + range->min_uV;
726}
727
728static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
729 int min_uV, int max_uV, unsigned *selector)
730{
731 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
732 int ret;
733 u8 range_sel, sel;
734
735 ret = spmi_regulator_select_voltage(vreg, min_uV, max_uV, &range_sel,
736 &sel, selector);
737 if (ret) {
738 dev_err(vreg->dev, "could not set voltage, ret=%d\n", ret);
739 return ret;
740 }
741
742 /*
743 * Certain types of regulators do not have a range select register so
744 * only voltage set register needs to be written.
745 */
746 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
747}
748
749static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
750{
751 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
752 const struct spmi_voltage_range *range = vreg->set_points->range;
753 u8 voltage_sel;
754
755 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
756
757 return range->step_uV * voltage_sel + range->min_uV;
758}
759
760static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
761 int min_uV, int max_uV, unsigned *selector)
762{
763 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
764 int ret;
765 u8 range_sel, voltage_sel;
766
767 /*
768 * Favor staying in the current voltage range if possible. This avoids
769 * voltage spikes that occur when changing the voltage range.
770 */
771 ret = spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV,
772 &range_sel, &voltage_sel, selector);
773 if (ret)
774 return ret;
775
776 /*
777 * Calculate VSET based on range
778 * In case of range 0: voltage_sel is a 7 bit value, can be written
779 * witout any modification.
780 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
781 * [011].
782 */
783 if (range_sel == 1)
784 voltage_sel |= ULT_SMPS_RANGE_SPLIT;
785
0f94bffa 786 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
e92a4047 787 voltage_sel, 0xff);
e92a4047
SB		 788}
789
790static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
791{
792 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
793 const struct spmi_voltage_range *range;
794 u8 voltage_sel;
795
796 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
797
798 range = spmi_regulator_find_range(vreg);
799 if (!range)
800 return VOLTAGE_UNKNOWN;
801
802 if (range->range_sel == 1)
803 voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
804
805 return range->step_uV * voltage_sel + range->min_uV;
806}
807
808static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
809 unsigned selector)
810{
811 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
812 int uV = 0;
813 int i;
814
815 if (selector >= vreg->set_points->n_voltages)
816 return 0;
817
818 for (i = 0; i < vreg->set_points->count; i++) {
9b2dfee3 819 if (selector < vreg->set_points->range[i].n_voltages) {
e92a4047
SB		 820 uV = selector * vreg->set_points->range[i].step_uV
821 + vreg->set_points->range[i].set_point_min_uV;
822 break;
9b2dfee3 823 }
e92a4047
SB		 824
825 selector -= vreg->set_points->range[i].n_voltages;
826 }
827
828 return uV;
829}
830
831static int
832spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
833{
834 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
835 u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
836 u8 val = 0;
837
838 if (enable)
839 val = mask;
840
841 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
842}
843
844static int
845spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
846{
847 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
848 u8 val;
849 int ret;
850
851 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
852 *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
853
854 return ret;
855}
856
857static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
858{
859 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
860 u8 reg;
861
862 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
863
864 if (reg & SPMI_COMMON_MODE_HPM_MASK)
865 return REGULATOR_MODE_NORMAL;
866
e2adfacd
SB		 867 if (reg & SPMI_COMMON_MODE_AUTO_MASK)
868 return REGULATOR_MODE_FAST;
869
e92a4047
SB		 870 return REGULATOR_MODE_IDLE;
871}
872
873static int
874spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
875{
876 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
e2adfacd 877 u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
e92a4047
SB		 878 u8 val = 0;
879
880 if (mode == REGULATOR_MODE_NORMAL)
e2adfacd
SB		 881 val = SPMI_COMMON_MODE_HPM_MASK;
882 else if (mode == REGULATOR_MODE_FAST)
883 val = SPMI_COMMON_MODE_AUTO_MASK;
e92a4047
SB		 884
885 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
886}
887
888static int
889spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
890{
891 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
892 unsigned int mode;
893
894 if (load_uA >= vreg->hpm_min_load)
895 mode = REGULATOR_MODE_NORMAL;
896 else
897 mode = REGULATOR_MODE_IDLE;
898
899 return spmi_regulator_common_set_mode(rdev, mode);
900}
901
902static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
903{
904 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
905 unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
906
907 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
908 mask, mask);
909}
910
911static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
912{
913 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
914 unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
915
916 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
917 mask, mask);
918}
919
920static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
921{
922 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
923 enum spmi_regulator_logical_type type = vreg->logical_type;
924 unsigned int current_reg;
925 u8 reg;
926 u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
927 SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
928 int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
929
930 if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
931 current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
932 else
933 current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
934
935 if (ilim_uA > max || ilim_uA <= 0)
936 return -EINVAL;
937
938 reg = (ilim_uA - 1) / 500;
939 reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
940
941 return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
942}
943
944static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
945{
946 int ret;
947
948 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
949 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
950
951 vreg->vs_enable_time = ktime_get();
952
953 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
954 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
955
956 return ret;
957}
958
959static void spmi_regulator_vs_ocp_work(struct work_struct *work)
960{
961 struct delayed_work *dwork = to_delayed_work(work);
962 struct spmi_regulator *vreg
963 = container_of(dwork, struct spmi_regulator, ocp_work);
964
965 spmi_regulator_vs_clear_ocp(vreg);
966}
967
968static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
969{
970 struct spmi_regulator *vreg = data;
971 ktime_t ocp_irq_time;
972 s64 ocp_trigger_delay_us;
973
974 ocp_irq_time = ktime_get();
975 ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
976 vreg->vs_enable_time);
977
978 /*
979 * Reset the OCP count if there is a large delay between switch enable
980 * and when OCP triggers. This is indicative of a hotplug event as
981 * opposed to a fault.
982 */
983 if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
984 vreg->ocp_count = 0;
985
986 /* Wait for switch output to settle back to 0 V after OCP triggered. */
987 udelay(SPMI_VS_OCP_FALL_DELAY_US);
988
989 vreg->ocp_count++;
990
991 if (vreg->ocp_count == 1) {
992 /* Immediately clear the over current condition. */
993 spmi_regulator_vs_clear_ocp(vreg);
994 } else if (vreg->ocp_count <= vreg->ocp_max_retries) {
995 /* Schedule the over current clear task to run later. */
996 schedule_delayed_work(&vreg->ocp_work,
997 msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
998 } else {
999 dev_err(vreg->dev,
1000 "OCP triggered %d times; no further retries\n",
1001 vreg->ocp_count);
1002 }
1003
1004 return IRQ_HANDLED;
1005}
1006
1007static struct regulator_ops spmi_smps_ops = {
1008 .enable = spmi_regulator_common_enable,
1009 .disable = spmi_regulator_common_disable,
1010 .is_enabled = spmi_regulator_common_is_enabled,
1011 .set_voltage = spmi_regulator_common_set_voltage,
ead0307b 1012 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
e92a4047
SB		 1013 .get_voltage = spmi_regulator_common_get_voltage,
1014 .list_voltage = spmi_regulator_common_list_voltage,
1015 .set_mode = spmi_regulator_common_set_mode,
1016 .get_mode = spmi_regulator_common_get_mode,
1017 .set_load = spmi_regulator_common_set_load,
1018 .set_pull_down = spmi_regulator_common_set_pull_down,
1019};
1020
1021static struct regulator_ops spmi_ldo_ops = {
1022 .enable = spmi_regulator_common_enable,
1023 .disable = spmi_regulator_common_disable,
1024 .is_enabled = spmi_regulator_common_is_enabled,
1025 .set_voltage = spmi_regulator_common_set_voltage,
1026 .get_voltage = spmi_regulator_common_get_voltage,
1027 .list_voltage = spmi_regulator_common_list_voltage,
1028 .set_mode = spmi_regulator_common_set_mode,
1029 .get_mode = spmi_regulator_common_get_mode,
1030 .set_load = spmi_regulator_common_set_load,
1031 .set_bypass = spmi_regulator_common_set_bypass,
1032 .get_bypass = spmi_regulator_common_get_bypass,
1033 .set_pull_down = spmi_regulator_common_set_pull_down,
1034 .set_soft_start = spmi_regulator_common_set_soft_start,
1035};
1036
1037static struct regulator_ops spmi_ln_ldo_ops = {
1038 .enable = spmi_regulator_common_enable,
1039 .disable = spmi_regulator_common_disable,
1040 .is_enabled = spmi_regulator_common_is_enabled,
1041 .set_voltage = spmi_regulator_common_set_voltage,
1042 .get_voltage = spmi_regulator_common_get_voltage,
1043 .list_voltage = spmi_regulator_common_list_voltage,
1044 .set_bypass = spmi_regulator_common_set_bypass,
1045 .get_bypass = spmi_regulator_common_get_bypass,
1046};
1047
1048static struct regulator_ops spmi_vs_ops = {
1049 .enable = spmi_regulator_vs_enable,
1050 .disable = spmi_regulator_common_disable,
1051 .is_enabled = spmi_regulator_common_is_enabled,
1052 .set_pull_down = spmi_regulator_common_set_pull_down,
1053 .set_soft_start = spmi_regulator_common_set_soft_start,
e2adfacd 1054 .set_over_current_protection = spmi_regulator_vs_ocp,
989545e0
SB		 1055 .set_mode = spmi_regulator_common_set_mode,
1056 .get_mode = spmi_regulator_common_get_mode,
e92a4047
SB		 1057};
1058
1059static struct regulator_ops spmi_boost_ops = {
1060 .enable = spmi_regulator_common_enable,
1061 .disable = spmi_regulator_common_disable,
1062 .is_enabled = spmi_regulator_common_is_enabled,
1063 .set_voltage = spmi_regulator_single_range_set_voltage,
1064 .get_voltage = spmi_regulator_single_range_get_voltage,
1065 .list_voltage = spmi_regulator_common_list_voltage,
1066 .set_input_current_limit = spmi_regulator_set_ilim,
1067};
1068
1069static struct regulator_ops spmi_ftsmps_ops = {
1070 .enable = spmi_regulator_common_enable,
1071 .disable = spmi_regulator_common_disable,
1072 .is_enabled = spmi_regulator_common_is_enabled,
1073 .set_voltage = spmi_regulator_common_set_voltage,
1074 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
1075 .get_voltage = spmi_regulator_common_get_voltage,
1076 .list_voltage = spmi_regulator_common_list_voltage,
1077 .set_mode = spmi_regulator_common_set_mode,
1078 .get_mode = spmi_regulator_common_get_mode,
1079 .set_load = spmi_regulator_common_set_load,
1080 .set_pull_down = spmi_regulator_common_set_pull_down,
1081};
1082
1083static struct regulator_ops spmi_ult_lo_smps_ops = {
1084 .enable = spmi_regulator_common_enable,
1085 .disable = spmi_regulator_common_disable,
1086 .is_enabled = spmi_regulator_common_is_enabled,
1087 .set_voltage = spmi_regulator_ult_lo_smps_set_voltage,
ead0307b 1088 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
e92a4047
SB		 1089 .get_voltage = spmi_regulator_ult_lo_smps_get_voltage,
1090 .list_voltage = spmi_regulator_common_list_voltage,
1091 .set_mode = spmi_regulator_common_set_mode,
1092 .get_mode = spmi_regulator_common_get_mode,
1093 .set_load = spmi_regulator_common_set_load,
1094 .set_pull_down = spmi_regulator_common_set_pull_down,
1095};
1096
1097static struct regulator_ops spmi_ult_ho_smps_ops = {
1098 .enable = spmi_regulator_common_enable,
1099 .disable = spmi_regulator_common_disable,
1100 .is_enabled = spmi_regulator_common_is_enabled,
1101 .set_voltage = spmi_regulator_single_range_set_voltage,
ead0307b 1102 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel,
e92a4047
SB		 1103 .get_voltage = spmi_regulator_single_range_get_voltage,
1104 .list_voltage = spmi_regulator_common_list_voltage,
1105 .set_mode = spmi_regulator_common_set_mode,
1106 .get_mode = spmi_regulator_common_get_mode,
1107 .set_load = spmi_regulator_common_set_load,
1108 .set_pull_down = spmi_regulator_common_set_pull_down,
1109};
1110
1111static struct regulator_ops spmi_ult_ldo_ops = {
1112 .enable = spmi_regulator_common_enable,
1113 .disable = spmi_regulator_common_disable,
1114 .is_enabled = spmi_regulator_common_is_enabled,
1115 .set_voltage = spmi_regulator_single_range_set_voltage,
1116 .get_voltage = spmi_regulator_single_range_get_voltage,
1117 .list_voltage = spmi_regulator_common_list_voltage,
1118 .set_mode = spmi_regulator_common_set_mode,
1119 .get_mode = spmi_regulator_common_get_mode,
1120 .set_load = spmi_regulator_common_set_load,
1121 .set_bypass = spmi_regulator_common_set_bypass,
1122 .get_bypass = spmi_regulator_common_get_bypass,
1123 .set_pull_down = spmi_regulator_common_set_pull_down,
1124 .set_soft_start = spmi_regulator_common_set_soft_start,
1125};
1126
1127/* Maximum possible digital major revision value */
1128#define INF 0xFF
1129
1130static const struct spmi_regulator_mapping supported_regulators[] = {
1131 /* type subtype dig_min dig_max ltype ops setpoints hpm_min */
1132 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000),
1133 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000),
1134 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000),
1135 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000),
1136 SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000),
1137 SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000),
1138 SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000),
1139 SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000),
1140 SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000),
1141 SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000),
1142 SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000),
1143 SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000),
1144 SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000),
1145 SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000),
1146 SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000),
1147 SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0),
1148 SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000),
1149 SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000),
1150 SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000),
1151 SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000),
1152 SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000),
1153 SPMI_VREG_VS(LV100, 0, INF),
1154 SPMI_VREG_VS(LV300, 0, INF),
1155 SPMI_VREG_VS(MV300, 0, INF),
1156 SPMI_VREG_VS(MV500, 0, INF),
1157 SPMI_VREG_VS(HDMI, 0, INF),
1158 SPMI_VREG_VS(OTG, 0, INF),
1159 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0),
1160 SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1161 SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1162 SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1163 SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1164 ult_lo_smps, 100000),
1165 SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1166 ult_lo_smps, 100000),
1167 SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1168 ult_lo_smps, 100000),
1169 SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1170 ult_ho_smps, 100000),
1171 SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1172 SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1173 SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1174 SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1175 SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1176 SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1177 SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1178 SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1179 SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1180 SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1181};
1182
1183static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1184{
1185 unsigned int n;
1186 struct spmi_voltage_range *range = points->range;
1187
1188 for (; range < points->range + points->count; range++) {
1189 n = 0;
1190 if (range->set_point_max_uV) {
1191 n = range->set_point_max_uV - range->set_point_min_uV;
419d06a1 1192 n = (n / range->step_uV) + 1;
e92a4047
SB		 1193 }
1194 range->n_voltages = n;
1195 points->n_voltages += n;
1196 }
1197}
1198
1199static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1200{
1201 const struct spmi_regulator_mapping *mapping;
1202 int ret, i;
1203 u32 dig_major_rev;
1204 u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1205 u8 type, subtype;
1206
1207 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1208 ARRAY_SIZE(version));
1209 if (ret) {
1210 dev_err(vreg->dev, "could not read version registers\n");
1211 return ret;
1212 }
1213 dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV
1214 - SPMI_COMMON_REG_DIG_MAJOR_REV];
1215 if (!force_type) {
1216 type = version[SPMI_COMMON_REG_TYPE -
1217 SPMI_COMMON_REG_DIG_MAJOR_REV];
1218 subtype = version[SPMI_COMMON_REG_SUBTYPE -
1219 SPMI_COMMON_REG_DIG_MAJOR_REV];
1220 } else {
1221 type = force_type >> 8;
1222 subtype = force_type;
1223 }
1224
1225 for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1226 mapping = &supported_regulators[i];
1227 if (mapping->type == type && mapping->subtype == subtype
1228 && mapping->revision_min <= dig_major_rev
1229 && mapping->revision_max >= dig_major_rev)
1230 goto found;
1231 }
1232
1233 dev_err(vreg->dev,
1234 "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1235 vreg->desc.name, type, subtype, dig_major_rev);
1236
1237 return -ENODEV;
1238
1239found:
1240 vreg->logical_type = mapping->logical_type;
1241 vreg->set_points = mapping->set_points;
1242 vreg->hpm_min_load = mapping->hpm_min_load;
1243 vreg->desc.ops = mapping->ops;
1244
1245 if (mapping->set_points) {
1246 if (!mapping->set_points->n_voltages)
1247 spmi_calculate_num_voltages(mapping->set_points);
1248 vreg->desc.n_voltages = mapping->set_points->n_voltages;
1249 }
1250
1251 return 0;
1252}
1253
ead0307b 1254static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
e92a4047
SB		 1255{
1256 int ret;
1257 u8 reg = 0;
ead0307b 1258 int step, delay, slew_rate, step_delay;
e92a4047
SB		 1259 const struct spmi_voltage_range *range;
1260
1261 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1262 if (ret) {
1263 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1264 return ret;
1265 }
1266
1267 range = spmi_regulator_find_range(vreg);
1268 if (!range)
1269 return -EINVAL;
1270
ead0307b
SB		 1271 switch (vreg->logical_type) {
1272 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1273 step_delay = SPMI_FTSMPS_STEP_DELAY;
1274 break;
1275 default:
1276 step_delay = SPMI_DEFAULT_STEP_DELAY;
1277 break;
1278 }
1279
e92a4047
SB		 1280 step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1281 step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1282
1283 delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1284 delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1285
1286 /* slew_rate has units of uV/us */
1287 slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
ead0307b 1288 slew_rate /= 1000 * (step_delay << delay);
e92a4047
SB		 1289 slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1290 slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1291
1292 /* Ensure that the slew rate is greater than 0 */
1293 vreg->slew_rate = max(slew_rate, 1);
1294
1295 return ret;
1296}
1297
e2adfacd
SB		 1298static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
1299 const struct spmi_regulator_init_data *data)
1300{
1301 int ret;
1302 enum spmi_regulator_logical_type type;
1303 u8 ctrl_reg[8], reg, mask;
1304
1305 type = vreg->logical_type;
1306
1307 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1308 if (ret)
1309 return ret;
1310
1311 /* Set up enable pin control. */
1312 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1313 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
1314 || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
1315 && !(data->pin_ctrl_enable
1316 & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1317 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1318 ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1319 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1320 data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1321 }
1322
1323 /* Set up mode pin control. */
1324 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1325 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
1326 && !(data->pin_ctrl_hpm
1327 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1328 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1329 ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1330 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1331 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1332 }
1333
1334 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
1335 && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1336 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1337 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1338 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1339 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1340 }
1341
1342 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
1343 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
1344 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
1345 && !(data->pin_ctrl_hpm
1346 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1347 ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1348 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1349 ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1350 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1351 }
1352
1353 /* Write back any control register values that were modified. */
1354 ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1355 if (ret)
1356 return ret;
1357
1358 /* Set soft start strength and over current protection for VS. */
1359 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {
1360 if (data->vs_soft_start_strength
1361 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {
1362 reg = data->vs_soft_start_strength
1363 & SPMI_VS_SOFT_START_SEL_MASK;
1364 mask = SPMI_VS_SOFT_START_SEL_MASK;
1365 return spmi_vreg_update_bits(vreg,
1366 SPMI_VS_REG_SOFT_START,
1367 reg, mask);
1368 }
1369 }
1370
1371 return 0;
1372}
1373
1374static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,
1375 struct device_node *node, struct spmi_regulator_init_data *data)
1376{
1377 /*
1378 * Initialize configuration parameters to use hardware default in case
1379 * no value is specified via device tree.
1380 */
1381 data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;
1382 data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;
1383 data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT;
1384
1385 /* These bindings are optional, so it is okay if they aren't found. */
1386 of_property_read_u32(node, "qcom,ocp-max-retries",
1387 &vreg->ocp_max_retries);
1388 of_property_read_u32(node, "qcom,ocp-retry-delay",
1389 &vreg->ocp_retry_delay_ms);
1390 of_property_read_u32(node, "qcom,pin-ctrl-enable",
1391 &data->pin_ctrl_enable);
1392 of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);
1393 of_property_read_u32(node, "qcom,vs-soft-start-strength",
1394 &data->vs_soft_start_strength);
1395}
1396
e92a4047
SB		 1397static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1398{
e2adfacd 1399 if (mode == 1)
e92a4047 1400 return REGULATOR_MODE_NORMAL;
e2adfacd
SB		 1401 if (mode == 2)
1402 return REGULATOR_MODE_FAST;
e92a4047
SB		 1403
1404 return REGULATOR_MODE_IDLE;
1405}
1406
1407static int spmi_regulator_of_parse(struct device_node *node,
1408 const struct regulator_desc *desc,
1409 struct regulator_config *config)
1410{
e2adfacd 1411 struct spmi_regulator_init_data data = { };
e92a4047
SB		 1412 struct spmi_regulator *vreg = config->driver_data;
1413 struct device *dev = config->dev;
1414 int ret;
1415
e2adfacd
SB		 1416 spmi_regulator_get_dt_config(vreg, node, &data);
1417
1418 if (!vreg->ocp_max_retries)
1419 vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1420 if (!vreg->ocp_retry_delay_ms)
1421 vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1422
1423 ret = spmi_regulator_init_registers(vreg, &data);
1424 if (ret) {
1425 dev_err(dev, "common initialization failed, ret=%d\n", ret);
1426 return ret;
1427 }
e92a4047 1428
ead0307b
SB		 1429 switch (vreg->logical_type) {
1430 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1431 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1432 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1433 case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1434 ret = spmi_regulator_init_slew_rate(vreg);
e92a4047
SB		 1435 if (ret)
1436 return ret;
ead0307b
SB		 1437 default:
1438 break;
e92a4047
SB		 1439 }
1440
1441 if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1442 vreg->ocp_irq = 0;
1443
1444 if (vreg->ocp_irq) {
1445 ret = devm_request_irq(dev, vreg->ocp_irq,
1446 spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1447 vreg);
1448 if (ret < 0) {
1449 dev_err(dev, "failed to request irq %d, ret=%d\n",
1450 vreg->ocp_irq, ret);
1451 return ret;
1452 }
1453
1454 INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work);
1455 }
1456
1457 return 0;
1458}
1459
1460static const struct spmi_regulator_data pm8941_regulators[] = {
1461 { "s1", 0x1400, "vdd_s1", },
1462 { "s2", 0x1700, "vdd_s2", },
1463 { "s3", 0x1a00, "vdd_s3", },
e8a2ec69 1464 { "s4", 0xa000, },
e92a4047
SB		 1465 { "l1", 0x4000, "vdd_l1_l3", },
1466 { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1467 { "l3", 0x4200, "vdd_l1_l3", },
1468 { "l4", 0x4300, "vdd_l4_l11", },
1469 { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1470 { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1471 { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1472 { "l8", 0x4700, "vdd_l8_l16_l18_19", },
1473 { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1474 { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1475 { "l11", 0x4a00, "vdd_l4_l11", },
1476 { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1477 { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1478 { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1479 { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1480 { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1481 { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1482 { "l18", 0x5100, "vdd_l8_l16_l18_19", },
1483 { "l19", 0x5200, "vdd_l8_l16_l18_19", },
1484 { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1485 { "l21", 0x5400, "vdd_l21", },
1486 { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1487 { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1488 { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1489 { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1490 { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1491 { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
18d9c449
SB		 1492 { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1493 { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
e92a4047
SB		 1494 { }
1495};
1496
1497static const struct spmi_regulator_data pm8841_regulators[] = {
1498 { "s1", 0x1400, "vdd_s1", },
1499 { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1500 { "s3", 0x1a00, "vdd_s3", },
1501 { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1502 { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1503 { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1504 { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1505 { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1506 { }
1507};
1508
1509static const struct spmi_regulator_data pm8916_regulators[] = {
1510 { "s1", 0x1400, "vdd_s1", },
1511 { "s2", 0x1700, "vdd_s2", },
1512 { "s3", 0x1a00, "vdd_s3", },
1513 { "s4", 0x1d00, "vdd_s4", },
1514 { "l1", 0x4000, "vdd_l1_l3", },
1515 { "l2", 0x4100, "vdd_l2", },
1516 { "l3", 0x4200, "vdd_l1_l3", },
1517 { "l4", 0x4300, "vdd_l4_l5_l6", },
1518 { "l5", 0x4400, "vdd_l4_l5_l6", },
1519 { "l6", 0x4500, "vdd_l4_l5_l6", },
1520 { "l7", 0x4600, "vdd_l7", },
1521 { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1522 { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1523 { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1524 { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1525 { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1526 { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1527 { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1528 { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1529 { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1530 { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1531 { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1532 { }
1533};
1534
1535static const struct of_device_id qcom_spmi_regulator_match[] = {
1536 { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
1537 { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
1538 { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
1539 { }
1540};
1541MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
1542
1543static int qcom_spmi_regulator_probe(struct platform_device *pdev)
1544{
1545 const struct spmi_regulator_data *reg;
1546 const struct of_device_id *match;
1547 struct regulator_config config = { };
1548 struct regulator_dev *rdev;
1549 struct spmi_regulator *vreg;
1550 struct regmap *regmap;
1551 const char *name;
1552 struct device *dev = &pdev->dev;
1553 int ret;
1554 struct list_head *vreg_list;
1555
1556 vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
1557 if (!vreg_list)
1558 return -ENOMEM;
1559 INIT_LIST_HEAD(vreg_list);
1560 platform_set_drvdata(pdev, vreg_list);
1561
1562 regmap = dev_get_regmap(dev->parent, NULL);
1563 if (!regmap)
1564 return -ENODEV;
1565
1566 match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
1567 if (!match)
1568 return -ENODEV;
1569
1570 for (reg = match->data; reg->name; reg++) {
1571 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1572 if (!vreg)
1573 return -ENOMEM;
1574
1575 vreg->dev = dev;
1576 vreg->base = reg->base;
1577 vreg->regmap = regmap;
1578
1579 if (reg->ocp) {
1580 vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
1581 if (vreg->ocp_irq < 0) {
1582 ret = vreg->ocp_irq;
1583 goto err;
1584 }
1585 }
1586
1587 vreg->desc.id = -1;
1588 vreg->desc.owner = THIS_MODULE;
1589 vreg->desc.type = REGULATOR_VOLTAGE;
1590 vreg->desc.name = name = reg->name;
1591 vreg->desc.supply_name = reg->supply;
1592 vreg->desc.of_match = reg->name;
1593 vreg->desc.of_parse_cb = spmi_regulator_of_parse;
1594 vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
1595
1596 ret = spmi_regulator_match(vreg, reg->force_type);
1597 if (ret)
1598 goto err;
1599
1600 config.dev = dev;
1601 config.driver_data = vreg;
1602 rdev = devm_regulator_register(dev, &vreg->desc, &config);
1603 if (IS_ERR(rdev)) {
1604 dev_err(dev, "failed to register %s\n", name);
1605 ret = PTR_ERR(rdev);
1606 goto err;
1607 }
1608
1609 INIT_LIST_HEAD(&vreg->node);
1610 list_add(&vreg->node, vreg_list);
1611 }
1612
1613 return 0;
1614
1615err:
1616 list_for_each_entry(vreg, vreg_list, node)
1617 if (vreg->ocp_irq)
1618 cancel_delayed_work_sync(&vreg->ocp_work);
1619 return ret;
1620}
1621
1622static int qcom_spmi_regulator_remove(struct platform_device *pdev)
1623{
1624 struct spmi_regulator *vreg;
1625 struct list_head *vreg_list = platform_get_drvdata(pdev);
1626
1627 list_for_each_entry(vreg, vreg_list, node)
1628 if (vreg->ocp_irq)
1629 cancel_delayed_work_sync(&vreg->ocp_work);
1630
1631 return 0;
1632}
1633
1634static struct platform_driver qcom_spmi_regulator_driver = {
1635 .driver = {
1636 .name = "qcom-spmi-regulator",
1637 .of_match_table = qcom_spmi_regulator_match,
1638 },
1639 .probe = qcom_spmi_regulator_probe,
1640 .remove = qcom_spmi_regulator_remove,
1641};
1642module_platform_driver(qcom_spmi_regulator_driver);
1643
1644MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
1645MODULE_LICENSE("GPL v2");
1646MODULE_ALIAS("platform:qcom-spmi-regulator");
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