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[mirror_ubuntu-hirsute-kernel.git] / drivers / regulator / tps80031-regulator.c
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fd1a4da3
AL		 1// SPDX-License-Identifier: GPL-2.0
2//
3// tps80031-regulator.c -- TI TPS80031 regulator driver.
4//
5// Regulator driver for TI TPS80031/TPS80032 Fully Integrated Power
6// Management with Power Path and Battery Charger.
7//
8// Copyright (c) 2012, NVIDIA Corporation.
9//
10// Author: Laxman Dewangan <ldewangan@nvidia.com>
1a0bb679
LD		 11
12#include <linux/delay.h>
13#include <linux/err.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/mfd/tps80031.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/regulator/driver.h>
20#include <linux/regulator/machine.h>
21#include <linux/slab.h>
22
23/* Flags for DCDC Voltage reading */
24#define DCDC_OFFSET_EN BIT(0)
25#define DCDC_EXTENDED_EN BIT(1)
26#define TRACK_MODE_ENABLE BIT(2)
27
28#define SMPS_MULTOFFSET_VIO BIT(1)
29#define SMPS_MULTOFFSET_SMPS1 BIT(3)
30#define SMPS_MULTOFFSET_SMPS2 BIT(4)
31#define SMPS_MULTOFFSET_SMPS3 BIT(6)
32#define SMPS_MULTOFFSET_SMPS4 BIT(0)
33
34#define SMPS_CMD_MASK 0xC0
35#define SMPS_VSEL_MASK 0x3F
36#define LDO_VSEL_MASK 0x1F
37#define LDO_TRACK_VSEL_MASK 0x3F
38
39#define MISC2_LDOUSB_IN_VSYS BIT(4)
40#define MISC2_LDOUSB_IN_PMID BIT(3)
41#define MISC2_LDOUSB_IN_MASK 0x18
42
43#define MISC2_LDO3_SEL_VIB_VAL BIT(0)
44#define MISC2_LDO3_SEL_VIB_MASK 0x1
45
46#define BOOST_HW_PWR_EN BIT(5)
47#define BOOST_HW_PWR_EN_MASK BIT(5)
48
49#define OPA_MODE_EN BIT(6)
50#define OPA_MODE_EN_MASK BIT(6)
51
52#define USB_VBUS_CTRL_SET 0x04
53#define USB_VBUS_CTRL_CLR 0x05
54#define VBUS_DISCHRG 0x20
55
56struct tps80031_regulator_info {
57 /* Regulator register address.*/
58 u8 trans_reg;
59 u8 state_reg;
60 u8 force_reg;
61 u8 volt_reg;
62 u8 volt_id;
63
64 /*Power request bits */
65 int preq_bit;
66
67 /* used by regulator core */
68 struct regulator_desc desc;
69
70};
71
72struct tps80031_regulator {
73 struct device *dev;
1a0bb679
LD		 74 struct tps80031_regulator_info *rinfo;
75
76 u8 device_flags;
77 unsigned int config_flags;
78 unsigned int ext_ctrl_flag;
79};
80
81static inline struct device *to_tps80031_dev(struct regulator_dev *rdev)
82{
83 return rdev_get_dev(rdev)->parent->parent;
84}
85
86static int tps80031_reg_is_enabled(struct regulator_dev *rdev)
87{
88 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
89 struct device *parent = to_tps80031_dev(rdev);
90 u8 reg_val;
91 int ret;
92
b92f787d 93 if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
1a0bb679
LD		 94 return true;
95
b92f787d
LD		 96 ret = tps80031_read(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
97 &reg_val);
1a0bb679
LD		 98 if (ret < 0) {
99 dev_err(&rdev->dev, "Reg 0x%02x read failed, err = %d\n",
100 ri->rinfo->state_reg, ret);
101 return ret;
102 }
350ff52d 103 return (reg_val & TPS80031_STATE_MASK) == TPS80031_STATE_ON;
1a0bb679
LD		 104}
105
106static int tps80031_reg_enable(struct regulator_dev *rdev)
107{
108 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
109 struct device *parent = to_tps80031_dev(rdev);
110 int ret;
111
b92f787d 112 if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
1a0bb679
LD		 113 return 0;
114
b92f787d
LD		 115 ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
116 TPS80031_STATE_ON, TPS80031_STATE_MASK);
1a0bb679
LD		 117 if (ret < 0) {
118 dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n",
119 ri->rinfo->state_reg, ret);
120 return ret;
121 }
122 return ret;
123}
124
125static int tps80031_reg_disable(struct regulator_dev *rdev)
126{
127 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
128 struct device *parent = to_tps80031_dev(rdev);
129 int ret;
130
b92f787d 131 if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
1a0bb679
LD		 132 return 0;
133
b92f787d
LD		 134 ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
135 TPS80031_STATE_OFF, TPS80031_STATE_MASK);
1a0bb679
LD		 136 if (ret < 0)
137 dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n",
138 ri->rinfo->state_reg, ret);
139 return ret;
140}
141
142/* DCDC voltages for the selector of 58 to 63 */
4b77a49c 143static const int tps80031_dcdc_voltages[4][5] = {
1a0bb679
LD		 144 { 1350, 1500, 1800, 1900, 2100},
145 { 1350, 1500, 1800, 1900, 2100},
146 { 2084, 2315, 2778, 2932, 3241},
147 { 4167, 2315, 2778, 2932, 3241},
148};
149
150static int tps80031_dcdc_list_voltage(struct regulator_dev *rdev, unsigned sel)
151{
152 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
153 int volt_index = ri->device_flags & 0x3;
154
155 if (sel == 0)
156 return 0;
157 else if (sel < 58)
158 return regulator_list_voltage_linear(rdev, sel - 1);
159 else
160 return tps80031_dcdc_voltages[volt_index][sel - 58] * 1000;
161}
162
163static int tps80031_dcdc_set_voltage_sel(struct regulator_dev *rdev,
164 unsigned vsel)
165{
166 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
167 struct device *parent = to_tps80031_dev(rdev);
168 int ret;
169 u8 reg_val;
170
171 if (ri->rinfo->force_reg) {
172 ret = tps80031_read(parent, ri->rinfo->volt_id,
173 ri->rinfo->force_reg, &reg_val);
174 if (ret < 0) {
175 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
176 ri->rinfo->force_reg, ret);
177 return ret;
178 }
179 if (!(reg_val & SMPS_CMD_MASK)) {
180 ret = tps80031_update(parent, ri->rinfo->volt_id,
181 ri->rinfo->force_reg, vsel, SMPS_VSEL_MASK);
182 if (ret < 0)
183 dev_err(ri->dev,
184 "reg 0x%02x update failed, e = %d\n",
185 ri->rinfo->force_reg, ret);
186 return ret;
187 }
188 }
189 ret = tps80031_update(parent, ri->rinfo->volt_id,
190 ri->rinfo->volt_reg, vsel, SMPS_VSEL_MASK);
191 if (ret < 0)
192 dev_err(ri->dev, "reg 0x%02x update failed, e = %d\n",
193 ri->rinfo->volt_reg, ret);
194 return ret;
195}
196
197static int tps80031_dcdc_get_voltage_sel(struct regulator_dev *rdev)
198{
199 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
200 struct device *parent = to_tps80031_dev(rdev);
201 uint8_t vsel = 0;
202 int ret;
203
204 if (ri->rinfo->force_reg) {
205 ret = tps80031_read(parent, ri->rinfo->volt_id,
206 ri->rinfo->force_reg, &vsel);
207 if (ret < 0) {
208 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
209 ri->rinfo->force_reg, ret);
210 return ret;
211 }
212
213 if (!(vsel & SMPS_CMD_MASK))
214 return vsel & SMPS_VSEL_MASK;
215 }
216 ret = tps80031_read(parent, ri->rinfo->volt_id,
217 ri->rinfo->volt_reg, &vsel);
218 if (ret < 0) {
219 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
220 ri->rinfo->volt_reg, ret);
221 return ret;
222 }
223 return vsel & SMPS_VSEL_MASK;
224}
225
58fa6ab4
AL		 226static int tps80031_ldo_list_voltage(struct regulator_dev *rdev,
227 unsigned int sel)
1a0bb679
LD		 228{
229 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
230 struct device *parent = to_tps80031_dev(rdev);
1a0bb679
LD		 231
232 /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */
233 if ((ri->rinfo->desc.id == TPS80031_REGULATOR_LDO2) &&
234 (ri->device_flags & TRACK_MODE_ENABLE)) {
235 unsigned nvsel = (sel) & 0x1F;
236 if (((tps80031_get_chip_info(parent) == TPS80031) ||
237 ((tps80031_get_chip_info(parent) == TPS80032) &&
238 (tps80031_get_pmu_version(parent) == 0x0))) &&
239 ((nvsel == 0x0) || (nvsel >= 0x19 && nvsel <= 0x1F))) {
240 dev_err(ri->dev,
241 "Invalid sel %d in track mode LDO2\n",
242 nvsel);
243 return -EINVAL;
244 }
245 }
246
58fa6ab4
AL		 247 return regulator_list_voltage_linear(rdev, sel);
248}
249
250static int tps80031_ldo_map_voltage(struct regulator_dev *rdev,
251 int min_uV, int max_uV)
252{
253 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
254 struct device *parent = to_tps80031_dev(rdev);
255
256 /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */
257 if ((ri->rinfo->desc.id == TPS80031_REGULATOR_LDO2) &&
258 (ri->device_flags & TRACK_MODE_ENABLE)) {
259 if (((tps80031_get_chip_info(parent) == TPS80031) ||
260 ((tps80031_get_chip_info(parent) == TPS80032) &&
261 (tps80031_get_pmu_version(parent) == 0x0)))) {
262 return regulator_map_voltage_iterate(rdev, min_uV,
263 max_uV);
264 }
265 }
266
267 return regulator_map_voltage_linear(rdev, min_uV, max_uV);
268}
269
1a0bb679
LD		 270static int tps80031_vbus_is_enabled(struct regulator_dev *rdev)
271{
272 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
273 struct device *parent = to_tps80031_dev(rdev);
274 int ret = -EIO;
275 uint8_t ctrl1 = 0;
276 uint8_t ctrl3 = 0;
277
b92f787d 278 ret = tps80031_read(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 279 TPS80031_CHARGERUSB_CTRL1, &ctrl1);
280 if (ret < 0) {
281 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
282 TPS80031_CHARGERUSB_CTRL1, ret);
283 return ret;
284 }
b92f787d 285 ret = tps80031_read(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 286 TPS80031_CHARGERUSB_CTRL3, &ctrl3);
287 if (ret < 0) {
288 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
1a7ae58e 289 TPS80031_CHARGERUSB_CTRL3, ret);
1a0bb679
LD		 290 return ret;
291 }
292 if ((ctrl1 & OPA_MODE_EN) && (ctrl3 & BOOST_HW_PWR_EN))
293 return 1;
294 return ret;
295}
296
297static int tps80031_vbus_enable(struct regulator_dev *rdev)
298{
299 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
300 struct device *parent = to_tps80031_dev(rdev);
301 int ret;
302
b92f787d 303 ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 304 TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN);
305 if (ret < 0) {
306 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
307 TPS80031_CHARGERUSB_CTRL1, ret);
308 return ret;
309 }
310
b92f787d 311 ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 312 TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN);
313 if (ret < 0) {
314 dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
315 TPS80031_CHARGERUSB_CTRL3, ret);
316 return ret;
317 }
318 return ret;
319}
320
321static int tps80031_vbus_disable(struct regulator_dev *rdev)
322{
323 struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
324 struct device *parent = to_tps80031_dev(rdev);
325 int ret = 0;
326
b92f787d
LD		 327 if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) {
328 ret = tps80031_write(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 329 USB_VBUS_CTRL_SET, VBUS_DISCHRG);
330 if (ret < 0) {
331 dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n",
332 USB_VBUS_CTRL_SET, ret);
333 return ret;
334 }
335 }
336
b92f787d 337 ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 338 TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN);
339 if (ret < 0) {
340 dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n",
341 TPS80031_CHARGERUSB_CTRL1, ret);
342 return ret;
343 }
344
b92f787d 345 ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 346 TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN);
347 if (ret < 0) {
348 dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n",
349 TPS80031_CHARGERUSB_CTRL3, ret);
350 return ret;
351 }
352
353 mdelay(DIV_ROUND_UP(ri->rinfo->desc.enable_time, 1000));
b92f787d
LD		 354 if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) {
355 ret = tps80031_write(parent, TPS80031_SLAVE_ID2,
1a0bb679
LD		 356 USB_VBUS_CTRL_CLR, VBUS_DISCHRG);
357 if (ret < 0) {
358 dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n",
359 USB_VBUS_CTRL_CLR, ret);
360 return ret;
361 }
362 }
363 return ret;
364}
365
4b77a49c 366static const struct regulator_ops tps80031_dcdc_ops = {
1a0bb679
LD		 367 .list_voltage = tps80031_dcdc_list_voltage,
368 .set_voltage_sel = tps80031_dcdc_set_voltage_sel,
369 .get_voltage_sel = tps80031_dcdc_get_voltage_sel,
370 .enable = tps80031_reg_enable,
371 .disable = tps80031_reg_disable,
372 .is_enabled = tps80031_reg_is_enabled,
373};
374
4b77a49c 375static const struct regulator_ops tps80031_ldo_ops = {
58fa6ab4
AL		 376 .list_voltage = tps80031_ldo_list_voltage,
377 .map_voltage = tps80031_ldo_map_voltage,
bc49c87e
AL		 378 .set_voltage_sel = regulator_set_voltage_sel_regmap,
379 .get_voltage_sel = regulator_get_voltage_sel_regmap,
1a0bb679
LD		 380 .enable = tps80031_reg_enable,
381 .disable = tps80031_reg_disable,
382 .is_enabled = tps80031_reg_is_enabled,
383};
384
4b77a49c 385static const struct regulator_ops tps80031_vbus_sw_ops = {
bf0caae3 386 .list_voltage = regulator_list_voltage_linear,
1a0bb679
LD		 387 .enable = tps80031_vbus_enable,
388 .disable = tps80031_vbus_disable,
389 .is_enabled = tps80031_vbus_is_enabled,
390};
391
4b77a49c 392static const struct regulator_ops tps80031_vbus_hw_ops = {
bf0caae3 393 .list_voltage = regulator_list_voltage_linear,
1a0bb679
LD		 394};
395
4b77a49c 396static const struct regulator_ops tps80031_ext_reg_ops = {
bf0caae3 397 .list_voltage = regulator_list_voltage_linear,
1a0bb679
LD		 398 .enable = tps80031_reg_enable,
399 .disable = tps80031_reg_disable,
400 .is_enabled = tps80031_reg_is_enabled,
401};
402
403/* Non-exiting default definition for some register */
404#define TPS80031_SMPS3_CFG_FORCE 0
405#define TPS80031_SMPS4_CFG_FORCE 0
406
407#define TPS80031_VBUS_CFG_TRANS 0
408#define TPS80031_VBUS_CFG_STATE 0
409
410#define TPS80031_REG_SMPS(_id, _volt_id, _pbit) \
411{ \
412 .trans_reg = TPS80031_##_id##_CFG_TRANS, \
413 .state_reg = TPS80031_##_id##_CFG_STATE, \
414 .force_reg = TPS80031_##_id##_CFG_FORCE, \
415 .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \
b92f787d 416 .volt_id = TPS80031_SLAVE_##_volt_id, \
1a0bb679
LD		 417 .preq_bit = _pbit, \
418 .desc = { \
419 .name = "tps80031_"#_id, \
420 .id = TPS80031_REGULATOR_##_id, \
421 .n_voltages = 63, \
422 .ops = &tps80031_dcdc_ops, \
423 .type = REGULATOR_VOLTAGE, \
424 .owner = THIS_MODULE, \
425 .enable_time = 500, \
426 }, \
427}
428
429#define TPS80031_REG_LDO(_id, _preq_bit) \
430{ \
431 .trans_reg = TPS80031_##_id##_CFG_TRANS, \
432 .state_reg = TPS80031_##_id##_CFG_STATE, \
433 .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \
b92f787d 434 .volt_id = TPS80031_SLAVE_ID1, \
1a0bb679
LD		 435 .preq_bit = _preq_bit, \
436 .desc = { \
437 .owner = THIS_MODULE, \
438 .name = "tps80031_"#_id, \
439 .id = TPS80031_REGULATOR_##_id, \
440 .ops = &tps80031_ldo_ops, \
441 .type = REGULATOR_VOLTAGE, \
442 .min_uV = 1000000, \
443 .uV_step = 100000, \
7fa8a597 444 .linear_min_sel = 1, \
1a0bb679 445 .n_voltages = 25, \
bc49c87e 446 .vsel_reg = TPS80031_##_id##_CFG_VOLTAGE, \
1a0bb679
LD		 447 .vsel_mask = LDO_VSEL_MASK, \
448 .enable_time = 500, \
449 }, \
450}
451
452#define TPS80031_REG_FIXED(_id, max_mV, _ops, _delay, _pbit) \
453{ \
454 .trans_reg = TPS80031_##_id##_CFG_TRANS, \
455 .state_reg = TPS80031_##_id##_CFG_STATE, \
b92f787d 456 .volt_id = TPS80031_SLAVE_ID1, \
1a0bb679
LD		 457 .preq_bit = _pbit, \
458 .desc = { \
459 .name = "tps80031_"#_id, \
460 .id = TPS80031_REGULATOR_##_id, \
bf0caae3
AL		 461 .min_uV = max_mV * 1000, \
462 .n_voltages = 1, \
1a0bb679
LD		 463 .ops = &_ops, \
464 .type = REGULATOR_VOLTAGE, \
465 .owner = THIS_MODULE, \
466 .enable_time = _delay, \
467 }, \
468}
469
470static struct tps80031_regulator_info tps80031_rinfo[TPS80031_REGULATOR_MAX] = {
471 TPS80031_REG_SMPS(VIO, ID0, 4),
472 TPS80031_REG_SMPS(SMPS1, ID0, 0),
473 TPS80031_REG_SMPS(SMPS2, ID0, 1),
474 TPS80031_REG_SMPS(SMPS3, ID1, 2),
475 TPS80031_REG_SMPS(SMPS4, ID1, 3),
476 TPS80031_REG_LDO(VANA, -1),
477 TPS80031_REG_LDO(LDO1, 8),
478 TPS80031_REG_LDO(LDO2, 9),
479 TPS80031_REG_LDO(LDO3, 10),
480 TPS80031_REG_LDO(LDO4, 11),
481 TPS80031_REG_LDO(LDO5, 12),
482 TPS80031_REG_LDO(LDO6, 13),
483 TPS80031_REG_LDO(LDO7, 14),
484 TPS80031_REG_LDO(LDOLN, 15),
485 TPS80031_REG_LDO(LDOUSB, 5),
486 TPS80031_REG_FIXED(VBUS, 5000, tps80031_vbus_hw_ops, 100000, -1),
487 TPS80031_REG_FIXED(REGEN1, 3300, tps80031_ext_reg_ops, 0, 16),
488 TPS80031_REG_FIXED(REGEN2, 3300, tps80031_ext_reg_ops, 0, 17),
489 TPS80031_REG_FIXED(SYSEN, 3300, tps80031_ext_reg_ops, 0, 18),
490};
491
492static int tps80031_power_req_config(struct device *parent,
493 struct tps80031_regulator *ri,
494 struct tps80031_regulator_platform_data *tps80031_pdata)
495{
496 int ret = 0;
497
498 if (ri->rinfo->preq_bit < 0)
499 goto skip_pwr_req_config;
500
501 ret = tps80031_ext_power_req_config(parent, ri->ext_ctrl_flag,
502 ri->rinfo->preq_bit, ri->rinfo->state_reg,
503 ri->rinfo->trans_reg);
504 if (ret < 0) {
505 dev_err(ri->dev, "ext powerreq config failed, err = %d\n", ret);
506 return ret;
507 }
508
509skip_pwr_req_config:
b92f787d
LD		 510 if (tps80031_pdata->ext_ctrl_flag & TPS80031_PWR_ON_ON_SLEEP) {
511 ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
512 ri->rinfo->trans_reg, TPS80031_TRANS_SLEEP_ON,
513 TPS80031_TRANS_SLEEP_MASK);
1a0bb679
LD		 514 if (ret < 0) {
515 dev_err(ri->dev, "Reg 0x%02x update failed, e %d\n",
516 ri->rinfo->trans_reg, ret);
517 return ret;
518 }
519 }
520 return ret;
521}
522
523static int tps80031_regulator_config(struct device *parent,
524 struct tps80031_regulator *ri,
525 struct tps80031_regulator_platform_data *tps80031_pdata)
526{
527 int ret = 0;
528
529 switch (ri->rinfo->desc.id) {
530 case TPS80031_REGULATOR_LDOUSB:
b92f787d
LD		 531 if (ri->config_flags & (TPS80031_USBLDO_INPUT_VSYS |
532 TPS80031_USBLDO_INPUT_PMID)) {
1a0bb679 533 unsigned val = 0;
b92f787d 534 if (ri->config_flags & TPS80031_USBLDO_INPUT_VSYS)
1a0bb679
LD		 535 val = MISC2_LDOUSB_IN_VSYS;
536 else
537 val = MISC2_LDOUSB_IN_PMID;
538
b92f787d
LD		 539 ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
540 TPS80031_MISC2, val,
541 MISC2_LDOUSB_IN_MASK);
1a0bb679
LD		 542 if (ret < 0) {
543 dev_err(ri->dev,
544 "LDOUSB config failed, e= %d\n", ret);
545 return ret;
546 }
547 }
548 break;
549
550 case TPS80031_REGULATOR_LDO3:
b92f787d
LD		 551 if (ri->config_flags & TPS80031_LDO3_OUTPUT_VIB) {
552 ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
1a0bb679
LD		 553 TPS80031_MISC2, MISC2_LDO3_SEL_VIB_VAL,
554 MISC2_LDO3_SEL_VIB_MASK);
555 if (ret < 0) {
556 dev_err(ri->dev,
557 "LDO3 config failed, e = %d\n", ret);
558 return ret;
559 }
560 }
561 break;
562
563 case TPS80031_REGULATOR_VBUS:
564 /* Provide SW control Ops if VBUS is SW control */
b92f787d 565 if (!(ri->config_flags & TPS80031_VBUS_SW_ONLY))
1a0bb679
LD		 566 ri->rinfo->desc.ops = &tps80031_vbus_sw_ops;
567 break;
568 default:
569 break;
570 }
571
572 /* Configure Active state to ON, SLEEP to OFF and OFF_state to OFF */
b92f787d
LD		 573 ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->trans_reg,
574 TPS80031_TRANS_ACTIVE_ON | TPS80031_TRANS_SLEEP_OFF |
575 TPS80031_TRANS_OFF_OFF, TPS80031_TRANS_ACTIVE_MASK |
576 TPS80031_TRANS_SLEEP_MASK | TPS80031_TRANS_OFF_MASK);
1a0bb679
LD		 577 if (ret < 0) {
578 dev_err(ri->dev, "trans reg update failed, e %d\n", ret);
579 return ret;
580 }
581
582 return ret;
583}
584
585static int check_smps_mode_mult(struct device *parent,
586 struct tps80031_regulator *ri)
587{
588 int mult_offset;
589 int ret;
590 u8 smps_offset;
591 u8 smps_mult;
592
b92f787d 593 ret = tps80031_read(parent, TPS80031_SLAVE_ID1,
1a0bb679
LD		 594 TPS80031_SMPS_OFFSET, &smps_offset);
595 if (ret < 0) {
596 dev_err(parent, "Error in reading smps offset register\n");
597 return ret;
598 }
599
b92f787d 600 ret = tps80031_read(parent, TPS80031_SLAVE_ID1,
1a0bb679
LD		 601 TPS80031_SMPS_MULT, &smps_mult);
602 if (ret < 0) {
603 dev_err(parent, "Error in reading smps mult register\n");
604 return ret;
605 }
606
607 switch (ri->rinfo->desc.id) {
608 case TPS80031_REGULATOR_VIO:
609 mult_offset = SMPS_MULTOFFSET_VIO;
610 break;
611 case TPS80031_REGULATOR_SMPS1:
612 mult_offset = SMPS_MULTOFFSET_SMPS1;
613 break;
614 case TPS80031_REGULATOR_SMPS2:
615 mult_offset = SMPS_MULTOFFSET_SMPS2;
616 break;
617 case TPS80031_REGULATOR_SMPS3:
618 mult_offset = SMPS_MULTOFFSET_SMPS3;
619 break;
620 case TPS80031_REGULATOR_SMPS4:
621 mult_offset = SMPS_MULTOFFSET_SMPS4;
622 break;
623 case TPS80031_REGULATOR_LDO2:
624 ri->device_flags = smps_mult & BIT(5) ? TRACK_MODE_ENABLE : 0;
625 /* TRACK mode the ldo2 varies from 600mV to 1300mV */
626 if (ri->device_flags & TRACK_MODE_ENABLE) {
627 ri->rinfo->desc.min_uV = 600000;
628 ri->rinfo->desc.uV_step = 12500;
629 ri->rinfo->desc.n_voltages = 57;
630 ri->rinfo->desc.vsel_mask = LDO_TRACK_VSEL_MASK;
631 }
632 return 0;
633 default:
634 return 0;
635 }
636
637 ri->device_flags = (smps_offset & mult_offset) ? DCDC_OFFSET_EN : 0;
638 ri->device_flags |= (smps_mult & mult_offset) ? DCDC_EXTENDED_EN : 0;
639 switch (ri->device_flags) {
640 case 0:
641 ri->rinfo->desc.min_uV = 607700;
642 ri->rinfo->desc.uV_step = 12660;
643 break;
644 case DCDC_OFFSET_EN:
645 ri->rinfo->desc.min_uV = 700000;
646 ri->rinfo->desc.uV_step = 12500;
647 break;
648 case DCDC_EXTENDED_EN:
649 ri->rinfo->desc.min_uV = 1852000;
650 ri->rinfo->desc.uV_step = 38600;
651 break;
652 case DCDC_OFFSET_EN | DCDC_EXTENDED_EN:
653 ri->rinfo->desc.min_uV = 2161000;
654 ri->rinfo->desc.uV_step = 38600;
655 break;
656 }
657 return 0;
658}
659
a5023574 660static int tps80031_regulator_probe(struct platform_device *pdev)
1a0bb679
LD		 661{
662 struct tps80031_platform_data *pdata;
663 struct tps80031_regulator_platform_data *tps_pdata;
1a0bb679
LD		 664 struct tps80031_regulator *ri;
665 struct tps80031_regulator *pmic;
666 struct regulator_dev *rdev;
667 struct regulator_config config = { };
bc49c87e 668 struct tps80031 *tps80031_mfd = dev_get_drvdata(pdev->dev.parent);
1a0bb679
LD		 669 int ret;
670 int num;
671
672 pdata = dev_get_platdata(pdev->dev.parent);
673
674 if (!pdata) {
675 dev_err(&pdev->dev, "No platform data\n");
676 return -EINVAL;
677 }
678
a86854d0
KC		 679 pmic = devm_kcalloc(&pdev->dev,
680 TPS80031_REGULATOR_MAX, sizeof(*pmic), GFP_KERNEL);
96fa8c4b 681 if (!pmic)
1a0bb679 682 return -ENOMEM;
1a0bb679
LD		 683
684 for (num = 0; num < TPS80031_REGULATOR_MAX; ++num) {
685 tps_pdata = pdata->regulator_pdata[num];
1a0bb679 686 ri = &pmic[num];
1a7ae58e 687 ri->rinfo = &tps80031_rinfo[num];
1a0bb679
LD		 688 ri->dev = &pdev->dev;
689
690 check_smps_mode_mult(pdev->dev.parent, ri);
691 config.dev = &pdev->dev;
692 config.init_data = NULL;
693 config.driver_data = ri;
bc49c87e
AL		 694 config.regmap = tps80031_mfd->regmap[ri->rinfo->volt_id];
695
1a0bb679
LD		 696 if (tps_pdata) {
697 config.init_data = tps_pdata->reg_init_data;
698 ri->config_flags = tps_pdata->config_flags;
699 ri->ext_ctrl_flag = tps_pdata->ext_ctrl_flag;
700 ret = tps80031_regulator_config(pdev->dev.parent,
701 ri, tps_pdata);
702 if (ret < 0) {
703 dev_err(&pdev->dev,
704 "regulator config failed, e %d\n", ret);
0fb0c82e 705 return ret;
1a0bb679
LD		 706 }
707
708 ret = tps80031_power_req_config(pdev->dev.parent,
709 ri, tps_pdata);
710 if (ret < 0) {
711 dev_err(&pdev->dev,
712 "pwr_req config failed, err %d\n", ret);
0fb0c82e 713 return ret;
1a0bb679
LD		 714 }
715 }
0fb0c82e
SK		 716 rdev = devm_regulator_register(&pdev->dev, &ri->rinfo->desc,
717 &config);
d4cbca9e 718 if (IS_ERR(rdev)) {
1a0bb679
LD		 719 dev_err(&pdev->dev,
720 "register regulator failed %s\n",
721 ri->rinfo->desc.name);
0fb0c82e 722 return PTR_ERR(rdev);
1a0bb679 723 }
1a0bb679
LD		 724 }
725
726 platform_set_drvdata(pdev, pmic);
727 return 0;
1a0bb679
LD		 728}
729
730static struct platform_driver tps80031_regulator_driver = {
731 .driver = {
732 .name = "tps80031-pmic",
1a0bb679
LD		 733 },
734 .probe = tps80031_regulator_probe,
1a0bb679
LD		 735};
736
737static int __init tps80031_regulator_init(void)
738{
739 return platform_driver_register(&tps80031_regulator_driver);
740}
741subsys_initcall(tps80031_regulator_init);
742
743static void __exit tps80031_regulator_exit(void)
744{
745 platform_driver_unregister(&tps80031_regulator_driver);
746}
747module_exit(tps80031_regulator_exit);
748
749MODULE_ALIAS("platform:tps80031-regulator");
1a7ae58e 750MODULE_DESCRIPTION("Regulator Driver for TI TPS80031/TPS80032 PMIC");
1a0bb679
LD		 751MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
752MODULE_LICENSE("GPL v2");
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