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fa16a5c1 1/*
c4aa6f31 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips
fa16a5c1
DB
3 *
4 * Copyright (C) 2008 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
8f52a580
SR
13#include <linux/string.h>
14#include <linux/slab.h>
fa16a5c1
DB
15#include <linux/init.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
2098e95c
RN
18#include <linux/of.h>
19#include <linux/of_device.h>
fa16a5c1
DB
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
2098e95c 22#include <linux/regulator/of_regulator.h>
b07682b6 23#include <linux/i2c/twl.h>
2330b05c 24#include <linux/delay.h>
fa16a5c1
DB
25
26/*
cac28ae6 27 * The TWL4030/TW5030/TPS659x0 family chips include power management, a
fa16a5c1
DB
28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions
29 * include an audio codec, battery charger, and more voltage regulators.
30 * These chips are often used in OMAP-based systems.
31 *
32 * This driver implements software-based resource control for various
33 * voltage regulators. This is usually augmented with state machine
34 * based control.
35 */
36
37struct twlreg_info {
38 /* start of regulator's PM_RECEIVER control register bank */
39 u8 base;
40
c4aa6f31 41 /* twl resource ID, for resource control state machine */
fa16a5c1
DB
42 u8 id;
43
44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */
45 u8 table_len;
46 const u16 *table;
47
045f972f
JKS
48 /* State REMAP default configuration */
49 u8 remap;
50
fa16a5c1
DB
51 /* used by regulator core */
52 struct regulator_desc desc;
4d94aee5
GG
53
54 /* chip specific features */
3db39885 55 unsigned long features;
63bfff4e 56
63bfff4e
TK
57 /* data passed from board for external get/set voltage */
58 void *data;
fa16a5c1
DB
59};
60
61
62/* LDO control registers ... offset is from the base of its register bank.
63 * The first three registers of all power resource banks help hardware to
64 * manage the various resource groups.
65 */
441a4505 66/* Common offset in TWL4030/6030 */
fa16a5c1 67#define VREG_GRP 0
441a4505 68/* TWL4030 register offsets */
fa16a5c1
DB
69#define VREG_TYPE 1
70#define VREG_REMAP 2
71#define VREG_DEDICATED 3 /* LDO control */
ba305e31 72#define VREG_VOLTAGE_SMPS_4030 9
441a4505
RN
73/* TWL6030 register offsets */
74#define VREG_TRANS 1
75#define VREG_STATE 2
76#define VREG_VOLTAGE 3
4d94aee5 77#define VREG_VOLTAGE_SMPS 4
4d94aee5 78
fa16a5c1 79static inline int
441a4505 80twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset)
fa16a5c1
DB
81{
82 u8 value;
83 int status;
84
441a4505 85 status = twl_i2c_read_u8(slave_subgp,
fa16a5c1
DB
86 &value, info->base + offset);
87 return (status < 0) ? status : value;
88}
89
90static inline int
441a4505
RN
91twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset,
92 u8 value)
fa16a5c1 93{
441a4505 94 return twl_i2c_write_u8(slave_subgp,
fa16a5c1
DB
95 value, info->base + offset);
96}
97
98/*----------------------------------------------------------------------*/
99
100/* generic power resource operations, which work on all regulators */
101
c4aa6f31 102static int twlreg_grp(struct regulator_dev *rdev)
fa16a5c1 103{
441a4505
RN
104 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER,
105 VREG_GRP);
fa16a5c1
DB
106}
107
108/*
109 * Enable/disable regulators by joining/leaving the P1 (processor) group.
110 * We assume nobody else is updating the DEV_GRP registers.
111 */
441a4505
RN
112/* definition for 4030 family */
113#define P3_GRP_4030 BIT(7) /* "peripherals" */
114#define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */
115#define P1_GRP_4030 BIT(5) /* CPU/Linux */
116/* definition for 6030 family */
117#define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */
118#define P2_GRP_6030 BIT(1) /* "peripherals" */
119#define P1_GRP_6030 BIT(0) /* CPU/Linux */
fa16a5c1 120
b2456779 121static int twl4030reg_is_enabled(struct regulator_dev *rdev)
fa16a5c1 122{
c4aa6f31 123 int state = twlreg_grp(rdev);
fa16a5c1
DB
124
125 if (state < 0)
126 return state;
127
b2456779
SH
128 return state & P1_GRP_4030;
129}
130
2330b05c
ID
131#define PB_I2C_BUSY BIT(0)
132#define PB_I2C_BWEN BIT(1)
133
134/* Wait until buffer empty/ready to send a word on power bus. */
135static int twl4030_wait_pb_ready(void)
136{
137
138 int ret;
139 int timeout = 10;
140 u8 val;
141
142 do {
143 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
144 TWL4030_PM_MASTER_PB_CFG);
145 if (ret < 0)
146 return ret;
147
148 if (!(val & PB_I2C_BUSY))
149 return 0;
150
151 mdelay(1);
152 timeout--;
153 } while (timeout);
154
155 return -ETIMEDOUT;
156}
157
158/* Send a word over the powerbus */
159static int twl4030_send_pb_msg(unsigned msg)
160{
161 u8 val;
162 int ret;
163
164 /* save powerbus configuration */
165 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
166 TWL4030_PM_MASTER_PB_CFG);
167 if (ret < 0)
168 return ret;
169
170 /* Enable i2c access to powerbus */
171 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN,
172 TWL4030_PM_MASTER_PB_CFG);
173 if (ret < 0)
174 return ret;
175
176 ret = twl4030_wait_pb_ready();
177 if (ret < 0)
178 return ret;
179
180 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8,
181 TWL4030_PM_MASTER_PB_WORD_MSB);
182 if (ret < 0)
183 return ret;
184
185 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff,
186 TWL4030_PM_MASTER_PB_WORD_LSB);
187 if (ret < 0)
188 return ret;
189
190 ret = twl4030_wait_pb_ready();
191 if (ret < 0)
192 return ret;
193
194 /* Restore powerbus configuration */
195 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
74d8b45f 196 TWL4030_PM_MASTER_PB_CFG);
2330b05c
ID
197}
198
f8c2940b 199static int twl4030reg_enable(struct regulator_dev *rdev)
fa16a5c1
DB
200{
201 struct twlreg_info *info = rdev_get_drvdata(rdev);
202 int grp;
53b8a9d9 203 int ret;
fa16a5c1 204
b6f476c2 205 grp = twlreg_grp(rdev);
fa16a5c1
DB
206 if (grp < 0)
207 return grp;
208
f8c2940b 209 grp |= P1_GRP_4030;
441a4505 210
53b8a9d9
JKS
211 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
212
f8c2940b
B
213 return ret;
214}
215
0ff3897d 216static int twl4030reg_disable(struct regulator_dev *rdev)
fa16a5c1
DB
217{
218 struct twlreg_info *info = rdev_get_drvdata(rdev);
219 int grp;
21657ebf 220 int ret;
fa16a5c1 221
b6f476c2 222 grp = twlreg_grp(rdev);
fa16a5c1
DB
223 if (grp < 0)
224 return grp;
225
0ff3897d 226 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
441a4505 227
21657ebf
SH
228 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
229
0ff3897d
B
230 return ret;
231}
232
9a0244ad 233static int twl4030reg_get_status(struct regulator_dev *rdev)
fa16a5c1 234{
c4aa6f31 235 int state = twlreg_grp(rdev);
fa16a5c1
DB
236
237 if (state < 0)
238 return state;
239 state &= 0x0f;
240
241 /* assume state != WARM_RESET; we'd not be running... */
242 if (!state)
243 return REGULATOR_STATUS_OFF;
244 return (state & BIT(3))
245 ? REGULATOR_STATUS_NORMAL
246 : REGULATOR_STATUS_STANDBY;
247}
248
1a39962f 249static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode)
fa16a5c1
DB
250{
251 struct twlreg_info *info = rdev_get_drvdata(rdev);
252 unsigned message;
fa16a5c1
DB
253
254 /* We can only set the mode through state machine commands... */
255 switch (mode) {
256 case REGULATOR_MODE_NORMAL:
257 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE);
258 break;
259 case REGULATOR_MODE_STANDBY:
260 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP);
261 break;
262 default:
263 return -EINVAL;
264 }
265
2330b05c 266 return twl4030_send_pb_msg(message);
fa16a5c1
DB
267}
268
a221f95e
ID
269static inline unsigned int twl4030reg_map_mode(unsigned int mode)
270{
271 switch (mode) {
272 case RES_STATE_ACTIVE:
273 return REGULATOR_MODE_NORMAL;
274 case RES_STATE_SLEEP:
275 return REGULATOR_MODE_STANDBY;
276 default:
277 return -EINVAL;
278 }
279}
280
fa16a5c1
DB
281/*----------------------------------------------------------------------*/
282
283/*
284 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage
285 * select field in its control register. We use tables indexed by VSEL
286 * to record voltages in milliVolts. (Accuracy is about three percent.)
287 *
288 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon;
289 * currently handled by listing two slightly different VAUX2 regulators,
290 * only one of which will be configured.
291 *
292 * VSEL values documented as "TI cannot support these values" are flagged
293 * in these tables as UNSUP() values; we normally won't assign them.
d6bb69cf
AH
294 *
295 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported.
296 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting.
fa16a5c1 297 */
fa16a5c1 298#define UNSUP_MASK 0x8000
fa16a5c1
DB
299
300#define UNSUP(x) (UNSUP_MASK | (x))
411a2df5
N
301#define IS_UNSUP(info, x) \
302 ((UNSUP_MASK & (x)) && \
303 !((info)->features & TWL4030_ALLOW_UNSUPPORTED))
fa16a5c1
DB
304#define LDO_MV(x) (~UNSUP_MASK & (x))
305
306
307static const u16 VAUX1_VSEL_table[] = {
308 UNSUP(1500), UNSUP(1800), 2500, 2800,
309 3000, 3000, 3000, 3000,
310};
311static const u16 VAUX2_4030_VSEL_table[] = {
312 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300,
313 1500, 1800, UNSUP(1850), 2500,
314 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
315 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
316};
317static const u16 VAUX2_VSEL_table[] = {
318 1700, 1700, 1900, 1300,
319 1500, 1800, 2000, 2500,
320 2100, 2800, 2200, 2300,
321 2400, 2400, 2400, 2400,
322};
323static const u16 VAUX3_VSEL_table[] = {
324 1500, 1800, 2500, 2800,
d6bb69cf 325 3000, 3000, 3000, 3000,
fa16a5c1
DB
326};
327static const u16 VAUX4_VSEL_table[] = {
328 700, 1000, 1200, UNSUP(1300),
329 1500, 1800, UNSUP(1850), 2500,
1897e742
DB
330 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000),
331 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
fa16a5c1
DB
332};
333static const u16 VMMC1_VSEL_table[] = {
334 1850, 2850, 3000, 3150,
335};
336static const u16 VMMC2_VSEL_table[] = {
337 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300),
338 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500),
339 2600, 2800, 2850, 3000,
340 3150, 3150, 3150, 3150,
341};
342static const u16 VPLL1_VSEL_table[] = {
343 1000, 1200, 1300, 1800,
344 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000),
345};
346static const u16 VPLL2_VSEL_table[] = {
347 700, 1000, 1200, 1300,
348 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500),
349 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000),
350 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150),
351};
352static const u16 VSIM_VSEL_table[] = {
353 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800,
354 2800, 3000, 3000, 3000,
355};
356static const u16 VDAC_VSEL_table[] = {
357 1200, 1300, 1800, 1800,
358};
07fc493f
JKS
359static const u16 VIO_VSEL_table[] = {
360 1800, 1850,
361};
362static const u16 VINTANA2_VSEL_table[] = {
363 2500, 2750,
364};
fa16a5c1 365
3e3d3be7 366static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index)
66b659e6
DB
367{
368 struct twlreg_info *info = rdev_get_drvdata(rdev);
369 int mV = info->table[index];
370
411a2df5 371 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000);
66b659e6
DB
372}
373
fa16a5c1 374static int
dd16b1f8 375twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector)
fa16a5c1
DB
376{
377 struct twlreg_info *info = rdev_get_drvdata(rdev);
fa16a5c1 378
dd16b1f8
AL
379 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE,
380 selector);
fa16a5c1
DB
381}
382
6949fbe5 383static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev)
fa16a5c1
DB
384{
385 struct twlreg_info *info = rdev_get_drvdata(rdev);
6949fbe5 386 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE);
fa16a5c1
DB
387
388 if (vsel < 0)
389 return vsel;
390
391 vsel &= info->table_len - 1;
6949fbe5 392 return vsel;
fa16a5c1
DB
393}
394
3e3d3be7
RN
395static struct regulator_ops twl4030ldo_ops = {
396 .list_voltage = twl4030ldo_list_voltage,
66b659e6 397
dd16b1f8 398 .set_voltage_sel = twl4030ldo_set_voltage_sel,
6949fbe5 399 .get_voltage_sel = twl4030ldo_get_voltage_sel,
3e3d3be7 400
f8c2940b 401 .enable = twl4030reg_enable,
0ff3897d 402 .disable = twl4030reg_disable,
b2456779 403 .is_enabled = twl4030reg_is_enabled,
3e3d3be7 404
1a39962f 405 .set_mode = twl4030reg_set_mode,
3e3d3be7 406
9a0244ad 407 .get_status = twl4030reg_get_status,
3e3d3be7
RN
408};
409
ba305e31
TK
410static int
411twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV,
412 unsigned *selector)
413{
414 struct twlreg_info *info = rdev_get_drvdata(rdev);
415 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500);
416
8313a4fb 417 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel);
63bfff4e 418
ba305e31
TK
419 return 0;
420}
421
422static int twl4030smps_get_voltage(struct regulator_dev *rdev)
423{
424 struct twlreg_info *info = rdev_get_drvdata(rdev);
63bfff4e
TK
425 int vsel;
426
63bfff4e 427 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER,
ba305e31
TK
428 VREG_VOLTAGE_SMPS_4030);
429
430 return vsel * 12500 + 600000;
431}
432
433static struct regulator_ops twl4030smps_ops = {
434 .set_voltage = twl4030smps_set_voltage,
435 .get_voltage = twl4030smps_get_voltage,
436};
437
fa16a5c1
DB
438/*----------------------------------------------------------------------*/
439
b2456779 440static struct regulator_ops twl4030fixed_ops = {
b3816d50 441 .list_voltage = regulator_list_voltage_linear,
b2456779 442
f8c2940b 443 .enable = twl4030reg_enable,
0ff3897d 444 .disable = twl4030reg_disable,
b2456779
SH
445 .is_enabled = twl4030reg_is_enabled,
446
1a39962f 447 .set_mode = twl4030reg_set_mode,
b2456779 448
9a0244ad 449 .get_status = twl4030reg_get_status,
b2456779
SH
450};
451
fa16a5c1
DB
452/*----------------------------------------------------------------------*/
453
2098e95c 454#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 455static const struct twlreg_info TWL4030_INFO_##label = { \
fa16a5c1
DB
456 .base = offset, \
457 .id = num, \
458 .table_len = ARRAY_SIZE(label##_VSEL_table), \
459 .table = label##_VSEL_table, \
045f972f 460 .remap = remap_conf, \
fa16a5c1
DB
461 .desc = { \
462 .name = #label, \
3e3d3be7 463 .id = TWL4030_REG_##label, \
66b659e6 464 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \
3e3d3be7
RN
465 .ops = &twl4030ldo_ops, \
466 .type = REGULATOR_VOLTAGE, \
467 .owner = THIS_MODULE, \
fca53d86 468 .enable_time = turnon_delay, \
a221f95e 469 .of_map_mode = twl4030reg_map_mode, \
3e3d3be7
RN
470 }, \
471 }
472
ba305e31 473#define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \
0ffff5a6 474static const struct twlreg_info TWL4030_INFO_##label = { \
ba305e31
TK
475 .base = offset, \
476 .id = num, \
ba305e31
TK
477 .remap = remap_conf, \
478 .desc = { \
479 .name = #label, \
480 .id = TWL4030_REG_##label, \
481 .ops = &twl4030smps_ops, \
482 .type = REGULATOR_VOLTAGE, \
483 .owner = THIS_MODULE, \
fca53d86 484 .enable_time = turnon_delay, \
a221f95e 485 .of_map_mode = twl4030reg_map_mode, \
ba305e31
TK
486 }, \
487 }
488
dab780a3
NR
489#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
490 remap_conf) \
0ffff5a6 491static const struct twlreg_info TWLFIXED_INFO_##label = { \
fa16a5c1
DB
492 .base = offset, \
493 .id = num, \
045f972f 494 .remap = remap_conf, \
fa16a5c1
DB
495 .desc = { \
496 .name = #label, \
dab780a3 497 .id = TWL4030##_REG_##label, \
66b659e6 498 .n_voltages = 1, \
dab780a3 499 .ops = &twl4030fixed_ops, \
fa16a5c1
DB
500 .type = REGULATOR_VOLTAGE, \
501 .owner = THIS_MODULE, \
b3816d50 502 .min_uV = mVolts * 1000, \
fca53d86 503 .enable_time = turnon_delay, \
dab780a3 504 .of_map_mode = twl4030reg_map_mode, \
8e6de4a3
B
505 }, \
506 }
507
fa16a5c1
DB
508/*
509 * We list regulators here if systems need some level of
510 * software control over them after boot.
511 */
2098e95c
RN
512TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08);
513TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08);
514TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08);
515TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08);
516TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08);
517TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08);
518TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08);
519TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00);
520TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08);
521TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00);
522TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08);
523TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08);
524TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08);
525TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08);
526TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08);
527/* VUSBCP is managed *only* by the USB subchip */
908d6d52 528TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08);
2098e95c
RN
529TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08);
530TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08);
531TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08);
532TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08);
4d94aee5 533
2098e95c
RN
534#define TWL_OF_MATCH(comp, family, label) \
535 { \
536 .compatible = comp, \
537 .data = &family##_INFO_##label, \
538 }
539
540#define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label)
541#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
89ce43fb 542#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
2098e95c 543#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
2098e95c
RN
544#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
545
3d68dfe3 546static const struct of_device_id twl_of_match[] = {
2098e95c
RN
547 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1),
548 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030),
549 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2),
550 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3),
551 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4),
552 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1),
553 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2),
554 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1),
555 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2),
556 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM),
557 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC),
558 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2),
559 TWL4030_OF_MATCH("ti,twl4030-vio", VIO),
560 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1),
561 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2),
908d6d52 562 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1),
2098e95c
RN
563 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG),
564 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5),
565 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8),
566 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1),
2098e95c
RN
567 {},
568};
569MODULE_DEVICE_TABLE(of, twl_of_match);
570
a5023574 571static int twlreg_probe(struct platform_device *pdev)
fa16a5c1 572{
8313a4fb 573 int id;
fa16a5c1 574 struct twlreg_info *info;
0ffff5a6 575 const struct twlreg_info *template;
fa16a5c1
DB
576 struct regulator_init_data *initdata;
577 struct regulation_constraints *c;
578 struct regulator_dev *rdev;
2098e95c 579 const struct of_device_id *match;
c172708d 580 struct regulator_config config = { };
2098e95c
RN
581
582 match = of_match_device(twl_of_match, &pdev->dev);
25d82337
NR
583 if (!match)
584 return -ENODEV;
2098e95c 585
25d82337 586 template = match->data;
0ffff5a6 587 if (!template)
fa16a5c1
DB
588 return -ENODEV;
589
25d82337
NR
590 id = template->desc.id;
591 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
592 &template->desc);
fa16a5c1
DB
593 if (!initdata)
594 return -EINVAL;
595
cd01e32d 596 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
0ffff5a6
AB
597 if (!info)
598 return -ENOMEM;
599
fa16a5c1
DB
600 /* Constrain board-specific capabilities according to what
601 * this driver and the chip itself can actually do.
602 */
603 c = &initdata->constraints;
fa16a5c1
DB
604 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY;
605 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
606 | REGULATOR_CHANGE_MODE
607 | REGULATOR_CHANGE_STATUS;
2098e95c 608 switch (id) {
205e5cd3
JKS
609 case TWL4030_REG_VIO:
610 case TWL4030_REG_VDD1:
611 case TWL4030_REG_VDD2:
612 case TWL4030_REG_VPLL1:
613 case TWL4030_REG_VINTANA1:
614 case TWL4030_REG_VINTANA2:
615 case TWL4030_REG_VINTDIG:
616 c->always_on = true;
617 break;
618 default:
619 break;
620 }
fa16a5c1 621
c172708d
MB
622 config.dev = &pdev->dev;
623 config.init_data = initdata;
624 config.driver_data = info;
625 config.of_node = pdev->dev.of_node;
626
00ce070e 627 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
fa16a5c1
DB
628 if (IS_ERR(rdev)) {
629 dev_err(&pdev->dev, "can't register %s, %ld\n",
630 info->desc.name, PTR_ERR(rdev));
631 return PTR_ERR(rdev);
632 }
633 platform_set_drvdata(pdev, rdev);
634
cac28ae6 635 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap);
30010fa5 636
fa16a5c1
DB
637 /* NOTE: many regulators support short-circuit IRQs (presentable
638 * as REGULATOR_OVER_CURRENT notifications?) configured via:
639 * - SC_CONFIG
640 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4)
641 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2)
642 * - IT_CONFIG
643 */
644
645 return 0;
646}
647
cac28ae6 648MODULE_ALIAS("platform:twl4030_reg");
fa16a5c1 649
c4aa6f31
RN
650static struct platform_driver twlreg_driver = {
651 .probe = twlreg_probe,
fa16a5c1 652 /* NOTE: short name, to work around driver model truncation of
c4aa6f31 653 * "twl_regulator.12" (and friends) to "twl_regulator.1".
fa16a5c1 654 */
2098e95c 655 .driver = {
cac28ae6 656 .name = "twl4030_reg",
2098e95c
RN
657 .of_match_table = of_match_ptr(twl_of_match),
658 },
fa16a5c1
DB
659};
660
c4aa6f31 661static int __init twlreg_init(void)
fa16a5c1 662{
c4aa6f31 663 return platform_driver_register(&twlreg_driver);
fa16a5c1 664}
c4aa6f31 665subsys_initcall(twlreg_init);
fa16a5c1 666
c4aa6f31 667static void __exit twlreg_exit(void)
fa16a5c1 668{
c4aa6f31 669 platform_driver_unregister(&twlreg_driver);
fa16a5c1 670}
c4aa6f31 671module_exit(twlreg_exit)
fa16a5c1 672
cac28ae6 673MODULE_DESCRIPTION("TWL4030 regulator driver");
fa16a5c1 674MODULE_LICENSE("GPL");