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1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
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22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
5a0e3ad6 24#include <linux/slab.h>
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25
26#include <linux/mfd/wm831x/core.h>
27#include <linux/mfd/wm831x/regulator.h>
28#include <linux/mfd/wm831x/pdata.h>
29
30#define WM831X_BUCKV_MAX_SELECTOR 0x68
31#define WM831X_BUCKP_MAX_SELECTOR 0x66
32
33#define WM831X_DCDC_MODE_FAST 0
34#define WM831X_DCDC_MODE_NORMAL 1
35#define WM831X_DCDC_MODE_IDLE 2
36#define WM831X_DCDC_MODE_STANDBY 3
37
82caa978 38#define WM831X_DCDC_MAX_NAME 9
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39
40/* Register offsets in control block */
41#define WM831X_DCDC_CONTROL_1 0
42#define WM831X_DCDC_CONTROL_2 1
43#define WM831X_DCDC_ON_CONFIG 2
44#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 45#define WM831X_DCDC_DVS_CONTROL 4
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46
47/*
48 * Shared
49 */
50
51struct wm831x_dcdc {
52 char name[WM831X_DCDC_MAX_NAME];
82caa978 53 char supply_name[WM831X_DCDC_MAX_NAME];
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54 struct regulator_desc desc;
55 int base;
56 struct wm831x *wm831x;
57 struct regulator_dev *regulator;
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58 int dvs_gpio;
59 int dvs_gpio_state;
60 int on_vsel;
61 int dvs_vsel;
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62};
63
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64static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
65
66{
67 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
68 struct wm831x *wm831x = dcdc->wm831x;
69 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
70 int val;
71
72 val = wm831x_reg_read(wm831x, reg);
73 if (val < 0)
74 return val;
75
76 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
77
78 switch (val) {
79 case WM831X_DCDC_MODE_FAST:
80 return REGULATOR_MODE_FAST;
81 case WM831X_DCDC_MODE_NORMAL:
82 return REGULATOR_MODE_NORMAL;
83 case WM831X_DCDC_MODE_STANDBY:
84 return REGULATOR_MODE_STANDBY;
85 case WM831X_DCDC_MODE_IDLE:
86 return REGULATOR_MODE_IDLE;
87 default:
88 BUG();
9ee291a4 89 return -EINVAL;
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90 }
91}
92
93static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
94 unsigned int mode)
95{
96 int val;
97
98 switch (mode) {
99 case REGULATOR_MODE_FAST:
100 val = WM831X_DCDC_MODE_FAST;
101 break;
102 case REGULATOR_MODE_NORMAL:
103 val = WM831X_DCDC_MODE_NORMAL;
104 break;
105 case REGULATOR_MODE_STANDBY:
106 val = WM831X_DCDC_MODE_STANDBY;
107 break;
108 case REGULATOR_MODE_IDLE:
109 val = WM831X_DCDC_MODE_IDLE;
110 break;
111 default:
112 return -EINVAL;
113 }
114
115 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
116 val << WM831X_DC1_ON_MODE_SHIFT);
117}
118
119static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
120{
121 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
122 struct wm831x *wm831x = dcdc->wm831x;
123 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
124
125 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
126}
127
128static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
129 unsigned int mode)
130{
131 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
132 struct wm831x *wm831x = dcdc->wm831x;
133 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
134
135 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
136}
137
138static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
139{
140 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
141 struct wm831x *wm831x = dcdc->wm831x;
142 int ret;
143
144 /* First, check for errors */
145 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
146 if (ret < 0)
147 return ret;
148
149 if (ret & (1 << rdev_get_id(rdev))) {
150 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
151 rdev_get_id(rdev) + 1);
152 return REGULATOR_STATUS_ERROR;
153 }
154
155 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
156 if (rdev_get_id(rdev) < 2) {
157 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
158 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
159 rdev_get_id(rdev) + 1);
160 return REGULATOR_STATUS_ERROR;
161 }
162
163 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
164 dev_dbg(wm831x->dev, "DCDC%d over current\n",
165 rdev_get_id(rdev) + 1);
166 return REGULATOR_STATUS_ERROR;
167 }
168 }
169
170 /* Is the regulator on? */
171 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
172 if (ret < 0)
173 return ret;
174 if (!(ret & (1 << rdev_get_id(rdev))))
175 return REGULATOR_STATUS_OFF;
176
177 /* TODO: When we handle hardware control modes so we can report the
178 * current mode. */
179 return REGULATOR_STATUS_ON;
180}
181
182static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
183{
184 struct wm831x_dcdc *dcdc = data;
185
186 regulator_notifier_call_chain(dcdc->regulator,
187 REGULATOR_EVENT_UNDER_VOLTAGE,
188 NULL);
189
190 return IRQ_HANDLED;
191}
192
193static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
194{
195 struct wm831x_dcdc *dcdc = data;
196
197 regulator_notifier_call_chain(dcdc->regulator,
198 REGULATOR_EVENT_OVER_CURRENT,
199 NULL);
200
201 return IRQ_HANDLED;
202}
203
204/*
205 * BUCKV specifics
206 */
207
208static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
209 unsigned selector)
210{
211 if (selector <= 0x8)
212 return 600000;
213 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
214 return 600000 + ((selector - 0x8) * 12500);
215 return -EINVAL;
216}
217
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AL
218static int wm831x_buckv_map_voltage(struct regulator_dev *rdev,
219 int min_uV, int max_uV)
e4ee831f 220{
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221 u16 vsel;
222
223 if (min_uV < 600000)
224 vsel = 0;
225 else if (min_uV <= 1800000)
1a679930 226 vsel = DIV_ROUND_UP(min_uV - 600000, 12500) + 8;
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227 else
228 return -EINVAL;
229
230 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
231 return -EINVAL;
232
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233 return vsel;
234}
235
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236static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
237{
238 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
239
240 if (state == dcdc->dvs_gpio_state)
241 return 0;
242
243 dcdc->dvs_gpio_state = state;
244 gpio_set_value(dcdc->dvs_gpio, state);
245
246 /* Should wait for DVS state change to be asserted if we have
247 * a GPIO for it, for now assume the device is configured
248 * for the fastest possible transition.
249 */
250
251 return 0;
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252}
253
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AL
254static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
255 unsigned vsel)
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256{
257 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
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258 struct wm831x *wm831x = dcdc->wm831x;
259 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
260 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 261 int ret;
3a93f2a9 262
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263 /* If this value is already set then do a GPIO update if we can */
264 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
265 return wm831x_buckv_set_dvs(rdev, 0);
266
267 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
268 return wm831x_buckv_set_dvs(rdev, 1);
269
270 /* Always set the ON status to the minimum voltage */
271 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
272 if (ret < 0)
273 return ret;
274 dcdc->on_vsel = vsel;
275
276 if (!dcdc->dvs_gpio)
277 return ret;
278
279 /* Kick the voltage transition now */
280 ret = wm831x_buckv_set_dvs(rdev, 0);
281 if (ret < 0)
282 return ret;
283
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284 /*
285 * If this VSEL is higher than the last one we've seen then
286 * remember it as the DVS VSEL. This is optimised for CPUfreq
287 * usage where we want to get to the highest voltage very
288 * quickly.
289 */
290 if (vsel > dcdc->dvs_vsel) {
291 ret = wm831x_set_bits(wm831x, dvs_reg,
292 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 293 vsel);
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294 if (ret == 0)
295 dcdc->dvs_vsel = vsel;
296 else
297 dev_warn(wm831x->dev,
298 "Failed to set DCDC DVS VSEL: %d\n", ret);
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299 }
300
e24a04c4 301 return 0;
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302}
303
304static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 305 int uV)
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306{
307 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 308 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 309 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
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310 int vsel;
311
b5fb77e0 312 vsel = wm831x_buckv_map_voltage(rdev, uV, uV);
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313 if (vsel < 0)
314 return vsel;
e4ee831f 315
e24a04c4 316 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
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317}
318
afb8bb80 319static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
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320{
321 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 322
e24a04c4 323 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 324 return dcdc->dvs_vsel;
e24a04c4 325 else
afb8bb80 326 return dcdc->on_vsel;
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327}
328
329/* Current limit options */
330static u16 wm831x_dcdc_ilim[] = {
331 125, 250, 375, 500, 625, 750, 875, 1000
332};
333
334static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
335 int min_uA, int max_uA)
336{
337 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
338 struct wm831x *wm831x = dcdc->wm831x;
339 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
340 int i;
341
422294de 342 for (i = ARRAY_SIZE(wm831x_dcdc_ilim) - 1; i >= 0; i--) {
a171e782
AL
343 if ((min_uA <= wm831x_dcdc_ilim[i]) &&
344 (wm831x_dcdc_ilim[i] <= max_uA))
422294de
AL
345 return wm831x_set_bits(wm831x, reg,
346 WM831X_DC1_HC_THR_MASK,
347 i << WM831X_DC1_HC_THR_SHIFT);
e4ee831f 348 }
e4ee831f 349
422294de 350 return -EINVAL;
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351}
352
353static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
354{
355 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
356 struct wm831x *wm831x = dcdc->wm831x;
357 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
358 int val;
359
360 val = wm831x_reg_read(wm831x, reg);
361 if (val < 0)
362 return val;
363
09bf14b9
AL
364 val = (val & WM831X_DC1_HC_THR_MASK) >> WM831X_DC1_HC_THR_SHIFT;
365 return wm831x_dcdc_ilim[val];
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366}
367
b0d6dd3b 368static const struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 369 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 370 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
e4ee831f 371 .list_voltage = wm831x_buckv_list_voltage,
b5fb77e0 372 .map_voltage = wm831x_buckv_map_voltage,
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373 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
374 .set_current_limit = wm831x_buckv_set_current_limit,
375 .get_current_limit = wm831x_buckv_get_current_limit,
376
3d138fcc
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377 .is_enabled = regulator_is_enabled_regmap,
378 .enable = regulator_enable_regmap,
379 .disable = regulator_disable_regmap,
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380 .get_status = wm831x_dcdc_get_status,
381 .get_mode = wm831x_dcdc_get_mode,
382 .set_mode = wm831x_dcdc_set_mode,
383 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
384};
385
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386/*
387 * Set up DVS control. We just log errors since we can still run
388 * (with reduced performance) if we fail.
389 */
1aa20d27
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390static void wm831x_buckv_dvs_init(struct platform_device *pdev,
391 struct wm831x_dcdc *dcdc,
392 struct wm831x_buckv_pdata *pdata)
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393{
394 struct wm831x *wm831x = dcdc->wm831x;
395 int ret;
396 u16 ctrl;
397
398 if (!pdata || !pdata->dvs_gpio)
399 return;
400
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401 /* gpiolib won't let us read the GPIO status so pick the higher
402 * of the two existing voltages so we take it as platform data.
403 */
404 dcdc->dvs_gpio_state = pdata->dvs_init_state;
405
1aa20d27
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406 ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio,
407 dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
408 "DCDC DVS");
e24a04c4 409 if (ret < 0) {
053fa1b7 410 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
e24a04c4 411 dcdc->name, ret);
e24a04c4
MB
412 return;
413 }
414
415 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
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416
417 switch (pdata->dvs_control_src) {
418 case 1:
419 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
420 break;
421 case 2:
422 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
423 break;
424 default:
425 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
426 pdata->dvs_control_src, dcdc->name);
427 return;
428 }
429
c439b8f4
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430 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
431 * to make bootstrapping a bit smoother.
432 */
433 if (!dcdc->dvs_vsel) {
434 ret = wm831x_set_bits(wm831x,
435 dcdc->base + WM831X_DCDC_DVS_CONTROL,
436 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
437 if (ret == 0)
438 dcdc->dvs_vsel = dcdc->on_vsel;
439 else
440 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
441 ret);
442 }
443
b47ba9fd
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444 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
445 WM831X_DC1_DVS_SRC_MASK, ctrl);
446 if (ret < 0) {
447 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
448 dcdc->name, ret);
449 }
e24a04c4
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450}
451
a5023574 452static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
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453{
454 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 455 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 456 struct regulator_config config = { };
137a6354 457 int id;
e4ee831f
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458 struct wm831x_dcdc *dcdc;
459 struct resource *res;
460 int ret, irq;
461
137a6354
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462 if (pdata && pdata->wm831x_num)
463 id = (pdata->wm831x_num * 10) + 1;
464 else
465 id = 0;
466 id = pdev->id - id;
467
e4ee831f
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468 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
469
fded2f4f
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470 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
471 GFP_KERNEL);
5730aa57 472 if (!dcdc)
e4ee831f 473 return -ENOMEM;
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474
475 dcdc->wm831x = wm831x;
476
5656098e 477 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 478 if (res == NULL) {
5656098e 479 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
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480 ret = -EINVAL;
481 goto err;
482 }
483 dcdc->base = res->start;
484
485 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
486 dcdc->desc.name = dcdc->name;
82caa978
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487
488 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
489 "DC%dVDD", id + 1);
490 dcdc->desc.supply_name = dcdc->supply_name;
491
e4ee831f
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492 dcdc->desc.id = id;
493 dcdc->desc.type = REGULATOR_VOLTAGE;
494 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
495 dcdc->desc.ops = &wm831x_buckv_ops;
496 dcdc->desc.owner = THIS_MODULE;
3d138fcc
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497 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
498 dcdc->desc.enable_mask = 1 << id;
e4ee831f 499
e24a04c4
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500 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
501 if (ret < 0) {
502 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
503 goto err;
504 }
505 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
506
a1b81dd3 507 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
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508 if (ret < 0) {
509 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
510 goto err;
511 }
512 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
513
f0b067d9 514 if (pdata && pdata->dcdc[id])
1aa20d27
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515 wm831x_buckv_dvs_init(pdev, dcdc,
516 pdata->dcdc[id]->driver_data);
e24a04c4 517
c172708d 518 config.dev = pdev->dev.parent;
b7ca8788
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519 if (pdata)
520 config.init_data = pdata->dcdc[id];
c172708d 521 config.driver_data = dcdc;
3d138fcc 522 config.regmap = wm831x->regmap;
c172708d 523
d73b4cb7
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524 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
525 &config);
e4ee831f
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526 if (IS_ERR(dcdc->regulator)) {
527 ret = PTR_ERR(dcdc->regulator);
528 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
529 id + 1, ret);
530 goto err;
531 }
532
cd99758b 533 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
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534 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
535 wm831x_dcdc_uv_irq,
29454738
FE
536 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
537 dcdc->name, dcdc);
e4ee831f
MB
538 if (ret != 0) {
539 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
540 irq, ret);
d73b4cb7 541 goto err;
e4ee831f
MB
542 }
543
cd99758b 544 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
b0c4c0c6
MB
545 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
546 wm831x_dcdc_oc_irq,
29454738
FE
547 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
548 dcdc->name, dcdc);
e4ee831f
MB
549 if (ret != 0) {
550 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
551 irq, ret);
d73b4cb7 552 goto err;
e4ee831f
MB
553 }
554
555 platform_set_drvdata(pdev, dcdc);
556
557 return 0;
558
e4ee831f 559err:
e4ee831f
MB
560 return ret;
561}
562
e4ee831f
MB
563static struct platform_driver wm831x_buckv_driver = {
564 .probe = wm831x_buckv_probe,
e4ee831f
MB
565 .driver = {
566 .name = "wm831x-buckv",
567 },
568};
569
570/*
571 * BUCKP specifics
572 */
573
d580cb5e 574static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB
575{
576 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
577 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 578 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL
579 int sel;
580
581 sel = regulator_map_voltage_linear(rdev, uV, uV);
582 if (sel < 0)
583 return sel;
e4ee831f 584
d580cb5e 585 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB
586}
587
b0d6dd3b 588static const struct regulator_ops wm831x_buckp_ops = {
d580cb5e 589 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 590 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 591 .list_voltage = regulator_list_voltage_linear,
d580cb5e 592 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB
593 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
594
3d138fcc
MB
595 .is_enabled = regulator_is_enabled_regmap,
596 .enable = regulator_enable_regmap,
597 .disable = regulator_disable_regmap,
e4ee831f
MB
598 .get_status = wm831x_dcdc_get_status,
599 .get_mode = wm831x_dcdc_get_mode,
600 .set_mode = wm831x_dcdc_set_mode,
601 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
602};
603
a5023574 604static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB
605{
606 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 607 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 608 struct regulator_config config = { };
137a6354 609 int id;
e4ee831f
MB
610 struct wm831x_dcdc *dcdc;
611 struct resource *res;
612 int ret, irq;
613
137a6354
MB
614 if (pdata && pdata->wm831x_num)
615 id = (pdata->wm831x_num * 10) + 1;
616 else
617 id = 0;
618 id = pdev->id - id;
619
e4ee831f
MB
620 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
621
fded2f4f
MB
622 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
623 GFP_KERNEL);
5730aa57 624 if (!dcdc)
e4ee831f 625 return -ENOMEM;
e4ee831f
MB
626
627 dcdc->wm831x = wm831x;
628
5656098e 629 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 630 if (res == NULL) {
5656098e 631 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB
632 ret = -EINVAL;
633 goto err;
634 }
635 dcdc->base = res->start;
636
637 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
638 dcdc->desc.name = dcdc->name;
82caa978
MB
639
640 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
641 "DC%dVDD", id + 1);
642 dcdc->desc.supply_name = dcdc->supply_name;
643
e4ee831f
MB
644 dcdc->desc.id = id;
645 dcdc->desc.type = REGULATOR_VOLTAGE;
646 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
647 dcdc->desc.ops = &wm831x_buckp_ops;
648 dcdc->desc.owner = THIS_MODULE;
817436e7
MB
649 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
650 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB
651 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
652 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL
653 dcdc->desc.min_uV = 850000;
654 dcdc->desc.uV_step = 25000;
e4ee831f 655
c172708d 656 config.dev = pdev->dev.parent;
b7ca8788
MB
657 if (pdata)
658 config.init_data = pdata->dcdc[id];
c172708d 659 config.driver_data = dcdc;
817436e7 660 config.regmap = wm831x->regmap;
c172708d 661
d73b4cb7
MB
662 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
663 &config);
e4ee831f
MB
664 if (IS_ERR(dcdc->regulator)) {
665 ret = PTR_ERR(dcdc->regulator);
666 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
667 id + 1, ret);
668 goto err;
669 }
670
cd99758b 671 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB
672 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
673 wm831x_dcdc_uv_irq,
29454738
FE
674 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
675 dcdc->name, dcdc);
e4ee831f
MB
676 if (ret != 0) {
677 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
678 irq, ret);
d73b4cb7 679 goto err;
e4ee831f
MB
680 }
681
682 platform_set_drvdata(pdev, dcdc);
683
684 return 0;
685
e4ee831f 686err:
e4ee831f
MB
687 return ret;
688}
689
e4ee831f
MB
690static struct platform_driver wm831x_buckp_driver = {
691 .probe = wm831x_buckp_probe,
e4ee831f
MB
692 .driver = {
693 .name = "wm831x-buckp",
694 },
695};
696
1304850d
MB
697/*
698 * DCDC boost convertors
699 */
700
701static int wm831x_boostp_get_status(struct regulator_dev *rdev)
702{
703 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
704 struct wm831x *wm831x = dcdc->wm831x;
705 int ret;
706
707 /* First, check for errors */
708 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
709 if (ret < 0)
710 return ret;
711
712 if (ret & (1 << rdev_get_id(rdev))) {
713 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
714 rdev_get_id(rdev) + 1);
715 return REGULATOR_STATUS_ERROR;
716 }
717
718 /* Is the regulator on? */
719 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
720 if (ret < 0)
721 return ret;
722 if (ret & (1 << rdev_get_id(rdev)))
723 return REGULATOR_STATUS_ON;
724 else
725 return REGULATOR_STATUS_OFF;
726}
727
b0d6dd3b 728static const struct regulator_ops wm831x_boostp_ops = {
1304850d
MB
729 .get_status = wm831x_boostp_get_status,
730
3d138fcc
MB
731 .is_enabled = regulator_is_enabled_regmap,
732 .enable = regulator_enable_regmap,
733 .disable = regulator_disable_regmap,
1304850d
MB
734};
735
a5023574 736static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB
737{
738 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 739 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 740 struct regulator_config config = { };
1304850d
MB
741 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
742 struct wm831x_dcdc *dcdc;
743 struct resource *res;
744 int ret, irq;
745
746 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
747
748 if (pdata == NULL || pdata->dcdc[id] == NULL)
749 return -ENODEV;
750
4c60165d 751 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 752 if (!dcdc)
1304850d 753 return -ENOMEM;
1304850d
MB
754
755 dcdc->wm831x = wm831x;
756
5656098e 757 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 758 if (res == NULL) {
5656098e 759 dev_err(&pdev->dev, "No REG resource\n");
477b2bac 760 return -EINVAL;
1304850d
MB
761 }
762 dcdc->base = res->start;
763
764 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
765 dcdc->desc.name = dcdc->name;
766 dcdc->desc.id = id;
767 dcdc->desc.type = REGULATOR_VOLTAGE;
768 dcdc->desc.ops = &wm831x_boostp_ops;
769 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB
770 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
771 dcdc->desc.enable_mask = 1 << id;
1304850d 772
c172708d 773 config.dev = pdev->dev.parent;
f0b067d9
MB
774 if (pdata)
775 config.init_data = pdata->dcdc[id];
c172708d 776 config.driver_data = dcdc;
3d138fcc 777 config.regmap = wm831x->regmap;
c172708d 778
d73b4cb7
MB
779 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
780 &config);
1304850d
MB
781 if (IS_ERR(dcdc->regulator)) {
782 ret = PTR_ERR(dcdc->regulator);
783 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
784 id + 1, ret);
477b2bac 785 return ret;
1304850d
MB
786 }
787
cd99758b 788 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB
789 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
790 wm831x_dcdc_uv_irq,
29454738
FE
791 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
792 dcdc->name,
b0c4c0c6 793 dcdc);
1304850d
MB
794 if (ret != 0) {
795 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
796 irq, ret);
477b2bac 797 return ret;
1304850d
MB
798 }
799
800 platform_set_drvdata(pdev, dcdc);
801
802 return 0;
1304850d
MB
803}
804
1304850d
MB
805static struct platform_driver wm831x_boostp_driver = {
806 .probe = wm831x_boostp_probe,
1304850d
MB
807 .driver = {
808 .name = "wm831x-boostp",
809 },
810};
811
8267a9ba
MB
812/*
813 * External Power Enable
814 *
815 * These aren't actually DCDCs but look like them in hardware so share
816 * code.
817 */
818
819#define WM831X_EPE_BASE 6
820
b0d6dd3b 821static const struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB
822 .is_enabled = regulator_is_enabled_regmap,
823 .enable = regulator_enable_regmap,
824 .disable = regulator_disable_regmap,
8267a9ba
MB
825 .get_status = wm831x_dcdc_get_status,
826};
827
a5023574 828static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB
829{
830 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 831 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 832 struct regulator_config config = { };
8267a9ba
MB
833 int id = pdev->id % ARRAY_SIZE(pdata->epe);
834 struct wm831x_dcdc *dcdc;
835 int ret;
836
837 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
838
4c60165d 839 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 840 if (!dcdc)
8267a9ba 841 return -ENOMEM;
8267a9ba
MB
842
843 dcdc->wm831x = wm831x;
844
845 /* For current parts this is correct; probably need to revisit
846 * in future.
847 */
848 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
849 dcdc->desc.name = dcdc->name;
850 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
851 dcdc->desc.ops = &wm831x_epe_ops;
852 dcdc->desc.type = REGULATOR_VOLTAGE;
853 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB
854 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
855 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 856
c172708d 857 config.dev = pdev->dev.parent;
b7ca8788
MB
858 if (pdata)
859 config.init_data = pdata->epe[id];
c172708d 860 config.driver_data = dcdc;
3d138fcc 861 config.regmap = wm831x->regmap;
c172708d 862
d73b4cb7
MB
863 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
864 &config);
8267a9ba
MB
865 if (IS_ERR(dcdc->regulator)) {
866 ret = PTR_ERR(dcdc->regulator);
867 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
868 id + 1, ret);
869 goto err;
870 }
871
872 platform_set_drvdata(pdev, dcdc);
873
874 return 0;
875
876err:
8267a9ba
MB
877 return ret;
878}
879
8267a9ba
MB
880static struct platform_driver wm831x_epe_driver = {
881 .probe = wm831x_epe_probe,
8267a9ba
MB
882 .driver = {
883 .name = "wm831x-epe",
884 },
885};
886
55e03e9c
TR
887static struct platform_driver * const drivers[] = {
888 &wm831x_buckv_driver,
889 &wm831x_buckp_driver,
890 &wm831x_boostp_driver,
891 &wm831x_epe_driver,
892};
893
e4ee831f
MB
894static int __init wm831x_dcdc_init(void)
895{
55e03e9c 896 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB
897}
898subsys_initcall(wm831x_dcdc_init);
899
900static void __exit wm831x_dcdc_exit(void)
901{
55e03e9c 902 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB
903}
904module_exit(wm831x_dcdc_exit);
905
906/* Module information */
907MODULE_AUTHOR("Mark Brown");
908MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
909MODULE_LICENSE("GPL");
910MODULE_ALIAS("platform:wm831x-buckv");
911MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 912MODULE_ALIAS("platform:wm831x-boostp");
24b43150 913MODULE_ALIAS("platform:wm831x-epe");