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[mirror_ubuntu-jammy-kernel.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
3cad5fc8
AL		 1// SPDX-License-Identifier: GPL-2.0+
2//
3// wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
4//
5// Copyright 2009 Wolfson Microelectronics PLC.
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
e4ee831f
MB		 8
9#include <linux/module.h>
10#include <linux/moduleparam.h>
11#include <linux/init.h>
12#include <linux/bitops.h>
13#include <linux/err.h>
14#include <linux/i2c.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
e24a04c4 17#include <linux/regulator/machine.h>
9a5ed0ba 18#include <linux/gpio/consumer.h>
5a0e3ad6 19#include <linux/slab.h>
e4ee831f
MB		 20
21#include <linux/mfd/wm831x/core.h>
22#include <linux/mfd/wm831x/regulator.h>
23#include <linux/mfd/wm831x/pdata.h>
24
25#define WM831X_BUCKV_MAX_SELECTOR 0x68
26#define WM831X_BUCKP_MAX_SELECTOR 0x66
27
28#define WM831X_DCDC_MODE_FAST 0
29#define WM831X_DCDC_MODE_NORMAL 1
30#define WM831X_DCDC_MODE_IDLE 2
31#define WM831X_DCDC_MODE_STANDBY 3
32
82caa978 33#define WM831X_DCDC_MAX_NAME 9
e4ee831f
MB		 34
35/* Register offsets in control block */
36#define WM831X_DCDC_CONTROL_1 0
37#define WM831X_DCDC_CONTROL_2 1
38#define WM831X_DCDC_ON_CONFIG 2
39#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 40#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 41
42/*
43 * Shared
44 */
45
46struct wm831x_dcdc {
47 char name[WM831X_DCDC_MAX_NAME];
82caa978 48 char supply_name[WM831X_DCDC_MAX_NAME];
e4ee831f
MB		 49 struct regulator_desc desc;
50 int base;
51 struct wm831x *wm831x;
52 struct regulator_dev *regulator;
9a5ed0ba 53 struct gpio_desc *dvs_gpiod;
e24a04c4
MB		 54 int dvs_gpio_state;
55 int on_vsel;
56 int dvs_vsel;
e4ee831f
MB		 57};
58
e4ee831f
MB		 59static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
60
61{
62 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
63 struct wm831x *wm831x = dcdc->wm831x;
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
65 int val;
66
67 val = wm831x_reg_read(wm831x, reg);
68 if (val < 0)
69 return val;
70
71 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
72
73 switch (val) {
74 case WM831X_DCDC_MODE_FAST:
75 return REGULATOR_MODE_FAST;
76 case WM831X_DCDC_MODE_NORMAL:
77 return REGULATOR_MODE_NORMAL;
78 case WM831X_DCDC_MODE_STANDBY:
79 return REGULATOR_MODE_STANDBY;
80 case WM831X_DCDC_MODE_IDLE:
81 return REGULATOR_MODE_IDLE;
82 default:
83 BUG();
9ee291a4 84 return -EINVAL;
e4ee831f
MB		 85 }
86}
87
88static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
89 unsigned int mode)
90{
91 int val;
92
93 switch (mode) {
94 case REGULATOR_MODE_FAST:
95 val = WM831X_DCDC_MODE_FAST;
96 break;
97 case REGULATOR_MODE_NORMAL:
98 val = WM831X_DCDC_MODE_NORMAL;
99 break;
100 case REGULATOR_MODE_STANDBY:
101 val = WM831X_DCDC_MODE_STANDBY;
102 break;
103 case REGULATOR_MODE_IDLE:
104 val = WM831X_DCDC_MODE_IDLE;
105 break;
106 default:
107 return -EINVAL;
108 }
109
110 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
111 val << WM831X_DC1_ON_MODE_SHIFT);
112}
113
114static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
115{
116 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
117 struct wm831x *wm831x = dcdc->wm831x;
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
119
120 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
121}
122
123static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
124 unsigned int mode)
125{
126 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
127 struct wm831x *wm831x = dcdc->wm831x;
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
129
130 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
131}
132
133static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
134{
135 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
136 struct wm831x *wm831x = dcdc->wm831x;
137 int ret;
138
139 /* First, check for errors */
140 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
141 if (ret < 0)
142 return ret;
143
144 if (ret & (1 << rdev_get_id(rdev))) {
145 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
146 rdev_get_id(rdev) + 1);
147 return REGULATOR_STATUS_ERROR;
148 }
149
150 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
151 if (rdev_get_id(rdev) < 2) {
152 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
153 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
154 rdev_get_id(rdev) + 1);
155 return REGULATOR_STATUS_ERROR;
156 }
157
158 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
159 dev_dbg(wm831x->dev, "DCDC%d over current\n",
160 rdev_get_id(rdev) + 1);
161 return REGULATOR_STATUS_ERROR;
162 }
163 }
164
165 /* Is the regulator on? */
166 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
167 if (ret < 0)
168 return ret;
169 if (!(ret & (1 << rdev_get_id(rdev))))
170 return REGULATOR_STATUS_OFF;
171
172 /* TODO: When we handle hardware control modes so we can report the
173 * current mode. */
174 return REGULATOR_STATUS_ON;
175}
176
177static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
178{
179 struct wm831x_dcdc *dcdc = data;
180
181 regulator_notifier_call_chain(dcdc->regulator,
182 REGULATOR_EVENT_UNDER_VOLTAGE,
183 NULL);
184
185 return IRQ_HANDLED;
186}
187
188static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
189{
190 struct wm831x_dcdc *dcdc = data;
191
192 regulator_notifier_call_chain(dcdc->regulator,
193 REGULATOR_EVENT_OVER_CURRENT,
194 NULL);
195
196 return IRQ_HANDLED;
197}
198
199/*
200 * BUCKV specifics
201 */
202
60ab7f41 203static const struct linear_range wm831x_buckv_ranges[] = {
ccffcb8e
AL		 204 REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0),
205 REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500),
206};
e24a04c4 207
e24a04c4
MB		 208static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
209{
210 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
211
212 if (state == dcdc->dvs_gpio_state)
213 return 0;
214
215 dcdc->dvs_gpio_state = state;
9a5ed0ba 216 gpiod_set_value(dcdc->dvs_gpiod, state);
e24a04c4
MB		 217
218 /* Should wait for DVS state change to be asserted if we have
219 * a GPIO for it, for now assume the device is configured
220 * for the fastest possible transition.
221 */
222
223 return 0;
e4ee831f
MB		 224}
225
b5fb77e0
AL		 226static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
227 unsigned vsel)
e4ee831f
MB		 228{
229 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 230 struct wm831x *wm831x = dcdc->wm831x;
231 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
232 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 233 int ret;
3a93f2a9 234
e24a04c4 235 /* If this value is already set then do a GPIO update if we can */
9a5ed0ba 236 if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel)
e24a04c4
MB		 237 return wm831x_buckv_set_dvs(rdev, 0);
238
9a5ed0ba 239 if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel)
e24a04c4
MB		 240 return wm831x_buckv_set_dvs(rdev, 1);
241
242 /* Always set the ON status to the minimum voltage */
243 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
244 if (ret < 0)
245 return ret;
246 dcdc->on_vsel = vsel;
247
9a5ed0ba 248 if (!dcdc->dvs_gpiod)
e24a04c4
MB		 249 return ret;
250
251 /* Kick the voltage transition now */
252 ret = wm831x_buckv_set_dvs(rdev, 0);
253 if (ret < 0)
254 return ret;
255
88cda60e
MB		 256 /*
257 * If this VSEL is higher than the last one we've seen then
258 * remember it as the DVS VSEL. This is optimised for CPUfreq
259 * usage where we want to get to the highest voltage very
260 * quickly.
261 */
262 if (vsel > dcdc->dvs_vsel) {
263 ret = wm831x_set_bits(wm831x, dvs_reg,
264 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 265 vsel);
88cda60e
MB		 266 if (ret == 0)
267 dcdc->dvs_vsel = vsel;
268 else
269 dev_warn(wm831x->dev,
270 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 271 }
272
e24a04c4 273 return 0;
e4ee831f
MB		 274}
275
276static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 277 int uV)
e4ee831f
MB		 278{
279 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 280 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 281 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 282 int vsel;
283
ccffcb8e 284 vsel = regulator_map_voltage_linear_range(rdev, uV, uV);
e24a04c4
MB		 285 if (vsel < 0)
286 return vsel;
e4ee831f 287
e24a04c4 288 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 289}
290
afb8bb80 291static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 292{
293 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 294
9a5ed0ba 295 if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state)
afb8bb80 296 return dcdc->dvs_vsel;
e24a04c4 297 else
afb8bb80 298 return dcdc->on_vsel;
e4ee831f
MB		 299}
300
301/* Current limit options */
c25d4788
AL		 302static const unsigned int wm831x_dcdc_ilim[] = {
303 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000
e4ee831f
MB		 304};
305
b0d6dd3b 306static const struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 307 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 308 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
ccffcb8e
AL		 309 .list_voltage = regulator_list_voltage_linear_range,
310 .map_voltage = regulator_map_voltage_linear_range,
e4ee831f 311 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
20eb641e
AL		 312 .set_current_limit = regulator_set_current_limit_regmap,
313 .get_current_limit = regulator_get_current_limit_regmap,
e4ee831f 314
3d138fcc
MB		 315 .is_enabled = regulator_is_enabled_regmap,
316 .enable = regulator_enable_regmap,
317 .disable = regulator_disable_regmap,
e4ee831f
MB		 318 .get_status = wm831x_dcdc_get_status,
319 .get_mode = wm831x_dcdc_get_mode,
320 .set_mode = wm831x_dcdc_set_mode,
321 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
322};
323
e24a04c4
MB		 324/*
325 * Set up DVS control. We just log errors since we can still run
326 * (with reduced performance) if we fail.
327 */
1aa20d27
MB		 328static void wm831x_buckv_dvs_init(struct platform_device *pdev,
329 struct wm831x_dcdc *dcdc,
330 struct wm831x_buckv_pdata *pdata)
e24a04c4
MB		 331{
332 struct wm831x *wm831x = dcdc->wm831x;
333 int ret;
334 u16 ctrl;
335
9a5ed0ba 336 if (!pdata)
e24a04c4
MB		 337 return;
338
e24a04c4
MB		 339 /* gpiolib won't let us read the GPIO status so pick the higher
340 * of the two existing voltages so we take it as platform data.
341 */
342 dcdc->dvs_gpio_state = pdata->dvs_init_state;
343
9a5ed0ba
LW		 344 dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs",
345 dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW);
346 if (IS_ERR(dcdc->dvs_gpiod)) {
347 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n",
348 dcdc->name, PTR_ERR(dcdc->dvs_gpiod));
e24a04c4
MB		 349 return;
350 }
351
b47ba9fd
MB		 352 switch (pdata->dvs_control_src) {
353 case 1:
354 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
355 break;
356 case 2:
357 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
358 break;
359 default:
360 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
361 pdata->dvs_control_src, dcdc->name);
362 return;
363 }
364
c439b8f4
MB		 365 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
366 * to make bootstrapping a bit smoother.
367 */
368 if (!dcdc->dvs_vsel) {
369 ret = wm831x_set_bits(wm831x,
370 dcdc->base + WM831X_DCDC_DVS_CONTROL,
371 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
372 if (ret == 0)
373 dcdc->dvs_vsel = dcdc->on_vsel;
374 else
375 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
376 ret);
377 }
378
b47ba9fd
MB		 379 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
380 WM831X_DC1_DVS_SRC_MASK, ctrl);
381 if (ret < 0) {
382 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
383 dcdc->name, ret);
384 }
e24a04c4
MB		 385}
386
a5023574 387static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
MB		 388{
389 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 390 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 391 struct regulator_config config = { };
137a6354 392 int id;
e4ee831f
MB		 393 struct wm831x_dcdc *dcdc;
394 struct resource *res;
395 int ret, irq;
396
137a6354
MB		 397 if (pdata && pdata->wm831x_num)
398 id = (pdata->wm831x_num * 10) + 1;
399 else
400 id = 0;
401 id = pdev->id - id;
402
e4ee831f
MB		 403 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
404
fded2f4f
MB		 405 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
406 GFP_KERNEL);
5730aa57 407 if (!dcdc)
e4ee831f 408 return -ENOMEM;
e4ee831f
MB		 409
410 dcdc->wm831x = wm831x;
411
5656098e 412 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 413 if (res == NULL) {
5656098e 414 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 415 ret = -EINVAL;
416 goto err;
417 }
418 dcdc->base = res->start;
419
420 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
421 dcdc->desc.name = dcdc->name;
82caa978
MB		 422
423 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
424 "DC%dVDD", id + 1);
425 dcdc->desc.supply_name = dcdc->supply_name;
426
e4ee831f
MB		 427 dcdc->desc.id = id;
428 dcdc->desc.type = REGULATOR_VOLTAGE;
429 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
ccffcb8e
AL		 430 dcdc->desc.linear_ranges = wm831x_buckv_ranges;
431 dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges);
e4ee831f
MB		 432 dcdc->desc.ops = &wm831x_buckv_ops;
433 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 434 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
435 dcdc->desc.enable_mask = 1 << id;
20eb641e
AL		 436 dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2;
437 dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK;
438 dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim);
439 dcdc->desc.curr_table = wm831x_dcdc_ilim;
e4ee831f 440
e24a04c4
MB		 441 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
442 if (ret < 0) {
443 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
444 goto err;
445 }
446 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
447
a1b81dd3 448 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 449 if (ret < 0) {
450 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
451 goto err;
452 }
453 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
454
f0b067d9 455 if (pdata && pdata->dcdc[id])
1aa20d27
MB		 456 wm831x_buckv_dvs_init(pdev, dcdc,
457 pdata->dcdc[id]->driver_data);
e24a04c4 458
c172708d 459 config.dev = pdev->dev.parent;
b7ca8788
MB		 460 if (pdata)
461 config.init_data = pdata->dcdc[id];
c172708d 462 config.driver_data = dcdc;
3d138fcc 463 config.regmap = wm831x->regmap;
c172708d 464
d73b4cb7
MB		 465 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
466 &config);
e4ee831f
MB		 467 if (IS_ERR(dcdc->regulator)) {
468 ret = PTR_ERR(dcdc->regulator);
469 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
470 id + 1, ret);
471 goto err;
472 }
473
cd99758b 474 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 475 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
476 wm831x_dcdc_uv_irq,
29454738
FE		 477 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
478 dcdc->name, dcdc);
e4ee831f
MB		 479 if (ret != 0) {
480 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
481 irq, ret);
d73b4cb7 482 goto err;
e4ee831f
MB		 483 }
484
cd99758b 485 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
b0c4c0c6
MB		 486 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
487 wm831x_dcdc_oc_irq,
29454738
FE		 488 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
489 dcdc->name, dcdc);
e4ee831f
MB		 490 if (ret != 0) {
491 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
492 irq, ret);
d73b4cb7 493 goto err;
e4ee831f
MB		 494 }
495
496 platform_set_drvdata(pdev, dcdc);
497
498 return 0;
499
e4ee831f 500err:
e4ee831f
MB		 501 return ret;
502}
503
e4ee831f
MB		 504static struct platform_driver wm831x_buckv_driver = {
505 .probe = wm831x_buckv_probe,
e4ee831f
MB		 506 .driver = {
507 .name = "wm831x-buckv",
508 },
509};
510
511/*
512 * BUCKP specifics
513 */
514
d580cb5e 515static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB		 516{
517 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
518 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 519 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL		 520 int sel;
521
522 sel = regulator_map_voltage_linear(rdev, uV, uV);
523 if (sel < 0)
524 return sel;
e4ee831f 525
d580cb5e 526 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB		 527}
528
b0d6dd3b 529static const struct regulator_ops wm831x_buckp_ops = {
d580cb5e 530 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 531 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 532 .list_voltage = regulator_list_voltage_linear,
d580cb5e 533 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB		 534 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
535
3d138fcc
MB		 536 .is_enabled = regulator_is_enabled_regmap,
537 .enable = regulator_enable_regmap,
538 .disable = regulator_disable_regmap,
e4ee831f
MB		 539 .get_status = wm831x_dcdc_get_status,
540 .get_mode = wm831x_dcdc_get_mode,
541 .set_mode = wm831x_dcdc_set_mode,
542 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
543};
544
a5023574 545static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB		 546{
547 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 548 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 549 struct regulator_config config = { };
137a6354 550 int id;
e4ee831f
MB		 551 struct wm831x_dcdc *dcdc;
552 struct resource *res;
553 int ret, irq;
554
137a6354
MB		 555 if (pdata && pdata->wm831x_num)
556 id = (pdata->wm831x_num * 10) + 1;
557 else
558 id = 0;
559 id = pdev->id - id;
560
e4ee831f
MB		 561 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
562
fded2f4f
MB		 563 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
564 GFP_KERNEL);
5730aa57 565 if (!dcdc)
e4ee831f 566 return -ENOMEM;
e4ee831f
MB		 567
568 dcdc->wm831x = wm831x;
569
5656098e 570 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 571 if (res == NULL) {
5656098e 572 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 573 ret = -EINVAL;
574 goto err;
575 }
576 dcdc->base = res->start;
577
578 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
579 dcdc->desc.name = dcdc->name;
82caa978
MB		 580
581 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
582 "DC%dVDD", id + 1);
583 dcdc->desc.supply_name = dcdc->supply_name;
584
e4ee831f
MB		 585 dcdc->desc.id = id;
586 dcdc->desc.type = REGULATOR_VOLTAGE;
587 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
588 dcdc->desc.ops = &wm831x_buckp_ops;
589 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 590 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
591 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB		 592 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
593 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL		 594 dcdc->desc.min_uV = 850000;
595 dcdc->desc.uV_step = 25000;
e4ee831f 596
c172708d 597 config.dev = pdev->dev.parent;
b7ca8788
MB		 598 if (pdata)
599 config.init_data = pdata->dcdc[id];
c172708d 600 config.driver_data = dcdc;
817436e7 601 config.regmap = wm831x->regmap;
c172708d 602
d73b4cb7
MB		 603 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
604 &config);
e4ee831f
MB		 605 if (IS_ERR(dcdc->regulator)) {
606 ret = PTR_ERR(dcdc->regulator);
607 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
608 id + 1, ret);
609 goto err;
610 }
611
cd99758b 612 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 613 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
614 wm831x_dcdc_uv_irq,
29454738
FE		 615 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
616 dcdc->name, dcdc);
e4ee831f
MB		 617 if (ret != 0) {
618 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
619 irq, ret);
d73b4cb7 620 goto err;
e4ee831f
MB		 621 }
622
623 platform_set_drvdata(pdev, dcdc);
624
625 return 0;
626
e4ee831f 627err:
e4ee831f
MB		 628 return ret;
629}
630
e4ee831f
MB		 631static struct platform_driver wm831x_buckp_driver = {
632 .probe = wm831x_buckp_probe,
e4ee831f
MB		 633 .driver = {
634 .name = "wm831x-buckp",
635 },
636};
637
1304850d
MB		 638/*
639 * DCDC boost convertors
640 */
641
642static int wm831x_boostp_get_status(struct regulator_dev *rdev)
643{
644 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
645 struct wm831x *wm831x = dcdc->wm831x;
646 int ret;
647
648 /* First, check for errors */
649 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
650 if (ret < 0)
651 return ret;
652
653 if (ret & (1 << rdev_get_id(rdev))) {
654 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
655 rdev_get_id(rdev) + 1);
656 return REGULATOR_STATUS_ERROR;
657 }
658
659 /* Is the regulator on? */
660 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
661 if (ret < 0)
662 return ret;
663 if (ret & (1 << rdev_get_id(rdev)))
664 return REGULATOR_STATUS_ON;
665 else
666 return REGULATOR_STATUS_OFF;
667}
668
b0d6dd3b 669static const struct regulator_ops wm831x_boostp_ops = {
1304850d
MB		 670 .get_status = wm831x_boostp_get_status,
671
3d138fcc
MB		 672 .is_enabled = regulator_is_enabled_regmap,
673 .enable = regulator_enable_regmap,
674 .disable = regulator_disable_regmap,
1304850d
MB		 675};
676
a5023574 677static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB		 678{
679 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 680 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 681 struct regulator_config config = { };
1304850d
MB		 682 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
683 struct wm831x_dcdc *dcdc;
684 struct resource *res;
685 int ret, irq;
686
687 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
688
689 if (pdata == NULL || pdata->dcdc[id] == NULL)
690 return -ENODEV;
691
4c60165d 692 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 693 if (!dcdc)
1304850d 694 return -ENOMEM;
1304850d
MB		 695
696 dcdc->wm831x = wm831x;
697
5656098e 698 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 699 if (res == NULL) {
5656098e 700 dev_err(&pdev->dev, "No REG resource\n");
477b2bac 701 return -EINVAL;
1304850d
MB		 702 }
703 dcdc->base = res->start;
704
705 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
706 dcdc->desc.name = dcdc->name;
707 dcdc->desc.id = id;
708 dcdc->desc.type = REGULATOR_VOLTAGE;
709 dcdc->desc.ops = &wm831x_boostp_ops;
710 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 711 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
712 dcdc->desc.enable_mask = 1 << id;
1304850d 713
c172708d 714 config.dev = pdev->dev.parent;
f0b067d9
MB		 715 if (pdata)
716 config.init_data = pdata->dcdc[id];
c172708d 717 config.driver_data = dcdc;
3d138fcc 718 config.regmap = wm831x->regmap;
c172708d 719
d73b4cb7
MB		 720 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
721 &config);
1304850d
MB		 722 if (IS_ERR(dcdc->regulator)) {
723 ret = PTR_ERR(dcdc->regulator);
724 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
725 id + 1, ret);
477b2bac 726 return ret;
1304850d
MB		 727 }
728
cd99758b 729 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 730 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
731 wm831x_dcdc_uv_irq,
29454738
FE		 732 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
733 dcdc->name,
b0c4c0c6 734 dcdc);
1304850d
MB		 735 if (ret != 0) {
736 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
737 irq, ret);
477b2bac 738 return ret;
1304850d
MB		 739 }
740
741 platform_set_drvdata(pdev, dcdc);
742
743 return 0;
1304850d
MB		 744}
745
1304850d
MB		 746static struct platform_driver wm831x_boostp_driver = {
747 .probe = wm831x_boostp_probe,
1304850d
MB		 748 .driver = {
749 .name = "wm831x-boostp",
750 },
751};
752
8267a9ba
MB		 753/*
754 * External Power Enable
755 *
756 * These aren't actually DCDCs but look like them in hardware so share
757 * code.
758 */
759
760#define WM831X_EPE_BASE 6
761
b0d6dd3b 762static const struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB		 763 .is_enabled = regulator_is_enabled_regmap,
764 .enable = regulator_enable_regmap,
765 .disable = regulator_disable_regmap,
8267a9ba
MB		 766 .get_status = wm831x_dcdc_get_status,
767};
768
a5023574 769static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB		 770{
771 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 772 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 773 struct regulator_config config = { };
8267a9ba
MB		 774 int id = pdev->id % ARRAY_SIZE(pdata->epe);
775 struct wm831x_dcdc *dcdc;
776 int ret;
777
778 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
779
4c60165d 780 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 781 if (!dcdc)
8267a9ba 782 return -ENOMEM;
8267a9ba
MB		 783
784 dcdc->wm831x = wm831x;
785
786 /* For current parts this is correct; probably need to revisit
787 * in future.
788 */
789 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
790 dcdc->desc.name = dcdc->name;
791 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
792 dcdc->desc.ops = &wm831x_epe_ops;
793 dcdc->desc.type = REGULATOR_VOLTAGE;
794 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 795 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
796 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 797
c172708d 798 config.dev = pdev->dev.parent;
b7ca8788
MB		 799 if (pdata)
800 config.init_data = pdata->epe[id];
c172708d 801 config.driver_data = dcdc;
3d138fcc 802 config.regmap = wm831x->regmap;
c172708d 803
d73b4cb7
MB		 804 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
805 &config);
8267a9ba
MB		 806 if (IS_ERR(dcdc->regulator)) {
807 ret = PTR_ERR(dcdc->regulator);
808 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
809 id + 1, ret);
810 goto err;
811 }
812
813 platform_set_drvdata(pdev, dcdc);
814
815 return 0;
816
817err:
8267a9ba
MB		 818 return ret;
819}
820
8267a9ba
MB		 821static struct platform_driver wm831x_epe_driver = {
822 .probe = wm831x_epe_probe,
8267a9ba
MB		 823 .driver = {
824 .name = "wm831x-epe",
825 },
826};
827
55e03e9c
TR		 828static struct platform_driver * const drivers[] = {
829 &wm831x_buckv_driver,
830 &wm831x_buckp_driver,
831 &wm831x_boostp_driver,
832 &wm831x_epe_driver,
833};
834
e4ee831f
MB		 835static int __init wm831x_dcdc_init(void)
836{
55e03e9c 837 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB		 838}
839subsys_initcall(wm831x_dcdc_init);
840
841static void __exit wm831x_dcdc_exit(void)
842{
55e03e9c 843 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB		 844}
845module_exit(wm831x_dcdc_exit);
846
847/* Module information */
848MODULE_AUTHOR("Mark Brown");
849MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
850MODULE_LICENSE("GPL");
851MODULE_ALIAS("platform:wm831x-buckv");
852MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 853MODULE_ALIAS("platform:wm831x-boostp");
24b43150 854MODULE_ALIAS("platform:wm831x-epe");
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