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[mirror_ubuntu-hirsute-kernel.git] / drivers / regulator / wm831x-dcdc.c
CommitLineData
3cad5fc8
AL		 1// SPDX-License-Identifier: GPL-2.0+
2//
3// wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series
4//
5// Copyright 2009 Wolfson Microelectronics PLC.
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
e4ee831f
MB		 8
9#include <linux/module.h>
10#include <linux/moduleparam.h>
11#include <linux/init.h>
12#include <linux/bitops.h>
13#include <linux/err.h>
14#include <linux/i2c.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
e24a04c4
MB		 17#include <linux/regulator/machine.h>
18#include <linux/gpio.h>
5a0e3ad6 19#include <linux/slab.h>
e4ee831f
MB		 20
21#include <linux/mfd/wm831x/core.h>
22#include <linux/mfd/wm831x/regulator.h>
23#include <linux/mfd/wm831x/pdata.h>
24
25#define WM831X_BUCKV_MAX_SELECTOR 0x68
26#define WM831X_BUCKP_MAX_SELECTOR 0x66
27
28#define WM831X_DCDC_MODE_FAST 0
29#define WM831X_DCDC_MODE_NORMAL 1
30#define WM831X_DCDC_MODE_IDLE 2
31#define WM831X_DCDC_MODE_STANDBY 3
32
82caa978 33#define WM831X_DCDC_MAX_NAME 9
e4ee831f
MB		 34
35/* Register offsets in control block */
36#define WM831X_DCDC_CONTROL_1 0
37#define WM831X_DCDC_CONTROL_2 1
38#define WM831X_DCDC_ON_CONFIG 2
39#define WM831X_DCDC_SLEEP_CONTROL 3
e24a04c4 40#define WM831X_DCDC_DVS_CONTROL 4
e4ee831f
MB		 41
42/*
43 * Shared
44 */
45
46struct wm831x_dcdc {
47 char name[WM831X_DCDC_MAX_NAME];
82caa978 48 char supply_name[WM831X_DCDC_MAX_NAME];
e4ee831f
MB		 49 struct regulator_desc desc;
50 int base;
51 struct wm831x *wm831x;
52 struct regulator_dev *regulator;
e24a04c4
MB		 53 int dvs_gpio;
54 int dvs_gpio_state;
55 int on_vsel;
56 int dvs_vsel;
e4ee831f
MB		 57};
58
e4ee831f
MB		 59static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
60
61{
62 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
63 struct wm831x *wm831x = dcdc->wm831x;
64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
65 int val;
66
67 val = wm831x_reg_read(wm831x, reg);
68 if (val < 0)
69 return val;
70
71 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
72
73 switch (val) {
74 case WM831X_DCDC_MODE_FAST:
75 return REGULATOR_MODE_FAST;
76 case WM831X_DCDC_MODE_NORMAL:
77 return REGULATOR_MODE_NORMAL;
78 case WM831X_DCDC_MODE_STANDBY:
79 return REGULATOR_MODE_STANDBY;
80 case WM831X_DCDC_MODE_IDLE:
81 return REGULATOR_MODE_IDLE;
82 default:
83 BUG();
9ee291a4 84 return -EINVAL;
e4ee831f
MB		 85 }
86}
87
88static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
89 unsigned int mode)
90{
91 int val;
92
93 switch (mode) {
94 case REGULATOR_MODE_FAST:
95 val = WM831X_DCDC_MODE_FAST;
96 break;
97 case REGULATOR_MODE_NORMAL:
98 val = WM831X_DCDC_MODE_NORMAL;
99 break;
100 case REGULATOR_MODE_STANDBY:
101 val = WM831X_DCDC_MODE_STANDBY;
102 break;
103 case REGULATOR_MODE_IDLE:
104 val = WM831X_DCDC_MODE_IDLE;
105 break;
106 default:
107 return -EINVAL;
108 }
109
110 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
111 val << WM831X_DC1_ON_MODE_SHIFT);
112}
113
114static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
115{
116 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
117 struct wm831x *wm831x = dcdc->wm831x;
118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
119
120 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
121}
122
123static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
124 unsigned int mode)
125{
126 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
127 struct wm831x *wm831x = dcdc->wm831x;
128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
129
130 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
131}
132
133static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
134{
135 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
136 struct wm831x *wm831x = dcdc->wm831x;
137 int ret;
138
139 /* First, check for errors */
140 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
141 if (ret < 0)
142 return ret;
143
144 if (ret & (1 << rdev_get_id(rdev))) {
145 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
146 rdev_get_id(rdev) + 1);
147 return REGULATOR_STATUS_ERROR;
148 }
149
150 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
151 if (rdev_get_id(rdev) < 2) {
152 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
153 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
154 rdev_get_id(rdev) + 1);
155 return REGULATOR_STATUS_ERROR;
156 }
157
158 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
159 dev_dbg(wm831x->dev, "DCDC%d over current\n",
160 rdev_get_id(rdev) + 1);
161 return REGULATOR_STATUS_ERROR;
162 }
163 }
164
165 /* Is the regulator on? */
166 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
167 if (ret < 0)
168 return ret;
169 if (!(ret & (1 << rdev_get_id(rdev))))
170 return REGULATOR_STATUS_OFF;
171
172 /* TODO: When we handle hardware control modes so we can report the
173 * current mode. */
174 return REGULATOR_STATUS_ON;
175}
176
177static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
178{
179 struct wm831x_dcdc *dcdc = data;
180
119c4f50 181 regulator_lock(dcdc->regulator);
e4ee831f
MB		 182 regulator_notifier_call_chain(dcdc->regulator,
183 REGULATOR_EVENT_UNDER_VOLTAGE,
184 NULL);
119c4f50 185 regulator_unlock(dcdc->regulator);
e4ee831f
MB		 186
187 return IRQ_HANDLED;
188}
189
190static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
191{
192 struct wm831x_dcdc *dcdc = data;
193
119c4f50 194 regulator_lock(dcdc->regulator);
e4ee831f
MB		 195 regulator_notifier_call_chain(dcdc->regulator,
196 REGULATOR_EVENT_OVER_CURRENT,
197 NULL);
119c4f50 198 regulator_unlock(dcdc->regulator);
e4ee831f
MB		 199
200 return IRQ_HANDLED;
201}
202
203/*
204 * BUCKV specifics
205 */
206
ccffcb8e
AL		 207static const struct regulator_linear_range wm831x_buckv_ranges[] = {
208 REGULATOR_LINEAR_RANGE(600000, 0, 0x7, 0),
209 REGULATOR_LINEAR_RANGE(600000, 0x8, 0x68, 12500),
210};
e24a04c4 211
e24a04c4
MB		 212static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
213{
214 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
215
216 if (state == dcdc->dvs_gpio_state)
217 return 0;
218
219 dcdc->dvs_gpio_state = state;
220 gpio_set_value(dcdc->dvs_gpio, state);
221
222 /* Should wait for DVS state change to be asserted if we have
223 * a GPIO for it, for now assume the device is configured
224 * for the fastest possible transition.
225 */
226
227 return 0;
e4ee831f
MB		 228}
229
b5fb77e0
AL		 230static int wm831x_buckv_set_voltage_sel(struct regulator_dev *rdev,
231 unsigned vsel)
e4ee831f
MB		 232{
233 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4
MB		 234 struct wm831x *wm831x = dcdc->wm831x;
235 int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
236 int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
b5fb77e0 237 int ret;
3a93f2a9 238
e24a04c4
MB		 239 /* If this value is already set then do a GPIO update if we can */
240 if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
241 return wm831x_buckv_set_dvs(rdev, 0);
242
243 if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
244 return wm831x_buckv_set_dvs(rdev, 1);
245
246 /* Always set the ON status to the minimum voltage */
247 ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
248 if (ret < 0)
249 return ret;
250 dcdc->on_vsel = vsel;
251
252 if (!dcdc->dvs_gpio)
253 return ret;
254
255 /* Kick the voltage transition now */
256 ret = wm831x_buckv_set_dvs(rdev, 0);
257 if (ret < 0)
258 return ret;
259
88cda60e
MB		 260 /*
261 * If this VSEL is higher than the last one we've seen then
262 * remember it as the DVS VSEL. This is optimised for CPUfreq
263 * usage where we want to get to the highest voltage very
264 * quickly.
265 */
266 if (vsel > dcdc->dvs_vsel) {
267 ret = wm831x_set_bits(wm831x, dvs_reg,
268 WM831X_DC1_DVS_VSEL_MASK,
13ae633c 269 vsel);
88cda60e
MB		 270 if (ret == 0)
271 dcdc->dvs_vsel = vsel;
272 else
273 dev_warn(wm831x->dev,
274 "Failed to set DCDC DVS VSEL: %d\n", ret);
e24a04c4
MB		 275 }
276
e24a04c4 277 return 0;
e4ee831f
MB		 278}
279
280static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
e24a04c4 281 int uV)
e4ee831f
MB		 282{
283 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e24a04c4 284 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 285 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
e24a04c4
MB		 286 int vsel;
287
ccffcb8e 288 vsel = regulator_map_voltage_linear_range(rdev, uV, uV);
e24a04c4
MB		 289 if (vsel < 0)
290 return vsel;
e4ee831f 291
e24a04c4 292 return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
e4ee831f
MB		 293}
294
afb8bb80 295static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
e4ee831f
MB		 296{
297 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
e4ee831f 298
e24a04c4 299 if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
afb8bb80 300 return dcdc->dvs_vsel;
e24a04c4 301 else
afb8bb80 302 return dcdc->on_vsel;
e4ee831f
MB		 303}
304
305/* Current limit options */
c25d4788
AL		 306static const unsigned int wm831x_dcdc_ilim[] = {
307 125000, 250000, 375000, 500000, 625000, 750000, 875000, 1000000
e4ee831f
MB		 308};
309
b0d6dd3b 310static const struct regulator_ops wm831x_buckv_ops = {
b5fb77e0 311 .set_voltage_sel = wm831x_buckv_set_voltage_sel,
afb8bb80 312 .get_voltage_sel = wm831x_buckv_get_voltage_sel,
ccffcb8e
AL		 313 .list_voltage = regulator_list_voltage_linear_range,
314 .map_voltage = regulator_map_voltage_linear_range,
e4ee831f 315 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
20eb641e
AL		 316 .set_current_limit = regulator_set_current_limit_regmap,
317 .get_current_limit = regulator_get_current_limit_regmap,
e4ee831f 318
3d138fcc
MB		 319 .is_enabled = regulator_is_enabled_regmap,
320 .enable = regulator_enable_regmap,
321 .disable = regulator_disable_regmap,
e4ee831f
MB		 322 .get_status = wm831x_dcdc_get_status,
323 .get_mode = wm831x_dcdc_get_mode,
324 .set_mode = wm831x_dcdc_set_mode,
325 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
326};
327
e24a04c4
MB		 328/*
329 * Set up DVS control. We just log errors since we can still run
330 * (with reduced performance) if we fail.
331 */
1aa20d27
MB		 332static void wm831x_buckv_dvs_init(struct platform_device *pdev,
333 struct wm831x_dcdc *dcdc,
334 struct wm831x_buckv_pdata *pdata)
e24a04c4
MB		 335{
336 struct wm831x *wm831x = dcdc->wm831x;
337 int ret;
338 u16 ctrl;
339
340 if (!pdata || !pdata->dvs_gpio)
341 return;
342
e24a04c4
MB		 343 /* gpiolib won't let us read the GPIO status so pick the higher
344 * of the two existing voltages so we take it as platform data.
345 */
346 dcdc->dvs_gpio_state = pdata->dvs_init_state;
347
1aa20d27
MB		 348 ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio,
349 dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0,
350 "DCDC DVS");
e24a04c4 351 if (ret < 0) {
053fa1b7 352 dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
e24a04c4 353 dcdc->name, ret);
e24a04c4
MB		 354 return;
355 }
356
357 dcdc->dvs_gpio = pdata->dvs_gpio;
b47ba9fd
MB		 358
359 switch (pdata->dvs_control_src) {
360 case 1:
361 ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
362 break;
363 case 2:
364 ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
365 break;
366 default:
367 dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
368 pdata->dvs_control_src, dcdc->name);
369 return;
370 }
371
c439b8f4
MB		 372 /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL
373 * to make bootstrapping a bit smoother.
374 */
375 if (!dcdc->dvs_vsel) {
376 ret = wm831x_set_bits(wm831x,
377 dcdc->base + WM831X_DCDC_DVS_CONTROL,
378 WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel);
379 if (ret == 0)
380 dcdc->dvs_vsel = dcdc->on_vsel;
381 else
382 dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n",
383 ret);
384 }
385
b47ba9fd
MB		 386 ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
387 WM831X_DC1_DVS_SRC_MASK, ctrl);
388 if (ret < 0) {
389 dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
390 dcdc->name, ret);
391 }
e24a04c4
MB		 392}
393
a5023574 394static int wm831x_buckv_probe(struct platform_device *pdev)
e4ee831f
MB		 395{
396 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 397 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 398 struct regulator_config config = { };
137a6354 399 int id;
e4ee831f
MB		 400 struct wm831x_dcdc *dcdc;
401 struct resource *res;
402 int ret, irq;
403
137a6354
MB		 404 if (pdata && pdata->wm831x_num)
405 id = (pdata->wm831x_num * 10) + 1;
406 else
407 id = 0;
408 id = pdev->id - id;
409
e4ee831f
MB		 410 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
411
fded2f4f
MB		 412 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
413 GFP_KERNEL);
5730aa57 414 if (!dcdc)
e4ee831f 415 return -ENOMEM;
e4ee831f
MB		 416
417 dcdc->wm831x = wm831x;
418
5656098e 419 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 420 if (res == NULL) {
5656098e 421 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 422 ret = -EINVAL;
423 goto err;
424 }
425 dcdc->base = res->start;
426
427 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
428 dcdc->desc.name = dcdc->name;
82caa978
MB		 429
430 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
431 "DC%dVDD", id + 1);
432 dcdc->desc.supply_name = dcdc->supply_name;
433
e4ee831f
MB		 434 dcdc->desc.id = id;
435 dcdc->desc.type = REGULATOR_VOLTAGE;
436 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
ccffcb8e
AL		 437 dcdc->desc.linear_ranges = wm831x_buckv_ranges;
438 dcdc->desc.n_linear_ranges = ARRAY_SIZE(wm831x_buckv_ranges);
e4ee831f
MB		 439 dcdc->desc.ops = &wm831x_buckv_ops;
440 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 441 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
442 dcdc->desc.enable_mask = 1 << id;
20eb641e
AL		 443 dcdc->desc.csel_reg = dcdc->base + WM831X_DCDC_CONTROL_2;
444 dcdc->desc.csel_mask = WM831X_DC1_HC_THR_MASK;
445 dcdc->desc.n_current_limits = ARRAY_SIZE(wm831x_dcdc_ilim);
446 dcdc->desc.curr_table = wm831x_dcdc_ilim;
e4ee831f 447
e24a04c4
MB		 448 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
449 if (ret < 0) {
450 dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
451 goto err;
452 }
453 dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
454
a1b81dd3 455 ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL);
e24a04c4
MB		 456 if (ret < 0) {
457 dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
458 goto err;
459 }
460 dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
461
f0b067d9 462 if (pdata && pdata->dcdc[id])
1aa20d27
MB		 463 wm831x_buckv_dvs_init(pdev, dcdc,
464 pdata->dcdc[id]->driver_data);
e24a04c4 465
c172708d 466 config.dev = pdev->dev.parent;
b7ca8788
MB		 467 if (pdata)
468 config.init_data = pdata->dcdc[id];
c172708d 469 config.driver_data = dcdc;
3d138fcc 470 config.regmap = wm831x->regmap;
c172708d 471
d73b4cb7
MB		 472 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
473 &config);
e4ee831f
MB		 474 if (IS_ERR(dcdc->regulator)) {
475 ret = PTR_ERR(dcdc->regulator);
476 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
477 id + 1, ret);
478 goto err;
479 }
480
cd99758b 481 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 482 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
483 wm831x_dcdc_uv_irq,
29454738
FE		 484 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
485 dcdc->name, dcdc);
e4ee831f
MB		 486 if (ret != 0) {
487 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
488 irq, ret);
d73b4cb7 489 goto err;
e4ee831f
MB		 490 }
491
cd99758b 492 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "HC"));
b0c4c0c6
MB		 493 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
494 wm831x_dcdc_oc_irq,
29454738
FE		 495 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
496 dcdc->name, dcdc);
e4ee831f
MB		 497 if (ret != 0) {
498 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
499 irq, ret);
d73b4cb7 500 goto err;
e4ee831f
MB		 501 }
502
503 platform_set_drvdata(pdev, dcdc);
504
505 return 0;
506
e4ee831f 507err:
e4ee831f
MB		 508 return ret;
509}
510
e4ee831f
MB		 511static struct platform_driver wm831x_buckv_driver = {
512 .probe = wm831x_buckv_probe,
e4ee831f
MB		 513 .driver = {
514 .name = "wm831x-buckv",
515 },
516};
517
518/*
519 * BUCKP specifics
520 */
521
d580cb5e 522static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, int uV)
e4ee831f
MB		 523{
524 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
525 struct wm831x *wm831x = dcdc->wm831x;
e4ee831f 526 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
d580cb5e
AL		 527 int sel;
528
529 sel = regulator_map_voltage_linear(rdev, uV, uV);
530 if (sel < 0)
531 return sel;
e4ee831f 532
d580cb5e 533 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, sel);
e4ee831f
MB		 534}
535
b0d6dd3b 536static const struct regulator_ops wm831x_buckp_ops = {
d580cb5e 537 .set_voltage_sel = regulator_set_voltage_sel_regmap,
817436e7 538 .get_voltage_sel = regulator_get_voltage_sel_regmap,
c70ad9dc 539 .list_voltage = regulator_list_voltage_linear,
d580cb5e 540 .map_voltage = regulator_map_voltage_linear,
e4ee831f
MB		 541 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
542
3d138fcc
MB		 543 .is_enabled = regulator_is_enabled_regmap,
544 .enable = regulator_enable_regmap,
545 .disable = regulator_disable_regmap,
e4ee831f
MB		 546 .get_status = wm831x_dcdc_get_status,
547 .get_mode = wm831x_dcdc_get_mode,
548 .set_mode = wm831x_dcdc_set_mode,
549 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
550};
551
a5023574 552static int wm831x_buckp_probe(struct platform_device *pdev)
e4ee831f
MB		 553{
554 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 555 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 556 struct regulator_config config = { };
137a6354 557 int id;
e4ee831f
MB		 558 struct wm831x_dcdc *dcdc;
559 struct resource *res;
560 int ret, irq;
561
137a6354
MB		 562 if (pdata && pdata->wm831x_num)
563 id = (pdata->wm831x_num * 10) + 1;
564 else
565 id = 0;
566 id = pdev->id - id;
567
e4ee831f
MB		 568 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
569
fded2f4f
MB		 570 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc),
571 GFP_KERNEL);
5730aa57 572 if (!dcdc)
e4ee831f 573 return -ENOMEM;
e4ee831f
MB		 574
575 dcdc->wm831x = wm831x;
576
5656098e 577 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
e4ee831f 578 if (res == NULL) {
5656098e 579 dev_err(&pdev->dev, "No REG resource\n");
e4ee831f
MB		 580 ret = -EINVAL;
581 goto err;
582 }
583 dcdc->base = res->start;
584
585 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
586 dcdc->desc.name = dcdc->name;
82caa978
MB		 587
588 snprintf(dcdc->supply_name, sizeof(dcdc->supply_name),
589 "DC%dVDD", id + 1);
590 dcdc->desc.supply_name = dcdc->supply_name;
591
e4ee831f
MB		 592 dcdc->desc.id = id;
593 dcdc->desc.type = REGULATOR_VOLTAGE;
594 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
595 dcdc->desc.ops = &wm831x_buckp_ops;
596 dcdc->desc.owner = THIS_MODULE;
817436e7
MB		 597 dcdc->desc.vsel_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
598 dcdc->desc.vsel_mask = WM831X_DC3_ON_VSEL_MASK;
3d138fcc
MB		 599 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
600 dcdc->desc.enable_mask = 1 << id;
c70ad9dc
AL		 601 dcdc->desc.min_uV = 850000;
602 dcdc->desc.uV_step = 25000;
e4ee831f 603
c172708d 604 config.dev = pdev->dev.parent;
b7ca8788
MB		 605 if (pdata)
606 config.init_data = pdata->dcdc[id];
c172708d 607 config.driver_data = dcdc;
817436e7 608 config.regmap = wm831x->regmap;
c172708d 609
d73b4cb7
MB		 610 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
611 &config);
e4ee831f
MB		 612 if (IS_ERR(dcdc->regulator)) {
613 ret = PTR_ERR(dcdc->regulator);
614 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
615 id + 1, ret);
616 goto err;
617 }
618
cd99758b 619 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 620 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
621 wm831x_dcdc_uv_irq,
29454738
FE		 622 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
623 dcdc->name, dcdc);
e4ee831f
MB		 624 if (ret != 0) {
625 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
626 irq, ret);
d73b4cb7 627 goto err;
e4ee831f
MB		 628 }
629
630 platform_set_drvdata(pdev, dcdc);
631
632 return 0;
633
e4ee831f 634err:
e4ee831f
MB		 635 return ret;
636}
637
e4ee831f
MB		 638static struct platform_driver wm831x_buckp_driver = {
639 .probe = wm831x_buckp_probe,
e4ee831f
MB		 640 .driver = {
641 .name = "wm831x-buckp",
642 },
643};
644
1304850d
MB		 645/*
646 * DCDC boost convertors
647 */
648
649static int wm831x_boostp_get_status(struct regulator_dev *rdev)
650{
651 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
652 struct wm831x *wm831x = dcdc->wm831x;
653 int ret;
654
655 /* First, check for errors */
656 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
657 if (ret < 0)
658 return ret;
659
660 if (ret & (1 << rdev_get_id(rdev))) {
661 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
662 rdev_get_id(rdev) + 1);
663 return REGULATOR_STATUS_ERROR;
664 }
665
666 /* Is the regulator on? */
667 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
668 if (ret < 0)
669 return ret;
670 if (ret & (1 << rdev_get_id(rdev)))
671 return REGULATOR_STATUS_ON;
672 else
673 return REGULATOR_STATUS_OFF;
674}
675
b0d6dd3b 676static const struct regulator_ops wm831x_boostp_ops = {
1304850d
MB		 677 .get_status = wm831x_boostp_get_status,
678
3d138fcc
MB		 679 .is_enabled = regulator_is_enabled_regmap,
680 .enable = regulator_enable_regmap,
681 .disable = regulator_disable_regmap,
1304850d
MB		 682};
683
a5023574 684static int wm831x_boostp_probe(struct platform_device *pdev)
1304850d
MB		 685{
686 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 687 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 688 struct regulator_config config = { };
1304850d
MB		 689 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
690 struct wm831x_dcdc *dcdc;
691 struct resource *res;
692 int ret, irq;
693
694 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
695
696 if (pdata == NULL || pdata->dcdc[id] == NULL)
697 return -ENODEV;
698
4c60165d 699 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 700 if (!dcdc)
1304850d 701 return -ENOMEM;
1304850d
MB		 702
703 dcdc->wm831x = wm831x;
704
5656098e 705 res = platform_get_resource(pdev, IORESOURCE_REG, 0);
1304850d 706 if (res == NULL) {
5656098e 707 dev_err(&pdev->dev, "No REG resource\n");
477b2bac 708 return -EINVAL;
1304850d
MB		 709 }
710 dcdc->base = res->start;
711
712 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
713 dcdc->desc.name = dcdc->name;
714 dcdc->desc.id = id;
715 dcdc->desc.type = REGULATOR_VOLTAGE;
716 dcdc->desc.ops = &wm831x_boostp_ops;
717 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 718 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
719 dcdc->desc.enable_mask = 1 << id;
1304850d 720
c172708d 721 config.dev = pdev->dev.parent;
f0b067d9
MB		 722 if (pdata)
723 config.init_data = pdata->dcdc[id];
c172708d 724 config.driver_data = dcdc;
3d138fcc 725 config.regmap = wm831x->regmap;
c172708d 726
d73b4cb7
MB		 727 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
728 &config);
1304850d
MB		 729 if (IS_ERR(dcdc->regulator)) {
730 ret = PTR_ERR(dcdc->regulator);
731 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
732 id + 1, ret);
477b2bac 733 return ret;
1304850d
MB		 734 }
735
cd99758b 736 irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
b0c4c0c6
MB		 737 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
738 wm831x_dcdc_uv_irq,
29454738
FE		 739 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
740 dcdc->name,
b0c4c0c6 741 dcdc);
1304850d
MB		 742 if (ret != 0) {
743 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
744 irq, ret);
477b2bac 745 return ret;
1304850d
MB		 746 }
747
748 platform_set_drvdata(pdev, dcdc);
749
750 return 0;
1304850d
MB		 751}
752
1304850d
MB		 753static struct platform_driver wm831x_boostp_driver = {
754 .probe = wm831x_boostp_probe,
1304850d
MB		 755 .driver = {
756 .name = "wm831x-boostp",
757 },
758};
759
8267a9ba
MB		 760/*
761 * External Power Enable
762 *
763 * These aren't actually DCDCs but look like them in hardware so share
764 * code.
765 */
766
767#define WM831X_EPE_BASE 6
768
b0d6dd3b 769static const struct regulator_ops wm831x_epe_ops = {
3d138fcc
MB		 770 .is_enabled = regulator_is_enabled_regmap,
771 .enable = regulator_enable_regmap,
772 .disable = regulator_disable_regmap,
8267a9ba
MB		 773 .get_status = wm831x_dcdc_get_status,
774};
775
a5023574 776static int wm831x_epe_probe(struct platform_device *pdev)
8267a9ba
MB		 777{
778 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
dff91d0b 779 struct wm831x_pdata *pdata = dev_get_platdata(wm831x->dev);
c172708d 780 struct regulator_config config = { };
8267a9ba
MB		 781 int id = pdev->id % ARRAY_SIZE(pdata->epe);
782 struct wm831x_dcdc *dcdc;
783 int ret;
784
785 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
786
4c60165d 787 dcdc = devm_kzalloc(&pdev->dev, sizeof(struct wm831x_dcdc), GFP_KERNEL);
5730aa57 788 if (!dcdc)
8267a9ba 789 return -ENOMEM;
8267a9ba
MB		 790
791 dcdc->wm831x = wm831x;
792
793 /* For current parts this is correct; probably need to revisit
794 * in future.
795 */
796 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
797 dcdc->desc.name = dcdc->name;
798 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
799 dcdc->desc.ops = &wm831x_epe_ops;
800 dcdc->desc.type = REGULATOR_VOLTAGE;
801 dcdc->desc.owner = THIS_MODULE;
3d138fcc
MB		 802 dcdc->desc.enable_reg = WM831X_DCDC_ENABLE;
803 dcdc->desc.enable_mask = 1 << dcdc->desc.id;
8267a9ba 804
c172708d 805 config.dev = pdev->dev.parent;
b7ca8788
MB		 806 if (pdata)
807 config.init_data = pdata->epe[id];
c172708d 808 config.driver_data = dcdc;
3d138fcc 809 config.regmap = wm831x->regmap;
c172708d 810
d73b4cb7
MB		 811 dcdc->regulator = devm_regulator_register(&pdev->dev, &dcdc->desc,
812 &config);
8267a9ba
MB		 813 if (IS_ERR(dcdc->regulator)) {
814 ret = PTR_ERR(dcdc->regulator);
815 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
816 id + 1, ret);
817 goto err;
818 }
819
820 platform_set_drvdata(pdev, dcdc);
821
822 return 0;
823
824err:
8267a9ba
MB		 825 return ret;
826}
827
8267a9ba
MB		 828static struct platform_driver wm831x_epe_driver = {
829 .probe = wm831x_epe_probe,
8267a9ba
MB		 830 .driver = {
831 .name = "wm831x-epe",
832 },
833};
834
55e03e9c
TR		 835static struct platform_driver * const drivers[] = {
836 &wm831x_buckv_driver,
837 &wm831x_buckp_driver,
838 &wm831x_boostp_driver,
839 &wm831x_epe_driver,
840};
841
e4ee831f
MB		 842static int __init wm831x_dcdc_init(void)
843{
55e03e9c 844 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB		 845}
846subsys_initcall(wm831x_dcdc_init);
847
848static void __exit wm831x_dcdc_exit(void)
849{
55e03e9c 850 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
e4ee831f
MB		 851}
852module_exit(wm831x_dcdc_exit);
853
854/* Module information */
855MODULE_AUTHOR("Mark Brown");
856MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
857MODULE_LICENSE("GPL");
858MODULE_ALIAS("platform:wm831x-buckv");
859MODULE_ALIAS("platform:wm831x-buckp");
43f1f216 860MODULE_ALIAS("platform:wm831x-boostp");
24b43150 861MODULE_ALIAS("platform:wm831x-epe");
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