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e4ee831f MB |
1 | /* |
2 | * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series | |
3 | * | |
4 | * Copyright 2009 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/moduleparam.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/bitops.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/platform_device.h> | |
21 | #include <linux/regulator/driver.h> | |
e24a04c4 MB |
22 | #include <linux/regulator/machine.h> |
23 | #include <linux/gpio.h> | |
5a0e3ad6 | 24 | #include <linux/slab.h> |
e4ee831f MB |
25 | |
26 | #include <linux/mfd/wm831x/core.h> | |
27 | #include <linux/mfd/wm831x/regulator.h> | |
28 | #include <linux/mfd/wm831x/pdata.h> | |
29 | ||
30 | #define WM831X_BUCKV_MAX_SELECTOR 0x68 | |
31 | #define WM831X_BUCKP_MAX_SELECTOR 0x66 | |
32 | ||
33 | #define WM831X_DCDC_MODE_FAST 0 | |
34 | #define WM831X_DCDC_MODE_NORMAL 1 | |
35 | #define WM831X_DCDC_MODE_IDLE 2 | |
36 | #define WM831X_DCDC_MODE_STANDBY 3 | |
37 | ||
38 | #define WM831X_DCDC_MAX_NAME 6 | |
39 | ||
40 | /* Register offsets in control block */ | |
41 | #define WM831X_DCDC_CONTROL_1 0 | |
42 | #define WM831X_DCDC_CONTROL_2 1 | |
43 | #define WM831X_DCDC_ON_CONFIG 2 | |
44 | #define WM831X_DCDC_SLEEP_CONTROL 3 | |
e24a04c4 | 45 | #define WM831X_DCDC_DVS_CONTROL 4 |
e4ee831f MB |
46 | |
47 | /* | |
48 | * Shared | |
49 | */ | |
50 | ||
51 | struct wm831x_dcdc { | |
52 | char name[WM831X_DCDC_MAX_NAME]; | |
53 | struct regulator_desc desc; | |
54 | int base; | |
55 | struct wm831x *wm831x; | |
56 | struct regulator_dev *regulator; | |
e24a04c4 MB |
57 | int dvs_gpio; |
58 | int dvs_gpio_state; | |
59 | int on_vsel; | |
60 | int dvs_vsel; | |
e4ee831f MB |
61 | }; |
62 | ||
63 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) | |
64 | { | |
65 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
66 | struct wm831x *wm831x = dcdc->wm831x; | |
67 | int mask = 1 << rdev_get_id(rdev); | |
68 | int reg; | |
69 | ||
70 | reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE); | |
71 | if (reg < 0) | |
72 | return reg; | |
73 | ||
74 | if (reg & mask) | |
75 | return 1; | |
76 | else | |
77 | return 0; | |
78 | } | |
79 | ||
80 | static int wm831x_dcdc_enable(struct regulator_dev *rdev) | |
81 | { | |
82 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
83 | struct wm831x *wm831x = dcdc->wm831x; | |
84 | int mask = 1 << rdev_get_id(rdev); | |
85 | ||
86 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask); | |
87 | } | |
88 | ||
89 | static int wm831x_dcdc_disable(struct regulator_dev *rdev) | |
90 | { | |
91 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
92 | struct wm831x *wm831x = dcdc->wm831x; | |
93 | int mask = 1 << rdev_get_id(rdev); | |
94 | ||
95 | return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0); | |
96 | } | |
97 | ||
98 | static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev) | |
99 | ||
100 | { | |
101 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
102 | struct wm831x *wm831x = dcdc->wm831x; | |
103 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
104 | int val; | |
105 | ||
106 | val = wm831x_reg_read(wm831x, reg); | |
107 | if (val < 0) | |
108 | return val; | |
109 | ||
110 | val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT; | |
111 | ||
112 | switch (val) { | |
113 | case WM831X_DCDC_MODE_FAST: | |
114 | return REGULATOR_MODE_FAST; | |
115 | case WM831X_DCDC_MODE_NORMAL: | |
116 | return REGULATOR_MODE_NORMAL; | |
117 | case WM831X_DCDC_MODE_STANDBY: | |
118 | return REGULATOR_MODE_STANDBY; | |
119 | case WM831X_DCDC_MODE_IDLE: | |
120 | return REGULATOR_MODE_IDLE; | |
121 | default: | |
122 | BUG(); | |
9ee291a4 | 123 | return -EINVAL; |
e4ee831f MB |
124 | } |
125 | } | |
126 | ||
127 | static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg, | |
128 | unsigned int mode) | |
129 | { | |
130 | int val; | |
131 | ||
132 | switch (mode) { | |
133 | case REGULATOR_MODE_FAST: | |
134 | val = WM831X_DCDC_MODE_FAST; | |
135 | break; | |
136 | case REGULATOR_MODE_NORMAL: | |
137 | val = WM831X_DCDC_MODE_NORMAL; | |
138 | break; | |
139 | case REGULATOR_MODE_STANDBY: | |
140 | val = WM831X_DCDC_MODE_STANDBY; | |
141 | break; | |
142 | case REGULATOR_MODE_IDLE: | |
143 | val = WM831X_DCDC_MODE_IDLE; | |
144 | break; | |
145 | default: | |
146 | return -EINVAL; | |
147 | } | |
148 | ||
149 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK, | |
150 | val << WM831X_DC1_ON_MODE_SHIFT); | |
151 | } | |
152 | ||
153 | static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode) | |
154 | { | |
155 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
156 | struct wm831x *wm831x = dcdc->wm831x; | |
157 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
158 | ||
159 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
160 | } | |
161 | ||
162 | static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev, | |
163 | unsigned int mode) | |
164 | { | |
165 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
166 | struct wm831x *wm831x = dcdc->wm831x; | |
167 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
168 | ||
169 | return wm831x_dcdc_set_mode_int(wm831x, reg, mode); | |
170 | } | |
171 | ||
172 | static int wm831x_dcdc_get_status(struct regulator_dev *rdev) | |
173 | { | |
174 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
175 | struct wm831x *wm831x = dcdc->wm831x; | |
176 | int ret; | |
177 | ||
178 | /* First, check for errors */ | |
179 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
180 | if (ret < 0) | |
181 | return ret; | |
182 | ||
183 | if (ret & (1 << rdev_get_id(rdev))) { | |
184 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
185 | rdev_get_id(rdev) + 1); | |
186 | return REGULATOR_STATUS_ERROR; | |
187 | } | |
188 | ||
189 | /* DCDC1 and DCDC2 can additionally detect high voltage/current */ | |
190 | if (rdev_get_id(rdev) < 2) { | |
191 | if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) { | |
192 | dev_dbg(wm831x->dev, "DCDC%d over voltage\n", | |
193 | rdev_get_id(rdev) + 1); | |
194 | return REGULATOR_STATUS_ERROR; | |
195 | } | |
196 | ||
197 | if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) { | |
198 | dev_dbg(wm831x->dev, "DCDC%d over current\n", | |
199 | rdev_get_id(rdev) + 1); | |
200 | return REGULATOR_STATUS_ERROR; | |
201 | } | |
202 | } | |
203 | ||
204 | /* Is the regulator on? */ | |
205 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
206 | if (ret < 0) | |
207 | return ret; | |
208 | if (!(ret & (1 << rdev_get_id(rdev)))) | |
209 | return REGULATOR_STATUS_OFF; | |
210 | ||
211 | /* TODO: When we handle hardware control modes so we can report the | |
212 | * current mode. */ | |
213 | return REGULATOR_STATUS_ON; | |
214 | } | |
215 | ||
216 | static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data) | |
217 | { | |
218 | struct wm831x_dcdc *dcdc = data; | |
219 | ||
220 | regulator_notifier_call_chain(dcdc->regulator, | |
221 | REGULATOR_EVENT_UNDER_VOLTAGE, | |
222 | NULL); | |
223 | ||
224 | return IRQ_HANDLED; | |
225 | } | |
226 | ||
227 | static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data) | |
228 | { | |
229 | struct wm831x_dcdc *dcdc = data; | |
230 | ||
231 | regulator_notifier_call_chain(dcdc->regulator, | |
232 | REGULATOR_EVENT_OVER_CURRENT, | |
233 | NULL); | |
234 | ||
235 | return IRQ_HANDLED; | |
236 | } | |
237 | ||
238 | /* | |
239 | * BUCKV specifics | |
240 | */ | |
241 | ||
242 | static int wm831x_buckv_list_voltage(struct regulator_dev *rdev, | |
243 | unsigned selector) | |
244 | { | |
245 | if (selector <= 0x8) | |
246 | return 600000; | |
247 | if (selector <= WM831X_BUCKV_MAX_SELECTOR) | |
248 | return 600000 + ((selector - 0x8) * 12500); | |
249 | return -EINVAL; | |
250 | } | |
251 | ||
e24a04c4 MB |
252 | static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev, |
253 | int min_uV, int max_uV) | |
e4ee831f | 254 | { |
e4ee831f MB |
255 | u16 vsel; |
256 | ||
257 | if (min_uV < 600000) | |
258 | vsel = 0; | |
259 | else if (min_uV <= 1800000) | |
260 | vsel = ((min_uV - 600000) / 12500) + 8; | |
261 | else | |
262 | return -EINVAL; | |
263 | ||
264 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) | |
265 | return -EINVAL; | |
266 | ||
e24a04c4 MB |
267 | return vsel; |
268 | } | |
269 | ||
e24a04c4 MB |
270 | static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) |
271 | { | |
272 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
273 | ||
274 | if (state == dcdc->dvs_gpio_state) | |
275 | return 0; | |
276 | ||
277 | dcdc->dvs_gpio_state = state; | |
278 | gpio_set_value(dcdc->dvs_gpio, state); | |
279 | ||
280 | /* Should wait for DVS state change to be asserted if we have | |
281 | * a GPIO for it, for now assume the device is configured | |
282 | * for the fastest possible transition. | |
283 | */ | |
284 | ||
285 | return 0; | |
e4ee831f MB |
286 | } |
287 | ||
288 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 | 289 | int min_uV, int max_uV, unsigned *selector) |
e4ee831f MB |
290 | { |
291 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 MB |
292 | struct wm831x *wm831x = dcdc->wm831x; |
293 | int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
294 | int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL; | |
295 | int vsel, ret; | |
296 | ||
297 | vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV); | |
298 | if (vsel < 0) | |
299 | return vsel; | |
300 | ||
3a93f2a9 MB |
301 | *selector = vsel; |
302 | ||
e24a04c4 MB |
303 | /* If this value is already set then do a GPIO update if we can */ |
304 | if (dcdc->dvs_gpio && dcdc->on_vsel == vsel) | |
305 | return wm831x_buckv_set_dvs(rdev, 0); | |
306 | ||
307 | if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel) | |
308 | return wm831x_buckv_set_dvs(rdev, 1); | |
309 | ||
310 | /* Always set the ON status to the minimum voltage */ | |
311 | ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel); | |
312 | if (ret < 0) | |
313 | return ret; | |
314 | dcdc->on_vsel = vsel; | |
315 | ||
316 | if (!dcdc->dvs_gpio) | |
317 | return ret; | |
318 | ||
319 | /* Kick the voltage transition now */ | |
320 | ret = wm831x_buckv_set_dvs(rdev, 0); | |
321 | if (ret < 0) | |
322 | return ret; | |
323 | ||
88cda60e MB |
324 | /* |
325 | * If this VSEL is higher than the last one we've seen then | |
326 | * remember it as the DVS VSEL. This is optimised for CPUfreq | |
327 | * usage where we want to get to the highest voltage very | |
328 | * quickly. | |
329 | */ | |
330 | if (vsel > dcdc->dvs_vsel) { | |
331 | ret = wm831x_set_bits(wm831x, dvs_reg, | |
332 | WM831X_DC1_DVS_VSEL_MASK, | |
333 | dcdc->dvs_vsel); | |
334 | if (ret == 0) | |
335 | dcdc->dvs_vsel = vsel; | |
336 | else | |
337 | dev_warn(wm831x->dev, | |
338 | "Failed to set DCDC DVS VSEL: %d\n", ret); | |
e24a04c4 MB |
339 | } |
340 | ||
e24a04c4 | 341 | return 0; |
e4ee831f MB |
342 | } |
343 | ||
344 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, | |
e24a04c4 | 345 | int uV) |
e4ee831f MB |
346 | { |
347 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e24a04c4 | 348 | struct wm831x *wm831x = dcdc->wm831x; |
e4ee831f | 349 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; |
e24a04c4 MB |
350 | int vsel; |
351 | ||
352 | vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV); | |
353 | if (vsel < 0) | |
354 | return vsel; | |
e4ee831f | 355 | |
e24a04c4 | 356 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel); |
e4ee831f MB |
357 | } |
358 | ||
afb8bb80 | 359 | static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
360 | { |
361 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
e4ee831f | 362 | |
e24a04c4 | 363 | if (dcdc->dvs_gpio && dcdc->dvs_gpio_state) |
afb8bb80 | 364 | return dcdc->dvs_vsel; |
e24a04c4 | 365 | else |
afb8bb80 | 366 | return dcdc->on_vsel; |
e4ee831f MB |
367 | } |
368 | ||
369 | /* Current limit options */ | |
370 | static u16 wm831x_dcdc_ilim[] = { | |
371 | 125, 250, 375, 500, 625, 750, 875, 1000 | |
372 | }; | |
373 | ||
374 | static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev, | |
375 | int min_uA, int max_uA) | |
376 | { | |
377 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
378 | struct wm831x *wm831x = dcdc->wm831x; | |
379 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
380 | int i; | |
381 | ||
382 | for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) { | |
383 | if (max_uA <= wm831x_dcdc_ilim[i]) | |
384 | break; | |
385 | } | |
386 | if (i == ARRAY_SIZE(wm831x_dcdc_ilim)) | |
387 | return -EINVAL; | |
388 | ||
389 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i); | |
390 | } | |
391 | ||
392 | static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev) | |
393 | { | |
394 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
395 | struct wm831x *wm831x = dcdc->wm831x; | |
396 | u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2; | |
397 | int val; | |
398 | ||
399 | val = wm831x_reg_read(wm831x, reg); | |
400 | if (val < 0) | |
401 | return val; | |
402 | ||
403 | return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK]; | |
404 | } | |
405 | ||
406 | static struct regulator_ops wm831x_buckv_ops = { | |
407 | .set_voltage = wm831x_buckv_set_voltage, | |
afb8bb80 | 408 | .get_voltage_sel = wm831x_buckv_get_voltage_sel, |
e4ee831f MB |
409 | .list_voltage = wm831x_buckv_list_voltage, |
410 | .set_suspend_voltage = wm831x_buckv_set_suspend_voltage, | |
411 | .set_current_limit = wm831x_buckv_set_current_limit, | |
412 | .get_current_limit = wm831x_buckv_get_current_limit, | |
413 | ||
414 | .is_enabled = wm831x_dcdc_is_enabled, | |
415 | .enable = wm831x_dcdc_enable, | |
416 | .disable = wm831x_dcdc_disable, | |
417 | .get_status = wm831x_dcdc_get_status, | |
418 | .get_mode = wm831x_dcdc_get_mode, | |
419 | .set_mode = wm831x_dcdc_set_mode, | |
420 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
421 | }; | |
422 | ||
e24a04c4 MB |
423 | /* |
424 | * Set up DVS control. We just log errors since we can still run | |
425 | * (with reduced performance) if we fail. | |
426 | */ | |
427 | static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc, | |
428 | struct wm831x_buckv_pdata *pdata) | |
429 | { | |
430 | struct wm831x *wm831x = dcdc->wm831x; | |
431 | int ret; | |
432 | u16 ctrl; | |
433 | ||
434 | if (!pdata || !pdata->dvs_gpio) | |
435 | return; | |
436 | ||
e24a04c4 MB |
437 | ret = gpio_request(pdata->dvs_gpio, "DCDC DVS"); |
438 | if (ret < 0) { | |
439 | dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n", | |
440 | dcdc->name, ret); | |
441 | return; | |
442 | } | |
443 | ||
444 | /* gpiolib won't let us read the GPIO status so pick the higher | |
445 | * of the two existing voltages so we take it as platform data. | |
446 | */ | |
447 | dcdc->dvs_gpio_state = pdata->dvs_init_state; | |
448 | ||
449 | ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state); | |
450 | if (ret < 0) { | |
451 | dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n", | |
452 | dcdc->name, ret); | |
453 | gpio_free(pdata->dvs_gpio); | |
454 | return; | |
455 | } | |
456 | ||
457 | dcdc->dvs_gpio = pdata->dvs_gpio; | |
b47ba9fd MB |
458 | |
459 | switch (pdata->dvs_control_src) { | |
460 | case 1: | |
461 | ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT; | |
462 | break; | |
463 | case 2: | |
464 | ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT; | |
465 | break; | |
466 | default: | |
467 | dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n", | |
468 | pdata->dvs_control_src, dcdc->name); | |
469 | return; | |
470 | } | |
471 | ||
c439b8f4 MB |
472 | /* If DVS_VSEL is set to the minimum value then raise it to ON_VSEL |
473 | * to make bootstrapping a bit smoother. | |
474 | */ | |
475 | if (!dcdc->dvs_vsel) { | |
476 | ret = wm831x_set_bits(wm831x, | |
477 | dcdc->base + WM831X_DCDC_DVS_CONTROL, | |
478 | WM831X_DC1_DVS_VSEL_MASK, dcdc->on_vsel); | |
479 | if (ret == 0) | |
480 | dcdc->dvs_vsel = dcdc->on_vsel; | |
481 | else | |
482 | dev_warn(wm831x->dev, "Failed to set DVS_VSEL: %d\n", | |
483 | ret); | |
484 | } | |
485 | ||
b47ba9fd MB |
486 | ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL, |
487 | WM831X_DC1_DVS_SRC_MASK, ctrl); | |
488 | if (ret < 0) { | |
489 | dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n", | |
490 | dcdc->name, ret); | |
491 | } | |
e24a04c4 MB |
492 | } |
493 | ||
e4ee831f MB |
494 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) |
495 | { | |
496 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
497 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
137a6354 | 498 | int id; |
e4ee831f MB |
499 | struct wm831x_dcdc *dcdc; |
500 | struct resource *res; | |
501 | int ret, irq; | |
502 | ||
137a6354 MB |
503 | if (pdata && pdata->wm831x_num) |
504 | id = (pdata->wm831x_num * 10) + 1; | |
505 | else | |
506 | id = 0; | |
507 | id = pdev->id - id; | |
508 | ||
e4ee831f MB |
509 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
510 | ||
511 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
512 | return -ENODEV; | |
513 | ||
514 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
515 | if (dcdc == NULL) { | |
516 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
517 | return -ENOMEM; | |
518 | } | |
519 | ||
520 | dcdc->wm831x = wm831x; | |
521 | ||
522 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
523 | if (res == NULL) { | |
524 | dev_err(&pdev->dev, "No I/O resource\n"); | |
525 | ret = -EINVAL; | |
526 | goto err; | |
527 | } | |
528 | dcdc->base = res->start; | |
529 | ||
530 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
531 | dcdc->desc.name = dcdc->name; | |
532 | dcdc->desc.id = id; | |
533 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
534 | dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1; | |
535 | dcdc->desc.ops = &wm831x_buckv_ops; | |
536 | dcdc->desc.owner = THIS_MODULE; | |
537 | ||
e24a04c4 MB |
538 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); |
539 | if (ret < 0) { | |
540 | dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret); | |
541 | goto err; | |
542 | } | |
543 | dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK; | |
544 | ||
a1b81dd3 | 545 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL); |
e24a04c4 MB |
546 | if (ret < 0) { |
547 | dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret); | |
548 | goto err; | |
549 | } | |
550 | dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK; | |
551 | ||
552 | if (pdata->dcdc[id]) | |
553 | wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data); | |
554 | ||
e4ee831f | 555 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, |
2c043bcb | 556 | pdata->dcdc[id], dcdc, NULL); |
e4ee831f MB |
557 | if (IS_ERR(dcdc->regulator)) { |
558 | ret = PTR_ERR(dcdc->regulator); | |
559 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
560 | id + 1, ret); | |
561 | goto err; | |
562 | } | |
563 | ||
564 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
565 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
566 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
567 | if (ret != 0) { |
568 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
569 | irq, ret); | |
570 | goto err_regulator; | |
571 | } | |
572 | ||
573 | irq = platform_get_irq_byname(pdev, "HC"); | |
dfda9c27 MB |
574 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_oc_irq, |
575 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
576 | if (ret != 0) { |
577 | dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n", | |
578 | irq, ret); | |
579 | goto err_uv; | |
580 | } | |
581 | ||
582 | platform_set_drvdata(pdev, dcdc); | |
583 | ||
584 | return 0; | |
585 | ||
586 | err_uv: | |
dfda9c27 | 587 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f MB |
588 | err_regulator: |
589 | regulator_unregister(dcdc->regulator); | |
590 | err: | |
e24a04c4 MB |
591 | if (dcdc->dvs_gpio) |
592 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
593 | kfree(dcdc); |
594 | return ret; | |
595 | } | |
596 | ||
597 | static __devexit int wm831x_buckv_remove(struct platform_device *pdev) | |
598 | { | |
599 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 600 | |
eb66d565 DT |
601 | platform_set_drvdata(pdev, NULL); |
602 | ||
69952369 MB |
603 | free_irq(platform_get_irq_byname(pdev, "HC"), dcdc); |
604 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); | |
e4ee831f | 605 | regulator_unregister(dcdc->regulator); |
e24a04c4 MB |
606 | if (dcdc->dvs_gpio) |
607 | gpio_free(dcdc->dvs_gpio); | |
e4ee831f MB |
608 | kfree(dcdc); |
609 | ||
610 | return 0; | |
611 | } | |
612 | ||
613 | static struct platform_driver wm831x_buckv_driver = { | |
614 | .probe = wm831x_buckv_probe, | |
615 | .remove = __devexit_p(wm831x_buckv_remove), | |
616 | .driver = { | |
617 | .name = "wm831x-buckv", | |
eb66d565 | 618 | .owner = THIS_MODULE, |
e4ee831f MB |
619 | }, |
620 | }; | |
621 | ||
622 | /* | |
623 | * BUCKP specifics | |
624 | */ | |
625 | ||
626 | static int wm831x_buckp_list_voltage(struct regulator_dev *rdev, | |
627 | unsigned selector) | |
628 | { | |
629 | if (selector <= WM831X_BUCKP_MAX_SELECTOR) | |
630 | return 850000 + (selector * 25000); | |
631 | else | |
632 | return -EINVAL; | |
633 | } | |
634 | ||
635 | static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg, | |
3a93f2a9 | 636 | int min_uV, int max_uV, int *selector) |
e4ee831f MB |
637 | { |
638 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
639 | struct wm831x *wm831x = dcdc->wm831x; | |
640 | u16 vsel; | |
641 | ||
642 | if (min_uV <= 34000000) | |
643 | vsel = (min_uV - 850000) / 25000; | |
644 | else | |
645 | return -EINVAL; | |
646 | ||
647 | if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV) | |
648 | return -EINVAL; | |
649 | ||
3a93f2a9 MB |
650 | *selector = vsel; |
651 | ||
e4ee831f MB |
652 | return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel); |
653 | } | |
654 | ||
655 | static int wm831x_buckp_set_voltage(struct regulator_dev *rdev, | |
3a93f2a9 MB |
656 | int min_uV, int max_uV, |
657 | unsigned *selector) | |
e4ee831f MB |
658 | { |
659 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
660 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
661 | ||
3a93f2a9 MB |
662 | return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV, |
663 | selector); | |
e4ee831f MB |
664 | } |
665 | ||
666 | static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev, | |
667 | int uV) | |
668 | { | |
669 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
670 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | |
3a93f2a9 | 671 | unsigned selector; |
e4ee831f | 672 | |
3a93f2a9 | 673 | return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector); |
e4ee831f MB |
674 | } |
675 | ||
afb8bb80 | 676 | static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev) |
e4ee831f MB |
677 | { |
678 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
679 | struct wm831x *wm831x = dcdc->wm831x; | |
680 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | |
681 | int val; | |
682 | ||
683 | val = wm831x_reg_read(wm831x, reg); | |
684 | if (val < 0) | |
685 | return val; | |
686 | ||
afb8bb80 | 687 | return val & WM831X_DC3_ON_VSEL_MASK; |
e4ee831f MB |
688 | } |
689 | ||
690 | static struct regulator_ops wm831x_buckp_ops = { | |
691 | .set_voltage = wm831x_buckp_set_voltage, | |
afb8bb80 | 692 | .get_voltage_sel = wm831x_buckp_get_voltage_sel, |
e4ee831f MB |
693 | .list_voltage = wm831x_buckp_list_voltage, |
694 | .set_suspend_voltage = wm831x_buckp_set_suspend_voltage, | |
695 | ||
696 | .is_enabled = wm831x_dcdc_is_enabled, | |
697 | .enable = wm831x_dcdc_enable, | |
698 | .disable = wm831x_dcdc_disable, | |
699 | .get_status = wm831x_dcdc_get_status, | |
700 | .get_mode = wm831x_dcdc_get_mode, | |
701 | .set_mode = wm831x_dcdc_set_mode, | |
702 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | |
703 | }; | |
704 | ||
705 | static __devinit int wm831x_buckp_probe(struct platform_device *pdev) | |
706 | { | |
707 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
708 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
137a6354 | 709 | int id; |
e4ee831f MB |
710 | struct wm831x_dcdc *dcdc; |
711 | struct resource *res; | |
712 | int ret, irq; | |
713 | ||
137a6354 MB |
714 | if (pdata && pdata->wm831x_num) |
715 | id = (pdata->wm831x_num * 10) + 1; | |
716 | else | |
717 | id = 0; | |
718 | id = pdev->id - id; | |
719 | ||
e4ee831f MB |
720 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); |
721 | ||
722 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
723 | return -ENODEV; | |
724 | ||
725 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
726 | if (dcdc == NULL) { | |
727 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
728 | return -ENOMEM; | |
729 | } | |
730 | ||
731 | dcdc->wm831x = wm831x; | |
732 | ||
733 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
734 | if (res == NULL) { | |
735 | dev_err(&pdev->dev, "No I/O resource\n"); | |
736 | ret = -EINVAL; | |
737 | goto err; | |
738 | } | |
739 | dcdc->base = res->start; | |
740 | ||
741 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
742 | dcdc->desc.name = dcdc->name; | |
743 | dcdc->desc.id = id; | |
744 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
745 | dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1; | |
746 | dcdc->desc.ops = &wm831x_buckp_ops; | |
747 | dcdc->desc.owner = THIS_MODULE; | |
748 | ||
749 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
2c043bcb | 750 | pdata->dcdc[id], dcdc, NULL); |
e4ee831f MB |
751 | if (IS_ERR(dcdc->regulator)) { |
752 | ret = PTR_ERR(dcdc->regulator); | |
753 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
754 | id + 1, ret); | |
755 | goto err; | |
756 | } | |
757 | ||
758 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
759 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
760 | IRQF_TRIGGER_RISING, dcdc->name, dcdc); | |
e4ee831f MB |
761 | if (ret != 0) { |
762 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
763 | irq, ret); | |
764 | goto err_regulator; | |
765 | } | |
766 | ||
767 | platform_set_drvdata(pdev, dcdc); | |
768 | ||
769 | return 0; | |
770 | ||
771 | err_regulator: | |
772 | regulator_unregister(dcdc->regulator); | |
773 | err: | |
774 | kfree(dcdc); | |
775 | return ret; | |
776 | } | |
777 | ||
778 | static __devexit int wm831x_buckp_remove(struct platform_device *pdev) | |
779 | { | |
780 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
e4ee831f | 781 | |
eb66d565 DT |
782 | platform_set_drvdata(pdev, NULL); |
783 | ||
69952369 | 784 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
e4ee831f MB |
785 | regulator_unregister(dcdc->regulator); |
786 | kfree(dcdc); | |
787 | ||
788 | return 0; | |
789 | } | |
790 | ||
791 | static struct platform_driver wm831x_buckp_driver = { | |
792 | .probe = wm831x_buckp_probe, | |
793 | .remove = __devexit_p(wm831x_buckp_remove), | |
794 | .driver = { | |
795 | .name = "wm831x-buckp", | |
eb66d565 | 796 | .owner = THIS_MODULE, |
e4ee831f MB |
797 | }, |
798 | }; | |
799 | ||
1304850d MB |
800 | /* |
801 | * DCDC boost convertors | |
802 | */ | |
803 | ||
804 | static int wm831x_boostp_get_status(struct regulator_dev *rdev) | |
805 | { | |
806 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | |
807 | struct wm831x *wm831x = dcdc->wm831x; | |
808 | int ret; | |
809 | ||
810 | /* First, check for errors */ | |
811 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS); | |
812 | if (ret < 0) | |
813 | return ret; | |
814 | ||
815 | if (ret & (1 << rdev_get_id(rdev))) { | |
816 | dev_dbg(wm831x->dev, "DCDC%d under voltage\n", | |
817 | rdev_get_id(rdev) + 1); | |
818 | return REGULATOR_STATUS_ERROR; | |
819 | } | |
820 | ||
821 | /* Is the regulator on? */ | |
822 | ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS); | |
823 | if (ret < 0) | |
824 | return ret; | |
825 | if (ret & (1 << rdev_get_id(rdev))) | |
826 | return REGULATOR_STATUS_ON; | |
827 | else | |
828 | return REGULATOR_STATUS_OFF; | |
829 | } | |
830 | ||
831 | static struct regulator_ops wm831x_boostp_ops = { | |
832 | .get_status = wm831x_boostp_get_status, | |
833 | ||
834 | .is_enabled = wm831x_dcdc_is_enabled, | |
835 | .enable = wm831x_dcdc_enable, | |
836 | .disable = wm831x_dcdc_disable, | |
837 | }; | |
838 | ||
839 | static __devinit int wm831x_boostp_probe(struct platform_device *pdev) | |
840 | { | |
841 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
842 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
843 | int id = pdev->id % ARRAY_SIZE(pdata->dcdc); | |
844 | struct wm831x_dcdc *dcdc; | |
845 | struct resource *res; | |
846 | int ret, irq; | |
847 | ||
848 | dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1); | |
849 | ||
850 | if (pdata == NULL || pdata->dcdc[id] == NULL) | |
851 | return -ENODEV; | |
852 | ||
853 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
854 | if (dcdc == NULL) { | |
855 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
856 | return -ENOMEM; | |
857 | } | |
858 | ||
859 | dcdc->wm831x = wm831x; | |
860 | ||
861 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | |
862 | if (res == NULL) { | |
863 | dev_err(&pdev->dev, "No I/O resource\n"); | |
864 | ret = -EINVAL; | |
865 | goto err; | |
866 | } | |
867 | dcdc->base = res->start; | |
868 | ||
869 | snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1); | |
870 | dcdc->desc.name = dcdc->name; | |
871 | dcdc->desc.id = id; | |
872 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
873 | dcdc->desc.ops = &wm831x_boostp_ops; | |
874 | dcdc->desc.owner = THIS_MODULE; | |
875 | ||
876 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
2c043bcb | 877 | pdata->dcdc[id], dcdc, NULL); |
1304850d MB |
878 | if (IS_ERR(dcdc->regulator)) { |
879 | ret = PTR_ERR(dcdc->regulator); | |
880 | dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n", | |
881 | id + 1, ret); | |
882 | goto err; | |
883 | } | |
884 | ||
885 | irq = platform_get_irq_byname(pdev, "UV"); | |
dfda9c27 MB |
886 | ret = request_threaded_irq(irq, NULL, wm831x_dcdc_uv_irq, |
887 | IRQF_TRIGGER_RISING, dcdc->name, | |
888 | dcdc); | |
1304850d MB |
889 | if (ret != 0) { |
890 | dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n", | |
891 | irq, ret); | |
892 | goto err_regulator; | |
893 | } | |
894 | ||
895 | platform_set_drvdata(pdev, dcdc); | |
896 | ||
897 | return 0; | |
898 | ||
899 | err_regulator: | |
900 | regulator_unregister(dcdc->regulator); | |
901 | err: | |
902 | kfree(dcdc); | |
903 | return ret; | |
904 | } | |
905 | ||
906 | static __devexit int wm831x_boostp_remove(struct platform_device *pdev) | |
907 | { | |
908 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
1304850d | 909 | |
eb66d565 DT |
910 | platform_set_drvdata(pdev, NULL); |
911 | ||
dfda9c27 | 912 | free_irq(platform_get_irq_byname(pdev, "UV"), dcdc); |
1304850d MB |
913 | regulator_unregister(dcdc->regulator); |
914 | kfree(dcdc); | |
915 | ||
916 | return 0; | |
917 | } | |
918 | ||
919 | static struct platform_driver wm831x_boostp_driver = { | |
920 | .probe = wm831x_boostp_probe, | |
921 | .remove = __devexit_p(wm831x_boostp_remove), | |
922 | .driver = { | |
923 | .name = "wm831x-boostp", | |
eb66d565 | 924 | .owner = THIS_MODULE, |
1304850d MB |
925 | }, |
926 | }; | |
927 | ||
8267a9ba MB |
928 | /* |
929 | * External Power Enable | |
930 | * | |
931 | * These aren't actually DCDCs but look like them in hardware so share | |
932 | * code. | |
933 | */ | |
934 | ||
935 | #define WM831X_EPE_BASE 6 | |
936 | ||
937 | static struct regulator_ops wm831x_epe_ops = { | |
938 | .is_enabled = wm831x_dcdc_is_enabled, | |
939 | .enable = wm831x_dcdc_enable, | |
940 | .disable = wm831x_dcdc_disable, | |
941 | .get_status = wm831x_dcdc_get_status, | |
942 | }; | |
943 | ||
944 | static __devinit int wm831x_epe_probe(struct platform_device *pdev) | |
945 | { | |
946 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | |
947 | struct wm831x_pdata *pdata = wm831x->dev->platform_data; | |
948 | int id = pdev->id % ARRAY_SIZE(pdata->epe); | |
949 | struct wm831x_dcdc *dcdc; | |
950 | int ret; | |
951 | ||
952 | dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1); | |
953 | ||
954 | if (pdata == NULL || pdata->epe[id] == NULL) | |
955 | return -ENODEV; | |
956 | ||
957 | dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL); | |
958 | if (dcdc == NULL) { | |
959 | dev_err(&pdev->dev, "Unable to allocate private data\n"); | |
960 | return -ENOMEM; | |
961 | } | |
962 | ||
963 | dcdc->wm831x = wm831x; | |
964 | ||
965 | /* For current parts this is correct; probably need to revisit | |
966 | * in future. | |
967 | */ | |
968 | snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1); | |
969 | dcdc->desc.name = dcdc->name; | |
970 | dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */ | |
971 | dcdc->desc.ops = &wm831x_epe_ops; | |
972 | dcdc->desc.type = REGULATOR_VOLTAGE; | |
973 | dcdc->desc.owner = THIS_MODULE; | |
974 | ||
975 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | |
2c043bcb | 976 | pdata->epe[id], dcdc, NULL); |
8267a9ba MB |
977 | if (IS_ERR(dcdc->regulator)) { |
978 | ret = PTR_ERR(dcdc->regulator); | |
979 | dev_err(wm831x->dev, "Failed to register EPE%d: %d\n", | |
980 | id + 1, ret); | |
981 | goto err; | |
982 | } | |
983 | ||
984 | platform_set_drvdata(pdev, dcdc); | |
985 | ||
986 | return 0; | |
987 | ||
988 | err: | |
989 | kfree(dcdc); | |
990 | return ret; | |
991 | } | |
992 | ||
993 | static __devexit int wm831x_epe_remove(struct platform_device *pdev) | |
994 | { | |
995 | struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev); | |
996 | ||
eb66d565 DT |
997 | platform_set_drvdata(pdev, NULL); |
998 | ||
8267a9ba MB |
999 | regulator_unregister(dcdc->regulator); |
1000 | kfree(dcdc); | |
1001 | ||
1002 | return 0; | |
1003 | } | |
1004 | ||
1005 | static struct platform_driver wm831x_epe_driver = { | |
1006 | .probe = wm831x_epe_probe, | |
1007 | .remove = __devexit_p(wm831x_epe_remove), | |
1008 | .driver = { | |
1009 | .name = "wm831x-epe", | |
eb66d565 | 1010 | .owner = THIS_MODULE, |
8267a9ba MB |
1011 | }, |
1012 | }; | |
1013 | ||
e4ee831f MB |
1014 | static int __init wm831x_dcdc_init(void) |
1015 | { | |
1016 | int ret; | |
1017 | ret = platform_driver_register(&wm831x_buckv_driver); | |
1018 | if (ret != 0) | |
1019 | pr_err("Failed to register WM831x BUCKV driver: %d\n", ret); | |
1020 | ||
1021 | ret = platform_driver_register(&wm831x_buckp_driver); | |
1022 | if (ret != 0) | |
1023 | pr_err("Failed to register WM831x BUCKP driver: %d\n", ret); | |
1024 | ||
1304850d MB |
1025 | ret = platform_driver_register(&wm831x_boostp_driver); |
1026 | if (ret != 0) | |
1027 | pr_err("Failed to register WM831x BOOST driver: %d\n", ret); | |
1028 | ||
8267a9ba MB |
1029 | ret = platform_driver_register(&wm831x_epe_driver); |
1030 | if (ret != 0) | |
1031 | pr_err("Failed to register WM831x EPE driver: %d\n", ret); | |
1032 | ||
e4ee831f MB |
1033 | return 0; |
1034 | } | |
1035 | subsys_initcall(wm831x_dcdc_init); | |
1036 | ||
1037 | static void __exit wm831x_dcdc_exit(void) | |
1038 | { | |
8267a9ba | 1039 | platform_driver_unregister(&wm831x_epe_driver); |
1304850d | 1040 | platform_driver_unregister(&wm831x_boostp_driver); |
e4ee831f MB |
1041 | platform_driver_unregister(&wm831x_buckp_driver); |
1042 | platform_driver_unregister(&wm831x_buckv_driver); | |
1043 | } | |
1044 | module_exit(wm831x_dcdc_exit); | |
1045 | ||
1046 | /* Module information */ | |
1047 | MODULE_AUTHOR("Mark Brown"); | |
1048 | MODULE_DESCRIPTION("WM831x DC-DC convertor driver"); | |
1049 | MODULE_LICENSE("GPL"); | |
1050 | MODULE_ALIAS("platform:wm831x-buckv"); | |
1051 | MODULE_ALIAS("platform:wm831x-buckp"); | |
24b43150 | 1052 | MODULE_ALIAS("platform:wm831x-epe"); |