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Merge tag 'amd-drm-fixes-5.11-2021-01-06' of https://gitlab.freedesktop.org/agd5f...
[mirror_ubuntu-jammy-kernel.git] / drivers / remoteproc / stm32_rproc.c
CommitLineData
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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
4 * Authors: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 * Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
6 */
7
8#include <linux/arm-smccc.h>
9#include <linux/dma-mapping.h>
10#include <linux/interrupt.h>
11#include <linux/io.h>
12#include <linux/mailbox_client.h>
13#include <linux/mfd/syscon.h>
14#include <linux/module.h>
15#include <linux/of_address.h>
16#include <linux/of_device.h>
17#include <linux/of_reserved_mem.h>
410119ee 18#include <linux/pm_wakeirq.h>
13140de0
FD
19#include <linux/regmap.h>
20#include <linux/remoteproc.h>
21#include <linux/reset.h>
bf02bd9a 22#include <linux/slab.h>
714cf5e3 23#include <linux/workqueue.h>
13140de0
FD
24
25#include "remoteproc_internal.h"
26
27#define HOLD_BOOT 0
28#define RELEASE_BOOT 1
29
30#define MBOX_NB_VQ 2
31#define MBOX_NB_MBX 3
32
33#define STM32_SMC_RCC 0x82001000
34#define STM32_SMC_REG_WRITE 0x1
35
36#define STM32_MBX_VQ0 "vq0"
714cf5e3 37#define STM32_MBX_VQ0_ID 0
13140de0 38#define STM32_MBX_VQ1 "vq1"
714cf5e3 39#define STM32_MBX_VQ1_ID 1
13140de0
FD
40#define STM32_MBX_SHUTDOWN "shutdown"
41
11a7aaa7
MP
42#define RSC_TBL_SIZE 1024
43
376ffdc0
MP
44#define M4_STATE_OFF 0
45#define M4_STATE_INI 1
46#define M4_STATE_CRUN 2
47#define M4_STATE_CSTOP 3
48#define M4_STATE_STANDBY 4
49#define M4_STATE_CRASH 5
50
13140de0
FD
51struct stm32_syscon {
52 struct regmap *map;
53 u32 reg;
54 u32 mask;
55};
56
57struct stm32_rproc_mem {
58 char name[20];
59 void __iomem *cpu_addr;
60 phys_addr_t bus_addr;
61 u32 dev_addr;
62 size_t size;
63};
64
65struct stm32_rproc_mem_ranges {
66 u32 dev_addr;
67 u32 bus_addr;
68 u32 size;
69};
70
71struct stm32_mbox {
72 const unsigned char name[10];
73 struct mbox_chan *chan;
74 struct mbox_client client;
714cf5e3 75 struct work_struct vq_work;
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76 int vq_id;
77};
78
79struct stm32_rproc {
80 struct reset_control *rst;
81 struct stm32_syscon hold_boot;
82 struct stm32_syscon pdds;
9276536f
MP
83 struct stm32_syscon m4_state;
84 struct stm32_syscon rsctbl;
410119ee 85 int wdg_irq;
13140de0
FD
86 u32 nb_rmems;
87 struct stm32_rproc_mem *rmems;
88 struct stm32_mbox mb[MBOX_NB_MBX];
714cf5e3 89 struct workqueue_struct *workqueue;
13140de0 90 bool secured_soc;
11a7aaa7 91 void __iomem *rsc_va;
13140de0
FD
92};
93
94static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
95{
96 unsigned int i;
97 struct stm32_rproc *ddata = rproc->priv;
98 struct stm32_rproc_mem *p_mem;
99
100 for (i = 0; i < ddata->nb_rmems; i++) {
101 p_mem = &ddata->rmems[i];
102
103 if (pa < p_mem->bus_addr ||
104 pa >= p_mem->bus_addr + p_mem->size)
105 continue;
106 *da = pa - p_mem->bus_addr + p_mem->dev_addr;
107 dev_dbg(rproc->dev.parent, "pa %pa to da %llx\n", &pa, *da);
108 return 0;
109 }
110
111 return -EINVAL;
112}
113
114static int stm32_rproc_mem_alloc(struct rproc *rproc,
115 struct rproc_mem_entry *mem)
116{
117 struct device *dev = rproc->dev.parent;
118 void *va;
119
120 dev_dbg(dev, "map memory: %pa+%x\n", &mem->dma, mem->len);
121 va = ioremap_wc(mem->dma, mem->len);
122 if (IS_ERR_OR_NULL(va)) {
123 dev_err(dev, "Unable to map memory region: %pa+%x\n",
124 &mem->dma, mem->len);
125 return -ENOMEM;
126 }
127
128 /* Update memory entry va */
129 mem->va = va;
130
131 return 0;
132}
133
134static int stm32_rproc_mem_release(struct rproc *rproc,
135 struct rproc_mem_entry *mem)
136{
137 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
138 iounmap(mem->va);
139
140 return 0;
141}
142
7b9f18ca
MP
143static int stm32_rproc_of_memory_translations(struct platform_device *pdev,
144 struct stm32_rproc *ddata)
13140de0 145{
7b9f18ca 146 struct device *parent, *dev = &pdev->dev;
13140de0
FD
147 struct device_node *np;
148 struct stm32_rproc_mem *p_mems;
149 struct stm32_rproc_mem_ranges *mem_range;
150 int cnt, array_size, i, ret = 0;
151
152 parent = dev->parent;
153 np = parent->of_node;
154
155 cnt = of_property_count_elems_of_size(np, "dma-ranges",
156 sizeof(*mem_range));
157 if (cnt <= 0) {
158 dev_err(dev, "%s: dma-ranges property not defined\n", __func__);
159 return -EINVAL;
160 }
161
162 p_mems = devm_kcalloc(dev, cnt, sizeof(*p_mems), GFP_KERNEL);
163 if (!p_mems)
164 return -ENOMEM;
165 mem_range = kcalloc(cnt, sizeof(*mem_range), GFP_KERNEL);
166 if (!mem_range)
167 return -ENOMEM;
168
169 array_size = cnt * sizeof(struct stm32_rproc_mem_ranges) / sizeof(u32);
170
171 ret = of_property_read_u32_array(np, "dma-ranges",
172 (u32 *)mem_range, array_size);
173 if (ret) {
174 dev_err(dev, "error while get dma-ranges property: %x\n", ret);
175 goto free_mem;
176 }
177
178 for (i = 0; i < cnt; i++) {
179 p_mems[i].bus_addr = mem_range[i].bus_addr;
180 p_mems[i].dev_addr = mem_range[i].dev_addr;
181 p_mems[i].size = mem_range[i].size;
182
183 dev_dbg(dev, "memory range[%i]: da %#x, pa %pa, size %#zx:\n",
184 i, p_mems[i].dev_addr, &p_mems[i].bus_addr,
185 p_mems[i].size);
186 }
187
188 ddata->rmems = p_mems;
189 ddata->nb_rmems = cnt;
190
191free_mem:
192 kfree(mem_range);
193 return ret;
194}
195
196static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
197{
198 struct stm32_rproc *ddata = rproc->priv;
199 int i;
200
201 for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
202 if (!strncmp(ddata->mb[i].name, name, strlen(name)))
203 return i;
204 }
205 dev_err(&rproc->dev, "mailbox %s not found\n", name);
206
207 return -EINVAL;
208}
209
210static int stm32_rproc_elf_load_rsc_table(struct rproc *rproc,
211 const struct firmware *fw)
212{
213 if (rproc_elf_load_rsc_table(rproc, fw))
214 dev_warn(&rproc->dev, "no resource table found for this firmware\n");
215
216 return 0;
217}
218
dadbdb9c 219static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
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FD
220{
221 struct device *dev = rproc->dev.parent;
222 struct device_node *np = dev->of_node;
223 struct of_phandle_iterator it;
224 struct rproc_mem_entry *mem;
225 struct reserved_mem *rmem;
226 u64 da;
227 int index = 0;
228
229 /* Register associated reserved memory regions */
230 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
231 while (of_phandle_iterator_next(&it) == 0) {
232 rmem = of_reserved_mem_lookup(it.node);
233 if (!rmem) {
234 dev_err(dev, "unable to acquire memory-region\n");
235 return -EINVAL;
236 }
237
238 if (stm32_rproc_pa_to_da(rproc, rmem->base, &da) < 0) {
239 dev_err(dev, "memory region not valid %pa\n",
240 &rmem->base);
241 return -EINVAL;
242 }
243
244 /* No need to map vdev buffer */
245 if (strcmp(it.node->name, "vdev0buffer")) {
246 /* Register memory region */
247 mem = rproc_mem_entry_init(dev, NULL,
248 (dma_addr_t)rmem->base,
249 rmem->size, da,
250 stm32_rproc_mem_alloc,
251 stm32_rproc_mem_release,
252 it.node->name);
253
254 if (mem)
255 rproc_coredump_add_segment(rproc, da,
256 rmem->size);
257 } else {
258 /* Register reserved memory for vdev buffer alloc */
259 mem = rproc_of_resm_mem_entry_init(dev, index,
260 rmem->size,
261 rmem->base,
262 it.node->name);
263 }
264
265 if (!mem)
266 return -ENOMEM;
267
268 rproc_add_carveout(rproc, mem);
269 index++;
270 }
271
dadbdb9c
MP
272 return 0;
273}
274
275static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
276{
277 int ret = stm32_rproc_parse_memory_regions(rproc);
278
279 if (ret)
280 return ret;
281
13140de0
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282 return stm32_rproc_elf_load_rsc_table(rproc, fw);
283}
284
285static irqreturn_t stm32_rproc_wdg(int irq, void *data)
286{
b8631ab1
MP
287 struct platform_device *pdev = data;
288 struct rproc *rproc = platform_get_drvdata(pdev);
13140de0
FD
289
290 rproc_report_crash(rproc, RPROC_WATCHDOG);
291
292 return IRQ_HANDLED;
293}
294
714cf5e3
AP
295static void stm32_rproc_mb_vq_work(struct work_struct *work)
296{
297 struct stm32_mbox *mb = container_of(work, struct stm32_mbox, vq_work);
298 struct rproc *rproc = dev_get_drvdata(mb->client.dev);
299
300 if (rproc_vq_interrupt(rproc, mb->vq_id) == IRQ_NONE)
301 dev_dbg(&rproc->dev, "no message found in vq%d\n", mb->vq_id);
302}
303
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FD
304static void stm32_rproc_mb_callback(struct mbox_client *cl, void *data)
305{
306 struct rproc *rproc = dev_get_drvdata(cl->dev);
307 struct stm32_mbox *mb = container_of(cl, struct stm32_mbox, client);
714cf5e3 308 struct stm32_rproc *ddata = rproc->priv;
13140de0 309
714cf5e3 310 queue_work(ddata->workqueue, &mb->vq_work);
13140de0
FD
311}
312
313static void stm32_rproc_free_mbox(struct rproc *rproc)
314{
315 struct stm32_rproc *ddata = rproc->priv;
316 unsigned int i;
317
318 for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
319 if (ddata->mb[i].chan)
320 mbox_free_channel(ddata->mb[i].chan);
321 ddata->mb[i].chan = NULL;
322 }
323}
324
325static const struct stm32_mbox stm32_rproc_mbox[MBOX_NB_MBX] = {
326 {
327 .name = STM32_MBX_VQ0,
714cf5e3 328 .vq_id = STM32_MBX_VQ0_ID,
13140de0
FD
329 .client = {
330 .rx_callback = stm32_rproc_mb_callback,
331 .tx_block = false,
332 },
333 },
334 {
335 .name = STM32_MBX_VQ1,
714cf5e3 336 .vq_id = STM32_MBX_VQ1_ID,
13140de0
FD
337 .client = {
338 .rx_callback = stm32_rproc_mb_callback,
339 .tx_block = false,
340 },
341 },
342 {
343 .name = STM32_MBX_SHUTDOWN,
344 .vq_id = -1,
345 .client = {
346 .tx_block = true,
347 .tx_done = NULL,
348 .tx_tout = 500, /* 500 ms time out */
349 },
350 }
351};
352
4a56e423 353static int stm32_rproc_request_mbox(struct rproc *rproc)
13140de0
FD
354{
355 struct stm32_rproc *ddata = rproc->priv;
356 struct device *dev = &rproc->dev;
357 unsigned int i;
4a56e423 358 int j;
13140de0
FD
359 const unsigned char *name;
360 struct mbox_client *cl;
361
362 /* Initialise mailbox structure table */
363 memcpy(ddata->mb, stm32_rproc_mbox, sizeof(stm32_rproc_mbox));
364
365 for (i = 0; i < MBOX_NB_MBX; i++) {
366 name = ddata->mb[i].name;
367
368 cl = &ddata->mb[i].client;
369 cl->dev = dev->parent;
370
371 ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
372 if (IS_ERR(ddata->mb[i].chan)) {
4a56e423
FD
373 if (PTR_ERR(ddata->mb[i].chan) == -EPROBE_DEFER)
374 goto err_probe;
13140de0
FD
375 dev_warn(dev, "cannot get %s mbox\n", name);
376 ddata->mb[i].chan = NULL;
377 }
714cf5e3
AP
378 if (ddata->mb[i].vq_id >= 0) {
379 INIT_WORK(&ddata->mb[i].vq_work,
380 stm32_rproc_mb_vq_work);
381 }
13140de0 382 }
4a56e423
FD
383
384 return 0;
385
386err_probe:
387 for (j = i - 1; j >= 0; j--)
388 if (ddata->mb[j].chan)
389 mbox_free_channel(ddata->mb[j].chan);
390 return -EPROBE_DEFER;
13140de0
FD
391}
392
393static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
394{
395 struct stm32_rproc *ddata = rproc->priv;
396 struct stm32_syscon hold_boot = ddata->hold_boot;
397 struct arm_smccc_res smc_res;
398 int val, err;
399
400 val = hold ? HOLD_BOOT : RELEASE_BOOT;
401
93f1d3e4 402 if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) {
13140de0
FD
403 arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,
404 hold_boot.reg, val, 0, 0, 0, 0, &smc_res);
405 err = smc_res.a0;
406 } else {
407 err = regmap_update_bits(hold_boot.map, hold_boot.reg,
408 hold_boot.mask, val);
409 }
410
411 if (err)
412 dev_err(&rproc->dev, "failed to set hold boot\n");
413
414 return err;
415}
416
417static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
418{
419 struct rproc_debug_trace *trace;
420 struct rproc_dump_segment *segment;
421 bool already_added;
422
423 list_for_each_entry(trace, &rproc->traces, node) {
424 already_added = false;
425
426 list_for_each_entry(segment, &rproc->dump_segments, node) {
427 if (segment->da == trace->trace_mem.da) {
428 already_added = true;
429 break;
430 }
431 }
432
433 if (!already_added)
434 rproc_coredump_add_segment(rproc, trace->trace_mem.da,
435 trace->trace_mem.len);
436 }
437}
438
439static int stm32_rproc_start(struct rproc *rproc)
440{
abbe429d 441 struct stm32_rproc *ddata = rproc->priv;
13140de0
FD
442 int err;
443
444 stm32_rproc_add_coredump_trace(rproc);
445
abbe429d
FD
446 /* clear remote proc Deep Sleep */
447 if (ddata->pdds.map) {
448 err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
449 ddata->pdds.mask, 0);
450 if (err) {
451 dev_err(&rproc->dev, "failed to clear pdds\n");
452 return err;
453 }
454 }
455
13140de0
FD
456 err = stm32_rproc_set_hold_boot(rproc, false);
457 if (err)
458 return err;
459
460 return stm32_rproc_set_hold_boot(rproc, true);
461}
462
bee04d46
MP
463static int stm32_rproc_attach(struct rproc *rproc)
464{
465 stm32_rproc_add_coredump_trace(rproc);
466
467 return stm32_rproc_set_hold_boot(rproc, true);
468}
469
13140de0
FD
470static int stm32_rproc_stop(struct rproc *rproc)
471{
472 struct stm32_rproc *ddata = rproc->priv;
473 int err, dummy_data, idx;
474
475 /* request shutdown of the remote processor */
476 if (rproc->state != RPROC_OFFLINE) {
477 idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
478 if (idx >= 0 && ddata->mb[idx].chan) {
479 /* a dummy data is sent to allow to block on transmit */
480 err = mbox_send_message(ddata->mb[idx].chan,
481 &dummy_data);
482 if (err < 0)
483 dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
484 }
485 }
486
487 err = stm32_rproc_set_hold_boot(rproc, true);
488 if (err)
489 return err;
490
491 err = reset_control_assert(ddata->rst);
492 if (err) {
493 dev_err(&rproc->dev, "failed to assert the reset\n");
494 return err;
495 }
496
497 /* to allow platform Standby power mode, set remote proc Deep Sleep */
498 if (ddata->pdds.map) {
499 err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
500 ddata->pdds.mask, 1);
501 if (err) {
502 dev_err(&rproc->dev, "failed to set pdds\n");
503 return err;
504 }
505 }
506
efd86262
MP
507 /* update coprocessor state to OFF if available */
508 if (ddata->m4_state.map) {
509 err = regmap_update_bits(ddata->m4_state.map,
510 ddata->m4_state.reg,
511 ddata->m4_state.mask,
512 M4_STATE_OFF);
513 if (err) {
514 dev_err(&rproc->dev, "failed to set copro state\n");
515 return err;
516 }
517 }
518
13140de0
FD
519 return 0;
520}
521
522static void stm32_rproc_kick(struct rproc *rproc, int vqid)
523{
524 struct stm32_rproc *ddata = rproc->priv;
525 unsigned int i;
526 int err;
527
528 if (WARN_ON(vqid >= MBOX_NB_VQ))
529 return;
530
531 for (i = 0; i < MBOX_NB_MBX; i++) {
532 if (vqid != ddata->mb[i].vq_id)
533 continue;
534 if (!ddata->mb[i].chan)
535 return;
536 err = mbox_send_message(ddata->mb[i].chan, (void *)(long)vqid);
537 if (err < 0)
538 dev_err(&rproc->dev, "%s: failed (%s, err:%d)\n",
539 __func__, ddata->mb[i].name, err);
540 return;
541 }
542}
543
0eee3d28 544static const struct rproc_ops st_rproc_ops = {
13140de0
FD
545 .start = stm32_rproc_start,
546 .stop = stm32_rproc_stop,
bee04d46 547 .attach = stm32_rproc_attach,
13140de0
FD
548 .kick = stm32_rproc_kick,
549 .load = rproc_elf_load_segments,
550 .parse_fw = stm32_rproc_parse_fw,
551 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
e29ff72b 552 .sanity_check = rproc_elf_sanity_check,
13140de0
FD
553 .get_boot_addr = rproc_elf_get_boot_addr,
554};
555
556static const struct of_device_id stm32_rproc_match[] = {
557 { .compatible = "st,stm32mp1-m4" },
558 {},
559};
560MODULE_DEVICE_TABLE(of, stm32_rproc_match);
561
562static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
563 struct stm32_syscon *syscon)
564{
565 int err = 0;
566
567 syscon->map = syscon_regmap_lookup_by_phandle(np, prop);
568 if (IS_ERR(syscon->map)) {
569 err = PTR_ERR(syscon->map);
570 syscon->map = NULL;
571 goto out;
572 }
573
574 err = of_property_read_u32_index(np, prop, 1, &syscon->reg);
575 if (err)
576 goto out;
577
578 err = of_property_read_u32_index(np, prop, 2, &syscon->mask);
579
580out:
581 return err;
582}
583
8210fc87
MP
584static int stm32_rproc_parse_dt(struct platform_device *pdev,
585 struct stm32_rproc *ddata, bool *auto_boot)
13140de0
FD
586{
587 struct device *dev = &pdev->dev;
588 struct device_node *np = dev->of_node;
13140de0
FD
589 struct stm32_syscon tz;
590 unsigned int tzen;
591 int err, irq;
592
593 irq = platform_get_irq(pdev, 0);
d333de37
FD
594 if (irq == -EPROBE_DEFER)
595 return -EPROBE_DEFER;
596
13140de0
FD
597 if (irq > 0) {
598 err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
b8631ab1 599 dev_name(dev), pdev);
13140de0
FD
600 if (err) {
601 dev_err(dev, "failed to request wdg irq\n");
602 return err;
603 }
604
410119ee
FD
605 ddata->wdg_irq = irq;
606
607 if (of_property_read_bool(np, "wakeup-source")) {
608 device_init_wakeup(dev, true);
609 dev_pm_set_wake_irq(dev, irq);
610 }
611
13140de0
FD
612 dev_info(dev, "wdg irq registered\n");
613 }
614
615 ddata->rst = devm_reset_control_get_by_index(dev, 0);
616 if (IS_ERR(ddata->rst)) {
617 dev_err(dev, "failed to get mcu reset\n");
618 return PTR_ERR(ddata->rst);
619 }
620
621 /*
622 * if platform is secured the hold boot bit must be written by
623 * smc call and read normally.
624 * if not secure the hold boot bit could be read/write normally
625 */
626 err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz);
627 if (err) {
628 dev_err(dev, "failed to get tz syscfg\n");
629 return err;
630 }
631
632 err = regmap_read(tz.map, tz.reg, &tzen);
633 if (err) {
8210fc87 634 dev_err(dev, "failed to read tzen\n");
13140de0
FD
635 return err;
636 }
637 ddata->secured_soc = tzen & tz.mask;
638
639 err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
640 &ddata->hold_boot);
641 if (err) {
642 dev_err(dev, "failed to get hold boot\n");
643 return err;
644 }
645
646 err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
647 if (err)
b1f0fa86 648 dev_info(dev, "failed to get pdds\n");
13140de0 649
8210fc87 650 *auto_boot = of_property_read_bool(np, "st,auto-boot");
13140de0 651
9276536f
MP
652 /*
653 * See if we can check the M4 status, i.e if it was started
654 * from the boot loader or not.
655 */
656 err = stm32_rproc_get_syscon(np, "st,syscfg-m4-state",
657 &ddata->m4_state);
658 if (err) {
659 /* remember this */
660 ddata->m4_state.map = NULL;
661 /* no coprocessor state syscon (optional) */
662 dev_warn(dev, "m4 state not supported\n");
663
664 /* no need to go further */
665 return 0;
666 }
667
668 /* See if we can get the resource table */
669 err = stm32_rproc_get_syscon(np, "st,syscfg-rsc-tbl",
670 &ddata->rsctbl);
671 if (err) {
672 /* no rsc table syscon (optional) */
673 dev_warn(dev, "rsc tbl syscon not supported\n");
674 }
675
95e32f86 676 return 0;
13140de0
FD
677}
678
376ffdc0
MP
679static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata,
680 unsigned int *state)
681{
682 /* See stm32_rproc_parse_dt() */
683 if (!ddata->m4_state.map) {
684 /*
685 * We couldn't get the coprocessor's state, assume
686 * it is not running.
687 */
cb2d8d5b 688 *state = M4_STATE_OFF;
376ffdc0
MP
689 return 0;
690 }
691
692 return regmap_read(ddata->m4_state.map, ddata->m4_state.reg, state);
693}
694
11a7aaa7
MP
695static int stm32_rproc_da_to_pa(struct platform_device *pdev,
696 struct stm32_rproc *ddata,
697 u64 da, phys_addr_t *pa)
698{
699 struct device *dev = &pdev->dev;
700 struct stm32_rproc_mem *p_mem;
701 unsigned int i;
702
703 for (i = 0; i < ddata->nb_rmems; i++) {
704 p_mem = &ddata->rmems[i];
705
706 if (da < p_mem->dev_addr ||
707 da >= p_mem->dev_addr + p_mem->size)
708 continue;
709
710 *pa = da - p_mem->dev_addr + p_mem->bus_addr;
711 dev_dbg(dev, "da %llx to pa %#x\n", da, *pa);
712
713 return 0;
714 }
715
716 dev_err(dev, "can't translate da %llx\n", da);
717
718 return -EINVAL;
719}
720
721static int stm32_rproc_get_loaded_rsc_table(struct platform_device *pdev,
722 struct rproc *rproc,
723 struct stm32_rproc *ddata)
724{
725 struct device *dev = &pdev->dev;
726 phys_addr_t rsc_pa;
727 u32 rsc_da;
728 int err;
729
730 err = regmap_read(ddata->rsctbl.map, ddata->rsctbl.reg, &rsc_da);
731 if (err) {
732 dev_err(dev, "failed to read rsc tbl addr\n");
733 return err;
734 }
735
736 if (!rsc_da)
737 /* no rsc table */
738 return 0;
739
740 err = stm32_rproc_da_to_pa(pdev, ddata, rsc_da, &rsc_pa);
741 if (err)
742 return err;
743
744 ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, RSC_TBL_SIZE);
745 if (IS_ERR_OR_NULL(ddata->rsc_va)) {
746 dev_err(dev, "Unable to map memory region: %pa+%zx\n",
747 &rsc_pa, RSC_TBL_SIZE);
748 ddata->rsc_va = NULL;
749 return -ENOMEM;
750 }
751
752 /*
753 * The resource table is already loaded in device memory, no need
754 * to work with a cached table.
755 */
756 rproc->cached_table = NULL;
757 /* Assuming the resource table fits in 1kB is fair */
758 rproc->table_sz = RSC_TBL_SIZE;
759 rproc->table_ptr = (struct resource_table *)ddata->rsc_va;
760
761 return 0;
762}
763
13140de0
FD
764static int stm32_rproc_probe(struct platform_device *pdev)
765{
766 struct device *dev = &pdev->dev;
767 struct stm32_rproc *ddata;
768 struct device_node *np = dev->of_node;
769 struct rproc *rproc;
376ffdc0 770 unsigned int state;
13140de0
FD
771 int ret;
772
773 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
774 if (ret)
775 return ret;
776
777 rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
778 if (!rproc)
779 return -ENOMEM;
780
8210fc87
MP
781 ddata = rproc->priv;
782
3898fc99 783 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
8210fc87
MP
784
785 ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
786 if (ret)
787 goto free_rproc;
788
95e32f86
MP
789 ret = stm32_rproc_of_memory_translations(pdev, ddata);
790 if (ret)
791 goto free_rproc;
792
376ffdc0
MP
793 ret = stm32_rproc_get_m4_status(ddata, &state);
794 if (ret)
795 goto free_rproc;
796
dadbdb9c 797 if (state == M4_STATE_CRUN) {
376ffdc0
MP
798 rproc->state = RPROC_DETACHED;
799
dadbdb9c
MP
800 ret = stm32_rproc_parse_memory_regions(rproc);
801 if (ret)
802 goto free_resources;
11a7aaa7
MP
803
804 ret = stm32_rproc_get_loaded_rsc_table(pdev, rproc, ddata);
805 if (ret)
806 goto free_resources;
dadbdb9c
MP
807 }
808
13140de0 809 rproc->has_iommu = false;
714cf5e3
AP
810 ddata->workqueue = create_workqueue(dev_name(dev));
811 if (!ddata->workqueue) {
812 dev_err(dev, "cannot create workqueue\n");
813 ret = -ENOMEM;
dadbdb9c 814 goto free_resources;
714cf5e3 815 }
13140de0
FD
816
817 platform_set_drvdata(pdev, rproc);
818
4a56e423
FD
819 ret = stm32_rproc_request_mbox(rproc);
820 if (ret)
8210fc87 821 goto free_wkq;
13140de0
FD
822
823 ret = rproc_add(rproc);
824 if (ret)
825 goto free_mb;
826
827 return 0;
828
829free_mb:
830 stm32_rproc_free_mbox(rproc);
714cf5e3
AP
831free_wkq:
832 destroy_workqueue(ddata->workqueue);
dadbdb9c
MP
833free_resources:
834 rproc_resource_cleanup(rproc);
13140de0 835free_rproc:
410119ee
FD
836 if (device_may_wakeup(dev)) {
837 dev_pm_clear_wake_irq(dev);
838 device_init_wakeup(dev, false);
839 }
13140de0
FD
840 rproc_free(rproc);
841 return ret;
842}
843
844static int stm32_rproc_remove(struct platform_device *pdev)
845{
846 struct rproc *rproc = platform_get_drvdata(pdev);
714cf5e3 847 struct stm32_rproc *ddata = rproc->priv;
410119ee 848 struct device *dev = &pdev->dev;
13140de0
FD
849
850 if (atomic_read(&rproc->power) > 0)
851 rproc_shutdown(rproc);
852
853 rproc_del(rproc);
854 stm32_rproc_free_mbox(rproc);
714cf5e3 855 destroy_workqueue(ddata->workqueue);
410119ee
FD
856
857 if (device_may_wakeup(dev)) {
858 dev_pm_clear_wake_irq(dev);
859 device_init_wakeup(dev, false);
860 }
13140de0
FD
861 rproc_free(rproc);
862
863 return 0;
864}
865
410119ee
FD
866static int __maybe_unused stm32_rproc_suspend(struct device *dev)
867{
868 struct rproc *rproc = dev_get_drvdata(dev);
869 struct stm32_rproc *ddata = rproc->priv;
870
871 if (device_may_wakeup(dev))
872 return enable_irq_wake(ddata->wdg_irq);
873
874 return 0;
875}
876
877static int __maybe_unused stm32_rproc_resume(struct device *dev)
878{
879 struct rproc *rproc = dev_get_drvdata(dev);
880 struct stm32_rproc *ddata = rproc->priv;
881
882 if (device_may_wakeup(dev))
883 return disable_irq_wake(ddata->wdg_irq);
884
885 return 0;
886}
887
888static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
889 stm32_rproc_suspend, stm32_rproc_resume);
890
13140de0
FD
891static struct platform_driver stm32_rproc_driver = {
892 .probe = stm32_rproc_probe,
893 .remove = stm32_rproc_remove,
894 .driver = {
895 .name = "stm32-rproc",
410119ee 896 .pm = &stm32_rproc_pm_ops,
13140de0
FD
897 .of_match_table = of_match_ptr(stm32_rproc_match),
898 },
899};
900module_platform_driver(stm32_rproc_driver);
901
902MODULE_DESCRIPTION("STM32 Remote Processor Control Driver");
903MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
904MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
905MODULE_LICENSE("GPL v2");
906