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Commit | Line | Data |
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61fc4131 PZ |
1 | config ARCH_HAS_RESET_CONTROLLER |
2 | bool | |
3 | ||
4 | menuconfig RESET_CONTROLLER | |
5 | bool "Reset Controller Support" | |
6 | default y if ARCH_HAS_RESET_CONTROLLER | |
7 | help | |
8 | Generic Reset Controller support. | |
9 | ||
10 | This framework is designed to abstract reset handling of devices | |
11 | via GPIOs or SoC-internal reset controller modules. | |
12 | ||
13 | If unsure, say no. | |
e5d76075 | 14 | |
998cd463 MY |
15 | if RESET_CONTROLLER |
16 | ||
62700682 TT |
17 | config RESET_A10SR |
18 | tristate "Altera Arria10 System Resource Reset" | |
19 | depends on MFD_ALTERA_A10SR | |
20 | help | |
21 | This option enables support for the external reset functions for | |
22 | peripheral PHYs on the Altera Arria10 System Resource Chip. | |
23 | ||
e27b4a6e PZ |
24 | config RESET_ATH79 |
25 | bool "AR71xx Reset Driver" if COMPILE_TEST | |
26 | default ATH79 | |
27 | help | |
28 | This enables the ATH79 reset controller driver that supports the | |
29 | AR71xx SoC reset controller. | |
30 | ||
37634923 EP |
31 | config RESET_AXS10X |
32 | bool "AXS10x Reset Driver" if COMPILE_TEST | |
33 | default ARC_PLAT_AXS10X | |
34 | help | |
35 | This enables the reset controller driver for AXS10x. | |
36 | ||
70d467ea PZ |
37 | config RESET_BERLIN |
38 | bool "Berlin Reset Driver" if COMPILE_TEST | |
39 | default ARCH_BERLIN | |
40 | help | |
41 | This enables the reset controller driver for Marvell Berlin SoCs. | |
42 | ||
13541226 VG |
43 | config RESET_HSDK |
44 | bool "Synopsys HSDK Reset Driver" | |
2d48a237 | 45 | depends on HAS_IOMEM |
544e3bf4 | 46 | depends on ARC_SOC_HSDK || COMPILE_TEST |
e0be864f | 47 | help |
13541226 | 48 | This enables the reset controller driver for HSDK board. |
e0be864f | 49 | |
abf97755 AS |
50 | config RESET_IMX7 |
51 | bool "i.MX7 Reset Driver" if COMPILE_TEST | |
52 | default SOC_IMX7D | |
53 | select MFD_SYSCON | |
54 | help | |
55 | This enables the reset controller driver for i.MX7 SoCs. | |
56 | ||
79797b6f MB |
57 | config RESET_LANTIQ |
58 | bool "Lantiq XWAY Reset Driver" if COMPILE_TEST | |
59 | default SOC_TYPE_XWAY | |
60 | help | |
61 | This enables the reset controller driver for Lantiq / Intel XWAY SoCs. | |
62 | ||
cd7f4b81 PZ |
63 | config RESET_LPC18XX |
64 | bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST | |
65 | default ARCH_LPC18XX | |
66 | help | |
67 | This enables the reset controller driver for NXP LPC18xx/43xx SoCs. | |
68 | ||
44336c24 PZ |
69 | config RESET_MESON |
70 | bool "Meson Reset Driver" if COMPILE_TEST | |
71 | default ARCH_MESON | |
72 | help | |
73 | This enables the reset driver for Amlogic Meson SoCs. | |
74 | ||
6e667fac NA |
75 | config RESET_OXNAS |
76 | bool | |
77 | ||
fab3f730 PZ |
78 | config RESET_PISTACHIO |
79 | bool "Pistachio Reset Driver" if COMPILE_TEST | |
80 | default MACH_PISTACHIO | |
81 | help | |
82 | This enables the reset driver for ImgTec Pistachio SoCs. | |
83 | ||
81c22ad0 PZ |
84 | config RESET_SIMPLE |
85 | bool "Simple Reset Controller Driver" if COMPILE_TEST | |
f0e0ada6 | 86 | default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX |
81c22ad0 PZ |
87 | help |
88 | This enables a simple reset controller driver for reset lines that | |
89 | that can be asserted and deasserted by toggling bits in a contiguous, | |
90 | exclusive register space. | |
91 | ||
0af8a137 | 92 | Currently this driver supports Altera SoCFPGAs, the RCC reset |
f0e0ada6 | 93 | controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family. |
7e0e901d | 94 | |
0ae08419 PZ |
95 | config RESET_SUNXI |
96 | bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI | |
97 | default ARCH_SUNXI | |
e13c205a | 98 | select RESET_SIMPLE |
0ae08419 PZ |
99 | help |
100 | This enables the reset driver for Allwinner SoCs. | |
101 | ||
28df169b AD |
102 | config RESET_TI_SCI |
103 | tristate "TI System Control Interface (TI-SCI) reset driver" | |
104 | depends on TI_SCI_PROTOCOL | |
105 | help | |
106 | This enables the reset driver support over TI System Control Interface | |
107 | available on some new TI's SoCs. If you wish to use reset resources | |
108 | managed by the TI System Controller, say Y here. Otherwise, say N. | |
109 | ||
dd9bf863 | 110 | config RESET_TI_SYSCON |
cc7c2bb1 AD |
111 | tristate "TI SYSCON Reset Driver" |
112 | depends on HAS_IOMEM | |
113 | select MFD_SYSCON | |
114 | help | |
115 | This enables the reset driver support for TI devices with | |
116 | memory-mapped reset registers as part of a syscon device node. If | |
117 | you wish to use the reset framework for such memory-mapped devices, | |
118 | say Y here. Otherwise, say N. | |
119 | ||
54e991b5 MY |
120 | config RESET_UNIPHIER |
121 | tristate "Reset controller driver for UniPhier SoCs" | |
122 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
123 | depends on OF && MFD_SYSCON | |
124 | default ARCH_UNIPHIER | |
125 | help | |
126 | Support for reset controllers on UniPhier SoCs. | |
127 | Say Y if you want to control reset signals provided by System Control | |
128 | block, Media I/O block, Peripheral Block. | |
129 | ||
6f51b860 PZ |
130 | config RESET_ZYNQ |
131 | bool "ZYNQ Reset Driver" if COMPILE_TEST | |
132 | default ARCH_ZYNQ | |
133 | help | |
134 | This enables the reset controller driver for Xilinx Zynq SoCs. | |
135 | ||
e5d76075 | 136 | source "drivers/reset/sti/Kconfig" |
f59d23c2 | 137 | source "drivers/reset/hisilicon/Kconfig" |
dc606c52 | 138 | source "drivers/reset/tegra/Kconfig" |
998cd463 MY |
139 | |
140 | endif |