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Commit | Line | Data |
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61fc4131 PZ |
1 | config ARCH_HAS_RESET_CONTROLLER |
2 | bool | |
3 | ||
4 | menuconfig RESET_CONTROLLER | |
5 | bool "Reset Controller Support" | |
6 | default y if ARCH_HAS_RESET_CONTROLLER | |
7 | help | |
8 | Generic Reset Controller support. | |
9 | ||
10 | This framework is designed to abstract reset handling of devices | |
11 | via GPIOs or SoC-internal reset controller modules. | |
12 | ||
13 | If unsure, say no. | |
e5d76075 | 14 | |
998cd463 MY |
15 | if RESET_CONTROLLER |
16 | ||
62700682 TT |
17 | config RESET_A10SR |
18 | tristate "Altera Arria10 System Resource Reset" | |
19 | depends on MFD_ALTERA_A10SR | |
20 | help | |
21 | This option enables support for the external reset functions for | |
22 | peripheral PHYs on the Altera Arria10 System Resource Chip. | |
23 | ||
e27b4a6e PZ |
24 | config RESET_ATH79 |
25 | bool "AR71xx Reset Driver" if COMPILE_TEST | |
26 | default ATH79 | |
27 | help | |
28 | This enables the ATH79 reset controller driver that supports the | |
29 | AR71xx SoC reset controller. | |
30 | ||
70d467ea PZ |
31 | config RESET_BERLIN |
32 | bool "Berlin Reset Driver" if COMPILE_TEST | |
33 | default ARCH_BERLIN | |
34 | help | |
35 | This enables the reset controller driver for Marvell Berlin SoCs. | |
36 | ||
e0be864f EP |
37 | config RESET_HSDK_V1 |
38 | bool "HSDK v1 Reset Driver" | |
39 | default n | |
40 | help | |
41 | This enables the reset controller driver for HSDK v1. | |
42 | ||
abf97755 AS |
43 | config RESET_IMX7 |
44 | bool "i.MX7 Reset Driver" if COMPILE_TEST | |
45 | default SOC_IMX7D | |
46 | select MFD_SYSCON | |
47 | help | |
48 | This enables the reset controller driver for i.MX7 SoCs. | |
49 | ||
79797b6f MB |
50 | config RESET_LANTIQ |
51 | bool "Lantiq XWAY Reset Driver" if COMPILE_TEST | |
52 | default SOC_TYPE_XWAY | |
53 | help | |
54 | This enables the reset controller driver for Lantiq / Intel XWAY SoCs. | |
55 | ||
cd7f4b81 PZ |
56 | config RESET_LPC18XX |
57 | bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST | |
58 | default ARCH_LPC18XX | |
59 | help | |
60 | This enables the reset controller driver for NXP LPC18xx/43xx SoCs. | |
61 | ||
44336c24 PZ |
62 | config RESET_MESON |
63 | bool "Meson Reset Driver" if COMPILE_TEST | |
64 | default ARCH_MESON | |
65 | help | |
66 | This enables the reset driver for Amlogic Meson SoCs. | |
67 | ||
6e667fac NA |
68 | config RESET_OXNAS |
69 | bool | |
70 | ||
fab3f730 PZ |
71 | config RESET_PISTACHIO |
72 | bool "Pistachio Reset Driver" if COMPILE_TEST | |
73 | default MACH_PISTACHIO | |
74 | help | |
75 | This enables the reset driver for ImgTec Pistachio SoCs. | |
76 | ||
5c91407e PZ |
77 | config RESET_SOCFPGA |
78 | bool "SoCFPGA Reset Driver" if COMPILE_TEST | |
79 | default ARCH_SOCFPGA | |
80 | help | |
81 | This enables the reset controller driver for Altera SoCFPGAs. | |
82 | ||
7e0e901d PZ |
83 | config RESET_STM32 |
84 | bool "STM32 Reset Driver" if COMPILE_TEST | |
85 | default ARCH_STM32 | |
86 | help | |
87 | This enables the RCC reset controller driver for STM32 MCUs. | |
88 | ||
0ae08419 PZ |
89 | config RESET_SUNXI |
90 | bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI | |
91 | default ARCH_SUNXI | |
92 | help | |
93 | This enables the reset driver for Allwinner SoCs. | |
94 | ||
28df169b AD |
95 | config RESET_TI_SCI |
96 | tristate "TI System Control Interface (TI-SCI) reset driver" | |
97 | depends on TI_SCI_PROTOCOL | |
98 | help | |
99 | This enables the reset driver support over TI System Control Interface | |
100 | available on some new TI's SoCs. If you wish to use reset resources | |
101 | managed by the TI System Controller, say Y here. Otherwise, say N. | |
102 | ||
dd9bf863 | 103 | config RESET_TI_SYSCON |
cc7c2bb1 AD |
104 | tristate "TI SYSCON Reset Driver" |
105 | depends on HAS_IOMEM | |
106 | select MFD_SYSCON | |
107 | help | |
108 | This enables the reset driver support for TI devices with | |
109 | memory-mapped reset registers as part of a syscon device node. If | |
110 | you wish to use the reset framework for such memory-mapped devices, | |
111 | say Y here. Otherwise, say N. | |
112 | ||
54e991b5 MY |
113 | config RESET_UNIPHIER |
114 | tristate "Reset controller driver for UniPhier SoCs" | |
115 | depends on ARCH_UNIPHIER || COMPILE_TEST | |
116 | depends on OF && MFD_SYSCON | |
117 | default ARCH_UNIPHIER | |
118 | help | |
119 | Support for reset controllers on UniPhier SoCs. | |
120 | Say Y if you want to control reset signals provided by System Control | |
121 | block, Media I/O block, Peripheral Block. | |
122 | ||
b38386f4 BX |
123 | config RESET_ZX2967 |
124 | bool "ZTE ZX2967 Reset Driver" | |
125 | depends on ARCH_ZX || COMPILE_TEST | |
126 | help | |
127 | This enables the reset controller driver for ZTE's zx2967 family. | |
128 | ||
6f51b860 PZ |
129 | config RESET_ZYNQ |
130 | bool "ZYNQ Reset Driver" if COMPILE_TEST | |
131 | default ARCH_ZYNQ | |
132 | help | |
133 | This enables the reset controller driver for Xilinx Zynq SoCs. | |
134 | ||
e5d76075 | 135 | source "drivers/reset/sti/Kconfig" |
f59d23c2 | 136 | source "drivers/reset/hisilicon/Kconfig" |
dc606c52 | 137 | source "drivers/reset/tegra/Kconfig" |
998cd463 MY |
138 | |
139 | endif |