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Commit | Line | Data |
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61fc4131 PZ |
1 | /* |
2 | * Reset Controller framework | |
3 | * | |
4 | * Copyright 2013 Philipp Zabel, Pengutronix | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
0b52297f | 11 | #include <linux/atomic.h> |
61fc4131 PZ |
12 | #include <linux/device.h> |
13 | #include <linux/err.h> | |
14 | #include <linux/export.h> | |
15 | #include <linux/kernel.h> | |
d25e4334 | 16 | #include <linux/kref.h> |
61fc4131 PZ |
17 | #include <linux/module.h> |
18 | #include <linux/of.h> | |
19 | #include <linux/reset.h> | |
20 | #include <linux/reset-controller.h> | |
21 | #include <linux/slab.h> | |
22 | ||
c15ddec2 | 23 | static DEFINE_MUTEX(reset_list_mutex); |
61fc4131 PZ |
24 | static LIST_HEAD(reset_controller_list); |
25 | ||
26 | /** | |
27 | * struct reset_control - a reset control | |
28 | * @rcdev: a pointer to the reset controller device | |
29 | * this reset control belongs to | |
c15ddec2 | 30 | * @list: list entry for the rcdev's reset controller list |
61fc4131 PZ |
31 | * @id: ID of the reset controller in the reset |
32 | * controller device | |
c15ddec2 | 33 | * @refcnt: Number of gets of this reset_control |
0b52297f HG |
34 | * @shared: Is this a shared (1), or an exclusive (0) reset_control? |
35 | * @deassert_cnt: Number of times this reset line has been deasserted | |
7da33a37 MB |
36 | * @triggered_count: Number of times this reset line has been reset. Currently |
37 | * only used for shared resets, which means that the value | |
38 | * will be either 0 or 1. | |
61fc4131 PZ |
39 | */ |
40 | struct reset_control { | |
41 | struct reset_controller_dev *rcdev; | |
c15ddec2 | 42 | struct list_head list; |
61fc4131 | 43 | unsigned int id; |
d25e4334 | 44 | struct kref refcnt; |
ee48c726 | 45 | bool shared; |
17c82e20 | 46 | bool array; |
0b52297f | 47 | atomic_t deassert_count; |
7da33a37 | 48 | atomic_t triggered_count; |
61fc4131 PZ |
49 | }; |
50 | ||
17c82e20 VG |
51 | /** |
52 | * struct reset_control_array - an array of reset controls | |
53 | * @base: reset control for compatibility with reset control API functions | |
54 | * @num_rstcs: number of reset controls | |
55 | * @rstc: array of reset controls | |
56 | */ | |
57 | struct reset_control_array { | |
58 | struct reset_control base; | |
59 | unsigned int num_rstcs; | |
60 | struct reset_control *rstc[]; | |
61 | }; | |
62 | ||
61fc4131 PZ |
63 | /** |
64 | * of_reset_simple_xlate - translate reset_spec to the reset line number | |
65 | * @rcdev: a pointer to the reset controller device | |
66 | * @reset_spec: reset line specifier as found in the device tree | |
67 | * @flags: a flags pointer to fill in (optional) | |
68 | * | |
69 | * This simple translation function should be used for reset controllers | |
70 | * with 1:1 mapping, where reset lines can be indexed by number without gaps. | |
71 | */ | |
0c5b2b91 | 72 | static int of_reset_simple_xlate(struct reset_controller_dev *rcdev, |
61fc4131 PZ |
73 | const struct of_phandle_args *reset_spec) |
74 | { | |
61fc4131 PZ |
75 | if (reset_spec->args[0] >= rcdev->nr_resets) |
76 | return -EINVAL; | |
77 | ||
78 | return reset_spec->args[0]; | |
79 | } | |
61fc4131 PZ |
80 | |
81 | /** | |
82 | * reset_controller_register - register a reset controller device | |
83 | * @rcdev: a pointer to the initialized reset controller device | |
84 | */ | |
85 | int reset_controller_register(struct reset_controller_dev *rcdev) | |
86 | { | |
87 | if (!rcdev->of_xlate) { | |
88 | rcdev->of_reset_n_cells = 1; | |
89 | rcdev->of_xlate = of_reset_simple_xlate; | |
90 | } | |
91 | ||
c15ddec2 HG |
92 | INIT_LIST_HEAD(&rcdev->reset_control_head); |
93 | ||
94 | mutex_lock(&reset_list_mutex); | |
61fc4131 | 95 | list_add(&rcdev->list, &reset_controller_list); |
c15ddec2 | 96 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
97 | |
98 | return 0; | |
99 | } | |
100 | EXPORT_SYMBOL_GPL(reset_controller_register); | |
101 | ||
102 | /** | |
103 | * reset_controller_unregister - unregister a reset controller device | |
104 | * @rcdev: a pointer to the reset controller device | |
105 | */ | |
106 | void reset_controller_unregister(struct reset_controller_dev *rcdev) | |
107 | { | |
c15ddec2 | 108 | mutex_lock(&reset_list_mutex); |
61fc4131 | 109 | list_del(&rcdev->list); |
c15ddec2 | 110 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
111 | } |
112 | EXPORT_SYMBOL_GPL(reset_controller_unregister); | |
113 | ||
8d5b5d5c MY |
114 | static void devm_reset_controller_release(struct device *dev, void *res) |
115 | { | |
116 | reset_controller_unregister(*(struct reset_controller_dev **)res); | |
117 | } | |
118 | ||
119 | /** | |
120 | * devm_reset_controller_register - resource managed reset_controller_register() | |
121 | * @dev: device that is registering this reset controller | |
122 | * @rcdev: a pointer to the initialized reset controller device | |
123 | * | |
124 | * Managed reset_controller_register(). For reset controllers registered by | |
125 | * this function, reset_controller_unregister() is automatically called on | |
126 | * driver detach. See reset_controller_register() for more information. | |
127 | */ | |
128 | int devm_reset_controller_register(struct device *dev, | |
129 | struct reset_controller_dev *rcdev) | |
130 | { | |
131 | struct reset_controller_dev **rcdevp; | |
132 | int ret; | |
133 | ||
134 | rcdevp = devres_alloc(devm_reset_controller_release, sizeof(*rcdevp), | |
135 | GFP_KERNEL); | |
136 | if (!rcdevp) | |
137 | return -ENOMEM; | |
138 | ||
139 | ret = reset_controller_register(rcdev); | |
140 | if (!ret) { | |
141 | *rcdevp = rcdev; | |
142 | devres_add(dev, rcdevp); | |
143 | } else { | |
144 | devres_free(rcdevp); | |
145 | } | |
146 | ||
147 | return ret; | |
148 | } | |
149 | EXPORT_SYMBOL_GPL(devm_reset_controller_register); | |
150 | ||
17c82e20 VG |
151 | static inline struct reset_control_array * |
152 | rstc_to_array(struct reset_control *rstc) { | |
153 | return container_of(rstc, struct reset_control_array, base); | |
154 | } | |
155 | ||
156 | static int reset_control_array_reset(struct reset_control_array *resets) | |
157 | { | |
158 | int ret, i; | |
159 | ||
160 | for (i = 0; i < resets->num_rstcs; i++) { | |
161 | ret = reset_control_reset(resets->rstc[i]); | |
162 | if (ret) | |
163 | return ret; | |
164 | } | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
169 | static int reset_control_array_assert(struct reset_control_array *resets) | |
170 | { | |
171 | int ret, i; | |
172 | ||
173 | for (i = 0; i < resets->num_rstcs; i++) { | |
174 | ret = reset_control_assert(resets->rstc[i]); | |
175 | if (ret) | |
176 | goto err; | |
177 | } | |
178 | ||
179 | return 0; | |
180 | ||
181 | err: | |
182 | while (i--) | |
183 | reset_control_deassert(resets->rstc[i]); | |
184 | return ret; | |
185 | } | |
186 | ||
187 | static int reset_control_array_deassert(struct reset_control_array *resets) | |
188 | { | |
189 | int ret, i; | |
190 | ||
191 | for (i = 0; i < resets->num_rstcs; i++) { | |
192 | ret = reset_control_deassert(resets->rstc[i]); | |
193 | if (ret) | |
194 | goto err; | |
195 | } | |
196 | ||
197 | return 0; | |
198 | ||
199 | err: | |
200 | while (i--) | |
201 | reset_control_assert(resets->rstc[i]); | |
202 | return ret; | |
203 | } | |
204 | ||
205 | static inline bool reset_control_is_array(struct reset_control *rstc) | |
206 | { | |
207 | return rstc->array; | |
208 | } | |
209 | ||
61fc4131 PZ |
210 | /** |
211 | * reset_control_reset - reset the controlled device | |
212 | * @rstc: reset controller | |
0b52297f | 213 | * |
7da33a37 MB |
214 | * On a shared reset line the actual reset pulse is only triggered once for the |
215 | * lifetime of the reset_control instance: for all but the first caller this is | |
216 | * a no-op. | |
217 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
218 | * reset_control_reset has been used. | |
bb475230 RO |
219 | * |
220 | * If rstc is NULL it is an optional reset and the function will just | |
221 | * return 0. | |
61fc4131 PZ |
222 | */ |
223 | int reset_control_reset(struct reset_control *rstc) | |
224 | { | |
7da33a37 MB |
225 | int ret; |
226 | ||
bb475230 RO |
227 | if (!rstc) |
228 | return 0; | |
229 | ||
230 | if (WARN_ON(IS_ERR(rstc))) | |
0b52297f HG |
231 | return -EINVAL; |
232 | ||
17c82e20 VG |
233 | if (reset_control_is_array(rstc)) |
234 | return reset_control_array_reset(rstc_to_array(rstc)); | |
235 | ||
7da33a37 MB |
236 | if (!rstc->rcdev->ops->reset) |
237 | return -ENOTSUPP; | |
238 | ||
239 | if (rstc->shared) { | |
240 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
241 | return -EINVAL; | |
242 | ||
243 | if (atomic_inc_return(&rstc->triggered_count) != 1) | |
244 | return 0; | |
245 | } | |
61fc4131 | 246 | |
7da33a37 | 247 | ret = rstc->rcdev->ops->reset(rstc->rcdev, rstc->id); |
e5a1dade | 248 | if (rstc->shared && ret) |
7da33a37 MB |
249 | atomic_dec(&rstc->triggered_count); |
250 | ||
251 | return ret; | |
61fc4131 PZ |
252 | } |
253 | EXPORT_SYMBOL_GPL(reset_control_reset); | |
254 | ||
255 | /** | |
256 | * reset_control_assert - asserts the reset line | |
257 | * @rstc: reset controller | |
0b52297f HG |
258 | * |
259 | * Calling this on an exclusive reset controller guarantees that the reset | |
260 | * will be asserted. When called on a shared reset controller the line may | |
261 | * still be deasserted, as long as other users keep it so. | |
262 | * | |
263 | * For shared reset controls a driver cannot expect the hw's registers and | |
264 | * internal state to be reset, but must be prepared for this to happen. | |
7da33a37 MB |
265 | * Consumers must not use reset_control_reset on shared reset lines when |
266 | * reset_control_(de)assert has been used. | |
bb475230 RO |
267 | * return 0. |
268 | * | |
269 | * If rstc is NULL it is an optional reset and the function will just | |
270 | * return 0. | |
61fc4131 PZ |
271 | */ |
272 | int reset_control_assert(struct reset_control *rstc) | |
273 | { | |
bb475230 RO |
274 | if (!rstc) |
275 | return 0; | |
276 | ||
277 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
278 | return -EINVAL; |
279 | ||
17c82e20 VG |
280 | if (reset_control_is_array(rstc)) |
281 | return reset_control_array_assert(rstc_to_array(rstc)); | |
282 | ||
0b52297f | 283 | if (rstc->shared) { |
7da33a37 MB |
284 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
285 | return -EINVAL; | |
286 | ||
0b52297f HG |
287 | if (WARN_ON(atomic_read(&rstc->deassert_count) == 0)) |
288 | return -EINVAL; | |
289 | ||
290 | if (atomic_dec_return(&rstc->deassert_count) != 0) | |
291 | return 0; | |
21240eb9 PZ |
292 | |
293 | /* | |
294 | * Shared reset controls allow the reset line to be in any state | |
295 | * after this call, so doing nothing is a valid option. | |
296 | */ | |
297 | if (!rstc->rcdev->ops->assert) | |
298 | return 0; | |
299 | } else { | |
300 | /* | |
301 | * If the reset controller does not implement .assert(), there | |
302 | * is no way to guarantee that the reset line is asserted after | |
303 | * this call. | |
304 | */ | |
305 | if (!rstc->rcdev->ops->assert) | |
306 | return -ENOTSUPP; | |
0b52297f HG |
307 | } |
308 | ||
309 | return rstc->rcdev->ops->assert(rstc->rcdev, rstc->id); | |
61fc4131 PZ |
310 | } |
311 | EXPORT_SYMBOL_GPL(reset_control_assert); | |
312 | ||
313 | /** | |
314 | * reset_control_deassert - deasserts the reset line | |
315 | * @rstc: reset controller | |
0b52297f HG |
316 | * |
317 | * After calling this function, the reset is guaranteed to be deasserted. | |
7da33a37 MB |
318 | * Consumers must not use reset_control_reset on shared reset lines when |
319 | * reset_control_(de)assert has been used. | |
bb475230 RO |
320 | * return 0. |
321 | * | |
322 | * If rstc is NULL it is an optional reset and the function will just | |
323 | * return 0. | |
61fc4131 PZ |
324 | */ |
325 | int reset_control_deassert(struct reset_control *rstc) | |
326 | { | |
bb475230 RO |
327 | if (!rstc) |
328 | return 0; | |
329 | ||
330 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
331 | return -EINVAL; |
332 | ||
17c82e20 VG |
333 | if (reset_control_is_array(rstc)) |
334 | return reset_control_array_deassert(rstc_to_array(rstc)); | |
335 | ||
0b52297f | 336 | if (rstc->shared) { |
7da33a37 MB |
337 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
338 | return -EINVAL; | |
339 | ||
0b52297f HG |
340 | if (atomic_inc_return(&rstc->deassert_count) != 1) |
341 | return 0; | |
342 | } | |
343 | ||
21240eb9 PZ |
344 | /* |
345 | * If the reset controller does not implement .deassert(), we assume | |
346 | * that it handles self-deasserting reset lines via .reset(). In that | |
347 | * case, the reset lines are deasserted by default. If that is not the | |
348 | * case, the reset controller driver should implement .deassert() and | |
349 | * return -ENOTSUPP. | |
350 | */ | |
351 | if (!rstc->rcdev->ops->deassert) | |
352 | return 0; | |
353 | ||
0b52297f | 354 | return rstc->rcdev->ops->deassert(rstc->rcdev, rstc->id); |
61fc4131 PZ |
355 | } |
356 | EXPORT_SYMBOL_GPL(reset_control_deassert); | |
357 | ||
729de41b DN |
358 | /** |
359 | * reset_control_status - returns a negative errno if not supported, a | |
360 | * positive value if the reset line is asserted, or zero if the reset | |
bb475230 | 361 | * line is not asserted or if the desc is NULL (optional reset). |
729de41b DN |
362 | * @rstc: reset controller |
363 | */ | |
364 | int reset_control_status(struct reset_control *rstc) | |
365 | { | |
bb475230 RO |
366 | if (!rstc) |
367 | return 0; | |
368 | ||
17c82e20 | 369 | if (WARN_ON(IS_ERR(rstc)) || reset_control_is_array(rstc)) |
a3774e14 PZ |
370 | return -EINVAL; |
371 | ||
729de41b DN |
372 | if (rstc->rcdev->ops->status) |
373 | return rstc->rcdev->ops->status(rstc->rcdev, rstc->id); | |
374 | ||
39b4da71 | 375 | return -ENOTSUPP; |
729de41b DN |
376 | } |
377 | EXPORT_SYMBOL_GPL(reset_control_status); | |
378 | ||
62e24c57 | 379 | static struct reset_control *__reset_control_get_internal( |
c15ddec2 | 380 | struct reset_controller_dev *rcdev, |
ee48c726 | 381 | unsigned int index, bool shared) |
c15ddec2 HG |
382 | { |
383 | struct reset_control *rstc; | |
384 | ||
385 | lockdep_assert_held(&reset_list_mutex); | |
386 | ||
387 | list_for_each_entry(rstc, &rcdev->reset_control_head, list) { | |
388 | if (rstc->id == index) { | |
0b52297f HG |
389 | if (WARN_ON(!rstc->shared || !shared)) |
390 | return ERR_PTR(-EBUSY); | |
391 | ||
d25e4334 | 392 | kref_get(&rstc->refcnt); |
c15ddec2 HG |
393 | return rstc; |
394 | } | |
395 | } | |
396 | ||
397 | rstc = kzalloc(sizeof(*rstc), GFP_KERNEL); | |
398 | if (!rstc) | |
399 | return ERR_PTR(-ENOMEM); | |
400 | ||
401 | try_module_get(rcdev->owner); | |
402 | ||
403 | rstc->rcdev = rcdev; | |
404 | list_add(&rstc->list, &rcdev->reset_control_head); | |
405 | rstc->id = index; | |
d25e4334 | 406 | kref_init(&rstc->refcnt); |
0b52297f | 407 | rstc->shared = shared; |
c15ddec2 HG |
408 | |
409 | return rstc; | |
410 | } | |
411 | ||
d25e4334 | 412 | static void __reset_control_release(struct kref *kref) |
c15ddec2 | 413 | { |
d25e4334 PZ |
414 | struct reset_control *rstc = container_of(kref, struct reset_control, |
415 | refcnt); | |
c15ddec2 | 416 | |
d25e4334 | 417 | lockdep_assert_held(&reset_list_mutex); |
c15ddec2 HG |
418 | |
419 | module_put(rstc->rcdev->owner); | |
420 | ||
421 | list_del(&rstc->list); | |
422 | kfree(rstc); | |
423 | } | |
424 | ||
d25e4334 PZ |
425 | static void __reset_control_put_internal(struct reset_control *rstc) |
426 | { | |
427 | lockdep_assert_held(&reset_list_mutex); | |
428 | ||
429 | kref_put(&rstc->refcnt, __reset_control_release); | |
430 | } | |
431 | ||
6c96f05c | 432 | struct reset_control *__of_reset_control_get(struct device_node *node, |
bb475230 RO |
433 | const char *id, int index, bool shared, |
434 | bool optional) | |
61fc4131 | 435 | { |
d056c9b8 | 436 | struct reset_control *rstc; |
61fc4131 PZ |
437 | struct reset_controller_dev *r, *rcdev; |
438 | struct of_phandle_args args; | |
61fc4131 PZ |
439 | int rstc_id; |
440 | int ret; | |
441 | ||
6c96f05c HG |
442 | if (!node) |
443 | return ERR_PTR(-EINVAL); | |
444 | ||
445 | if (id) { | |
446 | index = of_property_match_string(node, | |
447 | "reset-names", id); | |
bb475230 RO |
448 | if (index == -EILSEQ) |
449 | return ERR_PTR(index); | |
6c96f05c | 450 | if (index < 0) |
bb475230 | 451 | return optional ? NULL : ERR_PTR(-ENOENT); |
6c96f05c HG |
452 | } |
453 | ||
fc0a5921 | 454 | ret = of_parse_phandle_with_args(node, "resets", "#reset-cells", |
61fc4131 | 455 | index, &args); |
bb475230 | 456 | if (ret == -EINVAL) |
61fc4131 | 457 | return ERR_PTR(ret); |
bb475230 RO |
458 | if (ret) |
459 | return optional ? NULL : ERR_PTR(ret); | |
61fc4131 | 460 | |
c15ddec2 | 461 | mutex_lock(&reset_list_mutex); |
61fc4131 PZ |
462 | rcdev = NULL; |
463 | list_for_each_entry(r, &reset_controller_list, list) { | |
464 | if (args.np == r->of_node) { | |
465 | rcdev = r; | |
466 | break; | |
467 | } | |
468 | } | |
469 | of_node_put(args.np); | |
470 | ||
471 | if (!rcdev) { | |
c15ddec2 | 472 | mutex_unlock(&reset_list_mutex); |
3d103020 | 473 | return ERR_PTR(-EPROBE_DEFER); |
61fc4131 PZ |
474 | } |
475 | ||
e677774f | 476 | if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) { |
c15ddec2 | 477 | mutex_unlock(&reset_list_mutex); |
e677774f MR |
478 | return ERR_PTR(-EINVAL); |
479 | } | |
480 | ||
61fc4131 PZ |
481 | rstc_id = rcdev->of_xlate(rcdev, &args); |
482 | if (rstc_id < 0) { | |
c15ddec2 | 483 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
484 | return ERR_PTR(rstc_id); |
485 | } | |
486 | ||
c15ddec2 | 487 | /* reset_list_mutex also protects the rcdev's reset_control list */ |
62e24c57 | 488 | rstc = __reset_control_get_internal(rcdev, rstc_id, shared); |
61fc4131 | 489 | |
c15ddec2 | 490 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
491 | |
492 | return rstc; | |
493 | } | |
6c96f05c | 494 | EXPORT_SYMBOL_GPL(__of_reset_control_get); |
61fc4131 | 495 | |
62e24c57 PZ |
496 | struct reset_control *__reset_control_get(struct device *dev, const char *id, |
497 | int index, bool shared, bool optional) | |
498 | { | |
499 | if (dev->of_node) | |
500 | return __of_reset_control_get(dev->of_node, id, index, shared, | |
501 | optional); | |
502 | ||
503 | return optional ? NULL : ERR_PTR(-EINVAL); | |
504 | } | |
505 | EXPORT_SYMBOL_GPL(__reset_control_get); | |
506 | ||
17c82e20 VG |
507 | static void reset_control_array_put(struct reset_control_array *resets) |
508 | { | |
509 | int i; | |
510 | ||
511 | mutex_lock(&reset_list_mutex); | |
512 | for (i = 0; i < resets->num_rstcs; i++) | |
513 | __reset_control_put_internal(resets->rstc[i]); | |
514 | mutex_unlock(&reset_list_mutex); | |
515 | } | |
516 | ||
61fc4131 PZ |
517 | /** |
518 | * reset_control_put - free the reset controller | |
519 | * @rstc: reset controller | |
520 | */ | |
61fc4131 PZ |
521 | void reset_control_put(struct reset_control *rstc) |
522 | { | |
4891486f | 523 | if (IS_ERR_OR_NULL(rstc)) |
61fc4131 PZ |
524 | return; |
525 | ||
17c82e20 VG |
526 | if (reset_control_is_array(rstc)) { |
527 | reset_control_array_put(rstc_to_array(rstc)); | |
528 | return; | |
529 | } | |
530 | ||
c15ddec2 | 531 | mutex_lock(&reset_list_mutex); |
62e24c57 | 532 | __reset_control_put_internal(rstc); |
c15ddec2 | 533 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
534 | } |
535 | EXPORT_SYMBOL_GPL(reset_control_put); | |
536 | ||
537 | static void devm_reset_control_release(struct device *dev, void *res) | |
538 | { | |
539 | reset_control_put(*(struct reset_control **)res); | |
540 | } | |
541 | ||
6c96f05c | 542 | struct reset_control *__devm_reset_control_get(struct device *dev, |
bb475230 RO |
543 | const char *id, int index, bool shared, |
544 | bool optional) | |
61fc4131 PZ |
545 | { |
546 | struct reset_control **ptr, *rstc; | |
547 | ||
548 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), | |
549 | GFP_KERNEL); | |
550 | if (!ptr) | |
551 | return ERR_PTR(-ENOMEM); | |
552 | ||
62e24c57 | 553 | rstc = __reset_control_get(dev, id, index, shared, optional); |
61fc4131 PZ |
554 | if (!IS_ERR(rstc)) { |
555 | *ptr = rstc; | |
556 | devres_add(dev, ptr); | |
557 | } else { | |
558 | devres_free(ptr); | |
559 | } | |
560 | ||
561 | return rstc; | |
562 | } | |
6c96f05c | 563 | EXPORT_SYMBOL_GPL(__devm_reset_control_get); |
61fc4131 | 564 | |
61fc4131 PZ |
565 | /** |
566 | * device_reset - find reset controller associated with the device | |
567 | * and perform reset | |
568 | * @dev: device to be reset by the controller | |
569 | * | |
570 | * Convenience wrapper for reset_control_get() and reset_control_reset(). | |
571 | * This is useful for the common case of devices with single, dedicated reset | |
572 | * lines. | |
573 | */ | |
574 | int device_reset(struct device *dev) | |
575 | { | |
576 | struct reset_control *rstc; | |
577 | int ret; | |
578 | ||
579 | rstc = reset_control_get(dev, NULL); | |
580 | if (IS_ERR(rstc)) | |
581 | return PTR_ERR(rstc); | |
582 | ||
583 | ret = reset_control_reset(rstc); | |
584 | ||
585 | reset_control_put(rstc); | |
586 | ||
587 | return ret; | |
588 | } | |
589 | EXPORT_SYMBOL_GPL(device_reset); | |
17c82e20 VG |
590 | |
591 | /** | |
592 | * APIs to manage an array of reset controls. | |
593 | */ | |
594 | /** | |
595 | * of_reset_control_get_count - Count number of resets available with a device | |
596 | * | |
597 | * @node: device node that contains 'resets'. | |
598 | * | |
599 | * Returns positive reset count on success, or error number on failure and | |
600 | * on count being zero. | |
601 | */ | |
602 | static int of_reset_control_get_count(struct device_node *node) | |
603 | { | |
604 | int count; | |
605 | ||
606 | if (!node) | |
607 | return -EINVAL; | |
608 | ||
609 | count = of_count_phandle_with_args(node, "resets", "#reset-cells"); | |
610 | if (count == 0) | |
611 | count = -ENOENT; | |
612 | ||
613 | return count; | |
614 | } | |
615 | ||
616 | /** | |
617 | * of_reset_control_array_get - Get a list of reset controls using | |
618 | * device node. | |
619 | * | |
620 | * @np: device node for the device that requests the reset controls array | |
621 | * @shared: whether reset controls are shared or not | |
622 | * @optional: whether it is optional to get the reset controls | |
623 | * | |
624 | * Returns pointer to allocated reset_control_array on success or | |
625 | * error on failure | |
626 | */ | |
627 | struct reset_control * | |
628 | of_reset_control_array_get(struct device_node *np, bool shared, bool optional) | |
629 | { | |
630 | struct reset_control_array *resets; | |
631 | struct reset_control *rstc; | |
632 | int num, i; | |
633 | ||
634 | num = of_reset_control_get_count(np); | |
635 | if (num < 0) | |
636 | return optional ? NULL : ERR_PTR(num); | |
637 | ||
638 | resets = kzalloc(sizeof(*resets) + sizeof(resets->rstc[0]) * num, | |
639 | GFP_KERNEL); | |
640 | if (!resets) | |
641 | return ERR_PTR(-ENOMEM); | |
642 | ||
643 | for (i = 0; i < num; i++) { | |
644 | rstc = __of_reset_control_get(np, NULL, i, shared, optional); | |
645 | if (IS_ERR(rstc)) | |
646 | goto err_rst; | |
647 | resets->rstc[i] = rstc; | |
648 | } | |
649 | resets->num_rstcs = num; | |
650 | resets->base.array = true; | |
651 | ||
652 | return &resets->base; | |
653 | ||
654 | err_rst: | |
655 | mutex_lock(&reset_list_mutex); | |
656 | while (--i >= 0) | |
657 | __reset_control_put_internal(resets->rstc[i]); | |
658 | mutex_unlock(&reset_list_mutex); | |
659 | ||
660 | kfree(resets); | |
661 | ||
662 | return rstc; | |
663 | } | |
664 | EXPORT_SYMBOL_GPL(of_reset_control_array_get); | |
665 | ||
666 | /** | |
667 | * devm_reset_control_array_get - Resource managed reset control array get | |
668 | * | |
669 | * @dev: device that requests the list of reset controls | |
670 | * @shared: whether reset controls are shared or not | |
671 | * @optional: whether it is optional to get the reset controls | |
672 | * | |
673 | * The reset control array APIs are intended for a list of resets | |
674 | * that just have to be asserted or deasserted, without any | |
675 | * requirements on the order. | |
676 | * | |
677 | * Returns pointer to allocated reset_control_array on success or | |
678 | * error on failure | |
679 | */ | |
680 | struct reset_control * | |
681 | devm_reset_control_array_get(struct device *dev, bool shared, bool optional) | |
682 | { | |
683 | struct reset_control **devres; | |
684 | struct reset_control *rstc; | |
685 | ||
686 | devres = devres_alloc(devm_reset_control_release, sizeof(*devres), | |
687 | GFP_KERNEL); | |
688 | if (!devres) | |
689 | return ERR_PTR(-ENOMEM); | |
690 | ||
691 | rstc = of_reset_control_array_get(dev->of_node, shared, optional); | |
692 | if (IS_ERR(rstc)) { | |
693 | devres_free(devres); | |
694 | return rstc; | |
695 | } | |
696 | ||
697 | *devres = rstc; | |
698 | devres_add(dev, devres); | |
699 | ||
700 | return rstc; | |
701 | } | |
702 | EXPORT_SYMBOL_GPL(devm_reset_control_array_get); |