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2874c5fd | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
81c22ad0 PZ |
2 | /* |
3 | * Simple Reset Controller ops | |
4 | * | |
5 | * Based on Allwinner SoCs Reset Controller driver | |
6 | * | |
7 | * Copyright 2013 Maxime Ripard | |
8 | * | |
9 | * Maxime Ripard <maxime.ripard@free-electrons.com> | |
81c22ad0 PZ |
10 | */ |
11 | ||
12 | #ifndef __RESET_SIMPLE_H__ | |
13 | #define __RESET_SIMPLE_H__ | |
14 | ||
15 | #include <linux/io.h> | |
16 | #include <linux/reset-controller.h> | |
17 | #include <linux/spinlock.h> | |
18 | ||
19 | /** | |
20 | * struct reset_simple_data - driver data for simple reset controllers | |
21 | * @lock: spinlock to protect registers during read-modify-write cycles | |
22 | * @membase: memory mapped I/O register range | |
23 | * @rcdev: reset controller device base structure | |
24 | * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits | |
25 | * are set to assert the reset. Note that this says nothing about | |
26 | * the voltage level of the actual reset line. | |
adf20d7c PZ |
27 | * @status_active_low: if true, bits read back as cleared while the reset is |
28 | * asserted. Otherwise, bits read back as set while the | |
29 | * reset is asserted. | |
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30 | */ |
31 | struct reset_simple_data { | |
32 | spinlock_t lock; | |
33 | void __iomem *membase; | |
34 | struct reset_controller_dev rcdev; | |
35 | bool active_low; | |
adf20d7c | 36 | bool status_active_low; |
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37 | }; |
38 | ||
39 | extern const struct reset_control_ops reset_simple_ops; | |
40 | ||
41 | #endif /* __RESET_SIMPLE_H__ */ |