[mirror_ubuntu-artful-kernel.git] / drivers / reset / reset-sunxi.c

/*
 * Allwinner SoCs Reset Controller driver
 *
 * Copyright 2013 Maxime Ripard
 *
 * Maxime Ripard <maxime.ripard@free-electrons.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/types.h>

struct sunxi_reset_data {
	spinlock_t			lock;
	void __iomem			*membase;
	struct reset_controller_dev	rcdev;
};

static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
			      unsigned long id)
{
	struct sunxi_reset_data *data = container_of(rcdev,
						     struct sunxi_reset_data,
						     rcdev);
	int reg_width = sizeof(u32);
	int bank = id / (reg_width * BITS_PER_BYTE);
	int offset = id % (reg_width * BITS_PER_BYTE);
	unsigned long flags;
	u32 reg;

	spin_lock_irqsave(&data->lock, flags);

	reg = readl(data->membase + (bank * reg_width));
	writel(reg & ~BIT(offset), data->membase + (bank * reg_width));

	spin_unlock_irqrestore(&data->lock, flags);

	return 0;
}

static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
				unsigned long id)
{
	struct sunxi_reset_data *data = container_of(rcdev,
						     struct sunxi_reset_data,
						     rcdev);
	int reg_width = sizeof(u32);
	int bank = id / (reg_width * BITS_PER_BYTE);
	int offset = id % (reg_width * BITS_PER_BYTE);
	unsigned long flags;
	u32 reg;

	spin_lock_irqsave(&data->lock, flags);

	reg = readl(data->membase + (bank * reg_width));
	writel(reg | BIT(offset), data->membase + (bank * reg_width));

	spin_unlock_irqrestore(&data->lock, flags);

	return 0;
}

static const struct reset_control_ops sunxi_reset_ops = {
	.assert		= sunxi_reset_assert,
	.deassert	= sunxi_reset_deassert,
};

static int sunxi_reset_init(struct device_node *np)
{
	struct sunxi_reset_data *data;
	struct resource res;
	resource_size_t size;
	int ret;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	ret = of_address_to_resource(np, 0, &res);
	if (ret)
		goto err_alloc;

	size = resource_size(&res);
	if (!request_mem_region(res.start, size, np->name)) {
		ret = -EBUSY;
		goto err_alloc;
	}

	data->membase = ioremap(res.start, size);
	if (!data->membase) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	spin_lock_init(&data->lock);

	data->rcdev.owner = THIS_MODULE;
	data->rcdev.nr_resets = size * 32;
	data->rcdev.ops = &sunxi_reset_ops;
	data->rcdev.of_node = np;

	return reset_controller_register(&data->rcdev);

err_alloc:
	kfree(data);
	return ret;
};

/*
 * These are the reset controller we need to initialize early on in
 * our system, before we can even think of using a regular device
 * driver for it.
 */
static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = {
	{ .compatible = "allwinner,sun6i-a31-ahb1-reset", },
	{ /* sentinel */ },
};

void __init sun6i_reset_init(void)
{
	struct device_node *np;

	for_each_matching_node(np, sunxi_early_reset_dt_ids)
		sunxi_reset_init(np);
}

/*
 * And these are the controllers we can register through the regular
 * device model.
 */
static const struct of_device_id sunxi_reset_dt_ids[] = {
	 { .compatible = "allwinner,sun6i-a31-clock-reset", },
	 { /* sentinel */ },
};

static int sunxi_reset_probe(struct platform_device *pdev)
{
	struct sunxi_reset_data *data;
	struct resource *res;

	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	data->membase = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(data->membase))
		return PTR_ERR(data->membase);

	spin_lock_init(&data->lock);

	data->rcdev.owner = THIS_MODULE;
	data->rcdev.nr_resets = resource_size(res) * 32;
	data->rcdev.ops = &sunxi_reset_ops;
	data->rcdev.of_node = pdev->dev.of_node;

	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
}

static struct platform_driver sunxi_reset_driver = {
	.probe	= sunxi_reset_probe,
	.driver = {
		.name		= "sunxi-reset",
		.of_match_table	= sunxi_reset_dt_ids,
	},
};
builtin_platform_driver(sunxi_reset_driver);
Commit	Line	Data
8f1ae77f MR	1	/*
	2	* Allwinner SoCs Reset Controller driver
	3	*
	4	* Copyright 2013 Maxime Ripard
	5	*
	6	* Maxime Ripard <maxime.ripard@free-electrons.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*/
	13
	14	#include <linux/err.h>
	15	#include <linux/io.h>
c4742ed3	16	#include <linux/init.h>
8f1ae77f MR	17	#include <linux/of.h>
	18	#include <linux/of_address.h>
	19	#include <linux/platform_device.h>
	20	#include <linux/reset-controller.h>
	21	#include <linux/slab.h>
	22	#include <linux/spinlock.h>
	23	#include <linux/types.h>
	24
	25	struct sunxi_reset_data {
	26	spinlock_t lock;
	27	void __iomem *membase;
	28	struct reset_controller_dev rcdev;
	29	};
	30
	31	static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
	32	unsigned long id)
	33	{
	34	struct sunxi_reset_data *data = container_of(rcdev,
	35	struct sunxi_reset_data,
	36	rcdev);
11282a49 AP	37	int reg_width = sizeof(u32);
	38	int bank = id / (reg_width * BITS_PER_BYTE);
	39	int offset = id % (reg_width * BITS_PER_BYTE);
8f1ae77f MR	40	unsigned long flags;
	41	u32 reg;
	42
	43	spin_lock_irqsave(&data->lock, flags);
	44
11282a49 AP	45	reg = readl(data->membase + (bank * reg_width));
11282a49 AP	46	writel(reg & ~BIT(offset), data->membase + (bank * reg_width));
8f1ae77f MR	47
	48	spin_unlock_irqrestore(&data->lock, flags);
	49
	50	return 0;
	51	}
	52
	53	static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
	54	unsigned long id)
	55	{
	56	struct sunxi_reset_data *data = container_of(rcdev,
	57	struct sunxi_reset_data,
	58	rcdev);
11282a49 AP	59	int reg_width = sizeof(u32);
	60	int bank = id / (reg_width * BITS_PER_BYTE);
	61	int offset = id % (reg_width * BITS_PER_BYTE);
8f1ae77f MR	62	unsigned long flags;
	63	u32 reg;
	64
	65	spin_lock_irqsave(&data->lock, flags);
	66
11282a49 AP	67	reg = readl(data->membase + (bank * reg_width));
11282a49 AP	68	writel(reg \| BIT(offset), data->membase + (bank * reg_width));
8f1ae77f MR	69
	70	spin_unlock_irqrestore(&data->lock, flags);
	71
	72	return 0;
	73	}
	74
01501d57	75	static const struct reset_control_ops sunxi_reset_ops = {
8f1ae77f MR	76	.assert = sunxi_reset_assert,
	77	.deassert = sunxi_reset_deassert,
	78	};
	79
	80	static int sunxi_reset_init(struct device_node *np)
	81	{
	82	struct sunxi_reset_data *data;
	83	struct resource res;
	84	resource_size_t size;
	85	int ret;
	86
	87	data = kzalloc(sizeof(*data), GFP_KERNEL);
	88	if (!data)
	89	return -ENOMEM;
	90
	91	ret = of_address_to_resource(np, 0, &res);
	92	if (ret)
	93	goto err_alloc;
	94
	95	size = resource_size(&res);
	96	if (!request_mem_region(res.start, size, np->name)) {
	97	ret = -EBUSY;
	98	goto err_alloc;
	99	}
	100
	101	data->membase = ioremap(res.start, size);
	102	if (!data->membase) {
	103	ret = -ENOMEM;
	104	goto err_alloc;
	105	}
	106
41544f9f TB	107	spin_lock_init(&data->lock);
41544f9f TB	108
8f1ae77f MR	109	data->rcdev.owner = THIS_MODULE;
	110	data->rcdev.nr_resets = size * 32;
	111	data->rcdev.ops = &sunxi_reset_ops;
	112	data->rcdev.of_node = np;
8f1ae77f	113
d1f15aa0	114	return reset_controller_register(&data->rcdev);
8f1ae77f MR	115
	116	err_alloc:
	117	kfree(data);
	118	return ret;
	119	};
	120
	121	/*
	122	* These are the reset controller we need to initialize early on in
	123	* our system, before we can even think of using a regular device
	124	* driver for it.
	125	*/
fddad17e	126	static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = {
8f1ae77f MR	127	{ .compatible = "allwinner,sun6i-a31-ahb1-reset", },
	128	{ /* sentinel */ },
	129	};
	130
	131	void __init sun6i_reset_init(void)
	132	{
	133	struct device_node *np;
	134
	135	for_each_matching_node(np, sunxi_early_reset_dt_ids)
	136	sunxi_reset_init(np);
	137	}
	138
	139	/*
	140	* And these are the controllers we can register through the regular
	141	* device model.
	142	*/
	143	static const struct of_device_id sunxi_reset_dt_ids[] = {
	144	{ .compatible = "allwinner,sun6i-a31-clock-reset", },
	145	{ /* sentinel */ },
	146	};
8f1ae77f MR	147
	148	static int sunxi_reset_probe(struct platform_device *pdev)
	149	{
cd90f0cf BB	150	struct sunxi_reset_data *data;
	151	struct resource *res;
	152
	153	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
	154	if (!data)
	155	return -ENOMEM;
	156
	157	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	158	data->membase = devm_ioremap_resource(&pdev->dev, res);
	159	if (IS_ERR(data->membase))
	160	return PTR_ERR(data->membase);
	161
41544f9f TB	162	spin_lock_init(&data->lock);
41544f9f TB	163
cd90f0cf BB	164	data->rcdev.owner = THIS_MODULE;
	165	data->rcdev.nr_resets = resource_size(res) * 32;
	166	data->rcdev.ops = &sunxi_reset_ops;
	167	data->rcdev.of_node = pdev->dev.of_node;
	168
2f38a88c	169	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
8f1ae77f MR	170	}
	171
	172	static struct platform_driver sunxi_reset_driver = {
	173	.probe = sunxi_reset_probe,
8f1ae77f MR	174	.driver = {
8f1ae77f MR	175	.name = "sunxi-reset",
8f1ae77f MR	176	.of_match_table = sunxi_reset_dt_ids,
	177	},
	178	};
c4742ed3	179	builtin_platform_driver(sunxi_reset_driver);