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b4f8e52b BA |
1 | /* |
2 | * Copyright (c) 2016-2017, Linaro Ltd | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 and | |
6 | * only version 2 as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #include <linux/idr.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/mfd/syscon.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/regmap.h> | |
24 | #include <linux/rpmsg.h> | |
25 | #include <linux/slab.h> | |
26 | #include <linux/workqueue.h> | |
27 | #include <linux/mailbox_client.h> | |
28 | ||
29 | #include "rpmsg_internal.h" | |
835764dd | 30 | #include "qcom_glink_native.h" |
b4f8e52b BA |
31 | |
32 | #define RPM_TOC_SIZE 256 | |
33 | #define RPM_TOC_MAGIC 0x67727430 /* grt0 */ | |
34 | #define RPM_TOC_MAX_ENTRIES ((RPM_TOC_SIZE - sizeof(struct rpm_toc)) / \ | |
35 | sizeof(struct rpm_toc_entry)) | |
36 | ||
37 | #define RPM_TX_FIFO_ID 0x61703272 /* ap2r */ | |
38 | #define RPM_RX_FIFO_ID 0x72326170 /* r2ap */ | |
39 | ||
835764dd | 40 | #define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native) |
e45c5dc2 | 41 | |
b4f8e52b BA |
42 | struct rpm_toc_entry { |
43 | __le32 id; | |
44 | __le32 offset; | |
45 | __le32 size; | |
46 | } __packed; | |
47 | ||
48 | struct rpm_toc { | |
49 | __le32 magic; | |
50 | __le32 count; | |
51 | ||
52 | struct rpm_toc_entry entries[]; | |
53 | } __packed; | |
54 | ||
b4f8e52b | 55 | struct glink_rpm_pipe { |
e45c5dc2 BA |
56 | struct qcom_glink_pipe native; |
57 | ||
b4f8e52b BA |
58 | void __iomem *tail; |
59 | void __iomem *head; | |
60 | ||
61 | void __iomem *fifo; | |
b4f8e52b BA |
62 | }; |
63 | ||
e45c5dc2 | 64 | static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe) |
b4f8e52b | 65 | { |
e45c5dc2 | 66 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
67 | unsigned int head; |
68 | unsigned int tail; | |
69 | ||
70 | head = readl(pipe->head); | |
71 | tail = readl(pipe->tail); | |
72 | ||
73 | if (head < tail) | |
e45c5dc2 | 74 | return pipe->native.length - tail + head; |
b4f8e52b BA |
75 | else |
76 | return head - tail; | |
77 | } | |
78 | ||
e45c5dc2 BA |
79 | static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe, |
80 | void *data, size_t count) | |
b4f8e52b | 81 | { |
e45c5dc2 | 82 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
83 | unsigned int tail; |
84 | size_t len; | |
85 | ||
86 | tail = readl(pipe->tail); | |
87 | ||
e45c5dc2 | 88 | len = min_t(size_t, count, pipe->native.length - tail); |
b4f8e52b BA |
89 | if (len) { |
90 | __ioread32_copy(data, pipe->fifo + tail, | |
91 | len / sizeof(u32)); | |
92 | } | |
93 | ||
94 | if (len != count) { | |
95 | __ioread32_copy(data + len, pipe->fifo, | |
96 | (count - len) / sizeof(u32)); | |
97 | } | |
98 | } | |
99 | ||
e45c5dc2 BA |
100 | static void glink_rpm_rx_advance(struct qcom_glink_pipe *glink_pipe, |
101 | size_t count) | |
102 | { | |
103 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); | |
b4f8e52b BA |
104 | unsigned int tail; |
105 | ||
106 | tail = readl(pipe->tail); | |
107 | ||
108 | tail += count; | |
e45c5dc2 BA |
109 | if (tail >= pipe->native.length) |
110 | tail -= pipe->native.length; | |
b4f8e52b BA |
111 | |
112 | writel(tail, pipe->tail); | |
113 | } | |
114 | ||
e45c5dc2 | 115 | static size_t glink_rpm_tx_avail(struct qcom_glink_pipe *glink_pipe) |
b4f8e52b | 116 | { |
e45c5dc2 | 117 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); |
b4f8e52b BA |
118 | unsigned int head; |
119 | unsigned int tail; | |
120 | ||
121 | head = readl(pipe->head); | |
122 | tail = readl(pipe->tail); | |
123 | ||
124 | if (tail <= head) | |
e45c5dc2 | 125 | return pipe->native.length - head + tail; |
b4f8e52b BA |
126 | else |
127 | return tail - head; | |
128 | } | |
129 | ||
e45c5dc2 BA |
130 | static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe, |
131 | unsigned int head, | |
132 | const void *data, size_t count) | |
b4f8e52b | 133 | { |
b4f8e52b BA |
134 | size_t len; |
135 | ||
e45c5dc2 | 136 | len = min_t(size_t, count, pipe->native.length - head); |
b4f8e52b BA |
137 | if (len) { |
138 | __iowrite32_copy(pipe->fifo + head, data, | |
139 | len / sizeof(u32)); | |
140 | } | |
141 | ||
142 | if (len != count) { | |
143 | __iowrite32_copy(pipe->fifo, data + len, | |
144 | (count - len) / sizeof(u32)); | |
145 | } | |
146 | ||
147 | head += count; | |
e45c5dc2 BA |
148 | if (head >= pipe->native.length) |
149 | head -= pipe->native.length; | |
b4f8e52b BA |
150 | |
151 | return head; | |
152 | } | |
153 | ||
e45c5dc2 BA |
154 | static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe, |
155 | const void *hdr, size_t hlen, | |
156 | const void *data, size_t dlen) | |
157 | { | |
158 | struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe); | |
159 | unsigned int head; | |
160 | ||
161 | head = readl(pipe->head); | |
162 | head = glink_rpm_tx_write_one(pipe, head, hdr, hlen); | |
163 | head = glink_rpm_tx_write_one(pipe, head, data, dlen); | |
164 | writel(head, pipe->head); | |
165 | } | |
166 | ||
b4f8e52b BA |
167 | static int glink_rpm_parse_toc(struct device *dev, |
168 | void __iomem *msg_ram, | |
169 | size_t msg_ram_size, | |
170 | struct glink_rpm_pipe *rx, | |
171 | struct glink_rpm_pipe *tx) | |
172 | { | |
173 | struct rpm_toc *toc; | |
174 | int num_entries; | |
175 | unsigned int id; | |
176 | size_t offset; | |
177 | size_t size; | |
178 | void *buf; | |
179 | int i; | |
180 | ||
181 | buf = kzalloc(RPM_TOC_SIZE, GFP_KERNEL); | |
182 | if (!buf) | |
183 | return -ENOMEM; | |
184 | ||
185 | __ioread32_copy(buf, msg_ram + msg_ram_size - RPM_TOC_SIZE, | |
186 | RPM_TOC_SIZE / sizeof(u32)); | |
187 | ||
188 | toc = buf; | |
189 | ||
190 | if (le32_to_cpu(toc->magic) != RPM_TOC_MAGIC) { | |
191 | dev_err(dev, "RPM TOC has invalid magic\n"); | |
192 | goto err_inval; | |
193 | } | |
194 | ||
195 | num_entries = le32_to_cpu(toc->count); | |
196 | if (num_entries > RPM_TOC_MAX_ENTRIES) { | |
197 | dev_err(dev, "Invalid number of toc entries\n"); | |
198 | goto err_inval; | |
199 | } | |
200 | ||
201 | for (i = 0; i < num_entries; i++) { | |
202 | id = le32_to_cpu(toc->entries[i].id); | |
203 | offset = le32_to_cpu(toc->entries[i].offset); | |
204 | size = le32_to_cpu(toc->entries[i].size); | |
205 | ||
206 | if (offset > msg_ram_size || offset + size > msg_ram_size) { | |
207 | dev_err(dev, "TOC entry with invalid size\n"); | |
208 | continue; | |
209 | } | |
210 | ||
211 | switch (id) { | |
212 | case RPM_RX_FIFO_ID: | |
e45c5dc2 | 213 | rx->native.length = size; |
b4f8e52b BA |
214 | |
215 | rx->tail = msg_ram + offset; | |
216 | rx->head = msg_ram + offset + sizeof(u32); | |
217 | rx->fifo = msg_ram + offset + 2 * sizeof(u32); | |
218 | break; | |
219 | case RPM_TX_FIFO_ID: | |
e45c5dc2 | 220 | tx->native.length = size; |
b4f8e52b BA |
221 | |
222 | tx->tail = msg_ram + offset; | |
223 | tx->head = msg_ram + offset + sizeof(u32); | |
224 | tx->fifo = msg_ram + offset + 2 * sizeof(u32); | |
225 | break; | |
226 | } | |
227 | } | |
228 | ||
229 | if (!rx->fifo || !tx->fifo) { | |
230 | dev_err(dev, "Unable to find rx and tx descriptors\n"); | |
231 | goto err_inval; | |
232 | } | |
233 | ||
234 | kfree(buf); | |
235 | return 0; | |
236 | ||
237 | err_inval: | |
238 | kfree(buf); | |
239 | return -EINVAL; | |
240 | } | |
241 | ||
6799c434 BA |
242 | static int glink_rpm_probe(struct platform_device *pdev) |
243 | { | |
244 | struct qcom_glink *glink; | |
245 | struct glink_rpm_pipe *rx_pipe; | |
246 | struct glink_rpm_pipe *tx_pipe; | |
247 | struct device_node *np; | |
248 | void __iomem *msg_ram; | |
249 | size_t msg_ram_size; | |
250 | struct device *dev = &pdev->dev; | |
251 | struct resource r; | |
252 | int ret; | |
253 | ||
254 | rx_pipe = devm_kzalloc(&pdev->dev, sizeof(*rx_pipe), GFP_KERNEL); | |
255 | tx_pipe = devm_kzalloc(&pdev->dev, sizeof(*tx_pipe), GFP_KERNEL); | |
256 | if (!rx_pipe || !tx_pipe) | |
257 | return -ENOMEM; | |
258 | ||
b4f8e52b BA |
259 | np = of_parse_phandle(dev->of_node, "qcom,rpm-msg-ram", 0); |
260 | ret = of_address_to_resource(np, 0, &r); | |
261 | of_node_put(np); | |
262 | if (ret) | |
263 | return ret; | |
264 | ||
265 | msg_ram = devm_ioremap(dev, r.start, resource_size(&r)); | |
266 | msg_ram_size = resource_size(&r); | |
267 | if (!msg_ram) | |
268 | return -ENOMEM; | |
269 | ||
270 | ret = glink_rpm_parse_toc(dev, msg_ram, msg_ram_size, | |
e45c5dc2 | 271 | rx_pipe, tx_pipe); |
b4f8e52b BA |
272 | if (ret) |
273 | return ret; | |
274 | ||
e45c5dc2 BA |
275 | /* Pipe specific accessors */ |
276 | rx_pipe->native.avail = glink_rpm_rx_avail; | |
277 | rx_pipe->native.peak = glink_rpm_rx_peak; | |
278 | rx_pipe->native.advance = glink_rpm_rx_advance; | |
279 | tx_pipe->native.avail = glink_rpm_tx_avail; | |
280 | tx_pipe->native.write = glink_rpm_tx_write; | |
281 | ||
e45c5dc2 BA |
282 | writel(0, tx_pipe->head); |
283 | writel(0, rx_pipe->tail); | |
b4f8e52b | 284 | |
6799c434 BA |
285 | glink = qcom_glink_native_probe(&pdev->dev, &rx_pipe->native, |
286 | &tx_pipe->native); | |
287 | if (IS_ERR(glink)) | |
288 | return PTR_ERR(glink); | |
b4f8e52b BA |
289 | |
290 | platform_set_drvdata(pdev, glink); | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
b4f8e52b BA |
295 | static int glink_rpm_remove(struct platform_device *pdev) |
296 | { | |
d7101feb | 297 | struct qcom_glink *glink = platform_get_drvdata(pdev); |
b4f8e52b | 298 | |
835764dd | 299 | qcom_glink_native_remove(glink); |
b4f8e52b BA |
300 | |
301 | return 0; | |
302 | } | |
303 | ||
304 | static const struct of_device_id glink_rpm_of_match[] = { | |
305 | { .compatible = "qcom,glink-rpm" }, | |
306 | {} | |
307 | }; | |
308 | MODULE_DEVICE_TABLE(of, glink_rpm_of_match); | |
309 | ||
310 | static struct platform_driver glink_rpm_driver = { | |
311 | .probe = glink_rpm_probe, | |
312 | .remove = glink_rpm_remove, | |
313 | .driver = { | |
314 | .name = "qcom_glink_rpm", | |
315 | .of_match_table = glink_rpm_of_match, | |
316 | }, | |
317 | }; | |
318 | ||
319 | static int __init glink_rpm_init(void) | |
320 | { | |
321 | return platform_driver_register(&glink_rpm_driver); | |
322 | } | |
323 | subsys_initcall(glink_rpm_init); | |
324 | ||
325 | static void __exit glink_rpm_exit(void) | |
326 | { | |
327 | platform_driver_unregister(&glink_rpm_driver); | |
328 | } | |
329 | module_exit(glink_rpm_exit); | |
330 | ||
331 | MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>"); | |
332 | MODULE_DESCRIPTION("Qualcomm GLINK RPM driver"); | |
333 | MODULE_LICENSE("GPL v2"); |