[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-at91rm9200.c

/*
 *	Real Time Clock interface for Linux on Atmel AT91RM9200
 *
 *	Copyright (C) 2002 Rick Bronson
 *
 *	Converted to RTC class model by Andrew Victor
 *
 *	Ported to Linux 2.6 by Steven Scholz
 *	Based on s3c2410-rtc.c Simtec Electronics
 *
 *	Based on sa1100-rtc.c by Nils Faerber
 *	Based on rtc.c by Paul Gortmaker
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version
 *	2 of the License, or (at your option) any later version.
 *
 */

#include <linux/bcd.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/ioctl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/spinlock.h>
#include <linux/suspend.h>
#include <linux/time.h>
#include <linux/uaccess.h>

#include "rtc-at91rm9200.h"

#define at91_rtc_read(field) \
	readl_relaxed(at91_rtc_regs + field)
#define at91_rtc_write(field, val) \
	writel_relaxed((val), at91_rtc_regs + field)

struct at91_rtc_config {
	bool use_shadow_imr;
};

static const struct at91_rtc_config *at91_rtc_config;
static DECLARE_COMPLETION(at91_rtc_updated);
static DECLARE_COMPLETION(at91_rtc_upd_rdy);
static void __iomem *at91_rtc_regs;
static int irq;
static DEFINE_SPINLOCK(at91_rtc_lock);
static u32 at91_rtc_shadow_imr;
static bool suspended;
static DEFINE_SPINLOCK(suspended_lock);
static unsigned long cached_events;
static u32 at91_rtc_imr;
static struct clk *sclk;

static void at91_rtc_write_ier(u32 mask)
{
	unsigned long flags;

	spin_lock_irqsave(&at91_rtc_lock, flags);
	at91_rtc_shadow_imr |= mask;
	at91_rtc_write(AT91_RTC_IER, mask);
	spin_unlock_irqrestore(&at91_rtc_lock, flags);
}

static void at91_rtc_write_idr(u32 mask)
{
	unsigned long flags;

	spin_lock_irqsave(&at91_rtc_lock, flags);
	at91_rtc_write(AT91_RTC_IDR, mask);
	/*
	 * Register read back (of any RTC-register) needed to make sure
	 * IDR-register write has reached the peripheral before updating
	 * shadow mask.
	 *
	 * Note that there is still a possibility that the mask is updated
	 * before interrupts have actually been disabled in hardware. The only
	 * way to be certain would be to poll the IMR-register, which is is
	 * the very register we are trying to emulate. The register read back
	 * is a reasonable heuristic.
	 */
	at91_rtc_read(AT91_RTC_SR);
	at91_rtc_shadow_imr &= ~mask;
	spin_unlock_irqrestore(&at91_rtc_lock, flags);
}

static u32 at91_rtc_read_imr(void)
{
	unsigned long flags;
	u32 mask;

	if (at91_rtc_config->use_shadow_imr) {
		spin_lock_irqsave(&at91_rtc_lock, flags);
		mask = at91_rtc_shadow_imr;
		spin_unlock_irqrestore(&at91_rtc_lock, flags);
	} else {
		mask = at91_rtc_read(AT91_RTC_IMR);
	}

	return mask;
}

/*
 * Decode time/date into rtc_time structure
 */
static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
				struct rtc_time *tm)
{
	unsigned int time, date;

	/* must read twice in case it changes */
	do {
		time = at91_rtc_read(timereg);
		date = at91_rtc_read(calreg);
	} while ((time != at91_rtc_read(timereg)) ||
			(date != at91_rtc_read(calreg)));

	tm->tm_sec  = bcd2bin((time & AT91_RTC_SEC) >> 0);
	tm->tm_min  = bcd2bin((time & AT91_RTC_MIN) >> 8);
	tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);

	/*
	 * The Calendar Alarm register does not have a field for
	 * the year - so these will return an invalid value.
	 */
	tm->tm_year  = bcd2bin(date & AT91_RTC_CENT) * 100;	/* century */
	tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8);	/* year */

	tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1;	/* day of the week [0-6], Sunday=0 */
	tm->tm_mon  = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
	tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
}

/*
 * Read current time and date in RTC
 */
static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
{
	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	tm->tm_year = tm->tm_year - 1900;

	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
		1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
		tm->tm_hour, tm->tm_min, tm->tm_sec);

	return 0;
}

/*
 * Set current time and date in RTC
 */
static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
{
	unsigned long cr;

	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
		1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
		tm->tm_hour, tm->tm_min, tm->tm_sec);

	wait_for_completion(&at91_rtc_upd_rdy);

	/* Stop Time/Calendar from counting */
	cr = at91_rtc_read(AT91_RTC_CR);
	at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);

	at91_rtc_write_ier(AT91_RTC_ACKUPD);
	wait_for_completion(&at91_rtc_updated);	/* wait for ACKUPD interrupt */
	at91_rtc_write_idr(AT91_RTC_ACKUPD);

	at91_rtc_write(AT91_RTC_TIMR,
			  bin2bcd(tm->tm_sec) << 0
			| bin2bcd(tm->tm_min) << 8
			| bin2bcd(tm->tm_hour) << 16);

	at91_rtc_write(AT91_RTC_CALR,
			  bin2bcd((tm->tm_year + 1900) / 100)	/* century */
			| bin2bcd(tm->tm_year % 100) << 8	/* year */
			| bin2bcd(tm->tm_mon + 1) << 16		/* tm_mon starts at zero */
			| bin2bcd(tm->tm_wday + 1) << 21	/* day of the week [0-6], Sunday=0 */
			| bin2bcd(tm->tm_mday) << 24);

	/* Restart Time/Calendar */
	cr = at91_rtc_read(AT91_RTC_CR);
	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
	at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
	at91_rtc_write_ier(AT91_RTC_SECEV);

	return 0;
}

/*
 * Read alarm time and date in RTC
 */
static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *tm = &alrm->time;

	at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
	tm->tm_year = -1;

	alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
			? 1 : 0;

	dev_dbg(dev, "%s(): %02d-%02d %02d:%02d:%02d %sabled\n", __func__,
		tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec,
		alrm->enabled ? "en" : "dis");

	return 0;
}

/*
 * Set alarm time and date in RTC
 */
static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time tm;

	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);

	tm.tm_mon = alrm->time.tm_mon;
	tm.tm_mday = alrm->time.tm_mday;
	tm.tm_hour = alrm->time.tm_hour;
	tm.tm_min = alrm->time.tm_min;
	tm.tm_sec = alrm->time.tm_sec;

	at91_rtc_write_idr(AT91_RTC_ALARM);
	at91_rtc_write(AT91_RTC_TIMALR,
		  bin2bcd(tm.tm_sec) << 0
		| bin2bcd(tm.tm_min) << 8
		| bin2bcd(tm.tm_hour) << 16
		| AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
	at91_rtc_write(AT91_RTC_CALALR,
		  bin2bcd(tm.tm_mon + 1) << 16		/* tm_mon starts at zero */
		| bin2bcd(tm.tm_mday) << 24
		| AT91_RTC_DATEEN | AT91_RTC_MTHEN);

	if (alrm->enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write_ier(AT91_RTC_ALARM);
	}

	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
		tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
		tm.tm_min, tm.tm_sec);

	return 0;
}

static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);

	if (enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write_ier(AT91_RTC_ALARM);
	} else
		at91_rtc_write_idr(AT91_RTC_ALARM);

	return 0;
}
/*
 * Provide additional RTC information in /proc/driver/rtc
 */
static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned long imr = at91_rtc_read_imr();

	seq_printf(seq, "update_IRQ\t: %s\n",
			(imr & AT91_RTC_ACKUPD) ? "yes" : "no");
	seq_printf(seq, "periodic_IRQ\t: %s\n",
			(imr & AT91_RTC_SECEV) ? "yes" : "no");

	return 0;
}

/*
 * IRQ handler for the RTC
 */
static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = dev_id;
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	unsigned int rtsr;
	unsigned long events = 0;
	int ret = IRQ_NONE;

	spin_lock(&suspended_lock);
	rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
	if (rtsr) {		/* this interrupt is shared!  Is it ours? */
		if (rtsr & AT91_RTC_ALARM)
			events |= (RTC_AF | RTC_IRQF);
		if (rtsr & AT91_RTC_SECEV) {
			complete(&at91_rtc_upd_rdy);
			at91_rtc_write_idr(AT91_RTC_SECEV);
		}
		if (rtsr & AT91_RTC_ACKUPD)
			complete(&at91_rtc_updated);

		at91_rtc_write(AT91_RTC_SCCR, rtsr);	/* clear status reg */

		if (!suspended) {
			rtc_update_irq(rtc, 1, events);

			dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
				__func__, events >> 8, events & 0x000000FF);
		} else {
			cached_events |= events;
			at91_rtc_write_idr(at91_rtc_imr);
			pm_system_wakeup();
		}

		ret = IRQ_HANDLED;
	}
	spin_unlock(&suspended_lock);

	return ret;
}

static const struct at91_rtc_config at91rm9200_config = {
};

static const struct at91_rtc_config at91sam9x5_config = {
	.use_shadow_imr	= true,
};

#ifdef CONFIG_OF
static const struct of_device_id at91_rtc_dt_ids[] = {
	{
		.compatible = "atmel,at91rm9200-rtc",
		.data = &at91rm9200_config,
	}, {
		.compatible = "atmel,at91sam9x5-rtc",
		.data = &at91sam9x5_config,
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
#endif

static const struct at91_rtc_config *
at91_rtc_get_config(struct platform_device *pdev)
{
	const struct of_device_id *match;

	if (pdev->dev.of_node) {
		match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
		if (!match)
			return NULL;
		return (const struct at91_rtc_config *)match->data;
	}

	return &at91rm9200_config;
}

static const struct rtc_class_ops at91_rtc_ops = {
	.read_time	= at91_rtc_readtime,
	.set_time	= at91_rtc_settime,
	.read_alarm	= at91_rtc_readalarm,
	.set_alarm	= at91_rtc_setalarm,
	.proc		= at91_rtc_proc,
	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
};

/*
 * Initialize and install RTC driver
 */
static int __init at91_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *regs;
	int ret = 0;

	at91_rtc_config = at91_rtc_get_config(pdev);
	if (!at91_rtc_config)
		return -ENODEV;

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_err(&pdev->dev, "no mmio resource defined\n");
		return -ENXIO;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "no irq resource defined\n");
		return -ENXIO;
	}

	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
				     resource_size(regs));
	if (!at91_rtc_regs) {
		dev_err(&pdev->dev, "failed to map registers, aborting.\n");
		return -ENOMEM;
	}

	rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc))
		return PTR_ERR(rtc);
	platform_set_drvdata(pdev, rtc);

	sclk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(sclk))
		return PTR_ERR(sclk);

	ret = clk_prepare_enable(sclk);
	if (ret) {
		dev_err(&pdev->dev, "Could not enable slow clock\n");
		return ret;
	}

	at91_rtc_write(AT91_RTC_CR, 0);
	at91_rtc_write(AT91_RTC_MR, 0);		/* 24 hour mode */

	/* Disable all interrupts */
	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);

	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
			       IRQF_SHARED | IRQF_COND_SUSPEND,
			       "at91_rtc", pdev);
	if (ret) {
		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
		goto err_clk;
	}

	/* cpu init code should really have flagged this device as
	 * being wake-capable; if it didn't, do that here.
	 */
	if (!device_can_wakeup(&pdev->dev))
		device_init_wakeup(&pdev->dev, 1);

	rtc->ops = &at91_rtc_ops;
	ret = rtc_register_device(rtc);
	if (ret)
		goto err_clk;

	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
	 * completion.
	 */
	at91_rtc_write_ier(AT91_RTC_SECEV);

	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
	return 0;

err_clk:
	clk_disable_unprepare(sclk);

	return ret;
}

/*
 * Disable and remove the RTC driver
 */
static int __exit at91_rtc_remove(struct platform_device *pdev)
{
	/* Disable all interrupts */
	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);

	clk_disable_unprepare(sclk);

	return 0;
}

static void at91_rtc_shutdown(struct platform_device *pdev)
{
	/* Disable all interrupts */
	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);
}

#ifdef CONFIG_PM_SLEEP

/* AT91RM9200 RTC Power management control */

static int at91_rtc_suspend(struct device *dev)
{
	/* this IRQ is shared with DBGU and other hardware which isn't
	 * necessarily doing PM like we are...
	 */
	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);

	at91_rtc_imr = at91_rtc_read_imr()
			& (AT91_RTC_ALARM|AT91_RTC_SECEV);
	if (at91_rtc_imr) {
		if (device_may_wakeup(dev)) {
			unsigned long flags;

			enable_irq_wake(irq);

			spin_lock_irqsave(&suspended_lock, flags);
			suspended = true;
			spin_unlock_irqrestore(&suspended_lock, flags);
		} else {
			at91_rtc_write_idr(at91_rtc_imr);
		}
	}
	return 0;
}

static int at91_rtc_resume(struct device *dev)
{
	struct rtc_device *rtc = dev_get_drvdata(dev);

	if (at91_rtc_imr) {
		if (device_may_wakeup(dev)) {
			unsigned long flags;

			spin_lock_irqsave(&suspended_lock, flags);

			if (cached_events) {
				rtc_update_irq(rtc, 1, cached_events);
				cached_events = 0;
			}

			suspended = false;
			spin_unlock_irqrestore(&suspended_lock, flags);

			disable_irq_wake(irq);
		}
		at91_rtc_write_ier(at91_rtc_imr);
	}
	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);

static struct platform_driver at91_rtc_driver = {
	.remove		= __exit_p(at91_rtc_remove),
	.shutdown	= at91_rtc_shutdown,
	.driver		= {
		.name	= "at91_rtc",
		.pm	= &at91_rtc_pm_ops,
		.of_match_table = of_match_ptr(at91_rtc_dt_ids),
	},
};

module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);

MODULE_AUTHOR("Rick Bronson");
MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_rtc");
Commit	Line	Data
788b1fc6 AV	1	/*
	2	* Real Time Clock interface for Linux on Atmel AT91RM9200
	3	*
	4	* Copyright (C) 2002 Rick Bronson
	5	*
	6	* Converted to RTC class model by Andrew Victor
	7	*
	8	* Ported to Linux 2.6 by Steven Scholz
	9	* Based on s3c2410-rtc.c Simtec Electronics
	10	*
	11	* Based on sa1100-rtc.c by Nils Faerber
	12	* Based on rtc.c by Paul Gortmaker
	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License
	16	* as published by the Free Software Foundation; either version
	17	* 2 of the License, or (at your option) any later version.
	18	*
	19	*/
	20
788b1fc6	21	#include <linux/bcd.h>
11f67a8b	22	#include <linux/clk.h>
74000eb1	23	#include <linux/completion.h>
788b1fc6 AV	24	#include <linux/interrupt.h>
788b1fc6 AV	25	#include <linux/ioctl.h>
14070ade	26	#include <linux/io.h>
74000eb1 AB	27	#include <linux/kernel.h>
74000eb1 AB	28	#include <linux/module.h>
7c1b68d4	29	#include <linux/of_device.h>
74000eb1 AB	30	#include <linux/of.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/rtc.h>
	33	#include <linux/spinlock.h>
dd1f1f39	34	#include <linux/suspend.h>
74000eb1	35	#include <linux/time.h>
8ecc0bf4	36	#include <linux/uaccess.h>
fb0d4ec4	37
75984df0	38	#include "rtc-at91rm9200.h"
d73e3cd7	39
d28bdfc5	40	#define at91_rtc_read(field) \
6da7bb1e	41	readl_relaxed(at91_rtc_regs + field)
d28bdfc5	42	#define at91_rtc_write(field, val) \
6da7bb1e	43	writel_relaxed((val), at91_rtc_regs + field)
788b1fc6	44
de645475	45	struct at91_rtc_config {
e9f08bbe	46	bool use_shadow_imr;
de645475 JH	47	};
	48
	49	static const struct at91_rtc_config *at91_rtc_config;
788b1fc6	50	static DECLARE_COMPLETION(at91_rtc_updated);
2fe121e1	51	static DECLARE_COMPLETION(at91_rtc_upd_rdy);
d28bdfc5 JCPV	52	static void __iomem *at91_rtc_regs;
d28bdfc5 JCPV	53	static int irq;
e9f08bbe JH	54	static DEFINE_SPINLOCK(at91_rtc_lock);
e9f08bbe JH	55	static u32 at91_rtc_shadow_imr;
dd1f1f39 BB	56	static bool suspended;
	57	static DEFINE_SPINLOCK(suspended_lock);
	58	static unsigned long cached_events;
	59	static u32 at91_rtc_imr;
11f67a8b	60	static struct clk *sclk;
788b1fc6	61
e304fcd0 JH	62	static void at91_rtc_write_ier(u32 mask)
e304fcd0 JH	63	{
e9f08bbe JH	64	unsigned long flags;
	65
	66	spin_lock_irqsave(&at91_rtc_lock, flags);
	67	at91_rtc_shadow_imr \|= mask;
e304fcd0	68	at91_rtc_write(AT91_RTC_IER, mask);
e9f08bbe	69	spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0 JH	70	}
	71
	72	static void at91_rtc_write_idr(u32 mask)
	73	{
e9f08bbe JH	74	unsigned long flags;
	75
	76	spin_lock_irqsave(&at91_rtc_lock, flags);
e304fcd0	77	at91_rtc_write(AT91_RTC_IDR, mask);
e9f08bbe JH	78	/*
	79	* Register read back (of any RTC-register) needed to make sure
	80	* IDR-register write has reached the peripheral before updating
	81	* shadow mask.
	82	*
	83	* Note that there is still a possibility that the mask is updated
	84	* before interrupts have actually been disabled in hardware. The only
	85	* way to be certain would be to poll the IMR-register, which is is
	86	* the very register we are trying to emulate. The register read back
	87	* is a reasonable heuristic.
	88	*/
	89	at91_rtc_read(AT91_RTC_SR);
	90	at91_rtc_shadow_imr &= ~mask;
	91	spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0 JH	92	}
	93
	94	static u32 at91_rtc_read_imr(void)
	95	{
e9f08bbe JH	96	unsigned long flags;
	97	u32 mask;
	98
	99	if (at91_rtc_config->use_shadow_imr) {
	100	spin_lock_irqsave(&at91_rtc_lock, flags);
	101	mask = at91_rtc_shadow_imr;
	102	spin_unlock_irqrestore(&at91_rtc_lock, flags);
	103	} else {
	104	mask = at91_rtc_read(AT91_RTC_IMR);
	105	}
	106
	107	return mask;
e304fcd0 JH	108	}
e304fcd0 JH	109
788b1fc6 AV	110	/*
	111	* Decode time/date into rtc_time structure
	112	*/
e7a8bb12 AM	113	static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
e7a8bb12 AM	114	struct rtc_time *tm)
788b1fc6 AV	115	{
	116	unsigned int time, date;
	117
	118	/* must read twice in case it changes */
	119	do {
d28bdfc5 JCPV	120	time = at91_rtc_read(timereg);
	121	date = at91_rtc_read(calreg);
	122	} while ((time != at91_rtc_read(timereg)) \|\|
	123	(date != at91_rtc_read(calreg)));
788b1fc6	124
fe20ba70 AB	125	tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
	126	tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
	127	tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);
788b1fc6 AV	128
	129	/*
	130	* The Calendar Alarm register does not have a field for
eaa1dc7b	131	* the year - so these will return an invalid value.
788b1fc6	132	*/
fe20ba70 AB	133	tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */
fe20ba70 AB	134	tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */
788b1fc6	135
fe20ba70 AB	136	tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */
	137	tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
	138	tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
788b1fc6 AV	139	}
	140
	141	/*
	142	* Read current time and date in RTC
	143	*/
	144	static int at91_rtc_readtime(struct device dev, struct rtc_time tm)
	145	{
	146	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
	147	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	148	tm->tm_year = tm->tm_year - 1900;
	149
6588208c	150	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12 AM	151	1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
e7a8bb12 AM	152	tm->tm_hour, tm->tm_min, tm->tm_sec);
788b1fc6 AV	153
	154	return 0;
	155	}
	156
	157	/*
	158	* Set current time and date in RTC
	159	*/
	160	static int at91_rtc_settime(struct device dev, struct rtc_time tm)
	161	{
	162	unsigned long cr;
	163
6588208c	164	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12 AM	165	1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
e7a8bb12 AM	166	tm->tm_hour, tm->tm_min, tm->tm_sec);
788b1fc6	167
2fe121e1 BB	168	wait_for_completion(&at91_rtc_upd_rdy);
2fe121e1 BB	169
788b1fc6	170	/* Stop Time/Calendar from counting */
d28bdfc5 JCPV	171	cr = at91_rtc_read(AT91_RTC_CR);
d28bdfc5 JCPV	172	at91_rtc_write(AT91_RTC_CR, cr \| AT91_RTC_UPDCAL \| AT91_RTC_UPDTIM);
788b1fc6	173
e304fcd0	174	at91_rtc_write_ier(AT91_RTC_ACKUPD);
e7a8bb12	175	wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */
e304fcd0	176	at91_rtc_write_idr(AT91_RTC_ACKUPD);
788b1fc6	177
d28bdfc5	178	at91_rtc_write(AT91_RTC_TIMR,
fe20ba70 AB	179	bin2bcd(tm->tm_sec) << 0
	180	\| bin2bcd(tm->tm_min) << 8
	181	\| bin2bcd(tm->tm_hour) << 16);
788b1fc6	182
d28bdfc5	183	at91_rtc_write(AT91_RTC_CALR,
fe20ba70 AB	184	bin2bcd((tm->tm_year + 1900) / 100) /* century */
	185	\| bin2bcd(tm->tm_year % 100) << 8 /* year */
	186	\| bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */
	187	\| bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */
	188	\| bin2bcd(tm->tm_mday) << 24);
788b1fc6 AV	189
788b1fc6 AV	190	/* Restart Time/Calendar */
d28bdfc5	191	cr = at91_rtc_read(AT91_RTC_CR);
2fe121e1	192	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
d28bdfc5	193	at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL \| AT91_RTC_UPDTIM));
2fe121e1	194	at91_rtc_write_ier(AT91_RTC_SECEV);
788b1fc6 AV	195
	196	return 0;
	197	}
	198
	199	/*
	200	* Read alarm time and date in RTC
	201	*/
	202	static int at91_rtc_readalarm(struct device dev, struct rtc_wkalrm alrm)
	203	{
	204	struct rtc_time *tm = &alrm->time;
	205
	206	at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
eaa1dc7b	207	tm->tm_year = -1;
788b1fc6	208
e304fcd0	209	alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
a2db8dfc DB	210	? 1 : 0;
a2db8dfc DB	211
eaa1dc7b AB	212	dev_dbg(dev, "%s(): %02d-%02d %02d:%02d:%02d %sabled\n", __func__,
	213	tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec,
	214	alrm->enabled ? "en" : "dis");
788b1fc6 AV	215
	216	return 0;
	217	}
	218
	219	/*
	220	* Set alarm time and date in RTC
	221	*/
	222	static int at91_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	223	{
	224	struct rtc_time tm;
	225
	226	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);
	227
eb3c2272 LP	228	tm.tm_mon = alrm->time.tm_mon;
eb3c2272 LP	229	tm.tm_mday = alrm->time.tm_mday;
788b1fc6 AV	230	tm.tm_hour = alrm->time.tm_hour;
	231	tm.tm_min = alrm->time.tm_min;
	232	tm.tm_sec = alrm->time.tm_sec;
	233
e304fcd0	234	at91_rtc_write_idr(AT91_RTC_ALARM);
d28bdfc5	235	at91_rtc_write(AT91_RTC_TIMALR,
fe20ba70 AB	236	bin2bcd(tm.tm_sec) << 0
	237	\| bin2bcd(tm.tm_min) << 8
	238	\| bin2bcd(tm.tm_hour) << 16
788b1fc6	239	\| AT91_RTC_HOUREN \| AT91_RTC_MINEN \| AT91_RTC_SECEN);
d28bdfc5	240	at91_rtc_write(AT91_RTC_CALALR,
fe20ba70 AB	241	bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */
fe20ba70 AB	242	\| bin2bcd(tm.tm_mday) << 24
788b1fc6 AV	243	\| AT91_RTC_DATEEN \| AT91_RTC_MTHEN);
788b1fc6 AV	244
449321b3	245	if (alrm->enabled) {
d28bdfc5	246	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0	247	at91_rtc_write_ier(AT91_RTC_ALARM);
449321b3	248	}
5d4675a8	249
6588208c	250	dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
eaa1dc7b	251	tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
e7a8bb12	252	tm.tm_min, tm.tm_sec);
788b1fc6 AV	253
	254	return 0;
	255	}
	256
16380c15 JS	257	static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
16380c15 JS	258	{
6588208c	259	dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);
16380c15 JS	260
16380c15 JS	261	if (enabled) {
d28bdfc5	262	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0	263	at91_rtc_write_ier(AT91_RTC_ALARM);
e24b0bfa	264	} else
e304fcd0	265	at91_rtc_write_idr(AT91_RTC_ALARM);
16380c15 JS	266
	267	return 0;
	268	}
788b1fc6 AV	269	/*
	270	* Provide additional RTC information in /proc/driver/rtc
	271	*/
	272	static int at91_rtc_proc(struct device dev, struct seq_file seq)
	273	{
e304fcd0	274	unsigned long imr = at91_rtc_read_imr();
e24b0bfa	275
e7a8bb12	276	seq_printf(seq, "update_IRQ\t: %s\n",
e24b0bfa	277	(imr & AT91_RTC_ACKUPD) ? "yes" : "no");
e7a8bb12	278	seq_printf(seq, "periodic_IRQ\t: %s\n",
e24b0bfa	279	(imr & AT91_RTC_SECEV) ? "yes" : "no");
788b1fc6 AV	280
	281	return 0;
	282	}
	283
	284	/*
	285	* IRQ handler for the RTC
	286	*/
7d12e780	287	static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
788b1fc6	288	{
e7a8bb12	289	struct platform_device *pdev = dev_id;
788b1fc6 AV	290	struct rtc_device *rtc = platform_get_drvdata(pdev);
	291	unsigned int rtsr;
	292	unsigned long events = 0;
dd1f1f39	293	int ret = IRQ_NONE;
788b1fc6	294
dd1f1f39	295	spin_lock(&suspended_lock);
e304fcd0	296	rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
788b1fc6 AV	297	if (rtsr) { /* this interrupt is shared! Is it ours? */
	298	if (rtsr & AT91_RTC_ALARM)
	299	events \|= (RTC_AF \| RTC_IRQF);
2fe121e1 BB	300	if (rtsr & AT91_RTC_SECEV) {
	301	complete(&at91_rtc_upd_rdy);
	302	at91_rtc_write_idr(AT91_RTC_SECEV);
	303	}
788b1fc6 AV	304	if (rtsr & AT91_RTC_ACKUPD)
	305	complete(&at91_rtc_updated);
	306
d28bdfc5	307	at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
788b1fc6	308
dd1f1f39 BB	309	if (!suspended) {
dd1f1f39 BB	310	rtc_update_irq(rtc, 1, events);
788b1fc6	311
dd1f1f39 BB	312	dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
	313	__func__, events >> 8, events & 0x000000FF);
	314	} else {
	315	cached_events \|= events;
	316	at91_rtc_write_idr(at91_rtc_imr);
	317	pm_system_wakeup();
	318	}
788b1fc6	319
dd1f1f39	320	ret = IRQ_HANDLED;
788b1fc6	321	}
88601683	322	spin_unlock(&suspended_lock);
dd1f1f39 BB	323
dd1f1f39 BB	324	return ret;
788b1fc6 AV	325	}
788b1fc6 AV	326
de645475 JH	327	static const struct at91_rtc_config at91rm9200_config = {
	328	};
	329
bba00e59 JH	330	static const struct at91_rtc_config at91sam9x5_config = {
	331	.use_shadow_imr = true,
	332	};
	333
de645475 JH	334	#ifdef CONFIG_OF
	335	static const struct of_device_id at91_rtc_dt_ids[] = {
	336	{
	337	.compatible = "atmel,at91rm9200-rtc",
	338	.data = &at91rm9200_config,
bba00e59 JH	339	}, {
	340	.compatible = "atmel,at91sam9x5-rtc",
	341	.data = &at91sam9x5_config,
de645475 JH	342	}, {
	343	/* sentinel */
	344	}
	345	};
	346	MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
	347	#endif
	348
	349	static const struct at91_rtc_config *
	350	at91_rtc_get_config(struct platform_device *pdev)
	351	{
	352	const struct of_device_id *match;
	353
	354	if (pdev->dev.of_node) {
	355	match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
	356	if (!match)
	357	return NULL;
	358	return (const struct at91_rtc_config *)match->data;
	359	}
	360
	361	return &at91rm9200_config;
	362	}
	363
ff8371ac	364	static const struct rtc_class_ops at91_rtc_ops = {
788b1fc6 AV	365	.read_time = at91_rtc_readtime,
	366	.set_time = at91_rtc_settime,
	367	.read_alarm = at91_rtc_readalarm,
	368	.set_alarm = at91_rtc_setalarm,
	369	.proc = at91_rtc_proc,
16380c15	370	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
788b1fc6 AV	371	};
	372
	373	/*
	374	* Initialize and install RTC driver
	375	*/
	376	static int __init at91_rtc_probe(struct platform_device *pdev)
	377	{
	378	struct rtc_device *rtc;
d28bdfc5 JCPV	379	struct resource *regs;
d28bdfc5 JCPV	380	int ret = 0;
788b1fc6	381
de645475 JH	382	at91_rtc_config = at91_rtc_get_config(pdev);
	383	if (!at91_rtc_config)
	384	return -ENODEV;
	385
d28bdfc5 JCPV	386	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	387	if (!regs) {
	388	dev_err(&pdev->dev, "no mmio resource defined\n");
	389	return -ENXIO;
	390	}
	391
	392	irq = platform_get_irq(pdev, 0);
	393	if (irq < 0) {
	394	dev_err(&pdev->dev, "no irq resource defined\n");
	395	return -ENXIO;
	396	}
	397
f3766250 SK	398	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
f3766250 SK	399	resource_size(regs));
d28bdfc5 JCPV	400	if (!at91_rtc_regs) {
	401	dev_err(&pdev->dev, "failed to map registers, aborting.\n");
	402	return -ENOMEM;
	403	}
	404
735ae205 AB	405	rtc = devm_rtc_allocate_device(&pdev->dev);
	406	if (IS_ERR(rtc))
	407	return PTR_ERR(rtc);
	408	platform_set_drvdata(pdev, rtc);
	409
11f67a8b AB	410	sclk = devm_clk_get(&pdev->dev, NULL);
	411	if (IS_ERR(sclk))
	412	return PTR_ERR(sclk);
	413
	414	ret = clk_prepare_enable(sclk);
	415	if (ret) {
	416	dev_err(&pdev->dev, "Could not enable slow clock\n");
	417	return ret;
	418	}
	419
d28bdfc5 JCPV	420	at91_rtc_write(AT91_RTC_CR, 0);
d28bdfc5 JCPV	421	at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
788b1fc6 AV	422
788b1fc6 AV	423	/* Disable all interrupts */
e304fcd0	424	at91_rtc_write_idr(AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
e7a8bb12 AM	425	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
e7a8bb12 AM	426	AT91_RTC_CALEV);
788b1fc6	427
f3766250	428	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
dd1f1f39 BB	429	IRQF_SHARED \| IRQF_COND_SUSPEND,
dd1f1f39 BB	430	"at91_rtc", pdev);
788b1fc6	431	if (ret) {
6588208c	432	dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
11f67a8b	433	goto err_clk;
788b1fc6 AV	434	}
788b1fc6 AV	435
5d4675a8 DB	436	/* cpu init code should really have flagged this device as
	437	* being wake-capable; if it didn't, do that here.
	438	*/
	439	if (!device_can_wakeup(&pdev->dev))
	440	device_init_wakeup(&pdev->dev, 1);
	441
735ae205 AB	442	rtc->ops = &at91_rtc_ops;
	443	ret = rtc_register_device(rtc);
	444	if (ret)
11f67a8b	445	goto err_clk;
788b1fc6	446
2fe121e1 BB	447	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
	448	* completion.
	449	*/
	450	at91_rtc_write_ier(AT91_RTC_SECEV);
	451
6588208c	452	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
788b1fc6	453	return 0;
11f67a8b AB	454
	455	err_clk:
	456	clk_disable_unprepare(sclk);
	457
	458	return ret;
788b1fc6 AV	459	}
	460
	461	/*
	462	* Disable and remove the RTC driver
	463	*/
5d4675a8	464	static int __exit at91_rtc_remove(struct platform_device *pdev)
788b1fc6	465	{
788b1fc6	466	/* Disable all interrupts */
e304fcd0	467	at91_rtc_write_idr(AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
e7a8bb12 AM	468	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
e7a8bb12 AM	469	AT91_RTC_CALEV);
788b1fc6	470
11f67a8b AB	471	clk_disable_unprepare(sclk);
11f67a8b AB	472
788b1fc6 AV	473	return 0;
	474	}
	475
51a0d036 JH	476	static void at91_rtc_shutdown(struct platform_device *pdev)
	477	{
	478	/* Disable all interrupts */
	479	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
	480	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
	481	AT91_RTC_CALEV);
	482	}
	483
6975a9c1	484	#ifdef CONFIG_PM_SLEEP
788b1fc6 AV	485
	486	/* AT91RM9200 RTC Power management control */
	487
dac94d9e	488	static int at91_rtc_suspend(struct device *dev)
788b1fc6	489	{
90b4d648 DB	490	/* this IRQ is shared with DBGU and other hardware which isn't
	491	* necessarily doing PM like we are...
	492	*/
921372bf WY	493	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
921372bf WY	494
e304fcd0	495	at91_rtc_imr = at91_rtc_read_imr()
e24b0bfa JH	496	& (AT91_RTC_ALARM\|AT91_RTC_SECEV);
e24b0bfa JH	497	if (at91_rtc_imr) {
dd1f1f39 BB	498	if (device_may_wakeup(dev)) {
	499	unsigned long flags;
	500
d28bdfc5	501	enable_irq_wake(irq);
dd1f1f39 BB	502
	503	spin_lock_irqsave(&suspended_lock, flags);
	504	suspended = true;
	505	spin_unlock_irqrestore(&suspended_lock, flags);
	506	} else {
e304fcd0	507	at91_rtc_write_idr(at91_rtc_imr);
dd1f1f39	508	}
e24b0bfa	509	}
788b1fc6 AV	510	return 0;
	511	}
	512
dac94d9e	513	static int at91_rtc_resume(struct device *dev)
788b1fc6	514	{
dd1f1f39 BB	515	struct rtc_device *rtc = dev_get_drvdata(dev);
dd1f1f39 BB	516
e24b0bfa	517	if (at91_rtc_imr) {
dd1f1f39 BB	518	if (device_may_wakeup(dev)) {
	519	unsigned long flags;
	520
	521	spin_lock_irqsave(&suspended_lock, flags);
	522
	523	if (cached_events) {
	524	rtc_update_irq(rtc, 1, cached_events);
	525	cached_events = 0;
	526	}
	527
	528	suspended = false;
	529	spin_unlock_irqrestore(&suspended_lock, flags);
	530
d28bdfc5	531	disable_irq_wake(irq);
dd1f1f39 BB	532	}
dd1f1f39 BB	533	at91_rtc_write_ier(at91_rtc_imr);
90b4d648	534	}
788b1fc6 AV	535	return 0;
788b1fc6 AV	536	}
788b1fc6 AV	537	#endif
788b1fc6 AV	538
6975a9c1 JH	539	static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
6975a9c1 JH	540
788b1fc6	541	static struct platform_driver at91_rtc_driver = {
5d4675a8	542	.remove = __exit_p(at91_rtc_remove),
51a0d036	543	.shutdown = at91_rtc_shutdown,
788b1fc6 AV	544	.driver = {
788b1fc6 AV	545	.name = "at91_rtc",
6975a9c1	546	.pm = &at91_rtc_pm_ops,
7c1b68d4	547	.of_match_table = of_match_ptr(at91_rtc_dt_ids),
788b1fc6 AV	548	},
	549	};
	550
ac36960f	551	module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);
788b1fc6 AV	552
	553	MODULE_AUTHOR("Rick Bronson");
	554	MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
	555	MODULE_LICENSE("GPL");
ad28a07b	556	MODULE_ALIAS("platform:at91_rtc");