[mirror_ubuntu-eoan-kernel.git] / drivers / rtc / rtc-at91rm9200.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *	Real Time Clock interface for Linux on Atmel AT91RM9200
 *
 *	Copyright (C) 2002 Rick Bronson
 *
 *	Converted to RTC class model by Andrew Victor
 *
 *	Ported to Linux 2.6 by Steven Scholz
 *	Based on s3c2410-rtc.c Simtec Electronics
 *
 *	Based on sa1100-rtc.c by Nils Faerber
 *	Based on rtc.c by Paul Gortmaker
 */

#include <linux/bcd.h>
#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/interrupt.h>
#include <linux/ioctl.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/rtc.h>
#include <linux/spinlock.h>
#include <linux/suspend.h>
#include <linux/time.h>
#include <linux/uaccess.h>

#include "rtc-at91rm9200.h"

#define at91_rtc_read(field) \
	readl_relaxed(at91_rtc_regs + field)
#define at91_rtc_write(field, val) \
	writel_relaxed((val), at91_rtc_regs + field)

struct at91_rtc_config {
	bool use_shadow_imr;
};

static const struct at91_rtc_config *at91_rtc_config;
static DECLARE_COMPLETION(at91_rtc_updated);
static DECLARE_COMPLETION(at91_rtc_upd_rdy);
static void __iomem *at91_rtc_regs;
static int irq;
static DEFINE_SPINLOCK(at91_rtc_lock);
static u32 at91_rtc_shadow_imr;
static bool suspended;
static DEFINE_SPINLOCK(suspended_lock);
static unsigned long cached_events;
static u32 at91_rtc_imr;
static struct clk *sclk;

static void at91_rtc_write_ier(u32 mask)
{
	unsigned long flags;

	spin_lock_irqsave(&at91_rtc_lock, flags);
	at91_rtc_shadow_imr |= mask;
	at91_rtc_write(AT91_RTC_IER, mask);
	spin_unlock_irqrestore(&at91_rtc_lock, flags);
}

static void at91_rtc_write_idr(u32 mask)
{
	unsigned long flags;

	spin_lock_irqsave(&at91_rtc_lock, flags);
	at91_rtc_write(AT91_RTC_IDR, mask);
	/*
	 * Register read back (of any RTC-register) needed to make sure
	 * IDR-register write has reached the peripheral before updating
	 * shadow mask.
	 *
	 * Note that there is still a possibility that the mask is updated
	 * before interrupts have actually been disabled in hardware. The only
	 * way to be certain would be to poll the IMR-register, which is is
	 * the very register we are trying to emulate. The register read back
	 * is a reasonable heuristic.
	 */
	at91_rtc_read(AT91_RTC_SR);
	at91_rtc_shadow_imr &= ~mask;
	spin_unlock_irqrestore(&at91_rtc_lock, flags);
}

static u32 at91_rtc_read_imr(void)
{
	unsigned long flags;
	u32 mask;

	if (at91_rtc_config->use_shadow_imr) {
		spin_lock_irqsave(&at91_rtc_lock, flags);
		mask = at91_rtc_shadow_imr;
		spin_unlock_irqrestore(&at91_rtc_lock, flags);
	} else {
		mask = at91_rtc_read(AT91_RTC_IMR);
	}

	return mask;
}

/*
 * Decode time/date into rtc_time structure
 */
static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
				struct rtc_time *tm)
{
	unsigned int time, date;

	/* must read twice in case it changes */
	do {
		time = at91_rtc_read(timereg);
		date = at91_rtc_read(calreg);
	} while ((time != at91_rtc_read(timereg)) ||
			(date != at91_rtc_read(calreg)));

	tm->tm_sec  = bcd2bin((time & AT91_RTC_SEC) >> 0);
	tm->tm_min  = bcd2bin((time & AT91_RTC_MIN) >> 8);
	tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);

	/*
	 * The Calendar Alarm register does not have a field for
	 * the year - so these will return an invalid value.
	 */
	tm->tm_year  = bcd2bin(date & AT91_RTC_CENT) * 100;	/* century */
	tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8);	/* year */

	tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1;	/* day of the week [0-6], Sunday=0 */
	tm->tm_mon  = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
	tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
}

/*
 * Read current time and date in RTC
 */
static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
{
	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	tm->tm_year = tm->tm_year - 1900;

	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);

	return 0;
}

/*
 * Set current time and date in RTC
 */
static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
{
	unsigned long cr;

	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);

	wait_for_completion(&at91_rtc_upd_rdy);

	/* Stop Time/Calendar from counting */
	cr = at91_rtc_read(AT91_RTC_CR);
	at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);

	at91_rtc_write_ier(AT91_RTC_ACKUPD);
	wait_for_completion(&at91_rtc_updated);	/* wait for ACKUPD interrupt */
	at91_rtc_write_idr(AT91_RTC_ACKUPD);

	at91_rtc_write(AT91_RTC_TIMR,
			  bin2bcd(tm->tm_sec) << 0
			| bin2bcd(tm->tm_min) << 8
			| bin2bcd(tm->tm_hour) << 16);

	at91_rtc_write(AT91_RTC_CALR,
			  bin2bcd((tm->tm_year + 1900) / 100)	/* century */
			| bin2bcd(tm->tm_year % 100) << 8	/* year */
			| bin2bcd(tm->tm_mon + 1) << 16		/* tm_mon starts at zero */
			| bin2bcd(tm->tm_wday + 1) << 21	/* day of the week [0-6], Sunday=0 */
			| bin2bcd(tm->tm_mday) << 24);

	/* Restart Time/Calendar */
	cr = at91_rtc_read(AT91_RTC_CR);
	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
	at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
	at91_rtc_write_ier(AT91_RTC_SECEV);

	return 0;
}

/*
 * Read alarm time and date in RTC
 */
static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time *tm = &alrm->time;

	at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
	tm->tm_year = -1;

	alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
			? 1 : 0;

	dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm,
		alrm->enabled ? "en" : "dis");

	return 0;
}

/*
 * Set alarm time and date in RTC
 */
static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time tm;

	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);

	tm.tm_mon = alrm->time.tm_mon;
	tm.tm_mday = alrm->time.tm_mday;
	tm.tm_hour = alrm->time.tm_hour;
	tm.tm_min = alrm->time.tm_min;
	tm.tm_sec = alrm->time.tm_sec;

	at91_rtc_write_idr(AT91_RTC_ALARM);
	at91_rtc_write(AT91_RTC_TIMALR,
		  bin2bcd(tm.tm_sec) << 0
		| bin2bcd(tm.tm_min) << 8
		| bin2bcd(tm.tm_hour) << 16
		| AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
	at91_rtc_write(AT91_RTC_CALALR,
		  bin2bcd(tm.tm_mon + 1) << 16		/* tm_mon starts at zero */
		| bin2bcd(tm.tm_mday) << 24
		| AT91_RTC_DATEEN | AT91_RTC_MTHEN);

	if (alrm->enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write_ier(AT91_RTC_ALARM);
	}

	dev_dbg(dev, "%s(): %ptR\n", __func__, &tm);

	return 0;
}

static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);

	if (enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write_ier(AT91_RTC_ALARM);
	} else
		at91_rtc_write_idr(AT91_RTC_ALARM);

	return 0;
}
/*
 * Provide additional RTC information in /proc/driver/rtc
 */
static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned long imr = at91_rtc_read_imr();

	seq_printf(seq, "update_IRQ\t: %s\n",
			(imr & AT91_RTC_ACKUPD) ? "yes" : "no");
	seq_printf(seq, "periodic_IRQ\t: %s\n",
			(imr & AT91_RTC_SECEV) ? "yes" : "no");

	return 0;
}

/*
 * IRQ handler for the RTC
 */
static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = dev_id;
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	unsigned int rtsr;
	unsigned long events = 0;
	int ret = IRQ_NONE;

	spin_lock(&suspended_lock);
	rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
	if (rtsr) {		/* this interrupt is shared!  Is it ours? */
		if (rtsr & AT91_RTC_ALARM)
			events |= (RTC_AF | RTC_IRQF);
		if (rtsr & AT91_RTC_SECEV) {
			complete(&at91_rtc_upd_rdy);
			at91_rtc_write_idr(AT91_RTC_SECEV);
		}
		if (rtsr & AT91_RTC_ACKUPD)
			complete(&at91_rtc_updated);

		at91_rtc_write(AT91_RTC_SCCR, rtsr);	/* clear status reg */

		if (!suspended) {
			rtc_update_irq(rtc, 1, events);

			dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
				__func__, events >> 8, events & 0x000000FF);
		} else {
			cached_events |= events;
			at91_rtc_write_idr(at91_rtc_imr);
			pm_system_wakeup();
		}

		ret = IRQ_HANDLED;
	}
	spin_unlock(&suspended_lock);

	return ret;
}

static const struct at91_rtc_config at91rm9200_config = {
};

static const struct at91_rtc_config at91sam9x5_config = {
	.use_shadow_imr	= true,
};

#ifdef CONFIG_OF
static const struct of_device_id at91_rtc_dt_ids[] = {
	{
		.compatible = "atmel,at91rm9200-rtc",
		.data = &at91rm9200_config,
	}, {
		.compatible = "atmel,at91sam9x5-rtc",
		.data = &at91sam9x5_config,
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
#endif

static const struct at91_rtc_config *
at91_rtc_get_config(struct platform_device *pdev)
{
	const struct of_device_id *match;

	if (pdev->dev.of_node) {
		match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
		if (!match)
			return NULL;
		return (const struct at91_rtc_config *)match->data;
	}

	return &at91rm9200_config;
}

static const struct rtc_class_ops at91_rtc_ops = {
	.read_time	= at91_rtc_readtime,
	.set_time	= at91_rtc_settime,
	.read_alarm	= at91_rtc_readalarm,
	.set_alarm	= at91_rtc_setalarm,
	.proc		= at91_rtc_proc,
	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
};

/*
 * Initialize and install RTC driver
 */
static int __init at91_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *regs;
	int ret = 0;

	at91_rtc_config = at91_rtc_get_config(pdev);
	if (!at91_rtc_config)
		return -ENODEV;

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_err(&pdev->dev, "no mmio resource defined\n");
		return -ENXIO;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "no irq resource defined\n");
		return -ENXIO;
	}

	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
				     resource_size(regs));
	if (!at91_rtc_regs) {
		dev_err(&pdev->dev, "failed to map registers, aborting.\n");
		return -ENOMEM;
	}

	rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc))
		return PTR_ERR(rtc);
	platform_set_drvdata(pdev, rtc);

	sclk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(sclk))
		return PTR_ERR(sclk);

	ret = clk_prepare_enable(sclk);
	if (ret) {
		dev_err(&pdev->dev, "Could not enable slow clock\n");
		return ret;
	}

	at91_rtc_write(AT91_RTC_CR, 0);
	at91_rtc_write(AT91_RTC_MR, 0);		/* 24 hour mode */

	/* Disable all interrupts */
	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);

	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
			       IRQF_SHARED | IRQF_COND_SUSPEND,
			       "at91_rtc", pdev);
	if (ret) {
		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
		goto err_clk;
	}

	/* cpu init code should really have flagged this device as
	 * being wake-capable; if it didn't, do that here.
	 */
	if (!device_can_wakeup(&pdev->dev))
		device_init_wakeup(&pdev->dev, 1);

	rtc->ops = &at91_rtc_ops;
	rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;
	rtc->range_max = RTC_TIMESTAMP_END_2099;
	ret = rtc_register_device(rtc);
	if (ret)
		goto err_clk;

	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
	 * completion.
	 */
	at91_rtc_write_ier(AT91_RTC_SECEV);

	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
	return 0;

err_clk:
	clk_disable_unprepare(sclk);

	return ret;
}

/*
 * Disable and remove the RTC driver
 */
static int __exit at91_rtc_remove(struct platform_device *pdev)
{
	/* Disable all interrupts */
	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);

	clk_disable_unprepare(sclk);

	return 0;
}

static void at91_rtc_shutdown(struct platform_device *pdev)
{
	/* Disable all interrupts */
	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);
}

#ifdef CONFIG_PM_SLEEP

/* AT91RM9200 RTC Power management control */

static int at91_rtc_suspend(struct device *dev)
{
	/* this IRQ is shared with DBGU and other hardware which isn't
	 * necessarily doing PM like we are...
	 */
	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);

	at91_rtc_imr = at91_rtc_read_imr()
			& (AT91_RTC_ALARM|AT91_RTC_SECEV);
	if (at91_rtc_imr) {
		if (device_may_wakeup(dev)) {
			unsigned long flags;

			enable_irq_wake(irq);

			spin_lock_irqsave(&suspended_lock, flags);
			suspended = true;
			spin_unlock_irqrestore(&suspended_lock, flags);
		} else {
			at91_rtc_write_idr(at91_rtc_imr);
		}
	}
	return 0;
}

static int at91_rtc_resume(struct device *dev)
{
	struct rtc_device *rtc = dev_get_drvdata(dev);

	if (at91_rtc_imr) {
		if (device_may_wakeup(dev)) {
			unsigned long flags;

			spin_lock_irqsave(&suspended_lock, flags);

			if (cached_events) {
				rtc_update_irq(rtc, 1, cached_events);
				cached_events = 0;
			}

			suspended = false;
			spin_unlock_irqrestore(&suspended_lock, flags);

			disable_irq_wake(irq);
		}
		at91_rtc_write_ier(at91_rtc_imr);
	}
	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);

static struct platform_driver at91_rtc_driver = {
	.remove		= __exit_p(at91_rtc_remove),
	.shutdown	= at91_rtc_shutdown,
	.driver		= {
		.name	= "at91_rtc",
		.pm	= &at91_rtc_pm_ops,
		.of_match_table = of_match_ptr(at91_rtc_dt_ids),
	},
};

module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);

MODULE_AUTHOR("Rick Bronson");
MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_rtc");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
788b1fc6 AV	2	/*
	3	* Real Time Clock interface for Linux on Atmel AT91RM9200
	4	*
	5	* Copyright (C) 2002 Rick Bronson
	6	*
	7	* Converted to RTC class model by Andrew Victor
	8	*
	9	* Ported to Linux 2.6 by Steven Scholz
	10	* Based on s3c2410-rtc.c Simtec Electronics
	11	*
	12	* Based on sa1100-rtc.c by Nils Faerber
	13	* Based on rtc.c by Paul Gortmaker
788b1fc6 AV	14	*/
788b1fc6 AV	15
788b1fc6	16	#include <linux/bcd.h>
11f67a8b	17	#include <linux/clk.h>
74000eb1	18	#include <linux/completion.h>
788b1fc6 AV	19	#include <linux/interrupt.h>
788b1fc6 AV	20	#include <linux/ioctl.h>
14070ade	21	#include <linux/io.h>
74000eb1 AB	22	#include <linux/kernel.h>
74000eb1 AB	23	#include <linux/module.h>
7c1b68d4	24	#include <linux/of_device.h>
74000eb1 AB	25	#include <linux/of.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/rtc.h>
	28	#include <linux/spinlock.h>
dd1f1f39	29	#include <linux/suspend.h>
74000eb1	30	#include <linux/time.h>
8ecc0bf4	31	#include <linux/uaccess.h>
fb0d4ec4	32
75984df0	33	#include "rtc-at91rm9200.h"
d73e3cd7	34
d28bdfc5	35	#define at91_rtc_read(field) \
6da7bb1e	36	readl_relaxed(at91_rtc_regs + field)
d28bdfc5	37	#define at91_rtc_write(field, val) \
6da7bb1e	38	writel_relaxed((val), at91_rtc_regs + field)
788b1fc6	39
de645475	40	struct at91_rtc_config {
e9f08bbe	41	bool use_shadow_imr;
de645475 JH	42	};
	43
	44	static const struct at91_rtc_config *at91_rtc_config;
788b1fc6	45	static DECLARE_COMPLETION(at91_rtc_updated);
2fe121e1	46	static DECLARE_COMPLETION(at91_rtc_upd_rdy);
d28bdfc5 JCPV	47	static void __iomem *at91_rtc_regs;
d28bdfc5 JCPV	48	static int irq;
e9f08bbe JH	49	static DEFINE_SPINLOCK(at91_rtc_lock);
e9f08bbe JH	50	static u32 at91_rtc_shadow_imr;
dd1f1f39 BB	51	static bool suspended;
	52	static DEFINE_SPINLOCK(suspended_lock);
	53	static unsigned long cached_events;
	54	static u32 at91_rtc_imr;
11f67a8b	55	static struct clk *sclk;
788b1fc6	56
e304fcd0 JH	57	static void at91_rtc_write_ier(u32 mask)
e304fcd0 JH	58	{
e9f08bbe JH	59	unsigned long flags;
	60
	61	spin_lock_irqsave(&at91_rtc_lock, flags);
	62	at91_rtc_shadow_imr \|= mask;
e304fcd0	63	at91_rtc_write(AT91_RTC_IER, mask);
e9f08bbe	64	spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0 JH	65	}
	66
	67	static void at91_rtc_write_idr(u32 mask)
	68	{
e9f08bbe JH	69	unsigned long flags;
	70
	71	spin_lock_irqsave(&at91_rtc_lock, flags);
e304fcd0	72	at91_rtc_write(AT91_RTC_IDR, mask);
e9f08bbe JH	73	/*
	74	* Register read back (of any RTC-register) needed to make sure
	75	* IDR-register write has reached the peripheral before updating
	76	* shadow mask.
	77	*
	78	* Note that there is still a possibility that the mask is updated
	79	* before interrupts have actually been disabled in hardware. The only
	80	* way to be certain would be to poll the IMR-register, which is is
	81	* the very register we are trying to emulate. The register read back
	82	* is a reasonable heuristic.
	83	*/
	84	at91_rtc_read(AT91_RTC_SR);
	85	at91_rtc_shadow_imr &= ~mask;
	86	spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0 JH	87	}
	88
	89	static u32 at91_rtc_read_imr(void)
	90	{
e9f08bbe JH	91	unsigned long flags;
	92	u32 mask;
	93
	94	if (at91_rtc_config->use_shadow_imr) {
	95	spin_lock_irqsave(&at91_rtc_lock, flags);
	96	mask = at91_rtc_shadow_imr;
	97	spin_unlock_irqrestore(&at91_rtc_lock, flags);
	98	} else {
	99	mask = at91_rtc_read(AT91_RTC_IMR);
	100	}
	101
	102	return mask;
e304fcd0 JH	103	}
e304fcd0 JH	104
788b1fc6 AV	105	/*
	106	* Decode time/date into rtc_time structure
	107	*/
e7a8bb12 AM	108	static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
e7a8bb12 AM	109	struct rtc_time *tm)
788b1fc6 AV	110	{
	111	unsigned int time, date;
	112
	113	/* must read twice in case it changes */
	114	do {
d28bdfc5 JCPV	115	time = at91_rtc_read(timereg);
	116	date = at91_rtc_read(calreg);
	117	} while ((time != at91_rtc_read(timereg)) \|\|
	118	(date != at91_rtc_read(calreg)));
788b1fc6	119
fe20ba70 AB	120	tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
	121	tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
	122	tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);
788b1fc6 AV	123
	124	/*
	125	* The Calendar Alarm register does not have a field for
eaa1dc7b	126	* the year - so these will return an invalid value.
788b1fc6	127	*/
fe20ba70 AB	128	tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */
fe20ba70 AB	129	tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */
788b1fc6	130
fe20ba70 AB	131	tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */
	132	tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
	133	tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
788b1fc6 AV	134	}
	135
	136	/*
	137	* Read current time and date in RTC
	138	*/
	139	static int at91_rtc_readtime(struct device dev, struct rtc_time tm)
	140	{
	141	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
	142	tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
	143	tm->tm_year = tm->tm_year - 1900;
	144
d422f883	145	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
788b1fc6 AV	146
	147	return 0;
	148	}
	149
	150	/*
	151	* Set current time and date in RTC
	152	*/
	153	static int at91_rtc_settime(struct device dev, struct rtc_time tm)
	154	{
	155	unsigned long cr;
	156
d422f883	157	dev_dbg(dev, "%s(): %ptR\n", __func__, tm);
788b1fc6	158
2fe121e1 BB	159	wait_for_completion(&at91_rtc_upd_rdy);
2fe121e1 BB	160
788b1fc6	161	/* Stop Time/Calendar from counting */
d28bdfc5 JCPV	162	cr = at91_rtc_read(AT91_RTC_CR);
d28bdfc5 JCPV	163	at91_rtc_write(AT91_RTC_CR, cr \| AT91_RTC_UPDCAL \| AT91_RTC_UPDTIM);
788b1fc6	164
e304fcd0	165	at91_rtc_write_ier(AT91_RTC_ACKUPD);
e7a8bb12	166	wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */
e304fcd0	167	at91_rtc_write_idr(AT91_RTC_ACKUPD);
788b1fc6	168
d28bdfc5	169	at91_rtc_write(AT91_RTC_TIMR,
fe20ba70 AB	170	bin2bcd(tm->tm_sec) << 0
	171	\| bin2bcd(tm->tm_min) << 8
	172	\| bin2bcd(tm->tm_hour) << 16);
788b1fc6	173
d28bdfc5	174	at91_rtc_write(AT91_RTC_CALR,
fe20ba70 AB	175	bin2bcd((tm->tm_year + 1900) / 100) /* century */
	176	\| bin2bcd(tm->tm_year % 100) << 8 /* year */
	177	\| bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */
	178	\| bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */
	179	\| bin2bcd(tm->tm_mday) << 24);
788b1fc6 AV	180
788b1fc6 AV	181	/* Restart Time/Calendar */
d28bdfc5	182	cr = at91_rtc_read(AT91_RTC_CR);
2fe121e1	183	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
d28bdfc5	184	at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL \| AT91_RTC_UPDTIM));
2fe121e1	185	at91_rtc_write_ier(AT91_RTC_SECEV);
788b1fc6 AV	186
	187	return 0;
	188	}
	189
	190	/*
	191	* Read alarm time and date in RTC
	192	*/
	193	static int at91_rtc_readalarm(struct device dev, struct rtc_wkalrm alrm)
	194	{
	195	struct rtc_time *tm = &alrm->time;
	196
	197	at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
eaa1dc7b	198	tm->tm_year = -1;
788b1fc6	199
e304fcd0	200	alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
a2db8dfc DB	201	? 1 : 0;
a2db8dfc DB	202
d422f883	203	dev_dbg(dev, "%s(): %ptR %sabled\n", __func__, tm,
eaa1dc7b	204	alrm->enabled ? "en" : "dis");
788b1fc6 AV	205
	206	return 0;
	207	}
	208
	209	/*
	210	* Set alarm time and date in RTC
	211	*/
	212	static int at91_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	213	{
	214	struct rtc_time tm;
	215
	216	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);
	217
eb3c2272 LP	218	tm.tm_mon = alrm->time.tm_mon;
eb3c2272 LP	219	tm.tm_mday = alrm->time.tm_mday;
788b1fc6 AV	220	tm.tm_hour = alrm->time.tm_hour;
	221	tm.tm_min = alrm->time.tm_min;
	222	tm.tm_sec = alrm->time.tm_sec;
	223
e304fcd0	224	at91_rtc_write_idr(AT91_RTC_ALARM);
d28bdfc5	225	at91_rtc_write(AT91_RTC_TIMALR,
fe20ba70 AB	226	bin2bcd(tm.tm_sec) << 0
	227	\| bin2bcd(tm.tm_min) << 8
	228	\| bin2bcd(tm.tm_hour) << 16
788b1fc6	229	\| AT91_RTC_HOUREN \| AT91_RTC_MINEN \| AT91_RTC_SECEN);
d28bdfc5	230	at91_rtc_write(AT91_RTC_CALALR,
fe20ba70 AB	231	bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */
fe20ba70 AB	232	\| bin2bcd(tm.tm_mday) << 24
788b1fc6 AV	233	\| AT91_RTC_DATEEN \| AT91_RTC_MTHEN);
788b1fc6 AV	234
449321b3	235	if (alrm->enabled) {
d28bdfc5	236	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0	237	at91_rtc_write_ier(AT91_RTC_ALARM);
449321b3	238	}
5d4675a8	239
d422f883	240	dev_dbg(dev, "%s(): %ptR\n", __func__, &tm);
788b1fc6 AV	241
	242	return 0;
	243	}
	244
16380c15 JS	245	static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
16380c15 JS	246	{
6588208c	247	dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);
16380c15 JS	248
16380c15 JS	249	if (enabled) {
d28bdfc5	250	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0	251	at91_rtc_write_ier(AT91_RTC_ALARM);
e24b0bfa	252	} else
e304fcd0	253	at91_rtc_write_idr(AT91_RTC_ALARM);
16380c15 JS	254
	255	return 0;
	256	}
788b1fc6 AV	257	/*
	258	* Provide additional RTC information in /proc/driver/rtc
	259	*/
	260	static int at91_rtc_proc(struct device dev, struct seq_file seq)
	261	{
e304fcd0	262	unsigned long imr = at91_rtc_read_imr();
e24b0bfa	263
e7a8bb12	264	seq_printf(seq, "update_IRQ\t: %s\n",
e24b0bfa	265	(imr & AT91_RTC_ACKUPD) ? "yes" : "no");
e7a8bb12	266	seq_printf(seq, "periodic_IRQ\t: %s\n",
e24b0bfa	267	(imr & AT91_RTC_SECEV) ? "yes" : "no");
788b1fc6 AV	268
	269	return 0;
	270	}
	271
	272	/*
	273	* IRQ handler for the RTC
	274	*/
7d12e780	275	static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
788b1fc6	276	{
e7a8bb12	277	struct platform_device *pdev = dev_id;
788b1fc6 AV	278	struct rtc_device *rtc = platform_get_drvdata(pdev);
	279	unsigned int rtsr;
	280	unsigned long events = 0;
dd1f1f39	281	int ret = IRQ_NONE;
788b1fc6	282
dd1f1f39	283	spin_lock(&suspended_lock);
e304fcd0	284	rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
788b1fc6 AV	285	if (rtsr) { /* this interrupt is shared! Is it ours? */
	286	if (rtsr & AT91_RTC_ALARM)
	287	events \|= (RTC_AF \| RTC_IRQF);
2fe121e1 BB	288	if (rtsr & AT91_RTC_SECEV) {
	289	complete(&at91_rtc_upd_rdy);
	290	at91_rtc_write_idr(AT91_RTC_SECEV);
	291	}
788b1fc6 AV	292	if (rtsr & AT91_RTC_ACKUPD)
	293	complete(&at91_rtc_updated);
	294
d28bdfc5	295	at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
788b1fc6	296
dd1f1f39 BB	297	if (!suspended) {
dd1f1f39 BB	298	rtc_update_irq(rtc, 1, events);
788b1fc6	299
dd1f1f39 BB	300	dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
	301	__func__, events >> 8, events & 0x000000FF);
	302	} else {
	303	cached_events \|= events;
	304	at91_rtc_write_idr(at91_rtc_imr);
	305	pm_system_wakeup();
	306	}
788b1fc6	307
dd1f1f39	308	ret = IRQ_HANDLED;
788b1fc6	309	}
88601683	310	spin_unlock(&suspended_lock);
dd1f1f39 BB	311
dd1f1f39 BB	312	return ret;
788b1fc6 AV	313	}
788b1fc6 AV	314
de645475 JH	315	static const struct at91_rtc_config at91rm9200_config = {
	316	};
	317
bba00e59 JH	318	static const struct at91_rtc_config at91sam9x5_config = {
	319	.use_shadow_imr = true,
	320	};
	321
de645475 JH	322	#ifdef CONFIG_OF
	323	static const struct of_device_id at91_rtc_dt_ids[] = {
	324	{
	325	.compatible = "atmel,at91rm9200-rtc",
	326	.data = &at91rm9200_config,
bba00e59 JH	327	}, {
	328	.compatible = "atmel,at91sam9x5-rtc",
	329	.data = &at91sam9x5_config,
de645475 JH	330	}, {
	331	/* sentinel */
	332	}
	333	};
	334	MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
	335	#endif
	336
	337	static const struct at91_rtc_config *
	338	at91_rtc_get_config(struct platform_device *pdev)
	339	{
	340	const struct of_device_id *match;
	341
	342	if (pdev->dev.of_node) {
	343	match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
	344	if (!match)
	345	return NULL;
	346	return (const struct at91_rtc_config *)match->data;
	347	}
	348
	349	return &at91rm9200_config;
	350	}
	351
ff8371ac	352	static const struct rtc_class_ops at91_rtc_ops = {
788b1fc6 AV	353	.read_time = at91_rtc_readtime,
	354	.set_time = at91_rtc_settime,
	355	.read_alarm = at91_rtc_readalarm,
	356	.set_alarm = at91_rtc_setalarm,
	357	.proc = at91_rtc_proc,
16380c15	358	.alarm_irq_enable = at91_rtc_alarm_irq_enable,
788b1fc6 AV	359	};
	360
	361	/*
	362	* Initialize and install RTC driver
	363	*/
	364	static int __init at91_rtc_probe(struct platform_device *pdev)
	365	{
	366	struct rtc_device *rtc;
d28bdfc5 JCPV	367	struct resource *regs;
d28bdfc5 JCPV	368	int ret = 0;
788b1fc6	369
de645475 JH	370	at91_rtc_config = at91_rtc_get_config(pdev);
	371	if (!at91_rtc_config)
	372	return -ENODEV;
	373
d28bdfc5 JCPV	374	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	375	if (!regs) {
	376	dev_err(&pdev->dev, "no mmio resource defined\n");
	377	return -ENXIO;
	378	}
	379
	380	irq = platform_get_irq(pdev, 0);
	381	if (irq < 0) {
	382	dev_err(&pdev->dev, "no irq resource defined\n");
	383	return -ENXIO;
	384	}
	385
f3766250 SK	386	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
f3766250 SK	387	resource_size(regs));
d28bdfc5 JCPV	388	if (!at91_rtc_regs) {
	389	dev_err(&pdev->dev, "failed to map registers, aborting.\n");
	390	return -ENOMEM;
	391	}
	392
735ae205 AB	393	rtc = devm_rtc_allocate_device(&pdev->dev);
	394	if (IS_ERR(rtc))
	395	return PTR_ERR(rtc);
	396	platform_set_drvdata(pdev, rtc);
	397
11f67a8b AB	398	sclk = devm_clk_get(&pdev->dev, NULL);
	399	if (IS_ERR(sclk))
	400	return PTR_ERR(sclk);
	401
	402	ret = clk_prepare_enable(sclk);
	403	if (ret) {
	404	dev_err(&pdev->dev, "Could not enable slow clock\n");
	405	return ret;
	406	}
	407
d28bdfc5 JCPV	408	at91_rtc_write(AT91_RTC_CR, 0);
d28bdfc5 JCPV	409	at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
788b1fc6 AV	410
788b1fc6 AV	411	/* Disable all interrupts */
e304fcd0	412	at91_rtc_write_idr(AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
e7a8bb12 AM	413	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
e7a8bb12 AM	414	AT91_RTC_CALEV);
788b1fc6	415
f3766250	416	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
dd1f1f39 BB	417	IRQF_SHARED \| IRQF_COND_SUSPEND,
dd1f1f39 BB	418	"at91_rtc", pdev);
788b1fc6	419	if (ret) {
6588208c	420	dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
11f67a8b	421	goto err_clk;
788b1fc6 AV	422	}
788b1fc6 AV	423
5d4675a8 DB	424	/* cpu init code should really have flagged this device as
	425	* being wake-capable; if it didn't, do that here.
	426	*/
	427	if (!device_can_wakeup(&pdev->dev))
	428	device_init_wakeup(&pdev->dev, 1);
	429
735ae205	430	rtc->ops = &at91_rtc_ops;
6c78a872 AB	431	rtc->range_min = RTC_TIMESTAMP_BEGIN_1900;
6c78a872 AB	432	rtc->range_max = RTC_TIMESTAMP_END_2099;
735ae205 AB	433	ret = rtc_register_device(rtc);
735ae205 AB	434	if (ret)
11f67a8b	435	goto err_clk;
788b1fc6	436
2fe121e1 BB	437	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
	438	* completion.
	439	*/
	440	at91_rtc_write_ier(AT91_RTC_SECEV);
	441
6588208c	442	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
788b1fc6	443	return 0;
11f67a8b AB	444
	445	err_clk:
	446	clk_disable_unprepare(sclk);
	447
	448	return ret;
788b1fc6 AV	449	}
	450
	451	/*
	452	* Disable and remove the RTC driver
	453	*/
5d4675a8	454	static int __exit at91_rtc_remove(struct platform_device *pdev)
788b1fc6	455	{
788b1fc6	456	/* Disable all interrupts */
e304fcd0	457	at91_rtc_write_idr(AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
e7a8bb12 AM	458	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
e7a8bb12 AM	459	AT91_RTC_CALEV);
788b1fc6	460
11f67a8b AB	461	clk_disable_unprepare(sclk);
11f67a8b AB	462
788b1fc6 AV	463	return 0;
	464	}
	465
51a0d036 JH	466	static void at91_rtc_shutdown(struct platform_device *pdev)
	467	{
	468	/* Disable all interrupts */
	469	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD \| AT91_RTC_ALARM \|
	470	AT91_RTC_SECEV \| AT91_RTC_TIMEV \|
	471	AT91_RTC_CALEV);
	472	}
	473
6975a9c1	474	#ifdef CONFIG_PM_SLEEP
788b1fc6 AV	475
	476	/* AT91RM9200 RTC Power management control */
	477
dac94d9e	478	static int at91_rtc_suspend(struct device *dev)
788b1fc6	479	{
90b4d648 DB	480	/* this IRQ is shared with DBGU and other hardware which isn't
	481	* necessarily doing PM like we are...
	482	*/
921372bf WY	483	at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
921372bf WY	484
e304fcd0	485	at91_rtc_imr = at91_rtc_read_imr()
e24b0bfa JH	486	& (AT91_RTC_ALARM\|AT91_RTC_SECEV);
e24b0bfa JH	487	if (at91_rtc_imr) {
dd1f1f39 BB	488	if (device_may_wakeup(dev)) {
	489	unsigned long flags;
	490
d28bdfc5	491	enable_irq_wake(irq);
dd1f1f39 BB	492
	493	spin_lock_irqsave(&suspended_lock, flags);
	494	suspended = true;
	495	spin_unlock_irqrestore(&suspended_lock, flags);
	496	} else {
e304fcd0	497	at91_rtc_write_idr(at91_rtc_imr);
dd1f1f39	498	}
e24b0bfa	499	}
788b1fc6 AV	500	return 0;
	501	}
	502
dac94d9e	503	static int at91_rtc_resume(struct device *dev)
788b1fc6	504	{
dd1f1f39 BB	505	struct rtc_device *rtc = dev_get_drvdata(dev);
dd1f1f39 BB	506
e24b0bfa	507	if (at91_rtc_imr) {
dd1f1f39 BB	508	if (device_may_wakeup(dev)) {
	509	unsigned long flags;
	510
	511	spin_lock_irqsave(&suspended_lock, flags);
	512
	513	if (cached_events) {
	514	rtc_update_irq(rtc, 1, cached_events);
	515	cached_events = 0;
	516	}
	517
	518	suspended = false;
	519	spin_unlock_irqrestore(&suspended_lock, flags);
	520
d28bdfc5	521	disable_irq_wake(irq);
dd1f1f39 BB	522	}
dd1f1f39 BB	523	at91_rtc_write_ier(at91_rtc_imr);
90b4d648	524	}
788b1fc6 AV	525	return 0;
788b1fc6 AV	526	}
788b1fc6 AV	527	#endif
788b1fc6 AV	528
6975a9c1 JH	529	static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
6975a9c1 JH	530
788b1fc6	531	static struct platform_driver at91_rtc_driver = {
5d4675a8	532	.remove = __exit_p(at91_rtc_remove),
51a0d036	533	.shutdown = at91_rtc_shutdown,
788b1fc6 AV	534	.driver = {
788b1fc6 AV	535	.name = "at91_rtc",
6975a9c1	536	.pm = &at91_rtc_pm_ops,
7c1b68d4	537	.of_match_table = of_match_ptr(at91_rtc_dt_ids),
788b1fc6 AV	538	},
	539	};
	540
ac36960f	541	module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);
788b1fc6 AV	542
	543	MODULE_AUTHOR("Rick Bronson");
	544	MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
	545	MODULE_LICENSE("GPL");
ad28a07b	546	MODULE_ALIAS("platform:at91_rtc");