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CommitLineData
788b1fc6
AV
1/*
2 * Real Time Clock interface for Linux on Atmel AT91RM9200
3 *
4 * Copyright (C) 2002 Rick Bronson
5 *
6 * Converted to RTC class model by Andrew Victor
7 *
8 * Ported to Linux 2.6 by Steven Scholz
9 * Based on s3c2410-rtc.c Simtec Electronics
10 *
11 * Based on sa1100-rtc.c by Nils Faerber
12 * Based on rtc.c by Paul Gortmaker
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 *
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/platform_device.h>
24#include <linux/time.h>
25#include <linux/rtc.h>
26#include <linux/bcd.h>
27#include <linux/interrupt.h>
e9f08bbe 28#include <linux/spinlock.h>
788b1fc6
AV
29#include <linux/ioctl.h>
30#include <linux/completion.h>
14070ade 31#include <linux/io.h>
7c1b68d4
JE
32#include <linux/of.h>
33#include <linux/of_device.h>
dd1f1f39 34#include <linux/suspend.h>
8ecc0bf4 35#include <linux/uaccess.h>
fb0d4ec4 36
75984df0 37#include "rtc-at91rm9200.h"
d73e3cd7 38
d28bdfc5 39#define at91_rtc_read(field) \
6da7bb1e 40 readl_relaxed(at91_rtc_regs + field)
d28bdfc5 41#define at91_rtc_write(field, val) \
6da7bb1e 42 writel_relaxed((val), at91_rtc_regs + field)
788b1fc6 43
788b1fc6
AV
44#define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */
45
de645475 46struct at91_rtc_config {
e9f08bbe 47 bool use_shadow_imr;
de645475
JH
48};
49
50static const struct at91_rtc_config *at91_rtc_config;
788b1fc6 51static DECLARE_COMPLETION(at91_rtc_updated);
2fe121e1 52static DECLARE_COMPLETION(at91_rtc_upd_rdy);
788b1fc6 53static unsigned int at91_alarm_year = AT91_RTC_EPOCH;
d28bdfc5
JCPV
54static void __iomem *at91_rtc_regs;
55static int irq;
e9f08bbe
JH
56static DEFINE_SPINLOCK(at91_rtc_lock);
57static u32 at91_rtc_shadow_imr;
dd1f1f39
BB
58static bool suspended;
59static DEFINE_SPINLOCK(suspended_lock);
60static unsigned long cached_events;
61static u32 at91_rtc_imr;
788b1fc6 62
e304fcd0
JH
63static void at91_rtc_write_ier(u32 mask)
64{
e9f08bbe
JH
65 unsigned long flags;
66
67 spin_lock_irqsave(&at91_rtc_lock, flags);
68 at91_rtc_shadow_imr |= mask;
e304fcd0 69 at91_rtc_write(AT91_RTC_IER, mask);
e9f08bbe 70 spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0
JH
71}
72
73static void at91_rtc_write_idr(u32 mask)
74{
e9f08bbe
JH
75 unsigned long flags;
76
77 spin_lock_irqsave(&at91_rtc_lock, flags);
e304fcd0 78 at91_rtc_write(AT91_RTC_IDR, mask);
e9f08bbe
JH
79 /*
80 * Register read back (of any RTC-register) needed to make sure
81 * IDR-register write has reached the peripheral before updating
82 * shadow mask.
83 *
84 * Note that there is still a possibility that the mask is updated
85 * before interrupts have actually been disabled in hardware. The only
86 * way to be certain would be to poll the IMR-register, which is is
87 * the very register we are trying to emulate. The register read back
88 * is a reasonable heuristic.
89 */
90 at91_rtc_read(AT91_RTC_SR);
91 at91_rtc_shadow_imr &= ~mask;
92 spin_unlock_irqrestore(&at91_rtc_lock, flags);
e304fcd0
JH
93}
94
95static u32 at91_rtc_read_imr(void)
96{
e9f08bbe
JH
97 unsigned long flags;
98 u32 mask;
99
100 if (at91_rtc_config->use_shadow_imr) {
101 spin_lock_irqsave(&at91_rtc_lock, flags);
102 mask = at91_rtc_shadow_imr;
103 spin_unlock_irqrestore(&at91_rtc_lock, flags);
104 } else {
105 mask = at91_rtc_read(AT91_RTC_IMR);
106 }
107
108 return mask;
e304fcd0
JH
109}
110
788b1fc6
AV
111/*
112 * Decode time/date into rtc_time structure
113 */
e7a8bb12
AM
114static void at91_rtc_decodetime(unsigned int timereg, unsigned int calreg,
115 struct rtc_time *tm)
788b1fc6
AV
116{
117 unsigned int time, date;
118
119 /* must read twice in case it changes */
120 do {
d28bdfc5
JCPV
121 time = at91_rtc_read(timereg);
122 date = at91_rtc_read(calreg);
123 } while ((time != at91_rtc_read(timereg)) ||
124 (date != at91_rtc_read(calreg)));
788b1fc6 125
fe20ba70
AB
126 tm->tm_sec = bcd2bin((time & AT91_RTC_SEC) >> 0);
127 tm->tm_min = bcd2bin((time & AT91_RTC_MIN) >> 8);
128 tm->tm_hour = bcd2bin((time & AT91_RTC_HOUR) >> 16);
788b1fc6
AV
129
130 /*
131 * The Calendar Alarm register does not have a field for
132 * the year - so these will return an invalid value. When an
25985edc 133 * alarm is set, at91_alarm_year will store the current year.
788b1fc6 134 */
fe20ba70
AB
135 tm->tm_year = bcd2bin(date & AT91_RTC_CENT) * 100; /* century */
136 tm->tm_year += bcd2bin((date & AT91_RTC_YEAR) >> 8); /* year */
788b1fc6 137
fe20ba70
AB
138 tm->tm_wday = bcd2bin((date & AT91_RTC_DAY) >> 21) - 1; /* day of the week [0-6], Sunday=0 */
139 tm->tm_mon = bcd2bin((date & AT91_RTC_MONTH) >> 16) - 1;
140 tm->tm_mday = bcd2bin((date & AT91_RTC_DATE) >> 24);
788b1fc6
AV
141}
142
143/*
144 * Read current time and date in RTC
145 */
146static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
147{
148 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, tm);
149 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
150 tm->tm_year = tm->tm_year - 1900;
151
6588208c 152 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12
AM
153 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
154 tm->tm_hour, tm->tm_min, tm->tm_sec);
788b1fc6
AV
155
156 return 0;
157}
158
159/*
160 * Set current time and date in RTC
161 */
162static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
163{
164 unsigned long cr;
165
6588208c 166 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12
AM
167 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
168 tm->tm_hour, tm->tm_min, tm->tm_sec);
788b1fc6 169
2fe121e1
BB
170 wait_for_completion(&at91_rtc_upd_rdy);
171
788b1fc6 172 /* Stop Time/Calendar from counting */
d28bdfc5
JCPV
173 cr = at91_rtc_read(AT91_RTC_CR);
174 at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);
788b1fc6 175
e304fcd0 176 at91_rtc_write_ier(AT91_RTC_ACKUPD);
e7a8bb12 177 wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */
e304fcd0 178 at91_rtc_write_idr(AT91_RTC_ACKUPD);
788b1fc6 179
d28bdfc5 180 at91_rtc_write(AT91_RTC_TIMR,
fe20ba70
AB
181 bin2bcd(tm->tm_sec) << 0
182 | bin2bcd(tm->tm_min) << 8
183 | bin2bcd(tm->tm_hour) << 16);
788b1fc6 184
d28bdfc5 185 at91_rtc_write(AT91_RTC_CALR,
fe20ba70
AB
186 bin2bcd((tm->tm_year + 1900) / 100) /* century */
187 | bin2bcd(tm->tm_year % 100) << 8 /* year */
188 | bin2bcd(tm->tm_mon + 1) << 16 /* tm_mon starts at zero */
189 | bin2bcd(tm->tm_wday + 1) << 21 /* day of the week [0-6], Sunday=0 */
190 | bin2bcd(tm->tm_mday) << 24);
788b1fc6
AV
191
192 /* Restart Time/Calendar */
d28bdfc5 193 cr = at91_rtc_read(AT91_RTC_CR);
2fe121e1 194 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_SECEV);
d28bdfc5 195 at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));
2fe121e1 196 at91_rtc_write_ier(AT91_RTC_SECEV);
788b1fc6
AV
197
198 return 0;
199}
200
201/*
202 * Read alarm time and date in RTC
203 */
204static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
205{
206 struct rtc_time *tm = &alrm->time;
207
208 at91_rtc_decodetime(AT91_RTC_TIMALR, AT91_RTC_CALALR, tm);
209 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
210 tm->tm_year = at91_alarm_year - 1900;
211
e304fcd0 212 alrm->enabled = (at91_rtc_read_imr() & AT91_RTC_ALARM)
a2db8dfc
DB
213 ? 1 : 0;
214
6588208c 215 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12
AM
216 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
217 tm->tm_hour, tm->tm_min, tm->tm_sec);
788b1fc6
AV
218
219 return 0;
220}
221
222/*
223 * Set alarm time and date in RTC
224 */
225static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
226{
227 struct rtc_time tm;
228
229 at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);
230
231 at91_alarm_year = tm.tm_year;
232
eb3c2272
LP
233 tm.tm_mon = alrm->time.tm_mon;
234 tm.tm_mday = alrm->time.tm_mday;
788b1fc6
AV
235 tm.tm_hour = alrm->time.tm_hour;
236 tm.tm_min = alrm->time.tm_min;
237 tm.tm_sec = alrm->time.tm_sec;
238
e304fcd0 239 at91_rtc_write_idr(AT91_RTC_ALARM);
d28bdfc5 240 at91_rtc_write(AT91_RTC_TIMALR,
fe20ba70
AB
241 bin2bcd(tm.tm_sec) << 0
242 | bin2bcd(tm.tm_min) << 8
243 | bin2bcd(tm.tm_hour) << 16
788b1fc6 244 | AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
d28bdfc5 245 at91_rtc_write(AT91_RTC_CALALR,
fe20ba70
AB
246 bin2bcd(tm.tm_mon + 1) << 16 /* tm_mon starts at zero */
247 | bin2bcd(tm.tm_mday) << 24
788b1fc6
AV
248 | AT91_RTC_DATEEN | AT91_RTC_MTHEN);
249
449321b3 250 if (alrm->enabled) {
d28bdfc5 251 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0 252 at91_rtc_write_ier(AT91_RTC_ALARM);
449321b3 253 }
5d4675a8 254
6588208c 255 dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
e7a8bb12
AM
256 at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
257 tm.tm_min, tm.tm_sec);
788b1fc6
AV
258
259 return 0;
260}
261
16380c15
JS
262static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
263{
6588208c 264 dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);
16380c15
JS
265
266 if (enabled) {
d28bdfc5 267 at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
e304fcd0 268 at91_rtc_write_ier(AT91_RTC_ALARM);
e24b0bfa 269 } else
e304fcd0 270 at91_rtc_write_idr(AT91_RTC_ALARM);
16380c15
JS
271
272 return 0;
273}
788b1fc6
AV
274/*
275 * Provide additional RTC information in /proc/driver/rtc
276 */
277static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
278{
e304fcd0 279 unsigned long imr = at91_rtc_read_imr();
e24b0bfa 280
e7a8bb12 281 seq_printf(seq, "update_IRQ\t: %s\n",
e24b0bfa 282 (imr & AT91_RTC_ACKUPD) ? "yes" : "no");
e7a8bb12 283 seq_printf(seq, "periodic_IRQ\t: %s\n",
e24b0bfa 284 (imr & AT91_RTC_SECEV) ? "yes" : "no");
788b1fc6
AV
285
286 return 0;
287}
288
289/*
290 * IRQ handler for the RTC
291 */
7d12e780 292static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
788b1fc6 293{
e7a8bb12 294 struct platform_device *pdev = dev_id;
788b1fc6
AV
295 struct rtc_device *rtc = platform_get_drvdata(pdev);
296 unsigned int rtsr;
297 unsigned long events = 0;
dd1f1f39 298 int ret = IRQ_NONE;
788b1fc6 299
dd1f1f39 300 spin_lock(&suspended_lock);
e304fcd0 301 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
788b1fc6
AV
302 if (rtsr) { /* this interrupt is shared! Is it ours? */
303 if (rtsr & AT91_RTC_ALARM)
304 events |= (RTC_AF | RTC_IRQF);
2fe121e1
BB
305 if (rtsr & AT91_RTC_SECEV) {
306 complete(&at91_rtc_upd_rdy);
307 at91_rtc_write_idr(AT91_RTC_SECEV);
308 }
788b1fc6
AV
309 if (rtsr & AT91_RTC_ACKUPD)
310 complete(&at91_rtc_updated);
311
d28bdfc5 312 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
788b1fc6 313
dd1f1f39
BB
314 if (!suspended) {
315 rtc_update_irq(rtc, 1, events);
788b1fc6 316
dd1f1f39
BB
317 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
318 __func__, events >> 8, events & 0x000000FF);
319 } else {
320 cached_events |= events;
321 at91_rtc_write_idr(at91_rtc_imr);
322 pm_system_wakeup();
323 }
788b1fc6 324
dd1f1f39 325 ret = IRQ_HANDLED;
788b1fc6 326 }
88601683 327 spin_unlock(&suspended_lock);
dd1f1f39
BB
328
329 return ret;
788b1fc6
AV
330}
331
de645475
JH
332static const struct at91_rtc_config at91rm9200_config = {
333};
334
bba00e59
JH
335static const struct at91_rtc_config at91sam9x5_config = {
336 .use_shadow_imr = true,
337};
338
de645475
JH
339#ifdef CONFIG_OF
340static const struct of_device_id at91_rtc_dt_ids[] = {
341 {
342 .compatible = "atmel,at91rm9200-rtc",
343 .data = &at91rm9200_config,
bba00e59
JH
344 }, {
345 .compatible = "atmel,at91sam9x5-rtc",
346 .data = &at91sam9x5_config,
de645475
JH
347 }, {
348 /* sentinel */
349 }
350};
351MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
352#endif
353
354static const struct at91_rtc_config *
355at91_rtc_get_config(struct platform_device *pdev)
356{
357 const struct of_device_id *match;
358
359 if (pdev->dev.of_node) {
360 match = of_match_node(at91_rtc_dt_ids, pdev->dev.of_node);
361 if (!match)
362 return NULL;
363 return (const struct at91_rtc_config *)match->data;
364 }
365
366 return &at91rm9200_config;
367}
368
ff8371ac 369static const struct rtc_class_ops at91_rtc_ops = {
788b1fc6
AV
370 .read_time = at91_rtc_readtime,
371 .set_time = at91_rtc_settime,
372 .read_alarm = at91_rtc_readalarm,
373 .set_alarm = at91_rtc_setalarm,
374 .proc = at91_rtc_proc,
16380c15 375 .alarm_irq_enable = at91_rtc_alarm_irq_enable,
788b1fc6
AV
376};
377
378/*
379 * Initialize and install RTC driver
380 */
381static int __init at91_rtc_probe(struct platform_device *pdev)
382{
383 struct rtc_device *rtc;
d28bdfc5
JCPV
384 struct resource *regs;
385 int ret = 0;
788b1fc6 386
de645475
JH
387 at91_rtc_config = at91_rtc_get_config(pdev);
388 if (!at91_rtc_config)
389 return -ENODEV;
390
d28bdfc5
JCPV
391 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
392 if (!regs) {
393 dev_err(&pdev->dev, "no mmio resource defined\n");
394 return -ENXIO;
395 }
396
397 irq = platform_get_irq(pdev, 0);
398 if (irq < 0) {
399 dev_err(&pdev->dev, "no irq resource defined\n");
400 return -ENXIO;
401 }
402
f3766250
SK
403 at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
404 resource_size(regs));
d28bdfc5
JCPV
405 if (!at91_rtc_regs) {
406 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
407 return -ENOMEM;
408 }
409
410 at91_rtc_write(AT91_RTC_CR, 0);
411 at91_rtc_write(AT91_RTC_MR, 0); /* 24 hour mode */
788b1fc6
AV
412
413 /* Disable all interrupts */
e304fcd0 414 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
e7a8bb12
AM
415 AT91_RTC_SECEV | AT91_RTC_TIMEV |
416 AT91_RTC_CALEV);
788b1fc6 417
f3766250 418 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
dd1f1f39
BB
419 IRQF_SHARED | IRQF_COND_SUSPEND,
420 "at91_rtc", pdev);
788b1fc6 421 if (ret) {
6588208c 422 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
f3766250 423 return ret;
788b1fc6
AV
424 }
425
5d4675a8
DB
426 /* cpu init code should really have flagged this device as
427 * being wake-capable; if it didn't, do that here.
428 */
429 if (!device_can_wakeup(&pdev->dev))
430 device_init_wakeup(&pdev->dev, 1);
431
f3766250 432 rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
e7a8bb12 433 &at91_rtc_ops, THIS_MODULE);
f3766250
SK
434 if (IS_ERR(rtc))
435 return PTR_ERR(rtc);
788b1fc6
AV
436 platform_set_drvdata(pdev, rtc);
437
2fe121e1
BB
438 /* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
439 * completion.
440 */
441 at91_rtc_write_ier(AT91_RTC_SECEV);
442
6588208c 443 dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
788b1fc6
AV
444 return 0;
445}
446
447/*
448 * Disable and remove the RTC driver
449 */
5d4675a8 450static int __exit at91_rtc_remove(struct platform_device *pdev)
788b1fc6 451{
788b1fc6 452 /* Disable all interrupts */
e304fcd0 453 at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
e7a8bb12
AM
454 AT91_RTC_SECEV | AT91_RTC_TIMEV |
455 AT91_RTC_CALEV);
788b1fc6
AV
456
457 return 0;
458}
459
51a0d036
JH
460static void at91_rtc_shutdown(struct platform_device *pdev)
461{
462 /* Disable all interrupts */
463 at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
464 AT91_RTC_SECEV | AT91_RTC_TIMEV |
465 AT91_RTC_CALEV);
466}
467
6975a9c1 468#ifdef CONFIG_PM_SLEEP
788b1fc6
AV
469
470/* AT91RM9200 RTC Power management control */
471
dac94d9e 472static int at91_rtc_suspend(struct device *dev)
788b1fc6 473{
90b4d648
DB
474 /* this IRQ is shared with DBGU and other hardware which isn't
475 * necessarily doing PM like we are...
476 */
e304fcd0 477 at91_rtc_imr = at91_rtc_read_imr()
e24b0bfa
JH
478 & (AT91_RTC_ALARM|AT91_RTC_SECEV);
479 if (at91_rtc_imr) {
dd1f1f39
BB
480 if (device_may_wakeup(dev)) {
481 unsigned long flags;
482
d28bdfc5 483 enable_irq_wake(irq);
dd1f1f39
BB
484
485 spin_lock_irqsave(&suspended_lock, flags);
486 suspended = true;
487 spin_unlock_irqrestore(&suspended_lock, flags);
488 } else {
e304fcd0 489 at91_rtc_write_idr(at91_rtc_imr);
dd1f1f39 490 }
e24b0bfa 491 }
788b1fc6
AV
492 return 0;
493}
494
dac94d9e 495static int at91_rtc_resume(struct device *dev)
788b1fc6 496{
dd1f1f39
BB
497 struct rtc_device *rtc = dev_get_drvdata(dev);
498
e24b0bfa 499 if (at91_rtc_imr) {
dd1f1f39
BB
500 if (device_may_wakeup(dev)) {
501 unsigned long flags;
502
503 spin_lock_irqsave(&suspended_lock, flags);
504
505 if (cached_events) {
506 rtc_update_irq(rtc, 1, cached_events);
507 cached_events = 0;
508 }
509
510 suspended = false;
511 spin_unlock_irqrestore(&suspended_lock, flags);
512
d28bdfc5 513 disable_irq_wake(irq);
dd1f1f39
BB
514 }
515 at91_rtc_write_ier(at91_rtc_imr);
90b4d648 516 }
788b1fc6
AV
517 return 0;
518}
788b1fc6
AV
519#endif
520
6975a9c1
JH
521static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
522
788b1fc6 523static struct platform_driver at91_rtc_driver = {
5d4675a8 524 .remove = __exit_p(at91_rtc_remove),
51a0d036 525 .shutdown = at91_rtc_shutdown,
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526 .driver = {
527 .name = "at91_rtc",
6975a9c1 528 .pm = &at91_rtc_pm_ops,
7c1b68d4 529 .of_match_table = of_match_ptr(at91_rtc_dt_ids),
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530 },
531};
532
ac36960f 533module_platform_driver_probe(at91_rtc_driver, at91_rtc_probe);
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534
535MODULE_AUTHOR("Rick Bronson");
536MODULE_DESCRIPTION("RTC driver for Atmel AT91RM9200");
537MODULE_LICENSE("GPL");
ad28a07b 538MODULE_ALIAS("platform:at91_rtc");