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[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-cmos.c
CommitLineData
7be2c7c9
DB
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
a737e835
JP
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
7be2c7c9
DB
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <linux/spinlock.h>
39#include <linux/platform_device.h>
5d2a5037 40#include <linux/log2.h>
2fb08e6c 41#include <linux/pm.h>
3bcbaf6e
SAS
42#include <linux/of.h>
43#include <linux/of_platform.h>
a1e23a42
HG
44#ifdef CONFIG_X86
45#include <asm/i8259.h>
46#endif
7be2c7c9
DB
47
48/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
5ab788d7 49#include <linux/mc146818rtc.h>
7be2c7c9 50
7be2c7c9
DB
51struct cmos_rtc {
52 struct rtc_device *rtc;
53 struct device *dev;
54 int irq;
55 struct resource *iomem;
88b8d33b 56 time64_t alarm_expires;
7be2c7c9 57
87ac84f4
DB
58 void (*wake_on)(struct device *);
59 void (*wake_off)(struct device *);
60
61 u8 enabled_wake;
7be2c7c9
DB
62 u8 suspend_ctrl;
63
64 /* newer hardware extends the original register set */
65 u8 day_alrm;
66 u8 mon_alrm;
67 u8 century;
68669d55
GM
68
69 struct rtc_wkalrm saved_wkalrm;
7be2c7c9
DB
70};
71
72/* both platform and pnp busses use negative numbers for invalid irqs */
2fac6674 73#define is_valid_irq(n) ((n) > 0)
7be2c7c9
DB
74
75static const char driver_name[] = "rtc_cmos";
76
bcd9b89c
DB
77/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
78 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
79 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
80 */
81#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
82
83static inline int is_intr(u8 rtc_intr)
84{
85 if (!(rtc_intr & RTC_IRQF))
86 return 0;
87 return rtc_intr & RTC_IRQMASK;
88}
89
7be2c7c9
DB
90/*----------------------------------------------------------------*/
91
35d3fdd5
DB
92/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
93 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
94 * used in a broken "legacy replacement" mode. The breakage includes
95 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
96 * other (better) use.
97 *
98 * When that broken mode is in use, platform glue provides a partial
99 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
100 * want to use HPET for anything except those IRQs though...
101 */
102#ifdef CONFIG_HPET_EMULATE_RTC
103#include <asm/hpet.h>
104#else
105
106static inline int is_hpet_enabled(void)
107{
108 return 0;
109}
110
111static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
112{
113 return 0;
114}
115
116static inline int hpet_set_rtc_irq_bit(unsigned long mask)
117{
118 return 0;
119}
120
121static inline int
122hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
123{
124 return 0;
125}
126
127static inline int hpet_set_periodic_freq(unsigned long freq)
128{
129 return 0;
130}
131
132static inline int hpet_rtc_dropped_irq(void)
133{
134 return 0;
135}
136
137static inline int hpet_rtc_timer_init(void)
138{
139 return 0;
140}
141
142extern irq_handler_t hpet_rtc_interrupt;
143
144static inline int hpet_register_irq_handler(irq_handler_t handler)
145{
146 return 0;
147}
148
149static inline int hpet_unregister_irq_handler(irq_handler_t handler)
150{
151 return 0;
152}
153
154#endif
155
156/*----------------------------------------------------------------*/
157
c8fc40cd
DB
158#ifdef RTC_PORT
159
160/* Most newer x86 systems have two register banks, the first used
161 * for RTC and NVRAM and the second only for NVRAM. Caller must
162 * own rtc_lock ... and we won't worry about access during NMI.
163 */
164#define can_bank2 true
165
166static inline unsigned char cmos_read_bank2(unsigned char addr)
167{
168 outb(addr, RTC_PORT(2));
169 return inb(RTC_PORT(3));
170}
171
172static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
173{
174 outb(addr, RTC_PORT(2));
b43c1ea4 175 outb(val, RTC_PORT(3));
c8fc40cd
DB
176}
177
178#else
179
180#define can_bank2 false
181
182static inline unsigned char cmos_read_bank2(unsigned char addr)
183{
184 return 0;
185}
186
187static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
188{
189}
190
191#endif
192
193/*----------------------------------------------------------------*/
194
7be2c7c9
DB
195static int cmos_read_time(struct device *dev, struct rtc_time *t)
196{
ba58d102
CY
197 /*
198 * If pm_trace abused the RTC for storage, set the timespec to 0,
199 * which tells the caller that this RTC value is unusable.
200 */
201 if (!pm_trace_rtc_valid())
202 return -EIO;
203
7be2c7c9 204 /* REVISIT: if the clock has a "century" register, use
5ab788d7 205 * that instead of the heuristic in mc146818_get_time().
7be2c7c9
DB
206 * That'll make Y3K compatility (year > 2070) easy!
207 */
5ab788d7 208 mc146818_get_time(t);
7be2c7c9
DB
209 return 0;
210}
211
212static int cmos_set_time(struct device *dev, struct rtc_time *t)
213{
214 /* REVISIT: set the "century" register if available
215 *
216 * NOTE: this ignores the issue whereby updating the seconds
217 * takes effect exactly 500ms after we write the register.
218 * (Also queueing and other delays before we get this far.)
219 */
5ab788d7 220 return mc146818_set_time(t);
7be2c7c9
DB
221}
222
223static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
224{
225 struct cmos_rtc *cmos = dev_get_drvdata(dev);
226 unsigned char rtc_control;
227
228 if (!is_valid_irq(cmos->irq))
229 return -EIO;
230
231 /* Basic alarms only support hour, minute, and seconds fields.
232 * Some also support day and month, for alarms up to a year in
233 * the future.
234 */
7be2c7c9
DB
235
236 spin_lock_irq(&rtc_lock);
237 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
238 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
239 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
240
241 if (cmos->day_alrm) {
615bb29c
ML
242 /* ignore upper bits on readback per ACPI spec */
243 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
7be2c7c9
DB
244 if (!t->time.tm_mday)
245 t->time.tm_mday = -1;
246
247 if (cmos->mon_alrm) {
248 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
249 if (!t->time.tm_mon)
250 t->time.tm_mon = -1;
251 }
252 }
253
254 rtc_control = CMOS_READ(RTC_CONTROL);
255 spin_unlock_irq(&rtc_lock);
256
3804a89b
AP
257 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
258 if (((unsigned)t->time.tm_sec) < 0x60)
259 t->time.tm_sec = bcd2bin(t->time.tm_sec);
7be2c7c9 260 else
3804a89b
AP
261 t->time.tm_sec = -1;
262 if (((unsigned)t->time.tm_min) < 0x60)
263 t->time.tm_min = bcd2bin(t->time.tm_min);
264 else
265 t->time.tm_min = -1;
266 if (((unsigned)t->time.tm_hour) < 0x24)
267 t->time.tm_hour = bcd2bin(t->time.tm_hour);
268 else
269 t->time.tm_hour = -1;
270
271 if (cmos->day_alrm) {
272 if (((unsigned)t->time.tm_mday) <= 0x31)
273 t->time.tm_mday = bcd2bin(t->time.tm_mday);
7be2c7c9 274 else
3804a89b
AP
275 t->time.tm_mday = -1;
276
277 if (cmos->mon_alrm) {
278 if (((unsigned)t->time.tm_mon) <= 0x12)
279 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
280 else
281 t->time.tm_mon = -1;
282 }
7be2c7c9
DB
283 }
284 }
7be2c7c9
DB
285
286 t->enabled = !!(rtc_control & RTC_AIE);
287 t->pending = 0;
288
289 return 0;
290}
291
7e2a31da
DB
292static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
293{
294 unsigned char rtc_intr;
295
296 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
297 * allegedly some older rtcs need that to handle irqs properly
298 */
299 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
300
301 if (is_hpet_enabled())
302 return;
303
304 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
305 if (is_intr(rtc_intr))
306 rtc_update_irq(cmos->rtc, 1, rtc_intr);
307}
308
309static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
310{
311 unsigned char rtc_control;
312
313 /* flush any pending IRQ status, notably for update irqs,
314 * before we enable new IRQs
315 */
316 rtc_control = CMOS_READ(RTC_CONTROL);
317 cmos_checkintr(cmos, rtc_control);
318
319 rtc_control |= mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_set_rtc_irq_bit(mask);
322
323 cmos_checkintr(cmos, rtc_control);
324}
325
326static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
327{
328 unsigned char rtc_control;
329
330 rtc_control = CMOS_READ(RTC_CONTROL);
331 rtc_control &= ~mask;
332 CMOS_WRITE(rtc_control, RTC_CONTROL);
333 hpet_mask_rtc_irq_bit(mask);
334
335 cmos_checkintr(cmos, rtc_control);
336}
337
6a6af3d0
GM
338static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
339{
340 struct cmos_rtc *cmos = dev_get_drvdata(dev);
341 struct rtc_time now;
342
343 cmos_read_time(dev, &now);
344
345 if (!cmos->day_alrm) {
346 time64_t t_max_date;
347 time64_t t_alrm;
348
349 t_max_date = rtc_tm_to_time64(&now);
350 t_max_date += 24 * 60 * 60 - 1;
351 t_alrm = rtc_tm_to_time64(&t->time);
352 if (t_alrm > t_max_date) {
353 dev_err(dev,
354 "Alarms can be up to one day in the future\n");
355 return -EINVAL;
356 }
357 } else if (!cmos->mon_alrm) {
358 struct rtc_time max_date = now;
359 time64_t t_max_date;
360 time64_t t_alrm;
361 int max_mday;
362
363 if (max_date.tm_mon == 11) {
364 max_date.tm_mon = 0;
365 max_date.tm_year += 1;
366 } else {
367 max_date.tm_mon += 1;
368 }
369 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
370 if (max_date.tm_mday > max_mday)
371 max_date.tm_mday = max_mday;
372
373 t_max_date = rtc_tm_to_time64(&max_date);
374 t_max_date -= 1;
375 t_alrm = rtc_tm_to_time64(&t->time);
376 if (t_alrm > t_max_date) {
377 dev_err(dev,
378 "Alarms can be up to one month in the future\n");
379 return -EINVAL;
380 }
381 } else {
382 struct rtc_time max_date = now;
383 time64_t t_max_date;
384 time64_t t_alrm;
385 int max_mday;
386
387 max_date.tm_year += 1;
388 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
389 if (max_date.tm_mday > max_mday)
390 max_date.tm_mday = max_mday;
391
392 t_max_date = rtc_tm_to_time64(&max_date);
393 t_max_date -= 1;
394 t_alrm = rtc_tm_to_time64(&t->time);
395 if (t_alrm > t_max_date) {
396 dev_err(dev,
397 "Alarms can be up to one year in the future\n");
398 return -EINVAL;
399 }
400 }
401
402 return 0;
403}
404
7be2c7c9
DB
405static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
406{
407 struct cmos_rtc *cmos = dev_get_drvdata(dev);
5e8599d2 408 unsigned char mon, mday, hrs, min, sec, rtc_control;
6a6af3d0 409 int ret;
7be2c7c9
DB
410
411 if (!is_valid_irq(cmos->irq))
412 return -EIO;
413
6a6af3d0
GM
414 ret = cmos_validate_alarm(dev, t);
415 if (ret < 0)
416 return ret;
417
2b653e06 418 mon = t->time.tm_mon + 1;
7be2c7c9 419 mday = t->time.tm_mday;
7be2c7c9 420 hrs = t->time.tm_hour;
7be2c7c9 421 min = t->time.tm_min;
7be2c7c9 422 sec = t->time.tm_sec;
3804a89b
AP
423
424 rtc_control = CMOS_READ(RTC_CONTROL);
425 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
426 /* Writing 0xff means "don't care" or "match all". */
427 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
428 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
429 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
430 min = (min < 60) ? bin2bcd(min) : 0xff;
431 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
432 }
7be2c7c9
DB
433
434 spin_lock_irq(&rtc_lock);
435
436 /* next rtc irq must not be from previous alarm setting */
7e2a31da 437 cmos_irq_disable(cmos, RTC_AIE);
7be2c7c9
DB
438
439 /* update alarm */
440 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
441 CMOS_WRITE(min, RTC_MINUTES_ALARM);
442 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
443
444 /* the system may support an "enhanced" alarm */
445 if (cmos->day_alrm) {
446 CMOS_WRITE(mday, cmos->day_alrm);
447 if (cmos->mon_alrm)
448 CMOS_WRITE(mon, cmos->mon_alrm);
449 }
450
35d3fdd5
DB
451 /* FIXME the HPET alarm glue currently ignores day_alrm
452 * and mon_alrm ...
453 */
454 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
455
7e2a31da
DB
456 if (t->enabled)
457 cmos_irq_enable(cmos, RTC_AIE);
7be2c7c9
DB
458
459 spin_unlock_irq(&rtc_lock);
460
88b8d33b
AH
461 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
462
7be2c7c9
DB
463 return 0;
464}
465
a8462ef6 466static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
7be2c7c9
DB
467{
468 struct cmos_rtc *cmos = dev_get_drvdata(dev);
7be2c7c9
DB
469 unsigned long flags;
470
a8462ef6
HRK
471 if (!is_valid_irq(cmos->irq))
472 return -EINVAL;
7be2c7c9
DB
473
474 spin_lock_irqsave(&rtc_lock, flags);
a8462ef6
HRK
475
476 if (enabled)
7e2a31da 477 cmos_irq_enable(cmos, RTC_AIE);
a8462ef6
HRK
478 else
479 cmos_irq_disable(cmos, RTC_AIE);
480
7be2c7c9
DB
481 spin_unlock_irqrestore(&rtc_lock, flags);
482 return 0;
483}
484
6fca3fc5 485#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
7be2c7c9
DB
486
487static int cmos_procfs(struct device *dev, struct seq_file *seq)
488{
489 struct cmos_rtc *cmos = dev_get_drvdata(dev);
490 unsigned char rtc_control, valid;
491
492 spin_lock_irq(&rtc_lock);
493 rtc_control = CMOS_READ(RTC_CONTROL);
494 valid = CMOS_READ(RTC_VALID);
495 spin_unlock_irq(&rtc_lock);
496
497 /* NOTE: at least ICH6 reports battery status using a different
498 * (non-RTC) bit; and SQWE is ignored on many current systems.
499 */
4395eb1f
JP
500 seq_printf(seq,
501 "periodic_IRQ\t: %s\n"
502 "update_IRQ\t: %s\n"
503 "HPET_emulated\t: %s\n"
504 // "square_wave\t: %s\n"
505 "BCD\t\t: %s\n"
506 "DST_enable\t: %s\n"
507 "periodic_freq\t: %d\n"
508 "batt_status\t: %s\n",
509 (rtc_control & RTC_PIE) ? "yes" : "no",
510 (rtc_control & RTC_UIE) ? "yes" : "no",
511 is_hpet_enabled() ? "yes" : "no",
512 // (rtc_control & RTC_SQWE) ? "yes" : "no",
513 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
514 (rtc_control & RTC_DST_EN) ? "yes" : "no",
515 cmos->rtc->irq_freq,
516 (valid & RTC_VRT) ? "okay" : "dead");
517
518 return 0;
7be2c7c9
DB
519}
520
521#else
522#define cmos_procfs NULL
523#endif
524
525static const struct rtc_class_ops cmos_rtc_ops = {
a8462ef6
HRK
526 .read_time = cmos_read_time,
527 .set_time = cmos_set_time,
528 .read_alarm = cmos_read_alarm,
529 .set_alarm = cmos_set_alarm,
530 .proc = cmos_procfs,
a8462ef6 531 .alarm_irq_enable = cmos_alarm_irq_enable,
7be2c7c9
DB
532};
533
534/*----------------------------------------------------------------*/
535
e07e232c
DB
536/*
537 * All these chips have at least 64 bytes of address space, shared by
538 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
539 * by boot firmware. Modern chips have 128 or 256 bytes.
540 */
541
542#define NVRAM_OFFSET (RTC_REG_D + 1)
543
544static ssize_t
2c3c8bea
CW
545cmos_nvram_read(struct file *filp, struct kobject *kobj,
546 struct bin_attribute *attr,
e07e232c
DB
547 char *buf, loff_t off, size_t count)
548{
549 int retval;
550
c8fc40cd 551 off += NVRAM_OFFSET;
e07e232c 552 spin_lock_irq(&rtc_lock);
c8fc40cd
DB
553 for (retval = 0; count; count--, off++, retval++) {
554 if (off < 128)
555 *buf++ = CMOS_READ(off);
556 else if (can_bank2)
557 *buf++ = cmos_read_bank2(off);
558 else
559 break;
560 }
e07e232c
DB
561 spin_unlock_irq(&rtc_lock);
562
563 return retval;
564}
565
566static ssize_t
2c3c8bea
CW
567cmos_nvram_write(struct file *filp, struct kobject *kobj,
568 struct bin_attribute *attr,
e07e232c
DB
569 char *buf, loff_t off, size_t count)
570{
571 struct cmos_rtc *cmos;
572 int retval;
573
574 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
e07e232c
DB
575
576 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
577 * checksum on part of the NVRAM data. That's currently ignored
578 * here. If userspace is smart enough to know what fields of
579 * NVRAM to update, updating checksums is also part of its job.
580 */
c8fc40cd 581 off += NVRAM_OFFSET;
e07e232c 582 spin_lock_irq(&rtc_lock);
c8fc40cd 583 for (retval = 0; count; count--, off++, retval++) {
e07e232c
DB
584 /* don't trash RTC registers */
585 if (off == cmos->day_alrm
586 || off == cmos->mon_alrm
587 || off == cmos->century)
588 buf++;
c8fc40cd 589 else if (off < 128)
e07e232c 590 CMOS_WRITE(*buf++, off);
c8fc40cd
DB
591 else if (can_bank2)
592 cmos_write_bank2(*buf++, off);
593 else
594 break;
e07e232c
DB
595 }
596 spin_unlock_irq(&rtc_lock);
597
598 return retval;
599}
600
601static struct bin_attribute nvram = {
602 .attr = {
603 .name = "nvram",
604 .mode = S_IRUGO | S_IWUSR,
e07e232c
DB
605 },
606
607 .read = cmos_nvram_read,
608 .write = cmos_nvram_write,
609 /* size gets set up later */
610};
611
612/*----------------------------------------------------------------*/
613
7be2c7c9
DB
614static struct cmos_rtc cmos_rtc;
615
616static irqreturn_t cmos_interrupt(int irq, void *p)
617{
618 u8 irqstat;
8a0bdfd7 619 u8 rtc_control;
7be2c7c9
DB
620
621 spin_lock(&rtc_lock);
35d3fdd5
DB
622
623 /* When the HPET interrupt handler calls us, the interrupt
624 * status is passed as arg1 instead of the irq number. But
625 * always clear irq status, even when HPET is in the way.
626 *
627 * Note that HPET and RTC are almost certainly out of phase,
628 * giving different IRQ status ...
9d8af78b 629 */
35d3fdd5
DB
630 irqstat = CMOS_READ(RTC_INTR_FLAGS);
631 rtc_control = CMOS_READ(RTC_CONTROL);
9d8af78b
BW
632 if (is_hpet_enabled())
633 irqstat = (unsigned long)irq & 0xF0;
998a0605
DB
634
635 /* If we were suspended, RTC_CONTROL may not be accurate since the
636 * bios may have cleared it.
637 */
638 if (!cmos_rtc.suspend_ctrl)
639 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
640 else
641 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
8a0bdfd7
DB
642
643 /* All Linux RTC alarms should be treated as if they were oneshot.
644 * Similar code may be needed in system wakeup paths, in case the
645 * alarm woke the system.
646 */
647 if (irqstat & RTC_AIE) {
998a0605 648 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
8a0bdfd7
DB
649 rtc_control &= ~RTC_AIE;
650 CMOS_WRITE(rtc_control, RTC_CONTROL);
35d3fdd5 651 hpet_mask_rtc_irq_bit(RTC_AIE);
8a0bdfd7
DB
652 CMOS_READ(RTC_INTR_FLAGS);
653 }
7be2c7c9
DB
654 spin_unlock(&rtc_lock);
655
bcd9b89c 656 if (is_intr(irqstat)) {
7be2c7c9
DB
657 rtc_update_irq(p, 1, irqstat);
658 return IRQ_HANDLED;
659 } else
660 return IRQ_NONE;
661}
662
41ac8df9 663#ifdef CONFIG_PNP
7be2c7c9
DB
664#define INITSECTION
665
666#else
7be2c7c9
DB
667#define INITSECTION __init
668#endif
669
670static int INITSECTION
671cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
672{
97a92e77 673 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
7be2c7c9
DB
674 int retval = 0;
675 unsigned char rtc_control;
e07e232c 676 unsigned address_space;
31632dbd 677 u32 flags = 0;
7be2c7c9
DB
678
679 /* there can be only one ... */
680 if (cmos_rtc.dev)
681 return -EBUSY;
682
683 if (!ports)
684 return -ENODEV;
685
05440dfc
DB
686 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
687 *
688 * REVISIT non-x86 systems may instead use memory space resources
689 * (needing ioremap etc), not i/o space resources like this ...
690 */
31632dbd
MR
691 if (RTC_IOMAPPED)
692 ports = request_region(ports->start, resource_size(ports),
693 driver_name);
694 else
695 ports = request_mem_region(ports->start, resource_size(ports),
696 driver_name);
05440dfc
DB
697 if (!ports) {
698 dev_dbg(dev, "i/o registers already in use\n");
699 return -EBUSY;
700 }
701
7be2c7c9
DB
702 cmos_rtc.irq = rtc_irq;
703 cmos_rtc.iomem = ports;
704
e07e232c
DB
705 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
706 * driver did, but don't reject unknown configs. Old hardware
c8fc40cd
DB
707 * won't address 128 bytes. Newer chips have multiple banks,
708 * though they may not be listed in one I/O resource.
e07e232c
DB
709 */
710#if defined(CONFIG_ATARI)
711 address_space = 64;
95abd0df 712#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
8cb7c71b 713 || defined(__sparc__) || defined(__mips__) \
5ee98ab3 714 || defined(__powerpc__) || defined(CONFIG_MN10300)
e07e232c
DB
715 address_space = 128;
716#else
717#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
718 address_space = 128;
719#endif
c8fc40cd
DB
720 if (can_bank2 && ports->end > (ports->start + 1))
721 address_space = 256;
e07e232c 722
87ac84f4
DB
723 /* For ACPI systems extension info comes from the FADT. On others,
724 * board specific setup provides it as appropriate. Systems where
725 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
726 * some almost-clones) can provide hooks to make that behave.
e07e232c
DB
727 *
728 * Note that ACPI doesn't preclude putting these registers into
729 * "extended" areas of the chip, including some that we won't yet
730 * expect CMOS_READ and friends to handle.
7be2c7c9
DB
731 */
732 if (info) {
31632dbd
MR
733 if (info->flags)
734 flags = info->flags;
735 if (info->address_space)
736 address_space = info->address_space;
737
e07e232c
DB
738 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
739 cmos_rtc.day_alrm = info->rtc_day_alarm;
740 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
741 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
742 if (info->rtc_century && info->rtc_century < 128)
743 cmos_rtc.century = info->rtc_century;
87ac84f4
DB
744
745 if (info->wake_on && info->wake_off) {
746 cmos_rtc.wake_on = info->wake_on;
747 cmos_rtc.wake_off = info->wake_off;
748 }
7be2c7c9
DB
749 }
750
6ba8bcd4
DC
751 cmos_rtc.dev = dev;
752 dev_set_drvdata(dev, &cmos_rtc);
753
7be2c7c9
DB
754 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
755 &cmos_rtc_ops, THIS_MODULE);
05440dfc
DB
756 if (IS_ERR(cmos_rtc.rtc)) {
757 retval = PTR_ERR(cmos_rtc.rtc);
758 goto cleanup0;
759 }
7be2c7c9 760
d4afc76c 761 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
7be2c7c9
DB
762
763 spin_lock_irq(&rtc_lock);
764
31632dbd
MR
765 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
766 /* force periodic irq to CMOS reset default of 1024Hz;
767 *
768 * REVISIT it's been reported that at least one x86_64 ALI
769 * mobo doesn't use 32KHz here ... for portability we might
770 * need to do something about other clock frequencies.
771 */
772 cmos_rtc.rtc->irq_freq = 1024;
773 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
774 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
775 }
7be2c7c9 776
7e2a31da 777 /* disable irqs */
31632dbd
MR
778 if (is_valid_irq(rtc_irq))
779 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
35d3fdd5 780
7e2a31da 781 rtc_control = CMOS_READ(RTC_CONTROL);
7be2c7c9
DB
782
783 spin_unlock_irq(&rtc_lock);
784
5e8599d2 785 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
3804a89b 786 dev_warn(dev, "only 24-hr supported\n");
7be2c7c9
DB
787 retval = -ENXIO;
788 goto cleanup1;
789 }
790
970fc7f4
PA
791 hpet_rtc_timer_init();
792
9d8af78b
BW
793 if (is_valid_irq(rtc_irq)) {
794 irq_handler_t rtc_cmos_int_handler;
795
796 if (is_hpet_enabled()) {
9d8af78b 797 rtc_cmos_int_handler = hpet_rtc_interrupt;
24b34472
AM
798 retval = hpet_register_irq_handler(cmos_interrupt);
799 if (retval) {
970fc7f4 800 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
ee443357 801 dev_warn(dev, "hpet_register_irq_handler "
9d8af78b
BW
802 " failed in rtc_init().");
803 goto cleanup1;
804 }
805 } else
806 rtc_cmos_int_handler = cmos_interrupt;
807
808 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
079062b2 809 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
ab6a2d70 810 cmos_rtc.rtc);
9d8af78b
BW
811 if (retval < 0) {
812 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
813 goto cleanup1;
814 }
7be2c7c9
DB
815 }
816
e07e232c
DB
817 /* export at least the first block of NVRAM */
818 nvram.size = address_space - NVRAM_OFFSET;
819 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
820 if (retval < 0) {
821 dev_dbg(dev, "can't create nvram file? %d\n", retval);
822 goto cleanup2;
823 }
7be2c7c9 824
ee443357 825 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
6d029b64
KH
826 !is_valid_irq(rtc_irq) ? "no alarms" :
827 cmos_rtc.mon_alrm ? "alarms up to one year" :
828 cmos_rtc.day_alrm ? "alarms up to one month" :
829 "alarms up to one day",
830 cmos_rtc.century ? ", y3k" : "",
831 nvram.size,
832 is_hpet_enabled() ? ", hpet irqs" : "");
7be2c7c9
DB
833
834 return 0;
835
e07e232c
DB
836cleanup2:
837 if (is_valid_irq(rtc_irq))
838 free_irq(rtc_irq, cmos_rtc.rtc);
7be2c7c9 839cleanup1:
05440dfc 840 cmos_rtc.dev = NULL;
7be2c7c9 841 rtc_device_unregister(cmos_rtc.rtc);
05440dfc 842cleanup0:
31632dbd
MR
843 if (RTC_IOMAPPED)
844 release_region(ports->start, resource_size(ports));
845 else
846 release_mem_region(ports->start, resource_size(ports));
7be2c7c9
DB
847 return retval;
848}
849
31632dbd 850static void cmos_do_shutdown(int rtc_irq)
7be2c7c9 851{
7be2c7c9 852 spin_lock_irq(&rtc_lock);
31632dbd
MR
853 if (is_valid_irq(rtc_irq))
854 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
7be2c7c9
DB
855 spin_unlock_irq(&rtc_lock);
856}
857
a3a0673b 858static void cmos_do_remove(struct device *dev)
7be2c7c9
DB
859{
860 struct cmos_rtc *cmos = dev_get_drvdata(dev);
05440dfc 861 struct resource *ports;
7be2c7c9 862
31632dbd 863 cmos_do_shutdown(cmos->irq);
7be2c7c9 864
e07e232c
DB
865 sysfs_remove_bin_file(&dev->kobj, &nvram);
866
9d8af78b 867 if (is_valid_irq(cmos->irq)) {
05440dfc 868 free_irq(cmos->irq, cmos->rtc);
9d8af78b
BW
869 hpet_unregister_irq_handler(cmos_interrupt);
870 }
7be2c7c9 871
05440dfc
DB
872 rtc_device_unregister(cmos->rtc);
873 cmos->rtc = NULL;
7be2c7c9 874
05440dfc 875 ports = cmos->iomem;
31632dbd
MR
876 if (RTC_IOMAPPED)
877 release_region(ports->start, resource_size(ports));
878 else
879 release_mem_region(ports->start, resource_size(ports));
05440dfc
DB
880 cmos->iomem = NULL;
881
882 cmos->dev = NULL;
7be2c7c9
DB
883}
884
88b8d33b
AH
885static int cmos_aie_poweroff(struct device *dev)
886{
887 struct cmos_rtc *cmos = dev_get_drvdata(dev);
888 struct rtc_time now;
889 time64_t t_now;
890 int retval = 0;
891 unsigned char rtc_control;
892
893 if (!cmos->alarm_expires)
894 return -EINVAL;
895
896 spin_lock_irq(&rtc_lock);
897 rtc_control = CMOS_READ(RTC_CONTROL);
898 spin_unlock_irq(&rtc_lock);
899
900 /* We only care about the situation where AIE is disabled. */
901 if (rtc_control & RTC_AIE)
902 return -EBUSY;
903
904 cmos_read_time(dev, &now);
905 t_now = rtc_tm_to_time64(&now);
906
907 /*
908 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
909 * automatically right after shutdown on some buggy boxes.
910 * This automatic rebooting issue won't happen when the alarm
911 * time is larger than now+1 seconds.
912 *
913 * If the alarm time is equal to now+1 seconds, the issue can be
914 * prevented by cancelling the alarm.
915 */
916 if (cmos->alarm_expires == t_now + 1) {
917 struct rtc_wkalrm alarm;
918
919 /* Cancel the AIE timer by configuring the past time. */
920 rtc_time64_to_tm(t_now - 1, &alarm.time);
921 alarm.enabled = 0;
922 retval = cmos_set_alarm(dev, &alarm);
923 } else if (cmos->alarm_expires > t_now + 1) {
924 retval = -EBUSY;
925 }
926
927 return retval;
928}
929
2fb08e6c 930static int cmos_suspend(struct device *dev)
7be2c7c9
DB
931{
932 struct cmos_rtc *cmos = dev_get_drvdata(dev);
bcd9b89c 933 unsigned char tmp;
7be2c7c9
DB
934
935 /* only the alarm might be a wakeup event source */
936 spin_lock_irq(&rtc_lock);
937 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
938 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
35d3fdd5 939 unsigned char mask;
bcd9b89c 940
74c4633d 941 if (device_may_wakeup(dev))
35d3fdd5 942 mask = RTC_IRQMASK & ~RTC_AIE;
7be2c7c9 943 else
35d3fdd5
DB
944 mask = RTC_IRQMASK;
945 tmp &= ~mask;
7be2c7c9 946 CMOS_WRITE(tmp, RTC_CONTROL);
e005715e 947 hpet_mask_rtc_irq_bit(mask);
35d3fdd5 948
7e2a31da 949 cmos_checkintr(cmos, tmp);
bcd9b89c 950 }
7be2c7c9
DB
951 spin_unlock_irq(&rtc_lock);
952
87ac84f4
DB
953 if (tmp & RTC_AIE) {
954 cmos->enabled_wake = 1;
955 if (cmos->wake_on)
956 cmos->wake_on(dev);
957 else
958 enable_irq_wake(cmos->irq);
959 }
7be2c7c9 960
68669d55
GM
961 cmos_read_alarm(dev, &cmos->saved_wkalrm);
962
ee443357 963 dev_dbg(dev, "suspend%s, ctrl %02x\n",
7be2c7c9
DB
964 (tmp & RTC_AIE) ? ", alarm may wake" : "",
965 tmp);
966
967 return 0;
968}
969
74c4633d
RW
970/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
971 * after a detour through G3 "mechanical off", although the ACPI spec
972 * says wakeup should only work from G1/S4 "hibernate". To most users,
973 * distinctions between S4 and S5 are pointless. So when the hardware
974 * allows, don't draw that distinction.
975 */
976static inline int cmos_poweroff(struct device *dev)
977{
00f7f90c
AB
978 if (!IS_ENABLED(CONFIG_PM))
979 return -ENOSYS;
980
2fb08e6c 981 return cmos_suspend(dev);
74c4633d
RW
982}
983
68669d55
GM
984static void cmos_check_wkalrm(struct device *dev)
985{
986 struct cmos_rtc *cmos = dev_get_drvdata(dev);
987 struct rtc_wkalrm current_alarm;
988 time64_t t_current_expires;
989 time64_t t_saved_expires;
990
991 cmos_read_alarm(dev, &current_alarm);
992 t_current_expires = rtc_tm_to_time64(&current_alarm.time);
993 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
994 if (t_current_expires != t_saved_expires ||
995 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
996 cmos_set_alarm(dev, &cmos->saved_wkalrm);
997 }
998}
999
983bf125
GM
1000static void cmos_check_acpi_rtc_status(struct device *dev,
1001 unsigned char *rtc_control);
1002
00f7f90c 1003static int __maybe_unused cmos_resume(struct device *dev)
7be2c7c9
DB
1004{
1005 struct cmos_rtc *cmos = dev_get_drvdata(dev);
998a0605
DB
1006 unsigned char tmp;
1007
1008 if (cmos->enabled_wake) {
1009 if (cmos->wake_off)
1010 cmos->wake_off(dev);
1011 else
1012 disable_irq_wake(cmos->irq);
1013 cmos->enabled_wake = 0;
1014 }
7be2c7c9 1015
68669d55
GM
1016 /* The BIOS might have changed the alarm, restore it */
1017 cmos_check_wkalrm(dev);
1018
998a0605
DB
1019 spin_lock_irq(&rtc_lock);
1020 tmp = cmos->suspend_ctrl;
1021 cmos->suspend_ctrl = 0;
7be2c7c9 1022 /* re-enable any irqs previously active */
35d3fdd5
DB
1023 if (tmp & RTC_IRQMASK) {
1024 unsigned char mask;
7be2c7c9 1025
ebf8d6c8
DB
1026 if (device_may_wakeup(dev))
1027 hpet_rtc_timer_init();
1028
35d3fdd5
DB
1029 do {
1030 CMOS_WRITE(tmp, RTC_CONTROL);
1031 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1032
1033 mask = CMOS_READ(RTC_INTR_FLAGS);
1034 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
7e2a31da 1035 if (!is_hpet_enabled() || !is_intr(mask))
35d3fdd5
DB
1036 break;
1037
1038 /* force one-shot behavior if HPET blocked
1039 * the wake alarm's irq
1040 */
1041 rtc_update_irq(cmos->rtc, 1, mask);
1042 tmp &= ~RTC_AIE;
1043 hpet_mask_rtc_irq_bit(RTC_AIE);
1044 } while (mask & RTC_AIE);
983bf125
GM
1045
1046 if (tmp & RTC_AIE)
1047 cmos_check_acpi_rtc_status(dev, &tmp);
7be2c7c9 1048 }
998a0605 1049 spin_unlock_irq(&rtc_lock);
7be2c7c9 1050
ee443357 1051 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
7be2c7c9
DB
1052
1053 return 0;
1054}
1055
b5ada460
MW
1056static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1057
7be2c7c9
DB
1058/*----------------------------------------------------------------*/
1059
e07e232c
DB
1060/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1061 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1062 * probably list them in similar PNPBIOS tables; so PNP is more common.
1063 *
1064 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1065 * predate even PNPBIOS should set up platform_bus devices.
7be2c7c9
DB
1066 */
1067
a474aaed
BH
1068#ifdef CONFIG_ACPI
1069
1070#include <linux/acpi.h>
1071
a474aaed
BH
1072static u32 rtc_handler(void *context)
1073{
b2201e54 1074 struct device *dev = context;
983bf125
GM
1075 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1076 unsigned char rtc_control = 0;
1077 unsigned char rtc_intr;
368e21ae 1078 unsigned long flags;
983bf125 1079
368e21ae 1080 spin_lock_irqsave(&rtc_lock, flags);
983bf125
GM
1081 if (cmos_rtc.suspend_ctrl)
1082 rtc_control = CMOS_READ(RTC_CONTROL);
1083 if (rtc_control & RTC_AIE) {
1084 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1085 CMOS_WRITE(rtc_control, RTC_CONTROL);
1086 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1087 rtc_update_irq(cmos->rtc, 1, rtc_intr);
1088 }
368e21ae 1089 spin_unlock_irqrestore(&rtc_lock, flags);
b2201e54 1090
967b08c2 1091 pm_wakeup_hard_event(dev);
a474aaed
BH
1092 acpi_clear_event(ACPI_EVENT_RTC);
1093 acpi_disable_event(ACPI_EVENT_RTC, 0);
1094 return ACPI_INTERRUPT_HANDLED;
1095}
1096
b2201e54 1097static inline void rtc_wake_setup(struct device *dev)
a474aaed 1098{
b2201e54 1099 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
a474aaed
BH
1100 /*
1101 * After the RTC handler is installed, the Fixed_RTC event should
1102 * be disabled. Only when the RTC alarm is set will it be enabled.
1103 */
1104 acpi_clear_event(ACPI_EVENT_RTC);
1105 acpi_disable_event(ACPI_EVENT_RTC, 0);
1106}
1107
1108static void rtc_wake_on(struct device *dev)
1109{
1110 acpi_clear_event(ACPI_EVENT_RTC);
1111 acpi_enable_event(ACPI_EVENT_RTC, 0);
1112}
1113
1114static void rtc_wake_off(struct device *dev)
1115{
1116 acpi_disable_event(ACPI_EVENT_RTC, 0);
1117}
a474aaed
BH
1118
1119/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1120 * its device node and pass extra config data. This helps its driver use
1121 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1122 * that this board's RTC is wakeup-capable (per ACPI spec).
1123 */
1124static struct cmos_rtc_board_info acpi_rtc_info;
1125
5a167f45 1126static void cmos_wake_setup(struct device *dev)
a474aaed
BH
1127{
1128 if (acpi_disabled)
1129 return;
1130
b2201e54 1131 rtc_wake_setup(dev);
a474aaed
BH
1132 acpi_rtc_info.wake_on = rtc_wake_on;
1133 acpi_rtc_info.wake_off = rtc_wake_off;
1134
1135 /* workaround bug in some ACPI tables */
1136 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1137 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1138 acpi_gbl_FADT.month_alarm);
1139 acpi_gbl_FADT.month_alarm = 0;
1140 }
1141
1142 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1143 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1144 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1145
1146 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1147 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1148 dev_info(dev, "RTC can wake from S4\n");
1149
1150 dev->platform_data = &acpi_rtc_info;
1151
1152 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1153 device_init_wakeup(dev, 1);
1154}
1155
983bf125
GM
1156static void cmos_check_acpi_rtc_status(struct device *dev,
1157 unsigned char *rtc_control)
1158{
1159 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1160 acpi_event_status rtc_status;
1161 acpi_status status;
1162
1163 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1164 return;
1165
1166 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1167 if (ACPI_FAILURE(status)) {
1168 dev_err(dev, "Could not get RTC status\n");
1169 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1170 unsigned char mask;
1171 *rtc_control &= ~RTC_AIE;
1172 CMOS_WRITE(*rtc_control, RTC_CONTROL);
1173 mask = CMOS_READ(RTC_INTR_FLAGS);
1174 rtc_update_irq(cmos->rtc, 1, mask);
1175 }
1176}
1177
a474aaed
BH
1178#else
1179
5a167f45 1180static void cmos_wake_setup(struct device *dev)
a474aaed
BH
1181{
1182}
1183
983bf125
GM
1184static void cmos_check_acpi_rtc_status(struct device *dev,
1185 unsigned char *rtc_control)
1186{
1187}
1188
a474aaed
BH
1189#endif
1190
41ac8df9 1191#ifdef CONFIG_PNP
7be2c7c9
DB
1192
1193#include <linux/pnp.h>
1194
5a167f45 1195static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
7be2c7c9 1196{
a474aaed
BH
1197 cmos_wake_setup(&pnp->dev);
1198
a1e23a42
HG
1199 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1200 unsigned int irq = 0;
1201#ifdef CONFIG_X86
6cd8fa87
MG
1202 /* Some machines contain a PNP entry for the RTC, but
1203 * don't define the IRQ. It should always be safe to
a1e23a42 1204 * hardcode it on systems with a legacy PIC.
6cd8fa87 1205 */
a1e23a42
HG
1206 if (nr_legacy_irqs())
1207 irq = 8;
1208#endif
8766ad0c 1209 return cmos_do_probe(&pnp->dev,
a1e23a42
HG
1210 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1211 } else {
6cd8fa87 1212 return cmos_do_probe(&pnp->dev,
8766ad0c
BH
1213 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1214 pnp_irq(pnp, 0));
a1e23a42 1215 }
7be2c7c9
DB
1216}
1217
a3a0673b 1218static void cmos_pnp_remove(struct pnp_dev *pnp)
7be2c7c9
DB
1219{
1220 cmos_do_remove(&pnp->dev);
1221}
1222
004731b2 1223static void cmos_pnp_shutdown(struct pnp_dev *pnp)
74c4633d 1224{
31632dbd
MR
1225 struct device *dev = &pnp->dev;
1226 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1227
88b8d33b
AH
1228 if (system_state == SYSTEM_POWER_OFF) {
1229 int retval = cmos_poweroff(dev);
1230
1231 if (cmos_aie_poweroff(dev) < 0 && !retval)
1232 return;
1233 }
74c4633d 1234
31632dbd 1235 cmos_do_shutdown(cmos->irq);
74c4633d 1236}
7be2c7c9
DB
1237
1238static const struct pnp_device_id rtc_ids[] = {
1239 { .id = "PNP0b00", },
1240 { .id = "PNP0b01", },
1241 { .id = "PNP0b02", },
1242 { },
1243};
1244MODULE_DEVICE_TABLE(pnp, rtc_ids);
1245
1246static struct pnp_driver cmos_pnp_driver = {
1247 .name = (char *) driver_name,
1248 .id_table = rtc_ids,
1249 .probe = cmos_pnp_probe,
a3a0673b 1250 .remove = cmos_pnp_remove,
004731b2 1251 .shutdown = cmos_pnp_shutdown,
7be2c7c9
DB
1252
1253 /* flag ensures resume() gets called, and stops syslog spam */
1254 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
a8a3808b
SK
1255 .driver = {
1256 .pm = &cmos_pm_ops,
1257 },
7be2c7c9
DB
1258};
1259
1da2e3d6 1260#endif /* CONFIG_PNP */
7be2c7c9 1261
3bcbaf6e
SAS
1262#ifdef CONFIG_OF
1263static const struct of_device_id of_cmos_match[] = {
1264 {
1265 .compatible = "motorola,mc146818",
1266 },
1267 { },
1268};
1269MODULE_DEVICE_TABLE(of, of_cmos_match);
1270
1271static __init void cmos_of_init(struct platform_device *pdev)
1272{
1273 struct device_node *node = pdev->dev.of_node;
1274 struct rtc_time time;
1275 int ret;
1276 const __be32 *val;
1277
1278 if (!node)
1279 return;
1280
1281 val = of_get_property(node, "ctrl-reg", NULL);
1282 if (val)
1283 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1284
1285 val = of_get_property(node, "freq-reg", NULL);
1286 if (val)
1287 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1288
5ab788d7 1289 cmos_read_time(&pdev->dev, &time);
3bcbaf6e
SAS
1290 ret = rtc_valid_tm(&time);
1291 if (ret) {
1292 struct rtc_time def_time = {
1293 .tm_year = 1,
1294 .tm_mday = 1,
1295 };
5ab788d7 1296 cmos_set_time(&pdev->dev, &def_time);
3bcbaf6e
SAS
1297 }
1298}
1299#else
1300static inline void cmos_of_init(struct platform_device *pdev) {}
3bcbaf6e 1301#endif
7be2c7c9
DB
1302/*----------------------------------------------------------------*/
1303
41ac8df9 1304/* Platform setup should have set up an RTC device, when PNP is
bcd9b89c 1305 * unavailable ... this could happen even on (older) PCs.
7be2c7c9
DB
1306 */
1307
1308static int __init cmos_platform_probe(struct platform_device *pdev)
1309{
31632dbd
MR
1310 struct resource *resource;
1311 int irq;
1312
3bcbaf6e 1313 cmos_of_init(pdev);
a474aaed 1314 cmos_wake_setup(&pdev->dev);
31632dbd
MR
1315
1316 if (RTC_IOMAPPED)
1317 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1318 else
1319 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1320 irq = platform_get_irq(pdev, 0);
1321 if (irq < 0)
1322 irq = -1;
1323
1324 return cmos_do_probe(&pdev->dev, resource, irq);
7be2c7c9
DB
1325}
1326
a3a0673b 1327static int cmos_platform_remove(struct platform_device *pdev)
7be2c7c9
DB
1328{
1329 cmos_do_remove(&pdev->dev);
1330 return 0;
1331}
1332
1333static void cmos_platform_shutdown(struct platform_device *pdev)
1334{
31632dbd
MR
1335 struct device *dev = &pdev->dev;
1336 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1337
88b8d33b
AH
1338 if (system_state == SYSTEM_POWER_OFF) {
1339 int retval = cmos_poweroff(dev);
1340
1341 if (cmos_aie_poweroff(dev) < 0 && !retval)
1342 return;
1343 }
74c4633d 1344
31632dbd 1345 cmos_do_shutdown(cmos->irq);
7be2c7c9
DB
1346}
1347
ad28a07b
KS
1348/* work with hotplug and coldplug */
1349MODULE_ALIAS("platform:rtc_cmos");
1350
7be2c7c9 1351static struct platform_driver cmos_platform_driver = {
a3a0673b 1352 .remove = cmos_platform_remove,
7be2c7c9
DB
1353 .shutdown = cmos_platform_shutdown,
1354 .driver = {
c823a202 1355 .name = driver_name,
2fb08e6c 1356 .pm = &cmos_pm_ops,
c8a6046e 1357 .of_match_table = of_match_ptr(of_cmos_match),
7be2c7c9
DB
1358 }
1359};
1360
65909814
TLSC
1361#ifdef CONFIG_PNP
1362static bool pnp_driver_registered;
1363#endif
1364static bool platform_driver_registered;
1365
7be2c7c9
DB
1366static int __init cmos_init(void)
1367{
72f22b1e
BH
1368 int retval = 0;
1369
1da2e3d6 1370#ifdef CONFIG_PNP
65909814
TLSC
1371 retval = pnp_register_driver(&cmos_pnp_driver);
1372 if (retval == 0)
1373 pnp_driver_registered = true;
72f22b1e
BH
1374#endif
1375
65909814 1376 if (!cmos_rtc.dev) {
72f22b1e
BH
1377 retval = platform_driver_probe(&cmos_platform_driver,
1378 cmos_platform_probe);
65909814
TLSC
1379 if (retval == 0)
1380 platform_driver_registered = true;
1381 }
72f22b1e
BH
1382
1383 if (retval == 0)
1384 return 0;
1385
1386#ifdef CONFIG_PNP
65909814
TLSC
1387 if (pnp_driver_registered)
1388 pnp_unregister_driver(&cmos_pnp_driver);
72f22b1e
BH
1389#endif
1390 return retval;
7be2c7c9
DB
1391}
1392module_init(cmos_init);
1393
1394static void __exit cmos_exit(void)
1395{
1da2e3d6 1396#ifdef CONFIG_PNP
65909814
TLSC
1397 if (pnp_driver_registered)
1398 pnp_unregister_driver(&cmos_pnp_driver);
72f22b1e 1399#endif
65909814
TLSC
1400 if (platform_driver_registered)
1401 platform_driver_unregister(&cmos_platform_driver);
7be2c7c9
DB
1402}
1403module_exit(cmos_exit);
1404
1405
7be2c7c9
DB
1406MODULE_AUTHOR("David Brownell");
1407MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1408MODULE_LICENSE("GPL");