[mirror_ubuntu-jammy-kernel.git] / drivers / rtc / rtc-ds1302.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Dallas DS1302 RTC Support
 *
 *  Copyright (C) 2002 David McCullough
 *  Copyright (C) 2003 - 2007 Paul Mundt
 */

#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/rtc.h>
#include <linux/spi/spi.h>

#define	RTC_CMD_READ	0x81		/* Read command */
#define	RTC_CMD_WRITE	0x80		/* Write command */

#define	RTC_CMD_WRITE_ENABLE	0x00		/* Write enable */
#define	RTC_CMD_WRITE_DISABLE	0x80		/* Write disable */

#define RTC_ADDR_RAM0	0x20		/* Address of RAM0 */
#define RTC_ADDR_TCR	0x08		/* Address of trickle charge register */
#define RTC_CLCK_BURST	0x1F		/* Address of clock burst */
#define	RTC_CLCK_LEN	0x08		/* Size of clock burst */
#define	RTC_ADDR_CTRL	0x07		/* Address of control register */
#define	RTC_ADDR_YEAR	0x06		/* Address of year register */
#define	RTC_ADDR_DAY	0x05		/* Address of day of week register */
#define	RTC_ADDR_MON	0x04		/* Address of month register */
#define	RTC_ADDR_DATE	0x03		/* Address of day of month register */
#define	RTC_ADDR_HOUR	0x02		/* Address of hour register */
#define	RTC_ADDR_MIN	0x01		/* Address of minute register */
#define	RTC_ADDR_SEC	0x00		/* Address of second register */

static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *time)
{
	struct spi_device	*spi = dev_get_drvdata(dev);
	u8		buf[1 + RTC_CLCK_LEN];
	u8		*bp;
	int		status;

	/* Enable writing */
	bp = buf;
	*bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
	*bp++ = RTC_CMD_WRITE_ENABLE;

	status = spi_write_then_read(spi, buf, 2,
			NULL, 0);
	if (status)
		return status;

	/* Write registers starting at the first time/date address. */
	bp = buf;
	*bp++ = RTC_CLCK_BURST << 1 | RTC_CMD_WRITE;

	*bp++ = bin2bcd(time->tm_sec);
	*bp++ = bin2bcd(time->tm_min);
	*bp++ = bin2bcd(time->tm_hour);
	*bp++ = bin2bcd(time->tm_mday);
	*bp++ = bin2bcd(time->tm_mon + 1);
	*bp++ = time->tm_wday + 1;
	*bp++ = bin2bcd(time->tm_year % 100);
	*bp++ = RTC_CMD_WRITE_DISABLE;

	/* use write-then-read since dma from stack is nonportable */
	return spi_write_then_read(spi, buf, sizeof(buf),
			NULL, 0);
}

static int ds1302_rtc_get_time(struct device *dev, struct rtc_time *time)
{
	struct spi_device	*spi = dev_get_drvdata(dev);
	u8		addr = RTC_CLCK_BURST << 1 | RTC_CMD_READ;
	u8		buf[RTC_CLCK_LEN - 1];
	int		status;

	/* Use write-then-read to get all the date/time registers
	 * since dma from stack is nonportable
	 */
	status = spi_write_then_read(spi, &addr, sizeof(addr),
			buf, sizeof(buf));
	if (status < 0)
		return status;

	/* Decode the registers */
	time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
	time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
	time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
	time->tm_wday = buf[RTC_ADDR_DAY] - 1;
	time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
	time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
	time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;

	return 0;
}

static const struct rtc_class_ops ds1302_rtc_ops = {
	.read_time	= ds1302_rtc_get_time,
	.set_time	= ds1302_rtc_set_time,
};

static int ds1302_probe(struct spi_device *spi)
{
	struct rtc_device	*rtc;
	u8		addr;
	u8		buf[4];
	u8		*bp;
	int		status;

	/* Sanity check board setup data.  This may be hooked up
	 * in 3wire mode, but we don't care.  Note that unless
	 * there's an inverter in place, this needs SPI_CS_HIGH!
	 */
	if (spi->bits_per_word && (spi->bits_per_word != 8)) {
		dev_err(&spi->dev, "bad word length\n");
		return -EINVAL;
	} else if (spi->max_speed_hz > 2000000) {
		dev_err(&spi->dev, "speed is too high\n");
		return -EINVAL;
	} else if (spi->mode & SPI_CPHA) {
		dev_err(&spi->dev, "bad mode\n");
		return -EINVAL;
	}

	addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
	status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
	if (status < 0) {
		dev_err(&spi->dev, "control register read error %d\n",
				status);
		return status;
	}

	if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
		status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
		if (status < 0) {
			dev_err(&spi->dev, "control register read error %d\n",
					status);
			return status;
		}

		if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
			dev_err(&spi->dev, "junk in control register\n");
			return -ENODEV;
		}
	}
	if (buf[0] == 0) {
		bp = buf;
		*bp++ = RTC_ADDR_CTRL << 1 | RTC_CMD_WRITE;
		*bp++ = RTC_CMD_WRITE_DISABLE;

		status = spi_write_then_read(spi, buf, 2, NULL, 0);
		if (status < 0) {
			dev_err(&spi->dev, "control register write error %d\n",
					status);
			return status;
		}

		addr = RTC_ADDR_CTRL << 1 | RTC_CMD_READ;
		status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
		if (status < 0) {
			dev_err(&spi->dev,
					"error %d reading control register\n",
					status);
			return status;
		}

		if (buf[0] != RTC_CMD_WRITE_DISABLE) {
			dev_err(&spi->dev, "failed to detect chip\n");
			return -ENODEV;
		}
	}

	spi_set_drvdata(spi, spi);

	rtc = devm_rtc_device_register(&spi->dev, "ds1302",
			&ds1302_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc)) {
		status = PTR_ERR(rtc);
		dev_err(&spi->dev, "error %d registering rtc\n", status);
		return status;
	}

	return 0;
}

static int ds1302_remove(struct spi_device *spi)
{
	spi_set_drvdata(spi, NULL);
	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id ds1302_dt_ids[] = {
	{ .compatible = "maxim,ds1302", },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
#endif

static struct spi_driver ds1302_driver = {
	.driver.name	= "rtc-ds1302",
	.driver.of_match_table = of_match_ptr(ds1302_dt_ids),
	.probe		= ds1302_probe,
	.remove		= ds1302_remove,
};

module_spi_driver(ds1302_driver);

MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
MODULE_AUTHOR("Paul Mundt, David McCullough");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
c51669ea	1	// SPDX-License-Identifier: GPL-2.0-only
739d340d PM	2	/*
	3	* Dallas DS1302 RTC Support
	4	*
2bfc3305 AZ	5	* Copyright (C) 2002 David McCullough
2bfc3305 AZ	6	* Copyright (C) 2003 - 2007 Paul Mundt
739d340d	7	*/
2bfc3305	8
d25a5ed3	9	#include <linux/bcd.h>
739d340d	10	#include <linux/init.h>
d25a5ed3	11	#include <linux/io.h>
739d340d	12	#include <linux/kernel.h>
d25a5ed3 SY	13	#include <linux/module.h>
d25a5ed3 SY	14	#include <linux/of.h>
739d340d	15	#include <linux/rtc.h>
d25a5ed3	16	#include <linux/spi/spi.h>
739d340d	17
739d340d PM	18	#define RTC_CMD_READ 0x81 /* Read command */
	19	#define RTC_CMD_WRITE 0x80 /* Write command */
	20
dfc657b1 SY	21	#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
	22	#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
	23
739d340d PM	24	#define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
739d340d PM	25	#define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
d25a5ed3 SY	26	#define RTC_CLCK_BURST 0x1F /* Address of clock burst */
d25a5ed3 SY	27	#define RTC_CLCK_LEN 0x08 /* Size of clock burst */
dfc657b1	28	#define RTC_ADDR_CTRL 0x07 /* Address of control register */
739d340d PM	29	#define RTC_ADDR_YEAR 0x06 /* Address of year register */
	30	#define RTC_ADDR_DAY 0x05 /* Address of day of week register */
	31	#define RTC_ADDR_MON 0x04 /* Address of month register */
	32	#define RTC_ADDR_DATE 0x03 /* Address of day of month register */
	33	#define RTC_ADDR_HOUR 0x02 /* Address of hour register */
	34	#define RTC_ADDR_MIN 0x01 /* Address of minute register */
	35	#define RTC_ADDR_SEC 0x00 /* Address of second register */
	36
d25a5ed3	37	static int ds1302_rtc_set_time(struct device dev, struct rtc_time time)
72cc8e51	38	{
d25a5ed3 SY	39	struct spi_device *spi = dev_get_drvdata(dev);
d25a5ed3 SY	40	u8 buf[1 + RTC_CLCK_LEN];
5134d2fd	41	u8 *bp;
d25a5ed3 SY	42	int status;
	43
	44	/* Enable writing */
	45	bp = buf;
	46	*bp++ = RTC_ADDR_CTRL << 1 \| RTC_CMD_WRITE;
	47	*bp++ = RTC_CMD_WRITE_ENABLE;
	48
	49	status = spi_write_then_read(spi, buf, 2,
	50	NULL, 0);
bc83a141	51	if (status)
d25a5ed3 SY	52	return status;
	53
	54	/* Write registers starting at the first time/date address. */
	55	bp = buf;
	56	*bp++ = RTC_CLCK_BURST << 1 \| RTC_CMD_WRITE;
	57
	58	*bp++ = bin2bcd(time->tm_sec);
	59	*bp++ = bin2bcd(time->tm_min);
	60	*bp++ = bin2bcd(time->tm_hour);
	61	*bp++ = bin2bcd(time->tm_mday);
	62	*bp++ = bin2bcd(time->tm_mon + 1);
ef50f86e	63	*bp++ = time->tm_wday + 1;
d25a5ed3 SY	64	*bp++ = bin2bcd(time->tm_year % 100);
	65	*bp++ = RTC_CMD_WRITE_DISABLE;
	66
	67	/* use write-then-read since dma from stack is nonportable */
	68	return spi_write_then_read(spi, buf, sizeof(buf),
	69	NULL, 0);
72cc8e51 MZ	70	}
72cc8e51 MZ	71
d25a5ed3	72	static int ds1302_rtc_get_time(struct device dev, struct rtc_time time)
72cc8e51	73	{
d25a5ed3 SY	74	struct spi_device *spi = dev_get_drvdata(dev);
	75	u8 addr = RTC_CLCK_BURST << 1 \| RTC_CMD_READ;
	76	u8 buf[RTC_CLCK_LEN - 1];
	77	int status;
	78
	79	/* Use write-then-read to get all the date/time registers
	80	* since dma from stack is nonportable
	81	*/
	82	status = spi_write_then_read(spi, &addr, sizeof(addr),
	83	buf, sizeof(buf));
	84	if (status < 0)
	85	return status;
	86
	87	/* Decode the registers */
	88	time->tm_sec = bcd2bin(buf[RTC_ADDR_SEC]);
	89	time->tm_min = bcd2bin(buf[RTC_ADDR_MIN]);
	90	time->tm_hour = bcd2bin(buf[RTC_ADDR_HOUR]);
	91	time->tm_wday = buf[RTC_ADDR_DAY] - 1;
	92	time->tm_mday = bcd2bin(buf[RTC_ADDR_DATE]);
	93	time->tm_mon = bcd2bin(buf[RTC_ADDR_MON]) - 1;
	94	time->tm_year = bcd2bin(buf[RTC_ADDR_YEAR]) + 100;
	95
22652ba7	96	return 0;
72cc8e51 MZ	97	}
72cc8e51 MZ	98
34c7b3ac	99	static const struct rtc_class_ops ds1302_rtc_ops = {
d25a5ed3 SY	100	.read_time = ds1302_rtc_get_time,
	101	.set_time = ds1302_rtc_set_time,
	102	};
739d340d	103
d25a5ed3	104	static int ds1302_probe(struct spi_device *spi)
739d340d	105	{
d25a5ed3 SY	106	struct rtc_device *rtc;
	107	u8 addr;
	108	u8 buf[4];
5134d2fd	109	u8 *bp;
d25a5ed3 SY	110	int status;
	111
	112	/* Sanity check board setup data. This may be hooked up
	113	* in 3wire mode, but we don't care. Note that unless
	114	* there's an inverter in place, this needs SPI_CS_HIGH!
	115	*/
	116	if (spi->bits_per_word && (spi->bits_per_word != 8)) {
	117	dev_err(&spi->dev, "bad word length\n");
	118	return -EINVAL;
	119	} else if (spi->max_speed_hz > 2000000) {
	120	dev_err(&spi->dev, "speed is too high\n");
	121	return -EINVAL;
	122	} else if (spi->mode & SPI_CPHA) {
	123	dev_err(&spi->dev, "bad mode\n");
	124	return -EINVAL;
739d340d	125	}
72cc8e51	126
d25a5ed3 SY	127	addr = RTC_ADDR_CTRL << 1 \| RTC_CMD_READ;
	128	status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
	129	if (status < 0) {
	130	dev_err(&spi->dev, "control register read error %d\n",
	131	status);
	132	return status;
739d340d PM	133	}
739d340d PM	134
d25a5ed3 SY	135	if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
	136	status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
	137	if (status < 0) {
	138	dev_err(&spi->dev, "control register read error %d\n",
	139	status);
	140	return status;
	141	}
	142
	143	if ((buf[0] & ~RTC_CMD_WRITE_DISABLE) != 0) {
	144	dev_err(&spi->dev, "junk in control register\n");
	145	return -ENODEV;
	146	}
	147	}
	148	if (buf[0] == 0) {
	149	bp = buf;
	150	*bp++ = RTC_ADDR_CTRL << 1 \| RTC_CMD_WRITE;
	151	*bp++ = RTC_CMD_WRITE_DISABLE;
	152
	153	status = spi_write_then_read(spi, buf, 2, NULL, 0);
	154	if (status < 0) {
	155	dev_err(&spi->dev, "control register write error %d\n",
	156	status);
	157	return status;
	158	}
	159
	160	addr = RTC_ADDR_CTRL << 1 \| RTC_CMD_READ;
	161	status = spi_write_then_read(spi, &addr, sizeof(addr), buf, 1);
	162	if (status < 0) {
	163	dev_err(&spi->dev,
	164	"error %d reading control register\n",
	165	status);
	166	return status;
	167	}
	168
	169	if (buf[0] != RTC_CMD_WRITE_DISABLE) {
	170	dev_err(&spi->dev, "failed to detect chip\n");
	171	return -ENODEV;
	172	}
	173	}
739d340d	174
d25a5ed3	175	spi_set_drvdata(spi, spi);
739d340d	176
d25a5ed3 SY	177	rtc = devm_rtc_device_register(&spi->dev, "ds1302",
	178	&ds1302_rtc_ops, THIS_MODULE);
	179	if (IS_ERR(rtc)) {
	180	status = PTR_ERR(rtc);
	181	dev_err(&spi->dev, "error %d registering rtc\n", status);
	182	return status;
	183	}
dfc657b1	184
739d340d PM	185	return 0;
	186	}
	187
d25a5ed3	188	static int ds1302_remove(struct spi_device *spi)
739d340d	189	{
d25a5ed3 SY	190	spi_set_drvdata(spi, NULL);
d25a5ed3 SY	191	return 0;
739d340d PM	192	}
739d340d PM	193
d25a5ed3 SY	194	#ifdef CONFIG_OF
	195	static const struct of_device_id ds1302_dt_ids[] = {
	196	{ .compatible = "maxim,ds1302", },
	197	{ /* sentinel */ }
739d340d	198	};
d25a5ed3 SY	199	MODULE_DEVICE_TABLE(of, ds1302_dt_ids);
d25a5ed3 SY	200	#endif
739d340d	201
d25a5ed3 SY	202	static struct spi_driver ds1302_driver = {
	203	.driver.name = "rtc-ds1302",
	204	.driver.of_match_table = of_match_ptr(ds1302_dt_ids),
	205	.probe = ds1302_probe,
	206	.remove = ds1302_remove,
739d340d PM	207	};
739d340d PM	208
d25a5ed3	209	module_spi_driver(ds1302_driver);
739d340d PM	210
739d340d PM	211	MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
739d340d PM	212	MODULE_AUTHOR("Paul Mundt, David McCullough");
739d340d PM	213	MODULE_LICENSE("GPL v2");