]>
Commit | Line | Data |
---|---|---|
c03675f0 | 1 | /* |
080481f5 | 2 | * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock |
c03675f0 | 3 | * |
a2d6d2fa | 4 | * Copyright (C) 2009-2011 Freescale Semiconductor. |
f46418c5 | 5 | * Author: Jack Lan <jack.lan@freescale.com> |
080481f5 | 6 | * Copyright (C) 2008 MIMOMax Wireless Ltd. |
c03675f0 RZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
c03675f0 | 13 | |
a737e835 JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
c03675f0 RZ |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/i2c.h> | |
080481f5 | 20 | #include <linux/spi/spi.h> |
c03675f0 RZ |
21 | #include <linux/rtc.h> |
22 | #include <linux/bcd.h> | |
c03675f0 | 23 | #include <linux/slab.h> |
370927c4 | 24 | #include <linux/regmap.h> |
c03675f0 | 25 | |
ca4b0a6d PR |
26 | #define DS3232_REG_SECONDS 0x00 |
27 | #define DS3232_REG_MINUTES 0x01 | |
28 | #define DS3232_REG_HOURS 0x02 | |
29 | #define DS3232_REG_AMPM 0x02 | |
30 | #define DS3232_REG_DAY 0x03 | |
31 | #define DS3232_REG_DATE 0x04 | |
32 | #define DS3232_REG_MONTH 0x05 | |
33 | #define DS3232_REG_CENTURY 0x05 | |
34 | #define DS3232_REG_YEAR 0x06 | |
35 | #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ | |
36 | #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ | |
37 | #define DS3232_REG_CR 0x0E /* Control register */ | |
38 | # define DS3232_REG_CR_nEOSC 0x80 | |
39 | # define DS3232_REG_CR_INTCN 0x04 | |
40 | # define DS3232_REG_CR_A2IE 0x02 | |
41 | # define DS3232_REG_CR_A1IE 0x01 | |
c03675f0 | 42 | |
ca4b0a6d PR |
43 | #define DS3232_REG_SR 0x0F /* control/status register */ |
44 | # define DS3232_REG_SR_OSF 0x80 | |
45 | # define DS3232_REG_SR_BSY 0x04 | |
46 | # define DS3232_REG_SR_A2F 0x02 | |
47 | # define DS3232_REG_SR_A1F 0x01 | |
c03675f0 RZ |
48 | |
49 | struct ds3232 { | |
370927c4 AM |
50 | struct device *dev; |
51 | struct regmap *regmap; | |
52 | int irq; | |
c03675f0 | 53 | struct rtc_device *rtc; |
c03675f0 | 54 | |
c93a3ae2 | 55 | bool suspended; |
c03675f0 RZ |
56 | }; |
57 | ||
370927c4 | 58 | static int ds3232_check_rtc_status(struct device *dev) |
c03675f0 | 59 | { |
370927c4 | 60 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
61 | int ret = 0; |
62 | int control, stat; | |
63 | ||
370927c4 AM |
64 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
65 | if (ret) | |
66 | return ret; | |
c03675f0 RZ |
67 | |
68 | if (stat & DS3232_REG_SR_OSF) | |
370927c4 | 69 | dev_warn(dev, |
c03675f0 RZ |
70 | "oscillator discontinuity flagged, " |
71 | "time unreliable\n"); | |
72 | ||
73 | stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); | |
74 | ||
370927c4 AM |
75 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
76 | if (ret) | |
c03675f0 RZ |
77 | return ret; |
78 | ||
79 | /* If the alarm is pending, clear it before requesting | |
80 | * the interrupt, so an interrupt event isn't reported | |
81 | * before everything is initialized. | |
82 | */ | |
83 | ||
370927c4 AM |
84 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
85 | if (ret) | |
86 | return ret; | |
c03675f0 RZ |
87 | |
88 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); | |
89 | control |= DS3232_REG_CR_INTCN; | |
90 | ||
370927c4 | 91 | return regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
c03675f0 RZ |
92 | } |
93 | ||
94 | static int ds3232_read_time(struct device *dev, struct rtc_time *time) | |
95 | { | |
370927c4 | 96 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
97 | int ret; |
98 | u8 buf[7]; | |
99 | unsigned int year, month, day, hour, minute, second; | |
100 | unsigned int week, twelve_hr, am_pm; | |
101 | unsigned int century, add_century = 0; | |
102 | ||
370927c4 AM |
103 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
104 | if (ret) | |
c03675f0 | 105 | return ret; |
c03675f0 RZ |
106 | |
107 | second = buf[0]; | |
108 | minute = buf[1]; | |
109 | hour = buf[2]; | |
110 | week = buf[3]; | |
111 | day = buf[4]; | |
112 | month = buf[5]; | |
113 | year = buf[6]; | |
114 | ||
115 | /* Extract additional information for AM/PM and century */ | |
116 | ||
117 | twelve_hr = hour & 0x40; | |
118 | am_pm = hour & 0x20; | |
119 | century = month & 0x80; | |
120 | ||
121 | /* Write to rtc_time structure */ | |
122 | ||
123 | time->tm_sec = bcd2bin(second); | |
124 | time->tm_min = bcd2bin(minute); | |
125 | if (twelve_hr) { | |
126 | /* Convert to 24 hr */ | |
127 | if (am_pm) | |
128 | time->tm_hour = bcd2bin(hour & 0x1F) + 12; | |
129 | else | |
130 | time->tm_hour = bcd2bin(hour & 0x1F); | |
131 | } else { | |
132 | time->tm_hour = bcd2bin(hour); | |
133 | } | |
134 | ||
a2d6d2fa LX |
135 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
136 | time->tm_wday = bcd2bin(week) - 1; | |
c03675f0 | 137 | time->tm_mday = bcd2bin(day); |
a2d6d2fa LX |
138 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
139 | time->tm_mon = bcd2bin(month & 0x7F) - 1; | |
c03675f0 RZ |
140 | if (century) |
141 | add_century = 100; | |
142 | ||
143 | time->tm_year = bcd2bin(year) + add_century; | |
144 | ||
145 | return rtc_valid_tm(time); | |
146 | } | |
147 | ||
148 | static int ds3232_set_time(struct device *dev, struct rtc_time *time) | |
149 | { | |
370927c4 | 150 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
151 | u8 buf[7]; |
152 | ||
153 | /* Extract time from rtc_time and load into ds3232*/ | |
154 | ||
155 | buf[0] = bin2bcd(time->tm_sec); | |
156 | buf[1] = bin2bcd(time->tm_min); | |
157 | buf[2] = bin2bcd(time->tm_hour); | |
a2d6d2fa LX |
158 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
159 | buf[3] = bin2bcd(time->tm_wday + 1); | |
c03675f0 | 160 | buf[4] = bin2bcd(time->tm_mday); /* Date */ |
a2d6d2fa LX |
161 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
162 | buf[5] = bin2bcd(time->tm_mon + 1); | |
c03675f0 RZ |
163 | if (time->tm_year >= 100) { |
164 | buf[5] |= 0x80; | |
165 | buf[6] = bin2bcd(time->tm_year - 100); | |
166 | } else { | |
167 | buf[6] = bin2bcd(time->tm_year); | |
168 | } | |
169 | ||
370927c4 | 170 | return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
c03675f0 RZ |
171 | } |
172 | ||
f46418c5 LCB |
173 | /* |
174 | * DS3232 has two alarm, we only use alarm1 | |
175 | * According to linux specification, only support one-shot alarm | |
176 | * no periodic alarm mode | |
177 | */ | |
178 | static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
179 | { | |
370927c4 | 180 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
181 | int control, stat; |
182 | int ret; | |
183 | u8 buf[4]; | |
184 | ||
370927c4 AM |
185 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
186 | if (ret) | |
f46418c5 | 187 | goto out; |
370927c4 AM |
188 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
189 | if (ret) | |
f46418c5 | 190 | goto out; |
370927c4 AM |
191 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
192 | if (ret) | |
f46418c5 LCB |
193 | goto out; |
194 | ||
195 | alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); | |
196 | alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); | |
197 | alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); | |
198 | alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); | |
199 | ||
f46418c5 LCB |
200 | alarm->enabled = !!(control & DS3232_REG_CR_A1IE); |
201 | alarm->pending = !!(stat & DS3232_REG_SR_A1F); | |
202 | ||
203 | ret = 0; | |
204 | out: | |
f46418c5 LCB |
205 | return ret; |
206 | } | |
207 | ||
208 | /* | |
209 | * linux rtc-module does not support wday alarm | |
210 | * and only 24h time mode supported indeed | |
211 | */ | |
212 | static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
213 | { | |
370927c4 | 214 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
215 | int control, stat; |
216 | int ret; | |
217 | u8 buf[4]; | |
218 | ||
370927c4 | 219 | if (ds3232->irq <= 0) |
f46418c5 LCB |
220 | return -EINVAL; |
221 | ||
f46418c5 LCB |
222 | buf[0] = bin2bcd(alarm->time.tm_sec); |
223 | buf[1] = bin2bcd(alarm->time.tm_min); | |
224 | buf[2] = bin2bcd(alarm->time.tm_hour); | |
225 | buf[3] = bin2bcd(alarm->time.tm_mday); | |
226 | ||
227 | /* clear alarm interrupt enable bit */ | |
370927c4 AM |
228 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
229 | if (ret) | |
f46418c5 | 230 | goto out; |
f46418c5 | 231 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); |
370927c4 AM |
232 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
233 | if (ret) | |
f46418c5 LCB |
234 | goto out; |
235 | ||
236 | /* clear any pending alarm flag */ | |
370927c4 AM |
237 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
238 | if (ret) | |
f46418c5 | 239 | goto out; |
f46418c5 | 240 | stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); |
370927c4 AM |
241 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
242 | if (ret) | |
f46418c5 LCB |
243 | goto out; |
244 | ||
370927c4 | 245 | ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
7b4393a6 AM |
246 | if (ret) |
247 | goto out; | |
f46418c5 LCB |
248 | |
249 | if (alarm->enabled) { | |
250 | control |= DS3232_REG_CR_A1IE; | |
370927c4 | 251 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 LCB |
252 | } |
253 | out: | |
f46418c5 LCB |
254 | return ret; |
255 | } | |
256 | ||
7b4393a6 | 257 | static int ds3232_update_alarm(struct device *dev, unsigned int enabled) |
f46418c5 | 258 | { |
370927c4 | 259 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
260 | int control; |
261 | int ret; | |
f46418c5 | 262 | |
370927c4 AM |
263 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
264 | if (ret) | |
fc1dcb0b | 265 | return ret; |
f46418c5 | 266 | |
7522297e | 267 | if (enabled) |
f46418c5 LCB |
268 | /* enable alarm1 interrupt */ |
269 | control |= DS3232_REG_CR_A1IE; | |
270 | else | |
271 | /* disable alarm1 interrupt */ | |
272 | control &= ~(DS3232_REG_CR_A1IE); | |
7b4393a6 | 273 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 | 274 | |
7b4393a6 | 275 | return ret; |
f46418c5 LCB |
276 | } |
277 | ||
278 | static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
279 | { | |
370927c4 | 280 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 | 281 | |
370927c4 | 282 | if (ds3232->irq <= 0) |
f46418c5 LCB |
283 | return -EINVAL; |
284 | ||
7b4393a6 | 285 | return ds3232_update_alarm(dev, enabled); |
f46418c5 LCB |
286 | } |
287 | ||
c03675f0 RZ |
288 | static irqreturn_t ds3232_irq(int irq, void *dev_id) |
289 | { | |
370927c4 AM |
290 | struct device *dev = dev_id; |
291 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
fc1dcb0b | 292 | struct mutex *lock = &ds3232->rtc->ops_lock; |
370927c4 | 293 | int ret; |
c03675f0 RZ |
294 | int stat, control; |
295 | ||
fc1dcb0b | 296 | mutex_lock(lock); |
c03675f0 | 297 | |
370927c4 AM |
298 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
299 | if (ret) | |
c03675f0 RZ |
300 | goto unlock; |
301 | ||
302 | if (stat & DS3232_REG_SR_A1F) { | |
370927c4 AM |
303 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
304 | if (ret) { | |
95c60c1c AM |
305 | dev_warn(ds3232->dev, |
306 | "Read Control Register error %d\n", ret); | |
c93a3ae2 WD |
307 | } else { |
308 | /* disable alarm1 interrupt */ | |
309 | control &= ~(DS3232_REG_CR_A1IE); | |
7b4393a6 AM |
310 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, |
311 | control); | |
312 | if (ret) { | |
313 | dev_warn(ds3232->dev, | |
314 | "Write Control Register error %d\n", | |
315 | ret); | |
316 | goto unlock; | |
317 | } | |
c93a3ae2 WD |
318 | |
319 | /* clear the alarm pend flag */ | |
320 | stat &= ~DS3232_REG_SR_A1F; | |
7b4393a6 AM |
321 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
322 | if (ret) { | |
323 | dev_warn(ds3232->dev, | |
324 | "Write Status Register error %d\n", | |
325 | ret); | |
326 | goto unlock; | |
327 | } | |
c93a3ae2 WD |
328 | |
329 | rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); | |
c93a3ae2 | 330 | } |
c03675f0 RZ |
331 | } |
332 | ||
c03675f0 | 333 | unlock: |
fc1dcb0b | 334 | mutex_unlock(lock); |
95c60c1c AM |
335 | |
336 | return IRQ_HANDLED; | |
c03675f0 RZ |
337 | } |
338 | ||
339 | static const struct rtc_class_ops ds3232_rtc_ops = { | |
340 | .read_time = ds3232_read_time, | |
341 | .set_time = ds3232_set_time, | |
f46418c5 LCB |
342 | .read_alarm = ds3232_read_alarm, |
343 | .set_alarm = ds3232_set_alarm, | |
344 | .alarm_irq_enable = ds3232_alarm_irq_enable, | |
c03675f0 RZ |
345 | }; |
346 | ||
370927c4 AM |
347 | static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, |
348 | const char *name) | |
c03675f0 RZ |
349 | { |
350 | struct ds3232 *ds3232; | |
351 | int ret; | |
352 | ||
370927c4 | 353 | ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); |
c03675f0 RZ |
354 | if (!ds3232) |
355 | return -ENOMEM; | |
356 | ||
370927c4 AM |
357 | ds3232->regmap = regmap; |
358 | ds3232->irq = irq; | |
359 | ds3232->dev = dev; | |
360 | dev_set_drvdata(dev, ds3232); | |
c03675f0 | 361 | |
370927c4 | 362 | ret = ds3232_check_rtc_status(dev); |
c03675f0 | 363 | if (ret) |
66714612 | 364 | return ret; |
c03675f0 | 365 | |
d4f6c6f1 PR |
366 | if (ds3232->irq > 0) |
367 | device_init_wakeup(dev, 1); | |
368 | ||
b4b77f3c QG |
369 | ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, |
370 | THIS_MODULE); | |
371 | if (IS_ERR(ds3232->rtc)) | |
372 | return PTR_ERR(ds3232->rtc); | |
373 | ||
370927c4 | 374 | if (ds3232->irq > 0) { |
95c60c1c AM |
375 | ret = devm_request_threaded_irq(dev, ds3232->irq, NULL, |
376 | ds3232_irq, | |
377 | IRQF_SHARED | IRQF_ONESHOT, | |
378 | name, dev); | |
c03675f0 | 379 | if (ret) { |
d4f6c6f1 | 380 | device_set_wakeup_capable(dev, 0); |
370927c4 AM |
381 | ds3232->irq = 0; |
382 | dev_err(dev, "unable to request IRQ\n"); | |
d4f6c6f1 | 383 | } |
c03675f0 | 384 | } |
370927c4 | 385 | |
b4b77f3c | 386 | return 0; |
c03675f0 RZ |
387 | } |
388 | ||
c93a3ae2 WD |
389 | #ifdef CONFIG_PM_SLEEP |
390 | static int ds3232_suspend(struct device *dev) | |
391 | { | |
392 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 | 393 | |
95c60c1c AM |
394 | if (device_may_wakeup(dev)) { |
395 | if (enable_irq_wake(ds3232->irq)) | |
dc2280eb | 396 | dev_warn_once(dev, "Cannot set wakeup source\n"); |
c93a3ae2 WD |
397 | } |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
402 | static int ds3232_resume(struct device *dev) | |
403 | { | |
404 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 | 405 | |
95c60c1c AM |
406 | if (device_may_wakeup(dev)) |
407 | disable_irq_wake(ds3232->irq); | |
c93a3ae2 WD |
408 | |
409 | return 0; | |
410 | } | |
411 | #endif | |
412 | ||
413 | static const struct dev_pm_ops ds3232_pm_ops = { | |
414 | SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) | |
415 | }; | |
416 | ||
080481f5 AM |
417 | #if IS_ENABLED(CONFIG_I2C) |
418 | ||
370927c4 AM |
419 | static int ds3232_i2c_probe(struct i2c_client *client, |
420 | const struct i2c_device_id *id) | |
421 | { | |
422 | struct regmap *regmap; | |
423 | static const struct regmap_config config = { | |
424 | .reg_bits = 8, | |
425 | .val_bits = 8, | |
082edf0a | 426 | .max_register = 0x13, |
370927c4 AM |
427 | }; |
428 | ||
429 | regmap = devm_regmap_init_i2c(client, &config); | |
430 | if (IS_ERR(regmap)) { | |
431 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
432 | __func__, PTR_ERR(regmap)); | |
433 | return PTR_ERR(regmap); | |
434 | } | |
435 | ||
436 | return ds3232_probe(&client->dev, regmap, client->irq, client->name); | |
437 | } | |
438 | ||
c03675f0 RZ |
439 | static const struct i2c_device_id ds3232_id[] = { |
440 | { "ds3232", 0 }, | |
441 | { } | |
442 | }; | |
443 | MODULE_DEVICE_TABLE(i2c, ds3232_id); | |
444 | ||
4dfbd137 JMC |
445 | static const struct of_device_id ds3232_of_match[] = { |
446 | { .compatible = "dallas,ds3232" }, | |
447 | { } | |
448 | }; | |
449 | MODULE_DEVICE_TABLE(of, ds3232_of_match); | |
450 | ||
c03675f0 RZ |
451 | static struct i2c_driver ds3232_driver = { |
452 | .driver = { | |
453 | .name = "rtc-ds3232", | |
4dfbd137 | 454 | .of_match_table = of_match_ptr(ds3232_of_match), |
c93a3ae2 | 455 | .pm = &ds3232_pm_ops, |
c03675f0 | 456 | }, |
370927c4 | 457 | .probe = ds3232_i2c_probe, |
c03675f0 RZ |
458 | .id_table = ds3232_id, |
459 | }; | |
080481f5 AM |
460 | |
461 | static int ds3232_register_driver(void) | |
462 | { | |
463 | return i2c_add_driver(&ds3232_driver); | |
464 | } | |
465 | ||
466 | static void ds3232_unregister_driver(void) | |
467 | { | |
468 | i2c_del_driver(&ds3232_driver); | |
469 | } | |
470 | ||
471 | #else | |
472 | ||
473 | static int ds3232_register_driver(void) | |
474 | { | |
475 | return 0; | |
476 | } | |
477 | ||
478 | static void ds3232_unregister_driver(void) | |
479 | { | |
480 | } | |
481 | ||
482 | #endif | |
483 | ||
484 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
485 | ||
486 | static int ds3234_probe(struct spi_device *spi) | |
487 | { | |
488 | int res; | |
489 | unsigned int tmp; | |
490 | static const struct regmap_config config = { | |
491 | .reg_bits = 8, | |
492 | .val_bits = 8, | |
082edf0a | 493 | .max_register = 0x13, |
080481f5 AM |
494 | .write_flag_mask = 0x80, |
495 | }; | |
496 | struct regmap *regmap; | |
497 | ||
498 | regmap = devm_regmap_init_spi(spi, &config); | |
499 | if (IS_ERR(regmap)) { | |
500 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
501 | __func__, PTR_ERR(regmap)); | |
502 | return PTR_ERR(regmap); | |
503 | } | |
504 | ||
505 | spi->mode = SPI_MODE_3; | |
506 | spi->bits_per_word = 8; | |
507 | spi_setup(spi); | |
508 | ||
509 | res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); | |
510 | if (res) | |
511 | return res; | |
512 | ||
513 | /* Control settings | |
514 | * | |
515 | * CONTROL_REG | |
516 | * BIT 7 6 5 4 3 2 1 0 | |
517 | * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE | |
518 | * | |
519 | * 0 0 0 1 1 1 0 0 | |
520 | * | |
521 | * CONTROL_STAT_REG | |
522 | * BIT 7 6 5 4 3 2 1 0 | |
523 | * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F | |
524 | * | |
525 | * 1 0 0 0 1 0 0 0 | |
526 | */ | |
527 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
528 | if (res) | |
529 | return res; | |
530 | res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); | |
531 | if (res) | |
532 | return res; | |
533 | ||
534 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
535 | if (res) | |
536 | return res; | |
537 | res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); | |
538 | if (res) | |
539 | return res; | |
540 | ||
541 | /* Print our settings */ | |
542 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
543 | if (res) | |
544 | return res; | |
545 | dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); | |
546 | ||
547 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
548 | if (res) | |
549 | return res; | |
550 | dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); | |
551 | ||
552 | return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); | |
553 | } | |
554 | ||
080481f5 AM |
555 | static struct spi_driver ds3234_driver = { |
556 | .driver = { | |
557 | .name = "ds3234", | |
558 | }, | |
559 | .probe = ds3234_probe, | |
080481f5 AM |
560 | }; |
561 | ||
562 | static int ds3234_register_driver(void) | |
563 | { | |
564 | return spi_register_driver(&ds3234_driver); | |
565 | } | |
566 | ||
567 | static void ds3234_unregister_driver(void) | |
568 | { | |
569 | spi_unregister_driver(&ds3234_driver); | |
570 | } | |
571 | ||
572 | #else | |
573 | ||
574 | static int ds3234_register_driver(void) | |
575 | { | |
576 | return 0; | |
577 | } | |
578 | ||
579 | static void ds3234_unregister_driver(void) | |
580 | { | |
581 | } | |
582 | ||
583 | #endif | |
584 | ||
585 | static int __init ds323x_init(void) | |
586 | { | |
587 | int ret; | |
588 | ||
589 | ret = ds3232_register_driver(); | |
590 | if (ret) { | |
591 | pr_err("Failed to register ds3232 driver: %d\n", ret); | |
592 | return ret; | |
593 | } | |
594 | ||
595 | ret = ds3234_register_driver(); | |
596 | if (ret) { | |
597 | pr_err("Failed to register ds3234 driver: %d\n", ret); | |
598 | ds3232_unregister_driver(); | |
599 | } | |
600 | ||
601 | return ret; | |
602 | } | |
603 | module_init(ds323x_init) | |
604 | ||
605 | static void __exit ds323x_exit(void) | |
606 | { | |
607 | ds3234_unregister_driver(); | |
608 | ds3232_unregister_driver(); | |
609 | } | |
610 | module_exit(ds323x_exit) | |
c03675f0 RZ |
611 | |
612 | MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); | |
080481f5 AM |
613 | MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); |
614 | MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); | |
c03675f0 | 615 | MODULE_LICENSE("GPL"); |
080481f5 | 616 | MODULE_ALIAS("spi:ds3234"); |