[mirror_ubuntu-artful-kernel.git] / drivers / rtc / rtc-ds3232.c

/*
 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
 *
 * Copyright (C) 2009-2011 Freescale Semiconductor.
 * Author: Jack Lan <jack.lan@freescale.com>
 * Copyright (C) 2008 MIMOMax Wireless Ltd.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/rtc.h>
#include <linux/bcd.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include <linux/hwmon.h>

#define DS3232_REG_SECONDS      0x00
#define DS3232_REG_MINUTES      0x01
#define DS3232_REG_HOURS        0x02
#define DS3232_REG_AMPM         0x02
#define DS3232_REG_DAY          0x03
#define DS3232_REG_DATE         0x04
#define DS3232_REG_MONTH        0x05
#define DS3232_REG_CENTURY      0x05
#define DS3232_REG_YEAR         0x06
#define DS3232_REG_ALARM1       0x07       /* Alarm 1 BASE */
#define DS3232_REG_ALARM2       0x0B       /* Alarm 2 BASE */
#define DS3232_REG_CR           0x0E       /* Control register */
#       define DS3232_REG_CR_nEOSC   0x80
#       define DS3232_REG_CR_INTCN   0x04
#       define DS3232_REG_CR_A2IE    0x02
#       define DS3232_REG_CR_A1IE    0x01

#define DS3232_REG_SR           0x0F       /* control/status register */
#       define DS3232_REG_SR_OSF     0x80
#       define DS3232_REG_SR_BSY     0x04
#       define DS3232_REG_SR_A2F     0x02
#       define DS3232_REG_SR_A1F     0x01

#define DS3232_REG_TEMPERATURE	0x11

struct ds3232 {
	struct device *dev;
	struct regmap *regmap;
	int irq;
	struct rtc_device *rtc;

	bool suspended;
};

static int ds3232_check_rtc_status(struct device *dev)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	int ret = 0;
	int control, stat;

	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
	if (ret)
		return ret;

	if (stat & DS3232_REG_SR_OSF)
		dev_warn(dev,
				"oscillator discontinuity flagged, "
				"time unreliable\n");

	stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);

	ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
	if (ret)
		return ret;

	/* If the alarm is pending, clear it before requesting
	 * the interrupt, so an interrupt event isn't reported
	 * before everything is initialized.
	 */

	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
	if (ret)
		return ret;

	control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
	control |= DS3232_REG_CR_INTCN;

	return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
}

static int ds3232_read_time(struct device *dev, struct rtc_time *time)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	int ret;
	u8 buf[7];
	unsigned int year, month, day, hour, minute, second;
	unsigned int week, twelve_hr, am_pm;
	unsigned int century, add_century = 0;

	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
	if (ret)
		return ret;

	second = buf[0];
	minute = buf[1];
	hour = buf[2];
	week = buf[3];
	day = buf[4];
	month = buf[5];
	year = buf[6];

	/* Extract additional information for AM/PM and century */

	twelve_hr = hour & 0x40;
	am_pm = hour & 0x20;
	century = month & 0x80;

	/* Write to rtc_time structure */

	time->tm_sec = bcd2bin(second);
	time->tm_min = bcd2bin(minute);
	if (twelve_hr) {
		/* Convert to 24 hr */
		if (am_pm)
			time->tm_hour = bcd2bin(hour & 0x1F) + 12;
		else
			time->tm_hour = bcd2bin(hour & 0x1F);
	} else {
		time->tm_hour = bcd2bin(hour);
	}

	/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
	time->tm_wday = bcd2bin(week) - 1;
	time->tm_mday = bcd2bin(day);
	/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
	time->tm_mon = bcd2bin(month & 0x7F) - 1;
	if (century)
		add_century = 100;

	time->tm_year = bcd2bin(year) + add_century;

	return rtc_valid_tm(time);
}

static int ds3232_set_time(struct device *dev, struct rtc_time *time)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	u8 buf[7];

	/* Extract time from rtc_time and load into ds3232*/

	buf[0] = bin2bcd(time->tm_sec);
	buf[1] = bin2bcd(time->tm_min);
	buf[2] = bin2bcd(time->tm_hour);
	/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
	buf[3] = bin2bcd(time->tm_wday + 1);
	buf[4] = bin2bcd(time->tm_mday); /* Date */
	/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
	buf[5] = bin2bcd(time->tm_mon + 1);
	if (time->tm_year >= 100) {
		buf[5] |= 0x80;
		buf[6] = bin2bcd(time->tm_year - 100);
	} else {
		buf[6] = bin2bcd(time->tm_year);
	}

	return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
}

/*
 * DS3232 has two alarm, we only use alarm1
 * According to linux specification, only support one-shot alarm
 * no periodic alarm mode
 */
static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	int control, stat;
	int ret;
	u8 buf[4];

	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
	if (ret)
		goto out;
	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
	if (ret)
		goto out;
	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
	if (ret)
		goto out;

	alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
	alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
	alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
	alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);

	alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
	alarm->pending = !!(stat & DS3232_REG_SR_A1F);

	ret = 0;
out:
	return ret;
}

/*
 * linux rtc-module does not support wday alarm
 * and only 24h time mode supported indeed
 */
static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	int control, stat;
	int ret;
	u8 buf[4];

	if (ds3232->irq <= 0)
		return -EINVAL;

	buf[0] = bin2bcd(alarm->time.tm_sec);
	buf[1] = bin2bcd(alarm->time.tm_min);
	buf[2] = bin2bcd(alarm->time.tm_hour);
	buf[3] = bin2bcd(alarm->time.tm_mday);

	/* clear alarm interrupt enable bit */
	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
	if (ret)
		goto out;
	control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE);
	ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
	if (ret)
		goto out;

	/* clear any pending alarm flag */
	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
	if (ret)
		goto out;
	stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F);
	ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
	if (ret)
		goto out;

	ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
	if (ret)
		goto out;

	if (alarm->enabled) {
		control |= DS3232_REG_CR_A1IE;
		ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
	}
out:
	return ret;
}

static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	int control;
	int ret;

	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
	if (ret)
		return ret;

	if (enabled)
		/* enable alarm1 interrupt */
		control |= DS3232_REG_CR_A1IE;
	else
		/* disable alarm1 interrupt */
		control &= ~(DS3232_REG_CR_A1IE);
	ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);

	return ret;
}

/*
 * Temperature sensor support for ds3232/ds3234 devices.
 * A user-initiated temperature conversion is not started by this function,
 * so the temperature is updated once every 64 seconds.
 */
static int ds3232_hwmon_read_temp(struct device *dev, long int *mC)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	u8 temp_buf[2];
	s16 temp;
	int ret;

	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf,
			       sizeof(temp_buf));
	if (ret < 0)
		return ret;

	/*
	 * Temperature is represented as a 10-bit code with a resolution of
	 * 0.25 degree celsius and encoded in two's complement format.
	 */
	temp = (temp_buf[0] << 8) | temp_buf[1];
	temp >>= 6;
	*mC = temp * 250;

	return 0;
}

static umode_t ds3232_hwmon_is_visible(const void *data,
				       enum hwmon_sensor_types type,
				       u32 attr, int channel)
{
	if (type != hwmon_temp)
		return 0;

	switch (attr) {
	case hwmon_temp_input:
		return 0444;
	default:
		return 0;
	}
}

static int ds3232_hwmon_read(struct device *dev,
			     enum hwmon_sensor_types type,
			     u32 attr, int channel, long *temp)
{
	int err;

	switch (attr) {
	case hwmon_temp_input:
		err = ds3232_hwmon_read_temp(dev, temp);
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	return err;
}

static u32 ds3232_hwmon_chip_config[] = {
	HWMON_C_REGISTER_TZ,
	0
};

static const struct hwmon_channel_info ds3232_hwmon_chip = {
	.type = hwmon_chip,
	.config = ds3232_hwmon_chip_config,
};

static u32 ds3232_hwmon_temp_config[] = {
	HWMON_T_INPUT,
	0
};

static const struct hwmon_channel_info ds3232_hwmon_temp = {
	.type = hwmon_temp,
	.config = ds3232_hwmon_temp_config,
};

static const struct hwmon_channel_info *ds3232_hwmon_info[] = {
	&ds3232_hwmon_chip,
	&ds3232_hwmon_temp,
	NULL
};

static const struct hwmon_ops ds3232_hwmon_hwmon_ops = {
	.is_visible = ds3232_hwmon_is_visible,
	.read = ds3232_hwmon_read,
};

static const struct hwmon_chip_info ds3232_hwmon_chip_info = {
	.ops = &ds3232_hwmon_hwmon_ops,
	.info = ds3232_hwmon_info,
};

static void ds3232_hwmon_register(struct device *dev, const char *name)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	struct device *hwmon_dev;

	if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON))
		return;

	hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232,
							&ds3232_hwmon_chip_info,
							NULL);
	if (IS_ERR(hwmon_dev)) {
		dev_err(dev, "unable to register hwmon device %ld\n",
			PTR_ERR(hwmon_dev));
	}
}

static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);

	if (ds3232->irq <= 0)
		return -EINVAL;

	return ds3232_update_alarm(dev, enabled);
}

static irqreturn_t ds3232_irq(int irq, void *dev_id)
{
	struct device *dev = dev_id;
	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	struct mutex *lock = &ds3232->rtc->ops_lock;
	int ret;
	int stat, control;

	mutex_lock(lock);

	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
	if (ret)
		goto unlock;

	if (stat & DS3232_REG_SR_A1F) {
		ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
		if (ret) {
			dev_warn(ds3232->dev,
				 "Read Control Register error %d\n", ret);
		} else {
			/* disable alarm1 interrupt */
			control &= ~(DS3232_REG_CR_A1IE);
			ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
					   control);
			if (ret) {
				dev_warn(ds3232->dev,
					 "Write Control Register error %d\n",
					 ret);
				goto unlock;
			}

			/* clear the alarm pend flag */
			stat &= ~DS3232_REG_SR_A1F;
			ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
			if (ret) {
				dev_warn(ds3232->dev,
					 "Write Status Register error %d\n",
					 ret);
				goto unlock;
			}

			rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF);
		}
	}

unlock:
	mutex_unlock(lock);

	return IRQ_HANDLED;
}

static const struct rtc_class_ops ds3232_rtc_ops = {
	.read_time = ds3232_read_time,
	.set_time = ds3232_set_time,
	.read_alarm = ds3232_read_alarm,
	.set_alarm = ds3232_set_alarm,
	.alarm_irq_enable = ds3232_alarm_irq_enable,
};

static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq,
			const char *name)
{
	struct ds3232 *ds3232;
	int ret;

	ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
	if (!ds3232)
		return -ENOMEM;

	ds3232->regmap = regmap;
	ds3232->irq = irq;
	ds3232->dev = dev;
	dev_set_drvdata(dev, ds3232);

	ret = ds3232_check_rtc_status(dev);
	if (ret)
		return ret;

	if (ds3232->irq > 0)
		device_init_wakeup(dev, 1);

	ds3232_hwmon_register(dev, name);

	ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
						THIS_MODULE);
	if (IS_ERR(ds3232->rtc))
		return PTR_ERR(ds3232->rtc);

	if (ds3232->irq > 0) {
		ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
						ds3232_irq,
						IRQF_SHARED | IRQF_ONESHOT,
						name, dev);
		if (ret) {
			device_set_wakeup_capable(dev, 0);
			ds3232->irq = 0;
			dev_err(dev, "unable to request IRQ\n");
		}
	}

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int ds3232_suspend(struct device *dev)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);

	if (device_may_wakeup(dev)) {
		if (enable_irq_wake(ds3232->irq))
			dev_warn_once(dev, "Cannot set wakeup source\n");
	}

	return 0;
}

static int ds3232_resume(struct device *dev)
{
	struct ds3232 *ds3232 = dev_get_drvdata(dev);

	if (device_may_wakeup(dev))
		disable_irq_wake(ds3232->irq);

	return 0;
}
#endif

static const struct dev_pm_ops ds3232_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
};

#if IS_ENABLED(CONFIG_I2C)

static int ds3232_i2c_probe(struct i2c_client *client,
			    const struct i2c_device_id *id)
{
	struct regmap *regmap;
	static const struct regmap_config config = {
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = 0x13,
	};

	regmap = devm_regmap_init_i2c(client, &config);
	if (IS_ERR(regmap)) {
		dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
			__func__, PTR_ERR(regmap));
		return PTR_ERR(regmap);
	}

	return ds3232_probe(&client->dev, regmap, client->irq, client->name);
}

static const struct i2c_device_id ds3232_id[] = {
	{ "ds3232", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, ds3232_id);

static const struct of_device_id ds3232_of_match[] = {
	{ .compatible = "dallas,ds3232" },
	{ }
};
MODULE_DEVICE_TABLE(of, ds3232_of_match);

static struct i2c_driver ds3232_driver = {
	.driver = {
		.name = "rtc-ds3232",
		.of_match_table = of_match_ptr(ds3232_of_match),
		.pm	= &ds3232_pm_ops,
	},
	.probe = ds3232_i2c_probe,
	.id_table = ds3232_id,
};

static int ds3232_register_driver(void)
{
	return i2c_add_driver(&ds3232_driver);
}

static void ds3232_unregister_driver(void)
{
	i2c_del_driver(&ds3232_driver);
}

#else

static int ds3232_register_driver(void)
{
	return 0;
}

static void ds3232_unregister_driver(void)
{
}

#endif

#if IS_ENABLED(CONFIG_SPI_MASTER)

static int ds3234_probe(struct spi_device *spi)
{
	int res;
	unsigned int tmp;
	static const struct regmap_config config = {
		.reg_bits = 8,
		.val_bits = 8,
		.max_register = 0x13,
		.write_flag_mask = 0x80,
	};
	struct regmap *regmap;

	regmap = devm_regmap_init_spi(spi, &config);
	if (IS_ERR(regmap)) {
		dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
			__func__, PTR_ERR(regmap));
		return PTR_ERR(regmap);
	}

	spi->mode = SPI_MODE_3;
	spi->bits_per_word = 8;
	spi_setup(spi);

	res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
	if (res)
		return res;

	/* Control settings
	 *
	 * CONTROL_REG
	 * BIT 7	6	5	4	3	2	1	0
	 *     EOSC	BBSQW	CONV	RS2	RS1	INTCN	A2IE	A1IE
	 *
	 *     0	0	0	1	1	1	0	0
	 *
	 * CONTROL_STAT_REG
	 * BIT 7	6	5	4	3	2	1	0
	 *     OSF	BB32kHz	CRATE1	CRATE0	EN32kHz	BSY	A2F	A1F
	 *
	 *     1	0	0	0	1	0	0	0
	 */
	res = regmap_read(regmap, DS3232_REG_CR, &tmp);
	if (res)
		return res;
	res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
	if (res)
		return res;

	res = regmap_read(regmap, DS3232_REG_SR, &tmp);
	if (res)
		return res;
	res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
	if (res)
		return res;

	/* Print our settings */
	res = regmap_read(regmap, DS3232_REG_CR, &tmp);
	if (res)
		return res;
	dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);

	res = regmap_read(regmap, DS3232_REG_SR, &tmp);
	if (res)
		return res;
	dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);

	return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
}

static struct spi_driver ds3234_driver = {
	.driver = {
		.name	 = "ds3234",
	},
	.probe	 = ds3234_probe,
};

static int ds3234_register_driver(void)
{
	return spi_register_driver(&ds3234_driver);
}

static void ds3234_unregister_driver(void)
{
	spi_unregister_driver(&ds3234_driver);
}

#else

static int ds3234_register_driver(void)
{
	return 0;
}

static void ds3234_unregister_driver(void)
{
}

#endif

static int __init ds323x_init(void)
{
	int ret;

	ret = ds3232_register_driver();
	if (ret) {
		pr_err("Failed to register ds3232 driver: %d\n", ret);
		return ret;
	}

	ret = ds3234_register_driver();
	if (ret) {
		pr_err("Failed to register ds3234 driver: %d\n", ret);
		ds3232_unregister_driver();
	}

	return ret;
}
module_init(ds323x_init)

static void __exit ds323x_exit(void)
{
	ds3234_unregister_driver();
	ds3232_unregister_driver();
}
module_exit(ds323x_exit)

MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("spi:ds3234");
Commit	Line	Data
c03675f0	1	/*
080481f5	2	* RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock
c03675f0	3	*
a2d6d2fa	4	* Copyright (C) 2009-2011 Freescale Semiconductor.
f46418c5	5	* Author: Jack Lan <jack.lan@freescale.com>
080481f5	6	* Copyright (C) 2008 MIMOMax Wireless Ltd.
c03675f0 RZ	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*/
c03675f0	13
a737e835 JP	14	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
a737e835 JP	15
c03675f0 RZ	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/interrupt.h>
	19	#include <linux/i2c.h>
080481f5	20	#include <linux/spi/spi.h>
c03675f0 RZ	21	#include <linux/rtc.h>
c03675f0 RZ	22	#include <linux/bcd.h>
c03675f0	23	#include <linux/slab.h>
370927c4	24	#include <linux/regmap.h>
c35c4195	25	#include <linux/hwmon.h>
c03675f0	26
ca4b0a6d PR	27	#define DS3232_REG_SECONDS 0x00
	28	#define DS3232_REG_MINUTES 0x01
	29	#define DS3232_REG_HOURS 0x02
	30	#define DS3232_REG_AMPM 0x02
	31	#define DS3232_REG_DAY 0x03
	32	#define DS3232_REG_DATE 0x04
	33	#define DS3232_REG_MONTH 0x05
	34	#define DS3232_REG_CENTURY 0x05
	35	#define DS3232_REG_YEAR 0x06
	36	#define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */
	37	#define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */
	38	#define DS3232_REG_CR 0x0E /* Control register */
	39	# define DS3232_REG_CR_nEOSC 0x80
	40	# define DS3232_REG_CR_INTCN 0x04
	41	# define DS3232_REG_CR_A2IE 0x02
	42	# define DS3232_REG_CR_A1IE 0x01
c03675f0	43
ca4b0a6d PR	44	#define DS3232_REG_SR 0x0F /* control/status register */
	45	# define DS3232_REG_SR_OSF 0x80
	46	# define DS3232_REG_SR_BSY 0x04
	47	# define DS3232_REG_SR_A2F 0x02
	48	# define DS3232_REG_SR_A1F 0x01
c03675f0	49
c35c4195 KE	50	#define DS3232_REG_TEMPERATURE 0x11
c35c4195 KE	51
c03675f0	52	struct ds3232 {
370927c4 AM	53	struct device *dev;
	54	struct regmap *regmap;
	55	int irq;
c03675f0	56	struct rtc_device *rtc;
c03675f0	57
c93a3ae2	58	bool suspended;
c03675f0 RZ	59	};
c03675f0 RZ	60
370927c4	61	static int ds3232_check_rtc_status(struct device *dev)
c03675f0	62	{
370927c4	63	struct ds3232 *ds3232 = dev_get_drvdata(dev);
c03675f0 RZ	64	int ret = 0;
	65	int control, stat;
	66
370927c4 AM	67	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
	68	if (ret)
	69	return ret;
c03675f0 RZ	70
c03675f0 RZ	71	if (stat & DS3232_REG_SR_OSF)
370927c4	72	dev_warn(dev,
c03675f0 RZ	73	"oscillator discontinuity flagged, "
	74	"time unreliable\n");
	75
	76	stat &= ~(DS3232_REG_SR_OSF \| DS3232_REG_SR_A1F \| DS3232_REG_SR_A2F);
	77
370927c4 AM	78	ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
370927c4 AM	79	if (ret)
c03675f0 RZ	80	return ret;
	81
	82	/* If the alarm is pending, clear it before requesting
	83	* the interrupt, so an interrupt event isn't reported
	84	* before everything is initialized.
	85	*/
	86
370927c4 AM	87	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
	88	if (ret)
	89	return ret;
c03675f0 RZ	90
	91	control &= ~(DS3232_REG_CR_A1IE \| DS3232_REG_CR_A2IE);
	92	control \|= DS3232_REG_CR_INTCN;
	93
370927c4	94	return regmap_write(ds3232->regmap, DS3232_REG_CR, control);
c03675f0 RZ	95	}
	96
	97	static int ds3232_read_time(struct device dev, struct rtc_time time)
	98	{
370927c4	99	struct ds3232 *ds3232 = dev_get_drvdata(dev);
c03675f0 RZ	100	int ret;
	101	u8 buf[7];
	102	unsigned int year, month, day, hour, minute, second;
	103	unsigned int week, twelve_hr, am_pm;
	104	unsigned int century, add_century = 0;
	105
370927c4 AM	106	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
370927c4 AM	107	if (ret)
c03675f0	108	return ret;
c03675f0 RZ	109
	110	second = buf[0];
	111	minute = buf[1];
	112	hour = buf[2];
	113	week = buf[3];
	114	day = buf[4];
	115	month = buf[5];
	116	year = buf[6];
	117
	118	/* Extract additional information for AM/PM and century */
	119
	120	twelve_hr = hour & 0x40;
	121	am_pm = hour & 0x20;
	122	century = month & 0x80;
	123
	124	/* Write to rtc_time structure */
	125
	126	time->tm_sec = bcd2bin(second);
	127	time->tm_min = bcd2bin(minute);
	128	if (twelve_hr) {
	129	/* Convert to 24 hr */
	130	if (am_pm)
	131	time->tm_hour = bcd2bin(hour & 0x1F) + 12;
	132	else
	133	time->tm_hour = bcd2bin(hour & 0x1F);
	134	} else {
	135	time->tm_hour = bcd2bin(hour);
	136	}
	137
a2d6d2fa LX	138	/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
a2d6d2fa LX	139	time->tm_wday = bcd2bin(week) - 1;
c03675f0	140	time->tm_mday = bcd2bin(day);
a2d6d2fa LX	141	/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
a2d6d2fa LX	142	time->tm_mon = bcd2bin(month & 0x7F) - 1;
c03675f0 RZ	143	if (century)
	144	add_century = 100;
	145
	146	time->tm_year = bcd2bin(year) + add_century;
	147
	148	return rtc_valid_tm(time);
	149	}
	150
	151	static int ds3232_set_time(struct device dev, struct rtc_time time)
	152	{
370927c4	153	struct ds3232 *ds3232 = dev_get_drvdata(dev);
c03675f0 RZ	154	u8 buf[7];
	155
	156	/* Extract time from rtc_time and load into ds3232*/
	157
	158	buf[0] = bin2bcd(time->tm_sec);
	159	buf[1] = bin2bcd(time->tm_min);
	160	buf[2] = bin2bcd(time->tm_hour);
a2d6d2fa LX	161	/* Day of the week in linux range is 0~6 while 1~7 in RTC chip */
a2d6d2fa LX	162	buf[3] = bin2bcd(time->tm_wday + 1);
c03675f0	163	buf[4] = bin2bcd(time->tm_mday); /* Date */
a2d6d2fa LX	164	/* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */
a2d6d2fa LX	165	buf[5] = bin2bcd(time->tm_mon + 1);
c03675f0 RZ	166	if (time->tm_year >= 100) {
	167	buf[5] \|= 0x80;
	168	buf[6] = bin2bcd(time->tm_year - 100);
	169	} else {
	170	buf[6] = bin2bcd(time->tm_year);
	171	}
	172
370927c4	173	return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7);
c03675f0 RZ	174	}
c03675f0 RZ	175
f46418c5 LCB	176	/*
	177	* DS3232 has two alarm, we only use alarm1
	178	* According to linux specification, only support one-shot alarm
	179	* no periodic alarm mode
	180	*/
	181	static int ds3232_read_alarm(struct device dev, struct rtc_wkalrm alarm)
	182	{
370927c4	183	struct ds3232 *ds3232 = dev_get_drvdata(dev);
f46418c5 LCB	184	int control, stat;
	185	int ret;
	186	u8 buf[4];
	187
370927c4 AM	188	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
370927c4 AM	189	if (ret)
f46418c5	190	goto out;
370927c4 AM	191	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
370927c4 AM	192	if (ret)
f46418c5	193	goto out;
370927c4 AM	194	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
370927c4 AM	195	if (ret)
f46418c5 LCB	196	goto out;
	197
	198	alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
	199	alarm->time.tm_min = bcd2bin(buf[1] & 0x7F);
	200	alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F);
	201	alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F);
	202
f46418c5 LCB	203	alarm->enabled = !!(control & DS3232_REG_CR_A1IE);
	204	alarm->pending = !!(stat & DS3232_REG_SR_A1F);
	205
	206	ret = 0;
	207	out:
f46418c5 LCB	208	return ret;
	209	}
	210
	211	/*
	212	* linux rtc-module does not support wday alarm
	213	* and only 24h time mode supported indeed
	214	*/
	215	static int ds3232_set_alarm(struct device dev, struct rtc_wkalrm alarm)
	216	{
370927c4	217	struct ds3232 *ds3232 = dev_get_drvdata(dev);
f46418c5 LCB	218	int control, stat;
	219	int ret;
	220	u8 buf[4];
	221
370927c4	222	if (ds3232->irq <= 0)
f46418c5 LCB	223	return -EINVAL;
f46418c5 LCB	224
f46418c5 LCB	225	buf[0] = bin2bcd(alarm->time.tm_sec);
	226	buf[1] = bin2bcd(alarm->time.tm_min);
	227	buf[2] = bin2bcd(alarm->time.tm_hour);
	228	buf[3] = bin2bcd(alarm->time.tm_mday);
	229
	230	/* clear alarm interrupt enable bit */
370927c4 AM	231	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
370927c4 AM	232	if (ret)
f46418c5	233	goto out;
f46418c5	234	control &= ~(DS3232_REG_CR_A1IE \| DS3232_REG_CR_A2IE);
370927c4 AM	235	ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
370927c4 AM	236	if (ret)
f46418c5 LCB	237	goto out;
	238
	239	/* clear any pending alarm flag */
370927c4 AM	240	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
370927c4 AM	241	if (ret)
f46418c5	242	goto out;
f46418c5	243	stat &= ~(DS3232_REG_SR_A1F \| DS3232_REG_SR_A2F);
370927c4 AM	244	ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
370927c4 AM	245	if (ret)
f46418c5 LCB	246	goto out;
f46418c5 LCB	247
370927c4	248	ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4);
7b4393a6 AM	249	if (ret)
7b4393a6 AM	250	goto out;
f46418c5 LCB	251
	252	if (alarm->enabled) {
	253	control \|= DS3232_REG_CR_A1IE;
370927c4	254	ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
f46418c5 LCB	255	}
f46418c5 LCB	256	out:
f46418c5 LCB	257	return ret;
	258	}
	259
7b4393a6	260	static int ds3232_update_alarm(struct device *dev, unsigned int enabled)
f46418c5	261	{
370927c4	262	struct ds3232 *ds3232 = dev_get_drvdata(dev);
f46418c5 LCB	263	int control;
f46418c5 LCB	264	int ret;
f46418c5	265
370927c4 AM	266	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
370927c4 AM	267	if (ret)
fc1dcb0b	268	return ret;
f46418c5	269
7522297e	270	if (enabled)
f46418c5 LCB	271	/* enable alarm1 interrupt */
	272	control \|= DS3232_REG_CR_A1IE;
	273	else
	274	/* disable alarm1 interrupt */
	275	control &= ~(DS3232_REG_CR_A1IE);
7b4393a6	276	ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control);
f46418c5	277
7b4393a6	278	return ret;
f46418c5 LCB	279	}
f46418c5 LCB	280
c35c4195 KE	281	/*
	282	* Temperature sensor support for ds3232/ds3234 devices.
	283	* A user-initiated temperature conversion is not started by this function,
	284	* so the temperature is updated once every 64 seconds.
	285	*/
	286	static int ds3232_hwmon_read_temp(struct device dev, long int mC)
	287	{
	288	struct ds3232 *ds3232 = dev_get_drvdata(dev);
	289	u8 temp_buf[2];
	290	s16 temp;
	291	int ret;
	292
	293	ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf,
	294	sizeof(temp_buf));
	295	if (ret < 0)
	296	return ret;
	297
	298	/*
	299	* Temperature is represented as a 10-bit code with a resolution of
	300	* 0.25 degree celsius and encoded in two's complement format.
	301	*/
	302	temp = (temp_buf[0] << 8) \| temp_buf[1];
	303	temp >>= 6;
	304	mC = temp 250;
	305
	306	return 0;
	307	}
	308
	309	static umode_t ds3232_hwmon_is_visible(const void *data,
	310	enum hwmon_sensor_types type,
	311	u32 attr, int channel)
	312	{
	313	if (type != hwmon_temp)
	314	return 0;
	315
	316	switch (attr) {
	317	case hwmon_temp_input:
	318	return 0444;
	319	default:
	320	return 0;
	321	}
	322	}
	323
	324	static int ds3232_hwmon_read(struct device *dev,
	325	enum hwmon_sensor_types type,
	326	u32 attr, int channel, long *temp)
	327	{
	328	int err;
	329
	330	switch (attr) {
	331	case hwmon_temp_input:
	332	err = ds3232_hwmon_read_temp(dev, temp);
	333	break;
	334	default:
	335	err = -EOPNOTSUPP;
	336	break;
	337	}
	338
	339	return err;
	340	}
	341
	342	static u32 ds3232_hwmon_chip_config[] = {
	343	HWMON_C_REGISTER_TZ,
	344	0
345	};
346
347	static const struct hwmon_channel_info ds3232_hwmon_chip = {
348	.type = hwmon_chip,
349	.config = ds3232_hwmon_chip_config,
350	};
351
352	static u32 ds3232_hwmon_temp_config[] = {
353	HWMON_T_INPUT,
354	0
355	};
356
357	static const struct hwmon_channel_info ds3232_hwmon_temp = {
358	.type = hwmon_temp,
359	.config = ds3232_hwmon_temp_config,
360	};
361
362	static const struct hwmon_channel_info *ds3232_hwmon_info[] = {
363	&ds3232_hwmon_chip,
364	&ds3232_hwmon_temp,
365	NULL
366	};
367
368	static const struct hwmon_ops ds3232_hwmon_hwmon_ops = {
369	.is_visible = ds3232_hwmon_is_visible,
370	.read = ds3232_hwmon_read,
371	};
372
373	static const struct hwmon_chip_info ds3232_hwmon_chip_info = {
374	.ops = &ds3232_hwmon_hwmon_ops,
375	.info = ds3232_hwmon_info,
376	};
377
378	static void ds3232_hwmon_register(struct device dev, const char name)
379	{
380	struct ds3232 *ds3232 = dev_get_drvdata(dev);
381	struct device *hwmon_dev;
382
383	if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON))
384	return;
385
386	hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232,
387	&ds3232_hwmon_chip_info,
388	NULL);
389	if (IS_ERR(hwmon_dev)) {
390	dev_err(dev, "unable to register hwmon device %ld\n",
391	PTR_ERR(hwmon_dev));
392	}
393	}
394
f46418c5 LCB	395	static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled)
f46418c5 LCB	396	{
370927c4	397	struct ds3232 *ds3232 = dev_get_drvdata(dev);
f46418c5	398
370927c4	399	if (ds3232->irq <= 0)
f46418c5 LCB	400	return -EINVAL;
f46418c5 LCB	401
7b4393a6	402	return ds3232_update_alarm(dev, enabled);
f46418c5 LCB	403	}
f46418c5 LCB	404
c03675f0 RZ	405	static irqreturn_t ds3232_irq(int irq, void *dev_id)
c03675f0 RZ	406	{
370927c4 AM	407	struct device *dev = dev_id;
370927c4 AM	408	struct ds3232 *ds3232 = dev_get_drvdata(dev);
fc1dcb0b	409	struct mutex *lock = &ds3232->rtc->ops_lock;
370927c4	410	int ret;
c03675f0 RZ	411	int stat, control;
c03675f0 RZ	412
fc1dcb0b	413	mutex_lock(lock);
c03675f0	414
370927c4 AM	415	ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat);
370927c4 AM	416	if (ret)
c03675f0 RZ	417	goto unlock;
	418
	419	if (stat & DS3232_REG_SR_A1F) {
370927c4 AM	420	ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control);
370927c4 AM	421	if (ret) {
95c60c1c AM	422	dev_warn(ds3232->dev,
95c60c1c AM	423	"Read Control Register error %d\n", ret);
c93a3ae2 WD	424	} else {
	425	/* disable alarm1 interrupt */
	426	control &= ~(DS3232_REG_CR_A1IE);
7b4393a6 AM	427	ret = regmap_write(ds3232->regmap, DS3232_REG_CR,
	428	control);
	429	if (ret) {
	430	dev_warn(ds3232->dev,
	431	"Write Control Register error %d\n",
	432	ret);
	433	goto unlock;
	434	}
c93a3ae2 WD	435
	436	/* clear the alarm pend flag */
	437	stat &= ~DS3232_REG_SR_A1F;
7b4393a6 AM	438	ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat);
	439	if (ret) {
	440	dev_warn(ds3232->dev,
	441	"Write Status Register error %d\n",
	442	ret);
	443	goto unlock;
	444	}
c93a3ae2 WD	445
c93a3ae2 WD	446	rtc_update_irq(ds3232->rtc, 1, RTC_AF \| RTC_IRQF);
c93a3ae2	447	}
c03675f0 RZ	448	}
c03675f0 RZ	449
c03675f0	450	unlock:
fc1dcb0b	451	mutex_unlock(lock);
95c60c1c AM	452
95c60c1c AM	453	return IRQ_HANDLED;
c03675f0 RZ	454	}
	455
	456	static const struct rtc_class_ops ds3232_rtc_ops = {
	457	.read_time = ds3232_read_time,
	458	.set_time = ds3232_set_time,
f46418c5 LCB	459	.read_alarm = ds3232_read_alarm,
	460	.set_alarm = ds3232_set_alarm,
	461	.alarm_irq_enable = ds3232_alarm_irq_enable,
c03675f0 RZ	462	};
c03675f0 RZ	463
370927c4 AM	464	static int ds3232_probe(struct device dev, struct regmap regmap, int irq,
370927c4 AM	465	const char *name)
c03675f0 RZ	466	{
	467	struct ds3232 *ds3232;
	468	int ret;
	469
370927c4	470	ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL);
c03675f0 RZ	471	if (!ds3232)
	472	return -ENOMEM;
	473
370927c4 AM	474	ds3232->regmap = regmap;
	475	ds3232->irq = irq;
	476	ds3232->dev = dev;
	477	dev_set_drvdata(dev, ds3232);
c03675f0	478
370927c4	479	ret = ds3232_check_rtc_status(dev);
c03675f0	480	if (ret)
66714612	481	return ret;
c03675f0	482
d4f6c6f1 PR	483	if (ds3232->irq > 0)
	484	device_init_wakeup(dev, 1);
	485
c35c4195 KE	486	ds3232_hwmon_register(dev, name);
c35c4195 KE	487
b4b77f3c QG	488	ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops,
	489	THIS_MODULE);
	490	if (IS_ERR(ds3232->rtc))
	491	return PTR_ERR(ds3232->rtc);
	492
370927c4	493	if (ds3232->irq > 0) {
95c60c1c AM	494	ret = devm_request_threaded_irq(dev, ds3232->irq, NULL,
	495	ds3232_irq,
	496	IRQF_SHARED \| IRQF_ONESHOT,
	497	name, dev);
c03675f0	498	if (ret) {
d4f6c6f1	499	device_set_wakeup_capable(dev, 0);
370927c4 AM	500	ds3232->irq = 0;
370927c4 AM	501	dev_err(dev, "unable to request IRQ\n");
d4f6c6f1	502	}
c03675f0	503	}
370927c4	504
b4b77f3c	505	return 0;
c03675f0 RZ	506	}
c03675f0 RZ	507
c93a3ae2 WD	508	#ifdef CONFIG_PM_SLEEP
	509	static int ds3232_suspend(struct device *dev)
	510	{
	511	struct ds3232 *ds3232 = dev_get_drvdata(dev);
c93a3ae2	512
95c60c1c AM	513	if (device_may_wakeup(dev)) {
95c60c1c AM	514	if (enable_irq_wake(ds3232->irq))
dc2280eb	515	dev_warn_once(dev, "Cannot set wakeup source\n");
c93a3ae2 WD	516	}
	517
	518	return 0;
	519	}
	520
	521	static int ds3232_resume(struct device *dev)
	522	{
	523	struct ds3232 *ds3232 = dev_get_drvdata(dev);
c93a3ae2	524
95c60c1c AM	525	if (device_may_wakeup(dev))
95c60c1c AM	526	disable_irq_wake(ds3232->irq);
c93a3ae2 WD	527
	528	return 0;
	529	}
	530	#endif
	531
	532	static const struct dev_pm_ops ds3232_pm_ops = {
	533	SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume)
	534	};
	535
080481f5 AM	536	#if IS_ENABLED(CONFIG_I2C)
080481f5 AM	537
370927c4 AM	538	static int ds3232_i2c_probe(struct i2c_client *client,
	539	const struct i2c_device_id *id)
	540	{
	541	struct regmap *regmap;
	542	static const struct regmap_config config = {
	543	.reg_bits = 8,
	544	.val_bits = 8,
082edf0a	545	.max_register = 0x13,
370927c4 AM	546	};
	547
	548	regmap = devm_regmap_init_i2c(client, &config);
	549	if (IS_ERR(regmap)) {
	550	dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
	551	__func__, PTR_ERR(regmap));
	552	return PTR_ERR(regmap);
	553	}
	554
	555	return ds3232_probe(&client->dev, regmap, client->irq, client->name);
	556	}
	557
c03675f0 RZ	558	static const struct i2c_device_id ds3232_id[] = {
	559	{ "ds3232", 0 },
	560	{ }
	561	};
	562	MODULE_DEVICE_TABLE(i2c, ds3232_id);
	563
4dfbd137 JMC	564	static const struct of_device_id ds3232_of_match[] = {
	565	{ .compatible = "dallas,ds3232" },
	566	{ }
	567	};
	568	MODULE_DEVICE_TABLE(of, ds3232_of_match);
	569
c03675f0 RZ	570	static struct i2c_driver ds3232_driver = {
	571	.driver = {
	572	.name = "rtc-ds3232",
4dfbd137	573	.of_match_table = of_match_ptr(ds3232_of_match),
c93a3ae2	574	.pm = &ds3232_pm_ops,
c03675f0	575	},
370927c4	576	.probe = ds3232_i2c_probe,
c03675f0 RZ	577	.id_table = ds3232_id,
c03675f0 RZ	578	};
080481f5 AM	579
	580	static int ds3232_register_driver(void)
	581	{
	582	return i2c_add_driver(&ds3232_driver);
	583	}
	584
	585	static void ds3232_unregister_driver(void)
	586	{
	587	i2c_del_driver(&ds3232_driver);
	588	}
	589
	590	#else
	591
	592	static int ds3232_register_driver(void)
	593	{
	594	return 0;
	595	}
	596
	597	static void ds3232_unregister_driver(void)
	598	{
	599	}
	600
	601	#endif
	602
	603	#if IS_ENABLED(CONFIG_SPI_MASTER)
	604
	605	static int ds3234_probe(struct spi_device *spi)
	606	{
	607	int res;
	608	unsigned int tmp;
	609	static const struct regmap_config config = {
	610	.reg_bits = 8,
	611	.val_bits = 8,
082edf0a	612	.max_register = 0x13,
080481f5 AM	613	.write_flag_mask = 0x80,
	614	};
	615	struct regmap *regmap;
	616
	617	regmap = devm_regmap_init_spi(spi, &config);
	618	if (IS_ERR(regmap)) {
	619	dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
	620	__func__, PTR_ERR(regmap));
	621	return PTR_ERR(regmap);
	622	}
	623
	624	spi->mode = SPI_MODE_3;
	625	spi->bits_per_word = 8;
	626	spi_setup(spi);
	627
	628	res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp);
	629	if (res)
	630	return res;
	631
	632	/* Control settings
	633	*
	634	* CONTROL_REG
	635	* BIT 7 6 5 4 3 2 1 0
	636	* EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE
	637	*
	638	* 0 0 0 1 1 1 0 0
	639	*
	640	* CONTROL_STAT_REG
	641	* BIT 7 6 5 4 3 2 1 0
	642	* OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F
	643	*
	644	* 1 0 0 0 1 0 0 0
	645	*/
	646	res = regmap_read(regmap, DS3232_REG_CR, &tmp);
	647	if (res)
	648	return res;
	649	res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c);
	650	if (res)
	651	return res;
	652
	653	res = regmap_read(regmap, DS3232_REG_SR, &tmp);
	654	if (res)
	655	return res;
	656	res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88);
	657	if (res)
	658	return res;
	659
	660	/* Print our settings */
	661	res = regmap_read(regmap, DS3232_REG_CR, &tmp);
	662	if (res)
	663	return res;
	664	dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp);
	665
	666	res = regmap_read(regmap, DS3232_REG_SR, &tmp);
	667	if (res)
	668	return res;
	669	dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp);
	670
	671	return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234");
	672	}
	673
080481f5 AM	674	static struct spi_driver ds3234_driver = {
	675	.driver = {
	676	.name = "ds3234",
	677	},
	678	.probe = ds3234_probe,
080481f5 AM	679	};
	680
	681	static int ds3234_register_driver(void)
	682	{
	683	return spi_register_driver(&ds3234_driver);
	684	}
	685
	686	static void ds3234_unregister_driver(void)
	687	{
	688	spi_unregister_driver(&ds3234_driver);
	689	}
	690
	691	#else
	692
	693	static int ds3234_register_driver(void)
	694	{
	695	return 0;
	696	}
	697
	698	static void ds3234_unregister_driver(void)
	699	{
	700	}
	701
	702	#endif
	703
	704	static int __init ds323x_init(void)
	705	{
	706	int ret;
	707
	708	ret = ds3232_register_driver();
	709	if (ret) {
	710	pr_err("Failed to register ds3232 driver: %d\n", ret);
	711	return ret;
	712	}
	713
	714	ret = ds3234_register_driver();
	715	if (ret) {
	716	pr_err("Failed to register ds3234 driver: %d\n", ret);
	717	ds3232_unregister_driver();
	718	}
	719
	720	return ret;
	721	}
	722	module_init(ds323x_init)
	723
	724	static void __exit ds323x_exit(void)
	725	{
	726	ds3234_unregister_driver();
	727	ds3232_unregister_driver();
	728	}
	729	module_exit(ds323x_exit)
c03675f0 RZ	730
c03675f0 RZ	731	MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>");
080481f5 AM	732	MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>");
080481f5 AM	733	MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver");
c03675f0	734	MODULE_LICENSE("GPL");
080481f5	735	MODULE_ALIAS("spi:ds3234");