]>
Commit | Line | Data |
---|---|---|
c03675f0 | 1 | /* |
080481f5 | 2 | * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock |
c03675f0 | 3 | * |
a2d6d2fa | 4 | * Copyright (C) 2009-2011 Freescale Semiconductor. |
f46418c5 | 5 | * Author: Jack Lan <jack.lan@freescale.com> |
080481f5 | 6 | * Copyright (C) 2008 MIMOMax Wireless Ltd. |
c03675f0 RZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
c03675f0 | 13 | |
a737e835 JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
c03675f0 RZ |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/i2c.h> | |
080481f5 | 20 | #include <linux/spi/spi.h> |
c03675f0 RZ |
21 | #include <linux/rtc.h> |
22 | #include <linux/bcd.h> | |
23 | #include <linux/workqueue.h> | |
24 | #include <linux/slab.h> | |
370927c4 | 25 | #include <linux/regmap.h> |
c03675f0 RZ |
26 | |
27 | #define DS3232_REG_SECONDS 0x00 | |
28 | #define DS3232_REG_MINUTES 0x01 | |
29 | #define DS3232_REG_HOURS 0x02 | |
30 | #define DS3232_REG_AMPM 0x02 | |
31 | #define DS3232_REG_DAY 0x03 | |
32 | #define DS3232_REG_DATE 0x04 | |
33 | #define DS3232_REG_MONTH 0x05 | |
34 | #define DS3232_REG_CENTURY 0x05 | |
35 | #define DS3232_REG_YEAR 0x06 | |
36 | #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ | |
37 | #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ | |
38 | #define DS3232_REG_CR 0x0E /* Control register */ | |
39 | # define DS3232_REG_CR_nEOSC 0x80 | |
40 | # define DS3232_REG_CR_INTCN 0x04 | |
41 | # define DS3232_REG_CR_A2IE 0x02 | |
42 | # define DS3232_REG_CR_A1IE 0x01 | |
43 | ||
44 | #define DS3232_REG_SR 0x0F /* control/status register */ | |
45 | # define DS3232_REG_SR_OSF 0x80 | |
46 | # define DS3232_REG_SR_BSY 0x04 | |
47 | # define DS3232_REG_SR_A2F 0x02 | |
48 | # define DS3232_REG_SR_A1F 0x01 | |
49 | ||
50 | struct ds3232 { | |
370927c4 AM |
51 | struct device *dev; |
52 | struct regmap *regmap; | |
53 | int irq; | |
c03675f0 RZ |
54 | struct rtc_device *rtc; |
55 | struct work_struct work; | |
56 | ||
57 | /* The mutex protects alarm operations, and prevents a race | |
58 | * between the enable_irq() in the workqueue and the free_irq() | |
59 | * in the remove function. | |
60 | */ | |
61 | struct mutex mutex; | |
c93a3ae2 | 62 | bool suspended; |
c03675f0 RZ |
63 | int exiting; |
64 | }; | |
65 | ||
370927c4 | 66 | static int ds3232_check_rtc_status(struct device *dev) |
c03675f0 | 67 | { |
370927c4 | 68 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
69 | int ret = 0; |
70 | int control, stat; | |
71 | ||
370927c4 AM |
72 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
73 | if (ret) | |
74 | return ret; | |
c03675f0 RZ |
75 | |
76 | if (stat & DS3232_REG_SR_OSF) | |
370927c4 | 77 | dev_warn(dev, |
c03675f0 RZ |
78 | "oscillator discontinuity flagged, " |
79 | "time unreliable\n"); | |
80 | ||
81 | stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); | |
82 | ||
370927c4 AM |
83 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
84 | if (ret) | |
c03675f0 RZ |
85 | return ret; |
86 | ||
87 | /* If the alarm is pending, clear it before requesting | |
88 | * the interrupt, so an interrupt event isn't reported | |
89 | * before everything is initialized. | |
90 | */ | |
91 | ||
370927c4 AM |
92 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
93 | if (ret) | |
94 | return ret; | |
c03675f0 RZ |
95 | |
96 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); | |
97 | control |= DS3232_REG_CR_INTCN; | |
98 | ||
370927c4 | 99 | return regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
c03675f0 RZ |
100 | } |
101 | ||
102 | static int ds3232_read_time(struct device *dev, struct rtc_time *time) | |
103 | { | |
370927c4 | 104 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
105 | int ret; |
106 | u8 buf[7]; | |
107 | unsigned int year, month, day, hour, minute, second; | |
108 | unsigned int week, twelve_hr, am_pm; | |
109 | unsigned int century, add_century = 0; | |
110 | ||
370927c4 AM |
111 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
112 | if (ret) | |
c03675f0 | 113 | return ret; |
c03675f0 RZ |
114 | |
115 | second = buf[0]; | |
116 | minute = buf[1]; | |
117 | hour = buf[2]; | |
118 | week = buf[3]; | |
119 | day = buf[4]; | |
120 | month = buf[5]; | |
121 | year = buf[6]; | |
122 | ||
123 | /* Extract additional information for AM/PM and century */ | |
124 | ||
125 | twelve_hr = hour & 0x40; | |
126 | am_pm = hour & 0x20; | |
127 | century = month & 0x80; | |
128 | ||
129 | /* Write to rtc_time structure */ | |
130 | ||
131 | time->tm_sec = bcd2bin(second); | |
132 | time->tm_min = bcd2bin(minute); | |
133 | if (twelve_hr) { | |
134 | /* Convert to 24 hr */ | |
135 | if (am_pm) | |
136 | time->tm_hour = bcd2bin(hour & 0x1F) + 12; | |
137 | else | |
138 | time->tm_hour = bcd2bin(hour & 0x1F); | |
139 | } else { | |
140 | time->tm_hour = bcd2bin(hour); | |
141 | } | |
142 | ||
a2d6d2fa LX |
143 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
144 | time->tm_wday = bcd2bin(week) - 1; | |
c03675f0 | 145 | time->tm_mday = bcd2bin(day); |
a2d6d2fa LX |
146 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
147 | time->tm_mon = bcd2bin(month & 0x7F) - 1; | |
c03675f0 RZ |
148 | if (century) |
149 | add_century = 100; | |
150 | ||
151 | time->tm_year = bcd2bin(year) + add_century; | |
152 | ||
153 | return rtc_valid_tm(time); | |
154 | } | |
155 | ||
156 | static int ds3232_set_time(struct device *dev, struct rtc_time *time) | |
157 | { | |
370927c4 | 158 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
159 | u8 buf[7]; |
160 | ||
161 | /* Extract time from rtc_time and load into ds3232*/ | |
162 | ||
163 | buf[0] = bin2bcd(time->tm_sec); | |
164 | buf[1] = bin2bcd(time->tm_min); | |
165 | buf[2] = bin2bcd(time->tm_hour); | |
a2d6d2fa LX |
166 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
167 | buf[3] = bin2bcd(time->tm_wday + 1); | |
c03675f0 | 168 | buf[4] = bin2bcd(time->tm_mday); /* Date */ |
a2d6d2fa LX |
169 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
170 | buf[5] = bin2bcd(time->tm_mon + 1); | |
c03675f0 RZ |
171 | if (time->tm_year >= 100) { |
172 | buf[5] |= 0x80; | |
173 | buf[6] = bin2bcd(time->tm_year - 100); | |
174 | } else { | |
175 | buf[6] = bin2bcd(time->tm_year); | |
176 | } | |
177 | ||
370927c4 | 178 | return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
c03675f0 RZ |
179 | } |
180 | ||
f46418c5 LCB |
181 | /* |
182 | * DS3232 has two alarm, we only use alarm1 | |
183 | * According to linux specification, only support one-shot alarm | |
184 | * no periodic alarm mode | |
185 | */ | |
186 | static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
187 | { | |
370927c4 | 188 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
189 | int control, stat; |
190 | int ret; | |
191 | u8 buf[4]; | |
192 | ||
193 | mutex_lock(&ds3232->mutex); | |
194 | ||
370927c4 AM |
195 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
196 | if (ret) | |
f46418c5 | 197 | goto out; |
370927c4 AM |
198 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
199 | if (ret) | |
f46418c5 | 200 | goto out; |
370927c4 AM |
201 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
202 | if (ret) | |
f46418c5 LCB |
203 | goto out; |
204 | ||
205 | alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); | |
206 | alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); | |
207 | alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); | |
208 | alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); | |
209 | ||
210 | alarm->time.tm_mon = -1; | |
211 | alarm->time.tm_year = -1; | |
212 | alarm->time.tm_wday = -1; | |
213 | alarm->time.tm_yday = -1; | |
214 | alarm->time.tm_isdst = -1; | |
215 | ||
216 | alarm->enabled = !!(control & DS3232_REG_CR_A1IE); | |
217 | alarm->pending = !!(stat & DS3232_REG_SR_A1F); | |
218 | ||
219 | ret = 0; | |
220 | out: | |
221 | mutex_unlock(&ds3232->mutex); | |
222 | return ret; | |
223 | } | |
224 | ||
225 | /* | |
226 | * linux rtc-module does not support wday alarm | |
227 | * and only 24h time mode supported indeed | |
228 | */ | |
229 | static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
230 | { | |
370927c4 | 231 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
232 | int control, stat; |
233 | int ret; | |
234 | u8 buf[4]; | |
235 | ||
370927c4 | 236 | if (ds3232->irq <= 0) |
f46418c5 LCB |
237 | return -EINVAL; |
238 | ||
239 | mutex_lock(&ds3232->mutex); | |
240 | ||
241 | buf[0] = bin2bcd(alarm->time.tm_sec); | |
242 | buf[1] = bin2bcd(alarm->time.tm_min); | |
243 | buf[2] = bin2bcd(alarm->time.tm_hour); | |
244 | buf[3] = bin2bcd(alarm->time.tm_mday); | |
245 | ||
246 | /* clear alarm interrupt enable bit */ | |
370927c4 AM |
247 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
248 | if (ret) | |
f46418c5 | 249 | goto out; |
f46418c5 | 250 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); |
370927c4 AM |
251 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
252 | if (ret) | |
f46418c5 LCB |
253 | goto out; |
254 | ||
255 | /* clear any pending alarm flag */ | |
370927c4 AM |
256 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
257 | if (ret) | |
f46418c5 | 258 | goto out; |
f46418c5 | 259 | stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); |
370927c4 AM |
260 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
261 | if (ret) | |
f46418c5 LCB |
262 | goto out; |
263 | ||
370927c4 | 264 | ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
7b4393a6 AM |
265 | if (ret) |
266 | goto out; | |
f46418c5 LCB |
267 | |
268 | if (alarm->enabled) { | |
269 | control |= DS3232_REG_CR_A1IE; | |
370927c4 | 270 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 LCB |
271 | } |
272 | out: | |
273 | mutex_unlock(&ds3232->mutex); | |
274 | return ret; | |
275 | } | |
276 | ||
7b4393a6 | 277 | static int ds3232_update_alarm(struct device *dev, unsigned int enabled) |
f46418c5 | 278 | { |
370927c4 | 279 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
280 | int control; |
281 | int ret; | |
f46418c5 LCB |
282 | |
283 | mutex_lock(&ds3232->mutex); | |
284 | ||
370927c4 AM |
285 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
286 | if (ret) | |
f46418c5 LCB |
287 | goto unlock; |
288 | ||
7522297e | 289 | if (enabled) |
f46418c5 LCB |
290 | /* enable alarm1 interrupt */ |
291 | control |= DS3232_REG_CR_A1IE; | |
292 | else | |
293 | /* disable alarm1 interrupt */ | |
294 | control &= ~(DS3232_REG_CR_A1IE); | |
7b4393a6 | 295 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 LCB |
296 | |
297 | unlock: | |
298 | mutex_unlock(&ds3232->mutex); | |
7b4393a6 AM |
299 | |
300 | return ret; | |
f46418c5 LCB |
301 | } |
302 | ||
303 | static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
304 | { | |
370927c4 | 305 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 | 306 | |
370927c4 | 307 | if (ds3232->irq <= 0) |
f46418c5 LCB |
308 | return -EINVAL; |
309 | ||
7b4393a6 | 310 | return ds3232_update_alarm(dev, enabled); |
f46418c5 LCB |
311 | } |
312 | ||
c03675f0 RZ |
313 | static irqreturn_t ds3232_irq(int irq, void *dev_id) |
314 | { | |
370927c4 AM |
315 | struct device *dev = dev_id; |
316 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c03675f0 RZ |
317 | |
318 | disable_irq_nosync(irq); | |
c93a3ae2 WD |
319 | |
320 | /* | |
321 | * If rtc as a wakeup source, can't schedule the work | |
322 | * at system resume flow, because at this time the i2c bus | |
323 | * has not been resumed. | |
324 | */ | |
325 | if (!ds3232->suspended) | |
326 | schedule_work(&ds3232->work); | |
327 | ||
c03675f0 RZ |
328 | return IRQ_HANDLED; |
329 | } | |
330 | ||
331 | static void ds3232_work(struct work_struct *work) | |
332 | { | |
333 | struct ds3232 *ds3232 = container_of(work, struct ds3232, work); | |
370927c4 | 334 | int ret; |
c03675f0 RZ |
335 | int stat, control; |
336 | ||
337 | mutex_lock(&ds3232->mutex); | |
338 | ||
370927c4 AM |
339 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
340 | if (ret) | |
c03675f0 RZ |
341 | goto unlock; |
342 | ||
343 | if (stat & DS3232_REG_SR_A1F) { | |
370927c4 AM |
344 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
345 | if (ret) { | |
a737e835 | 346 | pr_warn("Read Control Register error - Disable IRQ%d\n", |
370927c4 | 347 | ds3232->irq); |
c93a3ae2 WD |
348 | } else { |
349 | /* disable alarm1 interrupt */ | |
350 | control &= ~(DS3232_REG_CR_A1IE); | |
7b4393a6 AM |
351 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, |
352 | control); | |
353 | if (ret) { | |
354 | dev_warn(ds3232->dev, | |
355 | "Write Control Register error %d\n", | |
356 | ret); | |
357 | goto unlock; | |
358 | } | |
c93a3ae2 WD |
359 | |
360 | /* clear the alarm pend flag */ | |
361 | stat &= ~DS3232_REG_SR_A1F; | |
7b4393a6 AM |
362 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
363 | if (ret) { | |
364 | dev_warn(ds3232->dev, | |
365 | "Write Status Register error %d\n", | |
366 | ret); | |
367 | goto unlock; | |
368 | } | |
c93a3ae2 WD |
369 | |
370 | rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); | |
371 | ||
372 | if (!ds3232->exiting) | |
370927c4 | 373 | enable_irq(ds3232->irq); |
c93a3ae2 | 374 | } |
c03675f0 RZ |
375 | } |
376 | ||
c03675f0 RZ |
377 | unlock: |
378 | mutex_unlock(&ds3232->mutex); | |
379 | } | |
380 | ||
381 | static const struct rtc_class_ops ds3232_rtc_ops = { | |
382 | .read_time = ds3232_read_time, | |
383 | .set_time = ds3232_set_time, | |
f46418c5 LCB |
384 | .read_alarm = ds3232_read_alarm, |
385 | .set_alarm = ds3232_set_alarm, | |
386 | .alarm_irq_enable = ds3232_alarm_irq_enable, | |
c03675f0 RZ |
387 | }; |
388 | ||
370927c4 AM |
389 | static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, |
390 | const char *name) | |
c03675f0 RZ |
391 | { |
392 | struct ds3232 *ds3232; | |
393 | int ret; | |
394 | ||
370927c4 | 395 | ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); |
c03675f0 RZ |
396 | if (!ds3232) |
397 | return -ENOMEM; | |
398 | ||
370927c4 AM |
399 | ds3232->regmap = regmap; |
400 | ds3232->irq = irq; | |
401 | ds3232->dev = dev; | |
402 | dev_set_drvdata(dev, ds3232); | |
c03675f0 RZ |
403 | |
404 | INIT_WORK(&ds3232->work, ds3232_work); | |
405 | mutex_init(&ds3232->mutex); | |
406 | ||
370927c4 | 407 | ret = ds3232_check_rtc_status(dev); |
c03675f0 | 408 | if (ret) |
66714612 | 409 | return ret; |
c03675f0 | 410 | |
370927c4 AM |
411 | if (ds3232->irq > 0) { |
412 | ret = devm_request_irq(dev, ds3232->irq, ds3232_irq, | |
413 | IRQF_SHARED, name, dev); | |
c03675f0 | 414 | if (ret) { |
370927c4 AM |
415 | ds3232->irq = 0; |
416 | dev_err(dev, "unable to request IRQ\n"); | |
417 | } else | |
418 | device_init_wakeup(dev, 1); | |
c03675f0 | 419 | } |
370927c4 AM |
420 | ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, |
421 | THIS_MODULE); | |
422 | ||
c93a3ae2 | 423 | return PTR_ERR_OR_ZERO(ds3232->rtc); |
c03675f0 RZ |
424 | } |
425 | ||
370927c4 | 426 | static int ds3232_remove(struct device *dev) |
c03675f0 | 427 | { |
370927c4 | 428 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 | 429 | |
370927c4 | 430 | if (ds3232->irq > 0) { |
c03675f0 RZ |
431 | mutex_lock(&ds3232->mutex); |
432 | ds3232->exiting = 1; | |
433 | mutex_unlock(&ds3232->mutex); | |
434 | ||
370927c4 | 435 | devm_free_irq(dev, ds3232->irq, dev); |
9db8995b | 436 | cancel_work_sync(&ds3232->work); |
c03675f0 RZ |
437 | } |
438 | ||
c03675f0 RZ |
439 | return 0; |
440 | } | |
441 | ||
c93a3ae2 WD |
442 | #ifdef CONFIG_PM_SLEEP |
443 | static int ds3232_suspend(struct device *dev) | |
444 | { | |
445 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 WD |
446 | |
447 | if (device_can_wakeup(dev)) { | |
448 | ds3232->suspended = true; | |
370927c4 | 449 | if (irq_set_irq_wake(ds3232->irq, 1)) { |
dc2280eb WD |
450 | dev_warn_once(dev, "Cannot set wakeup source\n"); |
451 | ds3232->suspended = false; | |
452 | } | |
c93a3ae2 WD |
453 | } |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
458 | static int ds3232_resume(struct device *dev) | |
459 | { | |
460 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 WD |
461 | |
462 | if (ds3232->suspended) { | |
463 | ds3232->suspended = false; | |
464 | ||
465 | /* Clear the hardware alarm pend flag */ | |
466 | schedule_work(&ds3232->work); | |
467 | ||
370927c4 | 468 | irq_set_irq_wake(ds3232->irq, 0); |
c93a3ae2 WD |
469 | } |
470 | ||
471 | return 0; | |
472 | } | |
473 | #endif | |
474 | ||
475 | static const struct dev_pm_ops ds3232_pm_ops = { | |
476 | SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) | |
477 | }; | |
478 | ||
080481f5 AM |
479 | #if IS_ENABLED(CONFIG_I2C) |
480 | ||
370927c4 AM |
481 | static int ds3232_i2c_probe(struct i2c_client *client, |
482 | const struct i2c_device_id *id) | |
483 | { | |
484 | struct regmap *regmap; | |
485 | static const struct regmap_config config = { | |
486 | .reg_bits = 8, | |
487 | .val_bits = 8, | |
488 | }; | |
489 | ||
490 | regmap = devm_regmap_init_i2c(client, &config); | |
491 | if (IS_ERR(regmap)) { | |
492 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
493 | __func__, PTR_ERR(regmap)); | |
494 | return PTR_ERR(regmap); | |
495 | } | |
496 | ||
497 | return ds3232_probe(&client->dev, regmap, client->irq, client->name); | |
498 | } | |
499 | ||
500 | static int ds3232_i2c_remove(struct i2c_client *client) | |
501 | { | |
502 | return ds3232_remove(&client->dev); | |
503 | } | |
504 | ||
c03675f0 RZ |
505 | static const struct i2c_device_id ds3232_id[] = { |
506 | { "ds3232", 0 }, | |
507 | { } | |
508 | }; | |
509 | MODULE_DEVICE_TABLE(i2c, ds3232_id); | |
510 | ||
511 | static struct i2c_driver ds3232_driver = { | |
512 | .driver = { | |
513 | .name = "rtc-ds3232", | |
c93a3ae2 | 514 | .pm = &ds3232_pm_ops, |
c03675f0 | 515 | }, |
370927c4 AM |
516 | .probe = ds3232_i2c_probe, |
517 | .remove = ds3232_i2c_remove, | |
c03675f0 RZ |
518 | .id_table = ds3232_id, |
519 | }; | |
080481f5 AM |
520 | |
521 | static int ds3232_register_driver(void) | |
522 | { | |
523 | return i2c_add_driver(&ds3232_driver); | |
524 | } | |
525 | ||
526 | static void ds3232_unregister_driver(void) | |
527 | { | |
528 | i2c_del_driver(&ds3232_driver); | |
529 | } | |
530 | ||
531 | #else | |
532 | ||
533 | static int ds3232_register_driver(void) | |
534 | { | |
535 | return 0; | |
536 | } | |
537 | ||
538 | static void ds3232_unregister_driver(void) | |
539 | { | |
540 | } | |
541 | ||
542 | #endif | |
543 | ||
544 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
545 | ||
546 | static int ds3234_probe(struct spi_device *spi) | |
547 | { | |
548 | int res; | |
549 | unsigned int tmp; | |
550 | static const struct regmap_config config = { | |
551 | .reg_bits = 8, | |
552 | .val_bits = 8, | |
553 | .write_flag_mask = 0x80, | |
554 | }; | |
555 | struct regmap *regmap; | |
556 | ||
557 | regmap = devm_regmap_init_spi(spi, &config); | |
558 | if (IS_ERR(regmap)) { | |
559 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
560 | __func__, PTR_ERR(regmap)); | |
561 | return PTR_ERR(regmap); | |
562 | } | |
563 | ||
564 | spi->mode = SPI_MODE_3; | |
565 | spi->bits_per_word = 8; | |
566 | spi_setup(spi); | |
567 | ||
568 | res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); | |
569 | if (res) | |
570 | return res; | |
571 | ||
572 | /* Control settings | |
573 | * | |
574 | * CONTROL_REG | |
575 | * BIT 7 6 5 4 3 2 1 0 | |
576 | * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE | |
577 | * | |
578 | * 0 0 0 1 1 1 0 0 | |
579 | * | |
580 | * CONTROL_STAT_REG | |
581 | * BIT 7 6 5 4 3 2 1 0 | |
582 | * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F | |
583 | * | |
584 | * 1 0 0 0 1 0 0 0 | |
585 | */ | |
586 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
587 | if (res) | |
588 | return res; | |
589 | res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); | |
590 | if (res) | |
591 | return res; | |
592 | ||
593 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
594 | if (res) | |
595 | return res; | |
596 | res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); | |
597 | if (res) | |
598 | return res; | |
599 | ||
600 | /* Print our settings */ | |
601 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
602 | if (res) | |
603 | return res; | |
604 | dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); | |
605 | ||
606 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
607 | if (res) | |
608 | return res; | |
609 | dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); | |
610 | ||
611 | return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); | |
612 | } | |
613 | ||
614 | static int ds3234_remove(struct spi_device *spi) | |
615 | { | |
616 | return ds3232_remove(&spi->dev); | |
617 | } | |
618 | ||
619 | static struct spi_driver ds3234_driver = { | |
620 | .driver = { | |
621 | .name = "ds3234", | |
622 | }, | |
623 | .probe = ds3234_probe, | |
624 | .remove = ds3234_remove, | |
625 | }; | |
626 | ||
627 | static int ds3234_register_driver(void) | |
628 | { | |
629 | return spi_register_driver(&ds3234_driver); | |
630 | } | |
631 | ||
632 | static void ds3234_unregister_driver(void) | |
633 | { | |
634 | spi_unregister_driver(&ds3234_driver); | |
635 | } | |
636 | ||
637 | #else | |
638 | ||
639 | static int ds3234_register_driver(void) | |
640 | { | |
641 | return 0; | |
642 | } | |
643 | ||
644 | static void ds3234_unregister_driver(void) | |
645 | { | |
646 | } | |
647 | ||
648 | #endif | |
649 | ||
650 | static int __init ds323x_init(void) | |
651 | { | |
652 | int ret; | |
653 | ||
654 | ret = ds3232_register_driver(); | |
655 | if (ret) { | |
656 | pr_err("Failed to register ds3232 driver: %d\n", ret); | |
657 | return ret; | |
658 | } | |
659 | ||
660 | ret = ds3234_register_driver(); | |
661 | if (ret) { | |
662 | pr_err("Failed to register ds3234 driver: %d\n", ret); | |
663 | ds3232_unregister_driver(); | |
664 | } | |
665 | ||
666 | return ret; | |
667 | } | |
668 | module_init(ds323x_init) | |
669 | ||
670 | static void __exit ds323x_exit(void) | |
671 | { | |
672 | ds3234_unregister_driver(); | |
673 | ds3232_unregister_driver(); | |
674 | } | |
675 | module_exit(ds323x_exit) | |
c03675f0 RZ |
676 | |
677 | MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); | |
080481f5 AM |
678 | MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); |
679 | MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); | |
c03675f0 | 680 | MODULE_LICENSE("GPL"); |
080481f5 | 681 | MODULE_ALIAS("spi:ds3234"); |