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Commit | Line | Data |
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c03675f0 | 1 | /* |
080481f5 | 2 | * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock |
c03675f0 | 3 | * |
a2d6d2fa | 4 | * Copyright (C) 2009-2011 Freescale Semiconductor. |
f46418c5 | 5 | * Author: Jack Lan <jack.lan@freescale.com> |
080481f5 | 6 | * Copyright (C) 2008 MIMOMax Wireless Ltd. |
c03675f0 RZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | */ | |
c03675f0 | 13 | |
a737e835 JP |
14 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
15 | ||
c03675f0 RZ |
16 | #include <linux/kernel.h> |
17 | #include <linux/module.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/i2c.h> | |
080481f5 | 20 | #include <linux/spi/spi.h> |
c03675f0 RZ |
21 | #include <linux/rtc.h> |
22 | #include <linux/bcd.h> | |
23 | #include <linux/workqueue.h> | |
24 | #include <linux/slab.h> | |
370927c4 | 25 | #include <linux/regmap.h> |
c03675f0 RZ |
26 | |
27 | #define DS3232_REG_SECONDS 0x00 | |
28 | #define DS3232_REG_MINUTES 0x01 | |
29 | #define DS3232_REG_HOURS 0x02 | |
30 | #define DS3232_REG_AMPM 0x02 | |
31 | #define DS3232_REG_DAY 0x03 | |
32 | #define DS3232_REG_DATE 0x04 | |
33 | #define DS3232_REG_MONTH 0x05 | |
34 | #define DS3232_REG_CENTURY 0x05 | |
35 | #define DS3232_REG_YEAR 0x06 | |
36 | #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ | |
37 | #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ | |
38 | #define DS3232_REG_CR 0x0E /* Control register */ | |
39 | # define DS3232_REG_CR_nEOSC 0x80 | |
40 | # define DS3232_REG_CR_INTCN 0x04 | |
41 | # define DS3232_REG_CR_A2IE 0x02 | |
42 | # define DS3232_REG_CR_A1IE 0x01 | |
43 | ||
44 | #define DS3232_REG_SR 0x0F /* control/status register */ | |
45 | # define DS3232_REG_SR_OSF 0x80 | |
46 | # define DS3232_REG_SR_BSY 0x04 | |
47 | # define DS3232_REG_SR_A2F 0x02 | |
48 | # define DS3232_REG_SR_A1F 0x01 | |
49 | ||
50 | struct ds3232 { | |
370927c4 AM |
51 | struct device *dev; |
52 | struct regmap *regmap; | |
53 | int irq; | |
c03675f0 RZ |
54 | struct rtc_device *rtc; |
55 | struct work_struct work; | |
56 | ||
57 | /* The mutex protects alarm operations, and prevents a race | |
58 | * between the enable_irq() in the workqueue and the free_irq() | |
59 | * in the remove function. | |
60 | */ | |
61 | struct mutex mutex; | |
c93a3ae2 | 62 | bool suspended; |
c03675f0 RZ |
63 | int exiting; |
64 | }; | |
65 | ||
370927c4 | 66 | static int ds3232_check_rtc_status(struct device *dev) |
c03675f0 | 67 | { |
370927c4 | 68 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
69 | int ret = 0; |
70 | int control, stat; | |
71 | ||
370927c4 AM |
72 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
73 | if (ret) | |
74 | return ret; | |
c03675f0 RZ |
75 | |
76 | if (stat & DS3232_REG_SR_OSF) | |
370927c4 | 77 | dev_warn(dev, |
c03675f0 RZ |
78 | "oscillator discontinuity flagged, " |
79 | "time unreliable\n"); | |
80 | ||
81 | stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); | |
82 | ||
370927c4 AM |
83 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
84 | if (ret) | |
c03675f0 RZ |
85 | return ret; |
86 | ||
87 | /* If the alarm is pending, clear it before requesting | |
88 | * the interrupt, so an interrupt event isn't reported | |
89 | * before everything is initialized. | |
90 | */ | |
91 | ||
370927c4 AM |
92 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
93 | if (ret) | |
94 | return ret; | |
c03675f0 RZ |
95 | |
96 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); | |
97 | control |= DS3232_REG_CR_INTCN; | |
98 | ||
370927c4 | 99 | return regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
c03675f0 RZ |
100 | } |
101 | ||
102 | static int ds3232_read_time(struct device *dev, struct rtc_time *time) | |
103 | { | |
370927c4 | 104 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
105 | int ret; |
106 | u8 buf[7]; | |
107 | unsigned int year, month, day, hour, minute, second; | |
108 | unsigned int week, twelve_hr, am_pm; | |
109 | unsigned int century, add_century = 0; | |
110 | ||
370927c4 AM |
111 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
112 | if (ret) | |
c03675f0 | 113 | return ret; |
c03675f0 RZ |
114 | |
115 | second = buf[0]; | |
116 | minute = buf[1]; | |
117 | hour = buf[2]; | |
118 | week = buf[3]; | |
119 | day = buf[4]; | |
120 | month = buf[5]; | |
121 | year = buf[6]; | |
122 | ||
123 | /* Extract additional information for AM/PM and century */ | |
124 | ||
125 | twelve_hr = hour & 0x40; | |
126 | am_pm = hour & 0x20; | |
127 | century = month & 0x80; | |
128 | ||
129 | /* Write to rtc_time structure */ | |
130 | ||
131 | time->tm_sec = bcd2bin(second); | |
132 | time->tm_min = bcd2bin(minute); | |
133 | if (twelve_hr) { | |
134 | /* Convert to 24 hr */ | |
135 | if (am_pm) | |
136 | time->tm_hour = bcd2bin(hour & 0x1F) + 12; | |
137 | else | |
138 | time->tm_hour = bcd2bin(hour & 0x1F); | |
139 | } else { | |
140 | time->tm_hour = bcd2bin(hour); | |
141 | } | |
142 | ||
a2d6d2fa LX |
143 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
144 | time->tm_wday = bcd2bin(week) - 1; | |
c03675f0 | 145 | time->tm_mday = bcd2bin(day); |
a2d6d2fa LX |
146 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
147 | time->tm_mon = bcd2bin(month & 0x7F) - 1; | |
c03675f0 RZ |
148 | if (century) |
149 | add_century = 100; | |
150 | ||
151 | time->tm_year = bcd2bin(year) + add_century; | |
152 | ||
153 | return rtc_valid_tm(time); | |
154 | } | |
155 | ||
156 | static int ds3232_set_time(struct device *dev, struct rtc_time *time) | |
157 | { | |
370927c4 | 158 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 RZ |
159 | u8 buf[7]; |
160 | ||
161 | /* Extract time from rtc_time and load into ds3232*/ | |
162 | ||
163 | buf[0] = bin2bcd(time->tm_sec); | |
164 | buf[1] = bin2bcd(time->tm_min); | |
165 | buf[2] = bin2bcd(time->tm_hour); | |
a2d6d2fa LX |
166 | /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ |
167 | buf[3] = bin2bcd(time->tm_wday + 1); | |
c03675f0 | 168 | buf[4] = bin2bcd(time->tm_mday); /* Date */ |
a2d6d2fa LX |
169 | /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ |
170 | buf[5] = bin2bcd(time->tm_mon + 1); | |
c03675f0 RZ |
171 | if (time->tm_year >= 100) { |
172 | buf[5] |= 0x80; | |
173 | buf[6] = bin2bcd(time->tm_year - 100); | |
174 | } else { | |
175 | buf[6] = bin2bcd(time->tm_year); | |
176 | } | |
177 | ||
370927c4 | 178 | return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); |
c03675f0 RZ |
179 | } |
180 | ||
f46418c5 LCB |
181 | /* |
182 | * DS3232 has two alarm, we only use alarm1 | |
183 | * According to linux specification, only support one-shot alarm | |
184 | * no periodic alarm mode | |
185 | */ | |
186 | static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
187 | { | |
370927c4 | 188 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
189 | int control, stat; |
190 | int ret; | |
191 | u8 buf[4]; | |
192 | ||
193 | mutex_lock(&ds3232->mutex); | |
194 | ||
370927c4 AM |
195 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
196 | if (ret) | |
f46418c5 | 197 | goto out; |
370927c4 AM |
198 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
199 | if (ret) | |
f46418c5 | 200 | goto out; |
370927c4 AM |
201 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
202 | if (ret) | |
f46418c5 LCB |
203 | goto out; |
204 | ||
205 | alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); | |
206 | alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); | |
207 | alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); | |
208 | alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); | |
209 | ||
210 | alarm->time.tm_mon = -1; | |
211 | alarm->time.tm_year = -1; | |
212 | alarm->time.tm_wday = -1; | |
213 | alarm->time.tm_yday = -1; | |
214 | alarm->time.tm_isdst = -1; | |
215 | ||
216 | alarm->enabled = !!(control & DS3232_REG_CR_A1IE); | |
217 | alarm->pending = !!(stat & DS3232_REG_SR_A1F); | |
218 | ||
219 | ret = 0; | |
220 | out: | |
221 | mutex_unlock(&ds3232->mutex); | |
222 | return ret; | |
223 | } | |
224 | ||
225 | /* | |
226 | * linux rtc-module does not support wday alarm | |
227 | * and only 24h time mode supported indeed | |
228 | */ | |
229 | static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) | |
230 | { | |
370927c4 | 231 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
232 | int control, stat; |
233 | int ret; | |
234 | u8 buf[4]; | |
235 | ||
370927c4 | 236 | if (ds3232->irq <= 0) |
f46418c5 LCB |
237 | return -EINVAL; |
238 | ||
239 | mutex_lock(&ds3232->mutex); | |
240 | ||
241 | buf[0] = bin2bcd(alarm->time.tm_sec); | |
242 | buf[1] = bin2bcd(alarm->time.tm_min); | |
243 | buf[2] = bin2bcd(alarm->time.tm_hour); | |
244 | buf[3] = bin2bcd(alarm->time.tm_mday); | |
245 | ||
246 | /* clear alarm interrupt enable bit */ | |
370927c4 AM |
247 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
248 | if (ret) | |
f46418c5 | 249 | goto out; |
f46418c5 | 250 | control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); |
370927c4 AM |
251 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
252 | if (ret) | |
f46418c5 LCB |
253 | goto out; |
254 | ||
255 | /* clear any pending alarm flag */ | |
370927c4 AM |
256 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
257 | if (ret) | |
f46418c5 | 258 | goto out; |
f46418c5 | 259 | stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); |
370927c4 AM |
260 | ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
261 | if (ret) | |
f46418c5 LCB |
262 | goto out; |
263 | ||
370927c4 | 264 | ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
f46418c5 LCB |
265 | |
266 | if (alarm->enabled) { | |
267 | control |= DS3232_REG_CR_A1IE; | |
370927c4 | 268 | ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 LCB |
269 | } |
270 | out: | |
271 | mutex_unlock(&ds3232->mutex); | |
272 | return ret; | |
273 | } | |
274 | ||
dfc2532b | 275 | static void ds3232_update_alarm(struct device *dev, unsigned int enabled) |
f46418c5 | 276 | { |
370927c4 | 277 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 LCB |
278 | int control; |
279 | int ret; | |
280 | u8 buf[4]; | |
281 | ||
282 | mutex_lock(&ds3232->mutex); | |
283 | ||
370927c4 AM |
284 | ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
285 | if (ret) | |
f46418c5 LCB |
286 | goto unlock; |
287 | ||
288 | buf[0] = bcd2bin(buf[0]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ? | |
289 | 0x80 : buf[0]; | |
290 | buf[1] = bcd2bin(buf[1]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ? | |
291 | 0x80 : buf[1]; | |
292 | buf[2] = bcd2bin(buf[2]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ? | |
293 | 0x80 : buf[2]; | |
294 | buf[3] = bcd2bin(buf[3]) < 0 || (ds3232->rtc->irq_data & RTC_UF) ? | |
295 | 0x80 : buf[3]; | |
296 | ||
370927c4 AM |
297 | ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); |
298 | if (ret) | |
f46418c5 LCB |
299 | goto unlock; |
300 | ||
370927c4 AM |
301 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
302 | if (ret) | |
f46418c5 LCB |
303 | goto unlock; |
304 | ||
dfc2532b | 305 | if (enabled || (ds3232->rtc->irq_data & RTC_UF)) |
f46418c5 LCB |
306 | /* enable alarm1 interrupt */ |
307 | control |= DS3232_REG_CR_A1IE; | |
308 | else | |
309 | /* disable alarm1 interrupt */ | |
310 | control &= ~(DS3232_REG_CR_A1IE); | |
370927c4 | 311 | regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
f46418c5 LCB |
312 | |
313 | unlock: | |
314 | mutex_unlock(&ds3232->mutex); | |
315 | } | |
316 | ||
317 | static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) | |
318 | { | |
370927c4 | 319 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
f46418c5 | 320 | |
370927c4 | 321 | if (ds3232->irq <= 0) |
f46418c5 LCB |
322 | return -EINVAL; |
323 | ||
dfc2532b | 324 | ds3232_update_alarm(dev, enabled); |
f46418c5 | 325 | |
f46418c5 LCB |
326 | return 0; |
327 | } | |
328 | ||
c03675f0 RZ |
329 | static irqreturn_t ds3232_irq(int irq, void *dev_id) |
330 | { | |
370927c4 AM |
331 | struct device *dev = dev_id; |
332 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c03675f0 RZ |
333 | |
334 | disable_irq_nosync(irq); | |
c93a3ae2 WD |
335 | |
336 | /* | |
337 | * If rtc as a wakeup source, can't schedule the work | |
338 | * at system resume flow, because at this time the i2c bus | |
339 | * has not been resumed. | |
340 | */ | |
341 | if (!ds3232->suspended) | |
342 | schedule_work(&ds3232->work); | |
343 | ||
c03675f0 RZ |
344 | return IRQ_HANDLED; |
345 | } | |
346 | ||
347 | static void ds3232_work(struct work_struct *work) | |
348 | { | |
349 | struct ds3232 *ds3232 = container_of(work, struct ds3232, work); | |
370927c4 | 350 | int ret; |
c03675f0 RZ |
351 | int stat, control; |
352 | ||
353 | mutex_lock(&ds3232->mutex); | |
354 | ||
370927c4 AM |
355 | ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); |
356 | if (ret) | |
c03675f0 RZ |
357 | goto unlock; |
358 | ||
359 | if (stat & DS3232_REG_SR_A1F) { | |
370927c4 AM |
360 | ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); |
361 | if (ret) { | |
a737e835 | 362 | pr_warn("Read Control Register error - Disable IRQ%d\n", |
370927c4 | 363 | ds3232->irq); |
c93a3ae2 WD |
364 | } else { |
365 | /* disable alarm1 interrupt */ | |
366 | control &= ~(DS3232_REG_CR_A1IE); | |
370927c4 | 367 | regmap_write(ds3232->regmap, DS3232_REG_CR, control); |
c93a3ae2 WD |
368 | |
369 | /* clear the alarm pend flag */ | |
370 | stat &= ~DS3232_REG_SR_A1F; | |
370927c4 | 371 | regmap_write(ds3232->regmap, DS3232_REG_SR, stat); |
c93a3ae2 WD |
372 | |
373 | rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); | |
374 | ||
375 | if (!ds3232->exiting) | |
370927c4 | 376 | enable_irq(ds3232->irq); |
c93a3ae2 | 377 | } |
c03675f0 RZ |
378 | } |
379 | ||
c03675f0 RZ |
380 | unlock: |
381 | mutex_unlock(&ds3232->mutex); | |
382 | } | |
383 | ||
384 | static const struct rtc_class_ops ds3232_rtc_ops = { | |
385 | .read_time = ds3232_read_time, | |
386 | .set_time = ds3232_set_time, | |
f46418c5 LCB |
387 | .read_alarm = ds3232_read_alarm, |
388 | .set_alarm = ds3232_set_alarm, | |
389 | .alarm_irq_enable = ds3232_alarm_irq_enable, | |
c03675f0 RZ |
390 | }; |
391 | ||
370927c4 AM |
392 | static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, |
393 | const char *name) | |
c03675f0 RZ |
394 | { |
395 | struct ds3232 *ds3232; | |
396 | int ret; | |
397 | ||
370927c4 | 398 | ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); |
c03675f0 RZ |
399 | if (!ds3232) |
400 | return -ENOMEM; | |
401 | ||
370927c4 AM |
402 | ds3232->regmap = regmap; |
403 | ds3232->irq = irq; | |
404 | ds3232->dev = dev; | |
405 | dev_set_drvdata(dev, ds3232); | |
c03675f0 RZ |
406 | |
407 | INIT_WORK(&ds3232->work, ds3232_work); | |
408 | mutex_init(&ds3232->mutex); | |
409 | ||
370927c4 | 410 | ret = ds3232_check_rtc_status(dev); |
c03675f0 | 411 | if (ret) |
66714612 | 412 | return ret; |
c03675f0 | 413 | |
370927c4 AM |
414 | if (ds3232->irq > 0) { |
415 | ret = devm_request_irq(dev, ds3232->irq, ds3232_irq, | |
416 | IRQF_SHARED, name, dev); | |
c03675f0 | 417 | if (ret) { |
370927c4 AM |
418 | ds3232->irq = 0; |
419 | dev_err(dev, "unable to request IRQ\n"); | |
420 | } else | |
421 | device_init_wakeup(dev, 1); | |
c03675f0 | 422 | } |
370927c4 AM |
423 | ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, |
424 | THIS_MODULE); | |
425 | ||
c93a3ae2 | 426 | return PTR_ERR_OR_ZERO(ds3232->rtc); |
c03675f0 RZ |
427 | } |
428 | ||
370927c4 | 429 | static int ds3232_remove(struct device *dev) |
c03675f0 | 430 | { |
370927c4 | 431 | struct ds3232 *ds3232 = dev_get_drvdata(dev); |
c03675f0 | 432 | |
370927c4 | 433 | if (ds3232->irq > 0) { |
c03675f0 RZ |
434 | mutex_lock(&ds3232->mutex); |
435 | ds3232->exiting = 1; | |
436 | mutex_unlock(&ds3232->mutex); | |
437 | ||
370927c4 | 438 | devm_free_irq(dev, ds3232->irq, dev); |
9db8995b | 439 | cancel_work_sync(&ds3232->work); |
c03675f0 RZ |
440 | } |
441 | ||
c03675f0 RZ |
442 | return 0; |
443 | } | |
444 | ||
c93a3ae2 WD |
445 | #ifdef CONFIG_PM_SLEEP |
446 | static int ds3232_suspend(struct device *dev) | |
447 | { | |
448 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 WD |
449 | |
450 | if (device_can_wakeup(dev)) { | |
451 | ds3232->suspended = true; | |
370927c4 | 452 | if (irq_set_irq_wake(ds3232->irq, 1)) { |
dc2280eb WD |
453 | dev_warn_once(dev, "Cannot set wakeup source\n"); |
454 | ds3232->suspended = false; | |
455 | } | |
c93a3ae2 WD |
456 | } |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
461 | static int ds3232_resume(struct device *dev) | |
462 | { | |
463 | struct ds3232 *ds3232 = dev_get_drvdata(dev); | |
c93a3ae2 WD |
464 | |
465 | if (ds3232->suspended) { | |
466 | ds3232->suspended = false; | |
467 | ||
468 | /* Clear the hardware alarm pend flag */ | |
469 | schedule_work(&ds3232->work); | |
470 | ||
370927c4 | 471 | irq_set_irq_wake(ds3232->irq, 0); |
c93a3ae2 WD |
472 | } |
473 | ||
474 | return 0; | |
475 | } | |
476 | #endif | |
477 | ||
478 | static const struct dev_pm_ops ds3232_pm_ops = { | |
479 | SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) | |
480 | }; | |
481 | ||
080481f5 AM |
482 | #if IS_ENABLED(CONFIG_I2C) |
483 | ||
370927c4 AM |
484 | static int ds3232_i2c_probe(struct i2c_client *client, |
485 | const struct i2c_device_id *id) | |
486 | { | |
487 | struct regmap *regmap; | |
488 | static const struct regmap_config config = { | |
489 | .reg_bits = 8, | |
490 | .val_bits = 8, | |
491 | }; | |
492 | ||
493 | regmap = devm_regmap_init_i2c(client, &config); | |
494 | if (IS_ERR(regmap)) { | |
495 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
496 | __func__, PTR_ERR(regmap)); | |
497 | return PTR_ERR(regmap); | |
498 | } | |
499 | ||
500 | return ds3232_probe(&client->dev, regmap, client->irq, client->name); | |
501 | } | |
502 | ||
503 | static int ds3232_i2c_remove(struct i2c_client *client) | |
504 | { | |
505 | return ds3232_remove(&client->dev); | |
506 | } | |
507 | ||
c03675f0 RZ |
508 | static const struct i2c_device_id ds3232_id[] = { |
509 | { "ds3232", 0 }, | |
510 | { } | |
511 | }; | |
512 | MODULE_DEVICE_TABLE(i2c, ds3232_id); | |
513 | ||
514 | static struct i2c_driver ds3232_driver = { | |
515 | .driver = { | |
516 | .name = "rtc-ds3232", | |
c93a3ae2 | 517 | .pm = &ds3232_pm_ops, |
c03675f0 | 518 | }, |
370927c4 AM |
519 | .probe = ds3232_i2c_probe, |
520 | .remove = ds3232_i2c_remove, | |
c03675f0 RZ |
521 | .id_table = ds3232_id, |
522 | }; | |
080481f5 AM |
523 | |
524 | static int ds3232_register_driver(void) | |
525 | { | |
526 | return i2c_add_driver(&ds3232_driver); | |
527 | } | |
528 | ||
529 | static void ds3232_unregister_driver(void) | |
530 | { | |
531 | i2c_del_driver(&ds3232_driver); | |
532 | } | |
533 | ||
534 | #else | |
535 | ||
536 | static int ds3232_register_driver(void) | |
537 | { | |
538 | return 0; | |
539 | } | |
540 | ||
541 | static void ds3232_unregister_driver(void) | |
542 | { | |
543 | } | |
544 | ||
545 | #endif | |
546 | ||
547 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
548 | ||
549 | static int ds3234_probe(struct spi_device *spi) | |
550 | { | |
551 | int res; | |
552 | unsigned int tmp; | |
553 | static const struct regmap_config config = { | |
554 | .reg_bits = 8, | |
555 | .val_bits = 8, | |
556 | .write_flag_mask = 0x80, | |
557 | }; | |
558 | struct regmap *regmap; | |
559 | ||
560 | regmap = devm_regmap_init_spi(spi, &config); | |
561 | if (IS_ERR(regmap)) { | |
562 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
563 | __func__, PTR_ERR(regmap)); | |
564 | return PTR_ERR(regmap); | |
565 | } | |
566 | ||
567 | spi->mode = SPI_MODE_3; | |
568 | spi->bits_per_word = 8; | |
569 | spi_setup(spi); | |
570 | ||
571 | res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); | |
572 | if (res) | |
573 | return res; | |
574 | ||
575 | /* Control settings | |
576 | * | |
577 | * CONTROL_REG | |
578 | * BIT 7 6 5 4 3 2 1 0 | |
579 | * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE | |
580 | * | |
581 | * 0 0 0 1 1 1 0 0 | |
582 | * | |
583 | * CONTROL_STAT_REG | |
584 | * BIT 7 6 5 4 3 2 1 0 | |
585 | * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F | |
586 | * | |
587 | * 1 0 0 0 1 0 0 0 | |
588 | */ | |
589 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
590 | if (res) | |
591 | return res; | |
592 | res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); | |
593 | if (res) | |
594 | return res; | |
595 | ||
596 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
597 | if (res) | |
598 | return res; | |
599 | res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); | |
600 | if (res) | |
601 | return res; | |
602 | ||
603 | /* Print our settings */ | |
604 | res = regmap_read(regmap, DS3232_REG_CR, &tmp); | |
605 | if (res) | |
606 | return res; | |
607 | dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); | |
608 | ||
609 | res = regmap_read(regmap, DS3232_REG_SR, &tmp); | |
610 | if (res) | |
611 | return res; | |
612 | dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); | |
613 | ||
614 | return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); | |
615 | } | |
616 | ||
617 | static int ds3234_remove(struct spi_device *spi) | |
618 | { | |
619 | return ds3232_remove(&spi->dev); | |
620 | } | |
621 | ||
622 | static struct spi_driver ds3234_driver = { | |
623 | .driver = { | |
624 | .name = "ds3234", | |
625 | }, | |
626 | .probe = ds3234_probe, | |
627 | .remove = ds3234_remove, | |
628 | }; | |
629 | ||
630 | static int ds3234_register_driver(void) | |
631 | { | |
632 | return spi_register_driver(&ds3234_driver); | |
633 | } | |
634 | ||
635 | static void ds3234_unregister_driver(void) | |
636 | { | |
637 | spi_unregister_driver(&ds3234_driver); | |
638 | } | |
639 | ||
640 | #else | |
641 | ||
642 | static int ds3234_register_driver(void) | |
643 | { | |
644 | return 0; | |
645 | } | |
646 | ||
647 | static void ds3234_unregister_driver(void) | |
648 | { | |
649 | } | |
650 | ||
651 | #endif | |
652 | ||
653 | static int __init ds323x_init(void) | |
654 | { | |
655 | int ret; | |
656 | ||
657 | ret = ds3232_register_driver(); | |
658 | if (ret) { | |
659 | pr_err("Failed to register ds3232 driver: %d\n", ret); | |
660 | return ret; | |
661 | } | |
662 | ||
663 | ret = ds3234_register_driver(); | |
664 | if (ret) { | |
665 | pr_err("Failed to register ds3234 driver: %d\n", ret); | |
666 | ds3232_unregister_driver(); | |
667 | } | |
668 | ||
669 | return ret; | |
670 | } | |
671 | module_init(ds323x_init) | |
672 | ||
673 | static void __exit ds323x_exit(void) | |
674 | { | |
675 | ds3234_unregister_driver(); | |
676 | ds3232_unregister_driver(); | |
677 | } | |
678 | module_exit(ds323x_exit) | |
c03675f0 RZ |
679 | |
680 | MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); | |
080481f5 AM |
681 | MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); |
682 | MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); | |
c03675f0 | 683 | MODULE_LICENSE("GPL"); |
080481f5 | 684 | MODULE_ALIAS("spi:ds3234"); |