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rtc: rtc-ds1307: enable support for mcp794xx as a wakeup source without IRQ
[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-m41t80.c
CommitLineData
caaff562
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1/*
2 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
3 *
4 * Author: Alexander Bigga <ab@mycable.de>
5 *
6 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
7 *
8 * 2006 (c) mycable GmbH
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
a737e835
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16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
35aa64f3
MR
18#include <linux/bcd.h>
19#include <linux/i2c.h>
caaff562 20#include <linux/init.h>
9fb1f68d 21#include <linux/kernel.h>
35aa64f3 22#include <linux/module.h>
eb235c56 23#include <linux/of_device.h>
35aa64f3 24#include <linux/rtc.h>
caaff562 25#include <linux/slab.h>
613655fa 26#include <linux/mutex.h>
caaff562 27#include <linux/string.h>
617780d2 28#ifdef CONFIG_RTC_DRV_M41T80_WDT
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29#include <linux/fs.h>
30#include <linux/ioctl.h>
35aa64f3
MR
31#include <linux/miscdevice.h>
32#include <linux/reboot.h>
33#include <linux/watchdog.h>
617780d2 34#endif
caaff562 35
f2b84ee8
MJ
36#define M41T80_REG_SSEC 0x00
37#define M41T80_REG_SEC 0x01
38#define M41T80_REG_MIN 0x02
39#define M41T80_REG_HOUR 0x03
40#define M41T80_REG_WDAY 0x04
41#define M41T80_REG_DAY 0x05
42#define M41T80_REG_MON 0x06
43#define M41T80_REG_YEAR 0x07
44#define M41T80_REG_ALARM_MON 0x0a
45#define M41T80_REG_ALARM_DAY 0x0b
46#define M41T80_REG_ALARM_HOUR 0x0c
47#define M41T80_REG_ALARM_MIN 0x0d
48#define M41T80_REG_ALARM_SEC 0x0e
49#define M41T80_REG_FLAGS 0x0f
50#define M41T80_REG_SQW 0x13
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51
52#define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
53#define M41T80_ALARM_REG_SIZE \
54 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
55
54339f3b
MJ
56#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
57#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
58#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
59#define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
05a7f27a 60#define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
54339f3b
MJ
61#define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
62#define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
63#define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
64#define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
65#define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
caaff562 66
54339f3b
MJ
67#define M41T80_FEATURE_HT BIT(0) /* Halt feature */
68#define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
69#define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
70#define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
71#define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
caaff562 72
613655fa 73static DEFINE_MUTEX(m41t80_rtc_mutex);
3760f736 74static const struct i2c_device_id m41t80_id[] = {
f30281f4 75 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
d3a126fc
SF
76 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
77 { "m41t80", M41T80_FEATURE_SQ },
78 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
79 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
83 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
84 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
6b1a5235 85 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
3760f736 86 { }
caaff562 87};
3760f736 88MODULE_DEVICE_TABLE(i2c, m41t80_id);
caaff562 89
eb235c56
JMC
90static const struct of_device_id m41t80_of_match[] = {
91 {
92 .compatible = "st,m41t62",
93 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
94 },
95 {
96 .compatible = "st,m41t65",
97 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
98 },
99 {
100 .compatible = "st,m41t80",
101 .data = (void *)(M41T80_FEATURE_SQ)
102 },
103 {
104 .compatible = "st,m41t81",
105 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
106 },
107 {
108 .compatible = "st,m41t81s",
109 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
110 },
111 {
112 .compatible = "st,m41t82",
113 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
114 },
115 {
116 .compatible = "st,m41t83",
117 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
118 },
119 {
120 .compatible = "st,m41t84",
121 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
122 },
123 {
124 .compatible = "st,m41t85",
125 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
126 },
127 {
128 .compatible = "st,m41t87",
129 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
130 },
a897bf13
AB
131 {
132 .compatible = "microcrystal,rv4162",
133 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
134 },
135 /* DT compatibility only, do not use compatibles below: */
eb235c56
JMC
136 {
137 .compatible = "st,rv4162",
138 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
139 },
140 {
141 .compatible = "rv4162",
142 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
143 },
144 { }
145};
146MODULE_DEVICE_TABLE(of, m41t80_of_match);
147
caaff562 148struct m41t80_data {
eb235c56 149 unsigned long features;
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150 struct rtc_device *rtc;
151};
152
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153static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
154{
155 struct i2c_client *client = dev_id;
156 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
157 struct mutex *lock = &m41t80->rtc->ops_lock;
158 unsigned long events = 0;
159 int flags, flags_afe;
160
161 mutex_lock(lock);
162
163 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
164 if (flags_afe < 0) {
165 mutex_unlock(lock);
166 return IRQ_NONE;
167 }
168
169 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
170 if (flags <= 0) {
171 mutex_unlock(lock);
172 return IRQ_NONE;
173 }
174
175 if (flags & M41T80_FLAGS_AF) {
176 flags &= ~M41T80_FLAGS_AF;
177 flags_afe &= ~M41T80_ALMON_AFE;
178 events |= RTC_AF;
179 }
180
181 if (events) {
182 rtc_update_irq(m41t80->rtc, 1, events);
183 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
184 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
185 flags_afe);
186 }
187
188 mutex_unlock(lock);
189
190 return IRQ_HANDLED;
191}
192
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193static int m41t80_get_datetime(struct i2c_client *client,
194 struct rtc_time *tm)
195{
f2b84ee8 196 unsigned char buf[8];
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197 int err, flags;
198
199 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
200 if (flags < 0)
201 return flags;
202
203 if (flags & M41T80_FLAGS_OF) {
204 dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
205 return -EINVAL;
206 }
caaff562 207
f2b84ee8
MJ
208 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
209 sizeof(buf), buf);
210 if (err < 0) {
211 dev_err(&client->dev, "Unable to read date\n");
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212 return -EIO;
213 }
214
fe20ba70
AB
215 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
216 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
217 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
218 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
caaff562 219 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
fe20ba70 220 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
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221
222 /* assume 20YY not 19YY, and ignore the Century Bit */
fe20ba70 223 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
b485fe5e 224 return rtc_valid_tm(tm);
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225}
226
227/* Sets the given date and time to the real time clock. */
228static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm)
229{
f2b84ee8 230 unsigned char buf[8];
05a7f27a 231 int err, flags;
caaff562 232
f2b84ee8
MJ
233 if (tm->tm_year < 100 || tm->tm_year > 199)
234 return -EINVAL;
caaff562 235
caaff562 236 buf[M41T80_REG_SSEC] = 0;
f2b84ee8
MJ
237 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
238 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
239 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
240 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
241 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
242 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
243 buf[M41T80_REG_WDAY] = tm->tm_wday;
244
245 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
246 sizeof(buf), buf);
247 if (err < 0) {
248 dev_err(&client->dev, "Unable to write to date registers\n");
249 return err;
bcebd81d 250 }
caaff562 251
05a7f27a
MJ
252 /* Clear the OF bit of Flags Register */
253 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
254 if (flags < 0)
255 return flags;
256
257 if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
258 flags & ~M41T80_FLAGS_OF)) {
259 dev_err(&client->dev, "Unable to write flags register\n");
260 return -EIO;
261 }
262
f2b84ee8 263 return err;
caaff562
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264}
265
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266static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
267{
268 struct i2c_client *client = to_i2c_client(dev);
269 struct m41t80_data *clientdata = i2c_get_clientdata(client);
270 u8 reg;
271
3760f736 272 if (clientdata->features & M41T80_FEATURE_BL) {
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AN
273 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
274 seq_printf(seq, "battery\t\t: %s\n",
275 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
276 }
277 return 0;
278}
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AN
279
280static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
281{
282 return m41t80_get_datetime(to_i2c_client(dev), tm);
283}
284
285static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
286{
287 return m41t80_set_datetime(to_i2c_client(dev), tm);
288}
289
9c6dfed9
MJ
290static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
291{
292 struct i2c_client *client = to_i2c_client(dev);
293 int flags, retval;
294
295 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
296 if (flags < 0)
297 return flags;
298
299 if (enabled)
300 flags |= M41T80_ALMON_AFE;
301 else
302 flags &= ~M41T80_ALMON_AFE;
303
304 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
305 if (retval < 0) {
e89487fe 306 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
9c6dfed9
MJ
307 return retval;
308 }
309 return 0;
310}
311
312static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
313{
314 struct i2c_client *client = to_i2c_client(dev);
315 u8 alarmvals[5];
316 int ret, err;
317
318 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
319 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
320 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
321 alarmvals[3] = bin2bcd(alrm->time.tm_min);
322 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
323
324 /* Clear AF and AFE flags */
325 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
326 if (ret < 0)
327 return ret;
328 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
329 ret & ~(M41T80_ALMON_AFE));
330 if (err < 0) {
331 dev_err(dev, "Unable to clear AFE bit\n");
332 return err;
333 }
334
335 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
336 if (ret < 0)
337 return ret;
338
339 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
340 ret & ~(M41T80_FLAGS_AF));
341 if (err < 0) {
342 dev_err(dev, "Unable to clear AF bit\n");
343 return err;
344 }
345
346 /* Write the alarm */
347 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
348 5, alarmvals);
349 if (err)
350 return err;
351
352 /* Enable the alarm interrupt */
353 if (alrm->enabled) {
354 alarmvals[0] |= M41T80_ALMON_AFE;
355 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
356 alarmvals[0]);
357 if (err)
358 return err;
359 }
360
361 return 0;
362}
363
364static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
365{
366 struct i2c_client *client = to_i2c_client(dev);
367 u8 alarmvals[5];
368 int flags, ret;
369
370 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
371 5, alarmvals);
372 if (ret != 5)
373 return ret < 0 ? ret : -EIO;
374
375 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
376 if (flags < 0)
377 return flags;
378
379 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
380 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
381 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
9c6dfed9
MJ
382 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
383 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f);
9c6dfed9
MJ
384
385 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
386 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
387
388 return 0;
389}
390
caaff562
AN
391static struct rtc_class_ops m41t80_rtc_ops = {
392 .read_time = m41t80_rtc_read_time,
393 .set_time = m41t80_rtc_set_time,
caaff562 394 .proc = m41t80_rtc_proc,
caaff562
AN
395};
396
ae036af8
SC
397#ifdef CONFIG_PM_SLEEP
398static int m41t80_suspend(struct device *dev)
399{
400 struct i2c_client *client = to_i2c_client(dev);
401
402 if (client->irq >= 0 && device_may_wakeup(dev))
403 enable_irq_wake(client->irq);
404
405 return 0;
406}
407
408static int m41t80_resume(struct device *dev)
409{
410 struct i2c_client *client = to_i2c_client(dev);
411
412 if (client->irq >= 0 && device_may_wakeup(dev))
413 disable_irq_wake(client->irq);
414
415 return 0;
416}
417#endif
418
419static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
420
ef6b3125
MJ
421static ssize_t flags_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
caaff562
AN
423{
424 struct i2c_client *client = to_i2c_client(dev);
425 int val;
426
427 val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
428 if (val < 0)
85d77047 429 return val;
caaff562
AN
430 return sprintf(buf, "%#x\n", val);
431}
ef6b3125 432static DEVICE_ATTR_RO(flags);
caaff562 433
ef6b3125
MJ
434static ssize_t sqwfreq_show(struct device *dev,
435 struct device_attribute *attr, char *buf)
caaff562
AN
436{
437 struct i2c_client *client = to_i2c_client(dev);
d3a126fc 438 struct m41t80_data *clientdata = i2c_get_clientdata(client);
f30281f4 439 int val, reg_sqw;
caaff562 440
d3a126fc
SF
441 if (!(clientdata->features & M41T80_FEATURE_SQ))
442 return -EINVAL;
443
f30281f4
DG
444 reg_sqw = M41T80_REG_SQW;
445 if (clientdata->features & M41T80_FEATURE_SQ_ALT)
446 reg_sqw = M41T80_REG_WDAY;
447 val = i2c_smbus_read_byte_data(client, reg_sqw);
caaff562 448 if (val < 0)
85d77047 449 return val;
caaff562
AN
450 val = (val >> 4) & 0xf;
451 switch (val) {
452 case 0:
453 break;
454 case 1:
455 val = 32768;
456 break;
457 default:
458 val = 32768 >> val;
459 }
460 return sprintf(buf, "%d\n", val);
461}
ef6b3125
MJ
462
463static ssize_t sqwfreq_store(struct device *dev,
464 struct device_attribute *attr,
465 const char *buf, size_t count)
caaff562
AN
466{
467 struct i2c_client *client = to_i2c_client(dev);
d3a126fc 468 struct m41t80_data *clientdata = i2c_get_clientdata(client);
85d77047 469 int almon, sqw, reg_sqw, rc;
fc99b901
MJ
470 unsigned long val;
471
472 rc = kstrtoul(buf, 0, &val);
473 if (rc < 0)
474 return rc;
caaff562 475
d3a126fc
SF
476 if (!(clientdata->features & M41T80_FEATURE_SQ))
477 return -EINVAL;
478
caaff562
AN
479 if (val) {
480 if (!is_power_of_2(val))
481 return -EINVAL;
482 val = ilog2(val);
483 if (val == 15)
484 val = 1;
485 else if (val < 14)
486 val = 15 - val;
487 else
488 return -EINVAL;
489 }
490 /* disable SQW, set SQW frequency & re-enable */
491 almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
492 if (almon < 0)
85d77047 493 return almon;
f30281f4
DG
494 reg_sqw = M41T80_REG_SQW;
495 if (clientdata->features & M41T80_FEATURE_SQ_ALT)
496 reg_sqw = M41T80_REG_WDAY;
497 sqw = i2c_smbus_read_byte_data(client, reg_sqw);
caaff562 498 if (sqw < 0)
85d77047 499 return sqw;
caaff562 500 sqw = (sqw & 0x0f) | (val << 4);
85d77047
WS
501
502 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
fc99b901 503 almon & ~M41T80_ALMON_SQWE);
85d77047
WS
504 if (rc < 0)
505 return rc;
506
507 if (val) {
508 rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw);
509 if (rc < 0)
510 return rc;
511
512 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
fc99b901
MJ
513 almon | M41T80_ALMON_SQWE);
514 if (rc < 0)
85d77047
WS
515 return rc;
516 }
caaff562
AN
517 return count;
518}
ef6b3125 519static DEVICE_ATTR_RW(sqwfreq);
caaff562
AN
520
521static struct attribute *attrs[] = {
522 &dev_attr_flags.attr,
523 &dev_attr_sqwfreq.attr,
524 NULL,
525};
fc99b901 526
caaff562
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527static struct attribute_group attr_group = {
528 .attrs = attrs,
529};
530
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531#ifdef CONFIG_RTC_DRV_M41T80_WDT
532/*
533 *****************************************************************************
534 *
535 * Watchdog Driver
536 *
537 *****************************************************************************
538 */
539static struct i2c_client *save_client;
540
541/* Default margin */
542#define WD_TIMO 60 /* 1..31 seconds */
543
544static int wdt_margin = WD_TIMO;
545module_param(wdt_margin, int, 0);
546MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
547
548static unsigned long wdt_is_open;
549static int boot_flag;
550
551/**
552 * wdt_ping:
553 *
554 * Reload counter one with the watchdog timeout. We don't bother reloading
555 * the cascade counter.
556 */
557static void wdt_ping(void)
558{
559 unsigned char i2c_data[2];
560 struct i2c_msg msgs1[1] = {
561 {
562 .addr = save_client->addr,
563 .flags = 0,
564 .len = 2,
565 .buf = i2c_data,
566 },
567 };
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568 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
569
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570 i2c_data[0] = 0x09; /* watchdog register */
571
572 if (wdt_margin > 31)
573 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
574 else
575 /*
576 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
577 */
fc99b901 578 i2c_data[1] = wdt_margin << 2 | 0x82;
617780d2 579
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580 /*
581 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
582 * that would be an invalid resolution.
583 */
584 if (clientdata->features & M41T80_FEATURE_WD)
585 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
586
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587 i2c_transfer(save_client->adapter, msgs1, 1);
588}
589
590/**
591 * wdt_disable:
592 *
593 * disables watchdog.
594 */
595static void wdt_disable(void)
596{
597 unsigned char i2c_data[2], i2c_buf[0x10];
598 struct i2c_msg msgs0[2] = {
599 {
600 .addr = save_client->addr,
601 .flags = 0,
602 .len = 1,
603 .buf = i2c_data,
604 },
605 {
606 .addr = save_client->addr,
607 .flags = I2C_M_RD,
608 .len = 1,
609 .buf = i2c_buf,
610 },
611 };
612 struct i2c_msg msgs1[1] = {
613 {
614 .addr = save_client->addr,
615 .flags = 0,
616 .len = 2,
617 .buf = i2c_data,
618 },
619 };
620
621 i2c_data[0] = 0x09;
622 i2c_transfer(save_client->adapter, msgs0, 2);
623
624 i2c_data[0] = 0x09;
625 i2c_data[1] = 0x00;
626 i2c_transfer(save_client->adapter, msgs1, 1);
627}
628
629/**
630 * wdt_write:
631 * @file: file handle to the watchdog
632 * @buf: buffer to write (unused as data does not matter here
633 * @count: count of bytes
634 * @ppos: pointer to the position to write. No seeks allowed
635 *
636 * A write to a watchdog device is defined as a keepalive signal. Any
637 * write of data will do, as we we don't define content meaning.
638 */
639static ssize_t wdt_write(struct file *file, const char __user *buf,
640 size_t count, loff_t *ppos)
641{
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642 if (count) {
643 wdt_ping();
644 return 1;
645 }
646 return 0;
647}
648
649static ssize_t wdt_read(struct file *file, char __user *buf,
650 size_t count, loff_t *ppos)
651{
652 return 0;
653}
654
655/**
656 * wdt_ioctl:
657 * @inode: inode of the device
658 * @file: file handle to the device
659 * @cmd: watchdog command
660 * @arg: argument pointer
661 *
662 * The watchdog API defines a common set of functions for all watchdogs
663 * according to their available features. We only actually usefully support
664 * querying capabilities and current status.
665 */
55929332 666static int wdt_ioctl(struct file *file, unsigned int cmd,
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667 unsigned long arg)
668{
669 int new_margin, rv;
670 static struct watchdog_info ident = {
671 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
672 WDIOF_SETTIMEOUT,
673 .firmware_version = 1,
674 .identity = "M41T80 WTD"
675 };
676
677 switch (cmd) {
678 case WDIOC_GETSUPPORT:
679 return copy_to_user((struct watchdog_info __user *)arg, &ident,
680 sizeof(ident)) ? -EFAULT : 0;
681
682 case WDIOC_GETSTATUS:
683 case WDIOC_GETBOOTSTATUS:
684 return put_user(boot_flag, (int __user *)arg);
685 case WDIOC_KEEPALIVE:
686 wdt_ping();
687 return 0;
688 case WDIOC_SETTIMEOUT:
689 if (get_user(new_margin, (int __user *)arg))
690 return -EFAULT;
691 /* Arbitrary, can't find the card's limits */
692 if (new_margin < 1 || new_margin > 124)
693 return -EINVAL;
694 wdt_margin = new_margin;
695 wdt_ping();
696 /* Fall */
697 case WDIOC_GETTIMEOUT:
698 return put_user(wdt_margin, (int __user *)arg);
699
700 case WDIOC_SETOPTIONS:
701 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
702 return -EFAULT;
703
704 if (rv & WDIOS_DISABLECARD) {
a737e835 705 pr_info("disable watchdog\n");
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706 wdt_disable();
707 }
708
709 if (rv & WDIOS_ENABLECARD) {
a737e835 710 pr_info("enable watchdog\n");
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711 wdt_ping();
712 }
713
714 return -EINVAL;
715 }
716 return -ENOTTY;
717}
718
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719static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
720 unsigned long arg)
721{
722 int ret;
723
613655fa 724 mutex_lock(&m41t80_rtc_mutex);
55929332 725 ret = wdt_ioctl(file, cmd, arg);
613655fa 726 mutex_unlock(&m41t80_rtc_mutex);
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727
728 return ret;
729}
730
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731/**
732 * wdt_open:
733 * @inode: inode of device
734 * @file: file handle to device
735 *
736 */
737static int wdt_open(struct inode *inode, struct file *file)
738{
739 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) {
613655fa 740 mutex_lock(&m41t80_rtc_mutex);
41012735 741 if (test_and_set_bit(0, &wdt_is_open)) {
613655fa 742 mutex_unlock(&m41t80_rtc_mutex);
617780d2 743 return -EBUSY;
41012735 744 }
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745 /*
746 * Activate
747 */
748 wdt_is_open = 1;
613655fa 749 mutex_unlock(&m41t80_rtc_mutex);
09eeb1f5 750 return nonseekable_open(inode, file);
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751 }
752 return -ENODEV;
753}
754
755/**
756 * wdt_close:
757 * @inode: inode to board
758 * @file: file handle to board
759 *
760 */
761static int wdt_release(struct inode *inode, struct file *file)
762{
763 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR)
764 clear_bit(0, &wdt_is_open);
765 return 0;
766}
767
768/**
769 * notify_sys:
770 * @this: our notifier block
771 * @code: the event being reported
772 * @unused: unused
773 *
774 * Our notifier is called on system shutdowns. We want to turn the card
775 * off at reboot otherwise the machine will reboot again during memory
776 * test or worse yet during the following fsck. This would suck, in fact
777 * trust me - if it happens it does suck.
778 */
779static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
780 void *unused)
781{
782 if (code == SYS_DOWN || code == SYS_HALT)
783 /* Disable Watchdog */
784 wdt_disable();
785 return NOTIFY_DONE;
786}
787
788static const struct file_operations wdt_fops = {
789 .owner = THIS_MODULE,
790 .read = wdt_read,
55929332 791 .unlocked_ioctl = wdt_unlocked_ioctl,
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792 .write = wdt_write,
793 .open = wdt_open,
794 .release = wdt_release,
6038f373 795 .llseek = no_llseek,
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796};
797
798static struct miscdevice wdt_dev = {
799 .minor = WATCHDOG_MINOR,
800 .name = "watchdog",
801 .fops = &wdt_fops,
802};
803
804/*
805 * The WDT card needs to learn about soft shutdowns in order to
806 * turn the timebomb registers off.
807 */
808static struct notifier_block wdt_notifier = {
809 .notifier_call = wdt_notify_sys,
810};
811#endif /* CONFIG_RTC_DRV_M41T80_WDT */
812
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813/*
814 *****************************************************************************
815 *
816 * Driver Interface
817 *
818 *****************************************************************************
819 */
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820
821static void m41t80_remove_sysfs_group(void *_dev)
822{
823 struct device *dev = _dev;
824
825 sysfs_remove_group(&dev->kobj, &attr_group);
826}
827
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828static int m41t80_probe(struct i2c_client *client,
829 const struct i2c_device_id *id)
caaff562 830{
f2b84ee8 831 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
3760f736 832 int rc = 0;
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833 struct rtc_device *rtc = NULL;
834 struct rtc_time tm;
9c6dfed9 835 struct m41t80_data *m41t80_data = NULL;
caaff562 836
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837 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
838 I2C_FUNC_SMBUS_BYTE_DATA)) {
839 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
c67fedfa 840 return -ENODEV;
f2b84ee8 841 }
caaff562 842
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843 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
844 GFP_KERNEL);
845 if (!m41t80_data)
c67fedfa 846 return -ENOMEM;
caaff562 847
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848 if (client->dev.of_node)
849 m41t80_data->features = (unsigned long)
850 of_device_get_match_data(&client->dev);
851 else
852 m41t80_data->features = id->driver_data;
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853 i2c_set_clientdata(client, m41t80_data);
854
855 if (client->irq > 0) {
856 rc = devm_request_threaded_irq(&client->dev, client->irq,
857 NULL, m41t80_handle_irq,
858 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
859 "m41t80", client);
860 if (rc) {
861 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
862 client->irq = 0;
863 } else {
864 m41t80_rtc_ops.read_alarm = m41t80_read_alarm;
865 m41t80_rtc_ops.set_alarm = m41t80_set_alarm;
866 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable;
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867 /* Enable the wakealarm */
868 device_init_wakeup(&client->dev, true);
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869 }
870 }
a015dbc1 871
4ebabb78 872 rtc = devm_rtc_device_register(&client->dev, client->name,
fc99b901 873 &m41t80_rtc_ops, THIS_MODULE);
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874 if (IS_ERR(rtc))
875 return PTR_ERR(rtc);
caaff562 876
9c6dfed9 877 m41t80_data->rtc = rtc;
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878
879 /* Make sure HT (Halt Update) bit is cleared */
880 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
caaff562 881
c67fedfa 882 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
9c6dfed9 883 if (m41t80_data->features & M41T80_FEATURE_HT) {
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884 m41t80_get_datetime(client, &tm);
885 dev_info(&client->dev, "HT bit was set!\n");
886 dev_info(&client->dev,
fc99b901 887 "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n",
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888 tm.tm_year + 1900,
889 tm.tm_mon + 1, tm.tm_mday, tm.tm_hour,
890 tm.tm_min, tm.tm_sec);
891 }
c67fedfa 892 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
fc99b901 893 rc & ~M41T80_ALHOUR_HT);
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894 }
895
896 if (rc < 0) {
897 dev_err(&client->dev, "Can't clear HT bit\n");
85d77047 898 return rc;
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899 }
900
901 /* Make sure ST (stop) bit is cleared */
902 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
caaff562 903
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904 if (rc >= 0 && rc & M41T80_SEC_ST)
905 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
fc99b901 906 rc & ~M41T80_SEC_ST);
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907 if (rc < 0) {
908 dev_err(&client->dev, "Can't clear ST bit\n");
85d77047 909 return rc;
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910 }
911
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912 /* Export sysfs entries */
913 rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group);
914 if (rc) {
915 dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc);
c67fedfa 916 return rc;
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917 }
918
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919 rc = devm_add_action_or_reset(&client->dev, m41t80_remove_sysfs_group,
920 &client->dev);
ef6b3125 921 if (rc) {
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922 dev_err(&client->dev,
923 "Failed to add sysfs cleanup action: %d\n", rc);
924 return rc;
925 }
caaff562 926
617780d2 927#ifdef CONFIG_RTC_DRV_M41T80_WDT
9c6dfed9 928 if (m41t80_data->features & M41T80_FEATURE_HT) {
417607d0 929 save_client = client;
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930 rc = misc_register(&wdt_dev);
931 if (rc)
c67fedfa 932 return rc;
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933 rc = register_reboot_notifier(&wdt_notifier);
934 if (rc) {
935 misc_deregister(&wdt_dev);
c67fedfa 936 return rc;
617780d2 937 }
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938 }
939#endif
caaff562 940 return 0;
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941}
942
943static int m41t80_remove(struct i2c_client *client)
944{
4ebabb78 945#ifdef CONFIG_RTC_DRV_M41T80_WDT
caaff562 946 struct m41t80_data *clientdata = i2c_get_clientdata(client);
caaff562 947
3760f736 948 if (clientdata->features & M41T80_FEATURE_HT) {
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949 misc_deregister(&wdt_dev);
950 unregister_reboot_notifier(&wdt_notifier);
951 }
952#endif
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953
954 return 0;
955}
956
957static struct i2c_driver m41t80_driver = {
958 .driver = {
afe1ab4d 959 .name = "rtc-m41t80",
eb235c56 960 .of_match_table = of_match_ptr(m41t80_of_match),
ae036af8 961 .pm = &m41t80_pm,
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962 },
963 .probe = m41t80_probe,
964 .remove = m41t80_remove,
3760f736 965 .id_table = m41t80_id,
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966};
967
0abc9201 968module_i2c_driver(m41t80_driver);
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969
970MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
971MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
972MODULE_LICENSE("GPL");