]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/rtc/rtc-m41t80.c
Merge tag 'acpi-5.5-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[mirror_ubuntu-jammy-kernel.git] / drivers / rtc / rtc-m41t80.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
caaff562
AN
2/*
3 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
4 *
5 * Author: Alexander Bigga <ab@mycable.de>
6 *
7 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
8 *
9 * 2006 (c) mycable GmbH
caaff562
AN
10 */
11
a737e835
JP
12#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
35aa64f3 14#include <linux/bcd.h>
1373e77b 15#include <linux/clk-provider.h>
35aa64f3 16#include <linux/i2c.h>
caaff562 17#include <linux/init.h>
9fb1f68d 18#include <linux/kernel.h>
35aa64f3 19#include <linux/module.h>
eb235c56 20#include <linux/of_device.h>
35aa64f3 21#include <linux/rtc.h>
caaff562 22#include <linux/slab.h>
613655fa 23#include <linux/mutex.h>
caaff562 24#include <linux/string.h>
617780d2 25#ifdef CONFIG_RTC_DRV_M41T80_WDT
617780d2
AN
26#include <linux/fs.h>
27#include <linux/ioctl.h>
35aa64f3
MR
28#include <linux/miscdevice.h>
29#include <linux/reboot.h>
30#include <linux/watchdog.h>
617780d2 31#endif
caaff562 32
f2b84ee8
MJ
33#define M41T80_REG_SSEC 0x00
34#define M41T80_REG_SEC 0x01
35#define M41T80_REG_MIN 0x02
36#define M41T80_REG_HOUR 0x03
37#define M41T80_REG_WDAY 0x04
38#define M41T80_REG_DAY 0x05
39#define M41T80_REG_MON 0x06
40#define M41T80_REG_YEAR 0x07
41#define M41T80_REG_ALARM_MON 0x0a
42#define M41T80_REG_ALARM_DAY 0x0b
43#define M41T80_REG_ALARM_HOUR 0x0c
44#define M41T80_REG_ALARM_MIN 0x0d
45#define M41T80_REG_ALARM_SEC 0x0e
46#define M41T80_REG_FLAGS 0x0f
47#define M41T80_REG_SQW 0x13
caaff562
AN
48
49#define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
50#define M41T80_ALARM_REG_SIZE \
51 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
52
1373e77b
GB
53#define M41T80_SQW_MAX_FREQ 32768
54
54339f3b
MJ
55#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
56#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
57#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
58#define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
05a7f27a 59#define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
54339f3b
MJ
60#define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
61#define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
62#define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
63#define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
64#define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
caaff562 65
54339f3b
MJ
66#define M41T80_FEATURE_HT BIT(0) /* Halt feature */
67#define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
68#define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
69#define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
70#define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
caaff562 71
3760f736 72static const struct i2c_device_id m41t80_id[] = {
f30281f4 73 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
d3a126fc
SF
74 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
75 { "m41t80", M41T80_FEATURE_SQ },
76 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
77 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
78 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
79 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
6b1a5235 83 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
3760f736 84 { }
caaff562 85};
3760f736 86MODULE_DEVICE_TABLE(i2c, m41t80_id);
caaff562 87
eb235c56
JMC
88static const struct of_device_id m41t80_of_match[] = {
89 {
90 .compatible = "st,m41t62",
91 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
92 },
93 {
94 .compatible = "st,m41t65",
95 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
96 },
97 {
98 .compatible = "st,m41t80",
99 .data = (void *)(M41T80_FEATURE_SQ)
100 },
101 {
102 .compatible = "st,m41t81",
103 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
104 },
105 {
106 .compatible = "st,m41t81s",
107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
108 },
109 {
110 .compatible = "st,m41t82",
111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
112 },
113 {
114 .compatible = "st,m41t83",
115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
116 },
117 {
118 .compatible = "st,m41t84",
119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
120 },
121 {
122 .compatible = "st,m41t85",
123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
124 },
125 {
126 .compatible = "st,m41t87",
127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
128 },
a897bf13
AB
129 {
130 .compatible = "microcrystal,rv4162",
131 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
132 },
133 /* DT compatibility only, do not use compatibles below: */
eb235c56
JMC
134 {
135 .compatible = "st,rv4162",
136 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
137 },
138 {
139 .compatible = "rv4162",
140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
141 },
142 { }
143};
144MODULE_DEVICE_TABLE(of, m41t80_of_match);
145
caaff562 146struct m41t80_data {
eb235c56 147 unsigned long features;
1373e77b 148 struct i2c_client *client;
caaff562 149 struct rtc_device *rtc;
1373e77b
GB
150#ifdef CONFIG_COMMON_CLK
151 struct clk_hw sqw;
2cb90ed3 152 unsigned long freq;
13bb1d78 153 unsigned int sqwe;
1373e77b 154#endif
caaff562
AN
155};
156
9c6dfed9
MJ
157static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
158{
159 struct i2c_client *client = dev_id;
160 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
161 struct mutex *lock = &m41t80->rtc->ops_lock;
162 unsigned long events = 0;
163 int flags, flags_afe;
164
165 mutex_lock(lock);
166
167 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
168 if (flags_afe < 0) {
169 mutex_unlock(lock);
170 return IRQ_NONE;
171 }
172
173 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
174 if (flags <= 0) {
175 mutex_unlock(lock);
176 return IRQ_NONE;
177 }
178
179 if (flags & M41T80_FLAGS_AF) {
180 flags &= ~M41T80_FLAGS_AF;
181 flags_afe &= ~M41T80_ALMON_AFE;
182 events |= RTC_AF;
183 }
184
185 if (events) {
186 rtc_update_irq(m41t80->rtc, 1, events);
187 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
188 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
189 flags_afe);
190 }
191
192 mutex_unlock(lock);
193
194 return IRQ_HANDLED;
195}
196
e2c8e1a9 197static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
caaff562 198{
e2c8e1a9 199 struct i2c_client *client = to_i2c_client(dev);
f2b84ee8 200 unsigned char buf[8];
05a7f27a
MJ
201 int err, flags;
202
203 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
204 if (flags < 0)
205 return flags;
206
207 if (flags & M41T80_FLAGS_OF) {
208 dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
209 return -EINVAL;
210 }
caaff562 211
f2b84ee8
MJ
212 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
213 sizeof(buf), buf);
214 if (err < 0) {
215 dev_err(&client->dev, "Unable to read date\n");
f1bd154d 216 return err;
caaff562
AN
217 }
218
fe20ba70
AB
219 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
220 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
221 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
222 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
caaff562 223 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
fe20ba70 224 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
caaff562
AN
225
226 /* assume 20YY not 19YY, and ignore the Century Bit */
fe20ba70 227 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
22652ba7 228 return 0;
caaff562
AN
229}
230
e2c8e1a9 231static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
caaff562 232{
e2c8e1a9 233 struct i2c_client *client = to_i2c_client(dev);
0f546b05 234 struct m41t80_data *clientdata = i2c_get_clientdata(client);
f2b84ee8 235 unsigned char buf[8];
05a7f27a 236 int err, flags;
caaff562 237
caaff562 238 buf[M41T80_REG_SSEC] = 0;
f2b84ee8
MJ
239 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
240 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
241 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
242 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
243 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
244 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
245 buf[M41T80_REG_WDAY] = tm->tm_wday;
246
0f546b05
GB
247 /* If the square wave output is controlled in the weekday register */
248 if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
249 int val;
250
251 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
252 if (val < 0)
253 return val;
254
255 buf[M41T80_REG_WDAY] |= (val & 0xf0);
256 }
257
f2b84ee8
MJ
258 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
259 sizeof(buf), buf);
260 if (err < 0) {
261 dev_err(&client->dev, "Unable to write to date registers\n");
262 return err;
bcebd81d 263 }
caaff562 264
05a7f27a
MJ
265 /* Clear the OF bit of Flags Register */
266 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
267 if (flags < 0)
268 return flags;
269
f1bd154d
MR
270 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
271 flags & ~M41T80_FLAGS_OF);
272 if (err < 0) {
05a7f27a 273 dev_err(&client->dev, "Unable to write flags register\n");
f1bd154d 274 return err;
05a7f27a
MJ
275 }
276
f2b84ee8 277 return err;
caaff562
AN
278}
279
caaff562
AN
280static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
281{
282 struct i2c_client *client = to_i2c_client(dev);
283 struct m41t80_data *clientdata = i2c_get_clientdata(client);
f1bd154d 284 int reg;
caaff562 285
3760f736 286 if (clientdata->features & M41T80_FEATURE_BL) {
caaff562 287 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
f1bd154d
MR
288 if (reg < 0)
289 return reg;
caaff562
AN
290 seq_printf(seq, "battery\t\t: %s\n",
291 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
292 }
293 return 0;
294}
caaff562 295
9c6dfed9
MJ
296static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
297{
298 struct i2c_client *client = to_i2c_client(dev);
299 int flags, retval;
300
301 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
302 if (flags < 0)
303 return flags;
304
305 if (enabled)
306 flags |= M41T80_ALMON_AFE;
307 else
308 flags &= ~M41T80_ALMON_AFE;
309
310 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
311 if (retval < 0) {
e89487fe 312 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
9c6dfed9
MJ
313 return retval;
314 }
315 return 0;
316}
317
318static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
319{
320 struct i2c_client *client = to_i2c_client(dev);
321 u8 alarmvals[5];
322 int ret, err;
323
324 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
325 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
326 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
327 alarmvals[3] = bin2bcd(alrm->time.tm_min);
328 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
329
330 /* Clear AF and AFE flags */
331 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
332 if (ret < 0)
333 return ret;
334 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
335 ret & ~(M41T80_ALMON_AFE));
336 if (err < 0) {
337 dev_err(dev, "Unable to clear AFE bit\n");
338 return err;
339 }
340
2de9261c
GB
341 /* Keep SQWE bit value */
342 alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
343
9c6dfed9
MJ
344 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
345 if (ret < 0)
346 return ret;
347
348 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
349 ret & ~(M41T80_FLAGS_AF));
350 if (err < 0) {
351 dev_err(dev, "Unable to clear AF bit\n");
352 return err;
353 }
354
355 /* Write the alarm */
356 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
357 5, alarmvals);
358 if (err)
359 return err;
360
361 /* Enable the alarm interrupt */
362 if (alrm->enabled) {
363 alarmvals[0] |= M41T80_ALMON_AFE;
364 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
365 alarmvals[0]);
366 if (err)
367 return err;
368 }
369
370 return 0;
371}
372
373static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
374{
375 struct i2c_client *client = to_i2c_client(dev);
376 u8 alarmvals[5];
377 int flags, ret;
378
379 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
380 5, alarmvals);
381 if (ret != 5)
382 return ret < 0 ? ret : -EIO;
383
384 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
385 if (flags < 0)
386 return flags;
387
388 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
389 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
390 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
9c6dfed9 391 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
3cc9ffbb 392 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
9c6dfed9
MJ
393
394 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
395 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
396
397 return 0;
398}
399
caaff562
AN
400static struct rtc_class_ops m41t80_rtc_ops = {
401 .read_time = m41t80_rtc_read_time,
402 .set_time = m41t80_rtc_set_time,
caaff562 403 .proc = m41t80_rtc_proc,
caaff562
AN
404};
405
ae036af8
SC
406#ifdef CONFIG_PM_SLEEP
407static int m41t80_suspend(struct device *dev)
408{
409 struct i2c_client *client = to_i2c_client(dev);
410
411 if (client->irq >= 0 && device_may_wakeup(dev))
412 enable_irq_wake(client->irq);
413
414 return 0;
415}
416
417static int m41t80_resume(struct device *dev)
418{
419 struct i2c_client *client = to_i2c_client(dev);
420
421 if (client->irq >= 0 && device_may_wakeup(dev))
422 disable_irq_wake(client->irq);
423
424 return 0;
425}
426#endif
427
428static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
429
1373e77b
GB
430#ifdef CONFIG_COMMON_CLK
431#define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
432
2cb90ed3
TK
433static unsigned long m41t80_decode_freq(int setting)
434{
435 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
436 M41T80_SQW_MAX_FREQ >> setting;
437}
438
439static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
1373e77b 440{
1373e77b
GB
441 struct i2c_client *client = m41t80->client;
442 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
443 M41T80_REG_WDAY : M41T80_REG_SQW;
444 int ret = i2c_smbus_read_byte_data(client, reg_sqw);
1373e77b
GB
445
446 if (ret < 0)
447 return 0;
2cb90ed3
TK
448 return m41t80_decode_freq(ret >> 4);
449}
1373e77b 450
2cb90ed3
TK
451static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
452 unsigned long parent_rate)
453{
454 return sqw_to_m41t80_data(hw)->freq;
1373e77b
GB
455}
456
457static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
458 unsigned long *prate)
459{
c8384bb0
TK
460 if (rate >= M41T80_SQW_MAX_FREQ)
461 return M41T80_SQW_MAX_FREQ;
462 if (rate >= M41T80_SQW_MAX_FREQ / 4)
463 return M41T80_SQW_MAX_FREQ / 4;
464 if (!rate)
465 return 0;
466 return 1 << ilog2(rate);
1373e77b
GB
467}
468
469static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
470 unsigned long parent_rate)
471{
472 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
473 struct i2c_client *client = m41t80->client;
474 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
475 M41T80_REG_WDAY : M41T80_REG_SQW;
476 int reg, ret, val = 0;
477
05a03bf2
TK
478 if (rate >= M41T80_SQW_MAX_FREQ)
479 val = 1;
480 else if (rate >= M41T80_SQW_MAX_FREQ / 4)
481 val = 2;
482 else if (rate)
483 val = 15 - ilog2(rate);
1373e77b
GB
484
485 reg = i2c_smbus_read_byte_data(client, reg_sqw);
486 if (reg < 0)
487 return reg;
488
489 reg = (reg & 0x0f) | (val << 4);
490
491 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
2cb90ed3
TK
492 if (!ret)
493 m41t80->freq = m41t80_decode_freq(val);
de6042d2 494 return ret;
1373e77b
GB
495}
496
497static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
498{
499 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
500 struct i2c_client *client = m41t80->client;
501 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
502
503 if (ret < 0)
504 return ret;
505
506 if (enable)
507 ret |= M41T80_ALMON_SQWE;
508 else
509 ret &= ~M41T80_ALMON_SQWE;
510
13bb1d78
TK
511 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
512 if (!ret)
513 m41t80->sqwe = enable;
514 return ret;
1373e77b
GB
515}
516
517static int m41t80_sqw_prepare(struct clk_hw *hw)
518{
519 return m41t80_sqw_control(hw, 1);
520}
521
522static void m41t80_sqw_unprepare(struct clk_hw *hw)
523{
524 m41t80_sqw_control(hw, 0);
525}
526
527static int m41t80_sqw_is_prepared(struct clk_hw *hw)
528{
13bb1d78 529 return sqw_to_m41t80_data(hw)->sqwe;
1373e77b
GB
530}
531
532static const struct clk_ops m41t80_sqw_ops = {
533 .prepare = m41t80_sqw_prepare,
534 .unprepare = m41t80_sqw_unprepare,
535 .is_prepared = m41t80_sqw_is_prepared,
536 .recalc_rate = m41t80_sqw_recalc_rate,
537 .round_rate = m41t80_sqw_round_rate,
538 .set_rate = m41t80_sqw_set_rate,
539};
540
541static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
542{
543 struct i2c_client *client = m41t80->client;
544 struct device_node *node = client->dev.of_node;
545 struct clk *clk;
546 struct clk_init_data init;
547 int ret;
548
549 /* First disable the clock */
550 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
551 if (ret < 0)
552 return ERR_PTR(ret);
553 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
554 ret & ~(M41T80_ALMON_SQWE));
555 if (ret < 0)
556 return ERR_PTR(ret);
557
558 init.name = "m41t80-sqw";
559 init.ops = &m41t80_sqw_ops;
560 init.flags = 0;
561 init.parent_names = NULL;
562 init.num_parents = 0;
563 m41t80->sqw.init = &init;
2cb90ed3 564 m41t80->freq = m41t80_get_freq(m41t80);
1373e77b
GB
565
566 /* optional override of the clockname */
567 of_property_read_string(node, "clock-output-names", &init.name);
568
569 /* register the clock */
570 clk = clk_register(&client->dev, &m41t80->sqw);
571 if (!IS_ERR(clk))
572 of_clk_add_provider(node, of_clk_src_simple_get, clk);
573
574 return clk;
575}
576#endif
577
617780d2
AN
578#ifdef CONFIG_RTC_DRV_M41T80_WDT
579/*
580 *****************************************************************************
581 *
582 * Watchdog Driver
583 *
584 *****************************************************************************
585 */
76384f31 586static DEFINE_MUTEX(m41t80_rtc_mutex);
617780d2
AN
587static struct i2c_client *save_client;
588
589/* Default margin */
590#define WD_TIMO 60 /* 1..31 seconds */
591
592static int wdt_margin = WD_TIMO;
593module_param(wdt_margin, int, 0);
594MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
595
596static unsigned long wdt_is_open;
597static int boot_flag;
598
599/**
600 * wdt_ping:
601 *
602 * Reload counter one with the watchdog timeout. We don't bother reloading
603 * the cascade counter.
604 */
605static void wdt_ping(void)
606{
607 unsigned char i2c_data[2];
608 struct i2c_msg msgs1[1] = {
609 {
610 .addr = save_client->addr,
611 .flags = 0,
612 .len = 2,
613 .buf = i2c_data,
614 },
615 };
d3a126fc
SF
616 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
617
617780d2
AN
618 i2c_data[0] = 0x09; /* watchdog register */
619
620 if (wdt_margin > 31)
621 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
622 else
623 /*
624 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
625 */
fc99b901 626 i2c_data[1] = wdt_margin << 2 | 0x82;
617780d2 627
d3a126fc
SF
628 /*
629 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
630 * that would be an invalid resolution.
631 */
632 if (clientdata->features & M41T80_FEATURE_WD)
633 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
634
617780d2
AN
635 i2c_transfer(save_client->adapter, msgs1, 1);
636}
637
638/**
639 * wdt_disable:
640 *
641 * disables watchdog.
642 */
643static void wdt_disable(void)
644{
645 unsigned char i2c_data[2], i2c_buf[0x10];
646 struct i2c_msg msgs0[2] = {
647 {
648 .addr = save_client->addr,
649 .flags = 0,
650 .len = 1,
651 .buf = i2c_data,
652 },
653 {
654 .addr = save_client->addr,
655 .flags = I2C_M_RD,
656 .len = 1,
657 .buf = i2c_buf,
658 },
659 };
660 struct i2c_msg msgs1[1] = {
661 {
662 .addr = save_client->addr,
663 .flags = 0,
664 .len = 2,
665 .buf = i2c_data,
666 },
667 };
668
669 i2c_data[0] = 0x09;
670 i2c_transfer(save_client->adapter, msgs0, 2);
671
672 i2c_data[0] = 0x09;
673 i2c_data[1] = 0x00;
674 i2c_transfer(save_client->adapter, msgs1, 1);
675}
676
677/**
678 * wdt_write:
679 * @file: file handle to the watchdog
680 * @buf: buffer to write (unused as data does not matter here
681 * @count: count of bytes
682 * @ppos: pointer to the position to write. No seeks allowed
683 *
684 * A write to a watchdog device is defined as a keepalive signal. Any
685 * write of data will do, as we we don't define content meaning.
686 */
687static ssize_t wdt_write(struct file *file, const char __user *buf,
688 size_t count, loff_t *ppos)
689{
617780d2
AN
690 if (count) {
691 wdt_ping();
692 return 1;
693 }
694 return 0;
695}
696
697static ssize_t wdt_read(struct file *file, char __user *buf,
698 size_t count, loff_t *ppos)
699{
700 return 0;
701}
702
703/**
704 * wdt_ioctl:
617780d2
AN
705 * @file: file handle to the device
706 * @cmd: watchdog command
707 * @arg: argument pointer
708 *
709 * The watchdog API defines a common set of functions for all watchdogs
710 * according to their available features. We only actually usefully support
711 * querying capabilities and current status.
712 */
55929332 713static int wdt_ioctl(struct file *file, unsigned int cmd,
617780d2
AN
714 unsigned long arg)
715{
716 int new_margin, rv;
717 static struct watchdog_info ident = {
718 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
719 WDIOF_SETTIMEOUT,
720 .firmware_version = 1,
721 .identity = "M41T80 WTD"
722 };
723
724 switch (cmd) {
725 case WDIOC_GETSUPPORT:
726 return copy_to_user((struct watchdog_info __user *)arg, &ident,
727 sizeof(ident)) ? -EFAULT : 0;
728
729 case WDIOC_GETSTATUS:
730 case WDIOC_GETBOOTSTATUS:
731 return put_user(boot_flag, (int __user *)arg);
732 case WDIOC_KEEPALIVE:
733 wdt_ping();
734 return 0;
735 case WDIOC_SETTIMEOUT:
736 if (get_user(new_margin, (int __user *)arg))
737 return -EFAULT;
738 /* Arbitrary, can't find the card's limits */
739 if (new_margin < 1 || new_margin > 124)
740 return -EINVAL;
741 wdt_margin = new_margin;
742 wdt_ping();
c3e04915 743 /* Fall through */
617780d2
AN
744 case WDIOC_GETTIMEOUT:
745 return put_user(wdt_margin, (int __user *)arg);
746
747 case WDIOC_SETOPTIONS:
748 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
749 return -EFAULT;
750
751 if (rv & WDIOS_DISABLECARD) {
a737e835 752 pr_info("disable watchdog\n");
617780d2
AN
753 wdt_disable();
754 }
755
756 if (rv & WDIOS_ENABLECARD) {
a737e835 757 pr_info("enable watchdog\n");
617780d2
AN
758 wdt_ping();
759 }
760
761 return -EINVAL;
762 }
763 return -ENOTTY;
764}
765
55929332
AB
766static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
767 unsigned long arg)
768{
769 int ret;
770
613655fa 771 mutex_lock(&m41t80_rtc_mutex);
55929332 772 ret = wdt_ioctl(file, cmd, arg);
613655fa 773 mutex_unlock(&m41t80_rtc_mutex);
55929332
AB
774
775 return ret;
776}
777
617780d2
AN
778/**
779 * wdt_open:
780 * @inode: inode of device
781 * @file: file handle to device
782 *
783 */
784static int wdt_open(struct inode *inode, struct file *file)
785{
786 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) {
613655fa 787 mutex_lock(&m41t80_rtc_mutex);
41012735 788 if (test_and_set_bit(0, &wdt_is_open)) {
613655fa 789 mutex_unlock(&m41t80_rtc_mutex);
617780d2 790 return -EBUSY;
41012735 791 }
617780d2
AN
792 /*
793 * Activate
794 */
795 wdt_is_open = 1;
613655fa 796 mutex_unlock(&m41t80_rtc_mutex);
c5bf68fe 797 return stream_open(inode, file);
617780d2
AN
798 }
799 return -ENODEV;
800}
801
802/**
803 * wdt_close:
804 * @inode: inode to board
805 * @file: file handle to board
806 *
807 */
808static int wdt_release(struct inode *inode, struct file *file)
809{
810 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR)
811 clear_bit(0, &wdt_is_open);
812 return 0;
813}
814
815/**
816 * notify_sys:
817 * @this: our notifier block
818 * @code: the event being reported
819 * @unused: unused
820 *
821 * Our notifier is called on system shutdowns. We want to turn the card
822 * off at reboot otherwise the machine will reboot again during memory
823 * test or worse yet during the following fsck. This would suck, in fact
824 * trust me - if it happens it does suck.
825 */
826static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
827 void *unused)
828{
829 if (code == SYS_DOWN || code == SYS_HALT)
830 /* Disable Watchdog */
831 wdt_disable();
832 return NOTIFY_DONE;
833}
834
835static const struct file_operations wdt_fops = {
836 .owner = THIS_MODULE,
837 .read = wdt_read,
55929332 838 .unlocked_ioctl = wdt_unlocked_ioctl,
b6dfb247 839 .compat_ioctl = compat_ptr_ioctl,
617780d2
AN
840 .write = wdt_write,
841 .open = wdt_open,
842 .release = wdt_release,
6038f373 843 .llseek = no_llseek,
617780d2
AN
844};
845
846static struct miscdevice wdt_dev = {
847 .minor = WATCHDOG_MINOR,
848 .name = "watchdog",
849 .fops = &wdt_fops,
850};
851
852/*
853 * The WDT card needs to learn about soft shutdowns in order to
854 * turn the timebomb registers off.
855 */
856static struct notifier_block wdt_notifier = {
857 .notifier_call = wdt_notify_sys,
858};
859#endif /* CONFIG_RTC_DRV_M41T80_WDT */
860
caaff562
AN
861/*
862 *****************************************************************************
863 *
864 * Driver Interface
865 *
866 *****************************************************************************
867 */
ef6b3125 868
d2653e92
JD
869static int m41t80_probe(struct i2c_client *client,
870 const struct i2c_device_id *id)
caaff562 871{
e5108df4 872 struct i2c_adapter *adapter = client->adapter;
3760f736 873 int rc = 0;
caaff562 874 struct rtc_time tm;
9c6dfed9 875 struct m41t80_data *m41t80_data = NULL;
d4473b9b 876 bool wakeup_source = false;
caaff562 877
f2b84ee8
MJ
878 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
879 I2C_FUNC_SMBUS_BYTE_DATA)) {
880 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
c67fedfa 881 return -ENODEV;
f2b84ee8 882 }
caaff562 883
9c6dfed9
MJ
884 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
885 GFP_KERNEL);
886 if (!m41t80_data)
c67fedfa 887 return -ENOMEM;
caaff562 888
1373e77b 889 m41t80_data->client = client;
eb235c56
JMC
890 if (client->dev.of_node)
891 m41t80_data->features = (unsigned long)
892 of_device_get_match_data(&client->dev);
893 else
894 m41t80_data->features = id->driver_data;
9c6dfed9
MJ
895 i2c_set_clientdata(client, m41t80_data);
896
10d0c768
AB
897 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
898 if (IS_ERR(m41t80_data->rtc))
899 return PTR_ERR(m41t80_data->rtc);
900
d4473b9b
EC
901#ifdef CONFIG_OF
902 wakeup_source = of_property_read_bool(client->dev.of_node,
903 "wakeup-source");
904#endif
9c6dfed9
MJ
905 if (client->irq > 0) {
906 rc = devm_request_threaded_irq(&client->dev, client->irq,
907 NULL, m41t80_handle_irq,
908 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
909 "m41t80", client);
910 if (rc) {
911 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
912 client->irq = 0;
d4473b9b 913 wakeup_source = false;
9c6dfed9
MJ
914 }
915 }
d4473b9b
EC
916 if (client->irq > 0 || wakeup_source) {
917 m41t80_rtc_ops.read_alarm = m41t80_read_alarm;
918 m41t80_rtc_ops.set_alarm = m41t80_set_alarm;
919 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable;
920 /* Enable the wakealarm */
921 device_init_wakeup(&client->dev, true);
922 }
a015dbc1 923
10d0c768 924 m41t80_data->rtc->ops = &m41t80_rtc_ops;
cf79e7c3
AB
925 m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
926 m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
caaff562 927
d4473b9b
EC
928 if (client->irq <= 0) {
929 /* We cannot support UIE mode if we do not have an IRQ line */
10d0c768 930 m41t80_data->rtc->uie_unsupported = 1;
d4473b9b 931 }
caaff562
AN
932
933 /* Make sure HT (Halt Update) bit is cleared */
934 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
caaff562 935
c67fedfa 936 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
9c6dfed9 937 if (m41t80_data->features & M41T80_FEATURE_HT) {
e2c8e1a9 938 m41t80_rtc_read_time(&client->dev, &tm);
caaff562 939 dev_info(&client->dev, "HT bit was set!\n");
22b844ae 940 dev_info(&client->dev, "Power Down at %ptR\n", &tm);
caaff562 941 }
c67fedfa 942 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
fc99b901 943 rc & ~M41T80_ALHOUR_HT);
c67fedfa
WS
944 }
945
946 if (rc < 0) {
947 dev_err(&client->dev, "Can't clear HT bit\n");
85d77047 948 return rc;
caaff562
AN
949 }
950
951 /* Make sure ST (stop) bit is cleared */
952 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
caaff562 953
c67fedfa
WS
954 if (rc >= 0 && rc & M41T80_SEC_ST)
955 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
fc99b901 956 rc & ~M41T80_SEC_ST);
c67fedfa
WS
957 if (rc < 0) {
958 dev_err(&client->dev, "Can't clear ST bit\n");
85d77047 959 return rc;
caaff562
AN
960 }
961
617780d2 962#ifdef CONFIG_RTC_DRV_M41T80_WDT
9c6dfed9 963 if (m41t80_data->features & M41T80_FEATURE_HT) {
417607d0 964 save_client = client;
617780d2
AN
965 rc = misc_register(&wdt_dev);
966 if (rc)
c67fedfa 967 return rc;
617780d2
AN
968 rc = register_reboot_notifier(&wdt_notifier);
969 if (rc) {
970 misc_deregister(&wdt_dev);
c67fedfa 971 return rc;
617780d2 972 }
617780d2 973 }
1373e77b
GB
974#endif
975#ifdef CONFIG_COMMON_CLK
976 if (m41t80_data->features & M41T80_FEATURE_SQ)
977 m41t80_sqw_register_clk(m41t80_data);
617780d2 978#endif
10d0c768
AB
979
980 rc = rtc_register_device(m41t80_data->rtc);
981 if (rc)
982 return rc;
983
caaff562 984 return 0;
caaff562
AN
985}
986
987static int m41t80_remove(struct i2c_client *client)
988{
4ebabb78 989#ifdef CONFIG_RTC_DRV_M41T80_WDT
caaff562 990 struct m41t80_data *clientdata = i2c_get_clientdata(client);
caaff562 991
3760f736 992 if (clientdata->features & M41T80_FEATURE_HT) {
617780d2
AN
993 misc_deregister(&wdt_dev);
994 unregister_reboot_notifier(&wdt_notifier);
995 }
996#endif
caaff562
AN
997
998 return 0;
999}
1000
1001static struct i2c_driver m41t80_driver = {
1002 .driver = {
afe1ab4d 1003 .name = "rtc-m41t80",
eb235c56 1004 .of_match_table = of_match_ptr(m41t80_of_match),
ae036af8 1005 .pm = &m41t80_pm,
caaff562
AN
1006 },
1007 .probe = m41t80_probe,
1008 .remove = m41t80_remove,
3760f736 1009 .id_table = m41t80_id,
caaff562
AN
1010};
1011
0abc9201 1012module_i2c_driver(m41t80_driver);
caaff562
AN
1013
1014MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
1015MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
1016MODULE_LICENSE("GPL");