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rtc: ds1307: Add m41t0 to OF device ID table
[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-m41t80.c
CommitLineData
caaff562
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1/*
2 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
3 *
4 * Author: Alexander Bigga <ab@mycable.de>
5 *
6 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
7 *
8 * 2006 (c) mycable GmbH
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
a737e835
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16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
35aa64f3
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18#include <linux/bcd.h>
19#include <linux/i2c.h>
caaff562 20#include <linux/init.h>
9fb1f68d 21#include <linux/kernel.h>
35aa64f3 22#include <linux/module.h>
eb235c56 23#include <linux/of_device.h>
35aa64f3 24#include <linux/rtc.h>
caaff562 25#include <linux/slab.h>
613655fa 26#include <linux/mutex.h>
caaff562 27#include <linux/string.h>
617780d2 28#ifdef CONFIG_RTC_DRV_M41T80_WDT
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29#include <linux/fs.h>
30#include <linux/ioctl.h>
35aa64f3
MR
31#include <linux/miscdevice.h>
32#include <linux/reboot.h>
33#include <linux/watchdog.h>
617780d2 34#endif
caaff562 35
f2b84ee8
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36#define M41T80_REG_SSEC 0x00
37#define M41T80_REG_SEC 0x01
38#define M41T80_REG_MIN 0x02
39#define M41T80_REG_HOUR 0x03
40#define M41T80_REG_WDAY 0x04
41#define M41T80_REG_DAY 0x05
42#define M41T80_REG_MON 0x06
43#define M41T80_REG_YEAR 0x07
44#define M41T80_REG_ALARM_MON 0x0a
45#define M41T80_REG_ALARM_DAY 0x0b
46#define M41T80_REG_ALARM_HOUR 0x0c
47#define M41T80_REG_ALARM_MIN 0x0d
48#define M41T80_REG_ALARM_SEC 0x0e
49#define M41T80_REG_FLAGS 0x0f
50#define M41T80_REG_SQW 0x13
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51
52#define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
53#define M41T80_ALARM_REG_SIZE \
54 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
55
54339f3b
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56#define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
57#define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
58#define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
59#define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
05a7f27a 60#define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
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MJ
61#define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
62#define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
63#define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
64#define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
65#define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
caaff562 66
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67#define M41T80_FEATURE_HT BIT(0) /* Halt feature */
68#define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
69#define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
70#define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
71#define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
caaff562 72
613655fa 73static DEFINE_MUTEX(m41t80_rtc_mutex);
3760f736 74static const struct i2c_device_id m41t80_id[] = {
f30281f4 75 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
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SF
76 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
77 { "m41t80", M41T80_FEATURE_SQ },
78 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
79 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
83 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
84 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
6b1a5235 85 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
3760f736 86 { }
caaff562 87};
3760f736 88MODULE_DEVICE_TABLE(i2c, m41t80_id);
caaff562 89
eb235c56
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90static const struct of_device_id m41t80_of_match[] = {
91 {
92 .compatible = "st,m41t62",
93 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
94 },
95 {
96 .compatible = "st,m41t65",
97 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
98 },
99 {
100 .compatible = "st,m41t80",
101 .data = (void *)(M41T80_FEATURE_SQ)
102 },
103 {
104 .compatible = "st,m41t81",
105 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
106 },
107 {
108 .compatible = "st,m41t81s",
109 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
110 },
111 {
112 .compatible = "st,m41t82",
113 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
114 },
115 {
116 .compatible = "st,m41t83",
117 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
118 },
119 {
120 .compatible = "st,m41t84",
121 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
122 },
123 {
124 .compatible = "st,m41t85",
125 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
126 },
127 {
128 .compatible = "st,m41t87",
129 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
130 },
131 {
132 .compatible = "st,rv4162",
133 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
134 },
135 {
136 .compatible = "rv4162",
137 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
138 },
139 { }
140};
141MODULE_DEVICE_TABLE(of, m41t80_of_match);
142
caaff562 143struct m41t80_data {
eb235c56 144 unsigned long features;
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145 struct rtc_device *rtc;
146};
147
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148static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
149{
150 struct i2c_client *client = dev_id;
151 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
152 struct mutex *lock = &m41t80->rtc->ops_lock;
153 unsigned long events = 0;
154 int flags, flags_afe;
155
156 mutex_lock(lock);
157
158 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
159 if (flags_afe < 0) {
160 mutex_unlock(lock);
161 return IRQ_NONE;
162 }
163
164 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
165 if (flags <= 0) {
166 mutex_unlock(lock);
167 return IRQ_NONE;
168 }
169
170 if (flags & M41T80_FLAGS_AF) {
171 flags &= ~M41T80_FLAGS_AF;
172 flags_afe &= ~M41T80_ALMON_AFE;
173 events |= RTC_AF;
174 }
175
176 if (events) {
177 rtc_update_irq(m41t80->rtc, 1, events);
178 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
179 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
180 flags_afe);
181 }
182
183 mutex_unlock(lock);
184
185 return IRQ_HANDLED;
186}
187
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188static int m41t80_get_datetime(struct i2c_client *client,
189 struct rtc_time *tm)
190{
f2b84ee8 191 unsigned char buf[8];
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192 int err, flags;
193
194 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
195 if (flags < 0)
196 return flags;
197
198 if (flags & M41T80_FLAGS_OF) {
199 dev_err(&client->dev, "Oscillator failure, data is invalid.\n");
200 return -EINVAL;
201 }
caaff562 202
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203 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
204 sizeof(buf), buf);
205 if (err < 0) {
206 dev_err(&client->dev, "Unable to read date\n");
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207 return -EIO;
208 }
209
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210 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
211 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
212 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
213 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
caaff562 214 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
fe20ba70 215 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
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216
217 /* assume 20YY not 19YY, and ignore the Century Bit */
fe20ba70 218 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
b485fe5e 219 return rtc_valid_tm(tm);
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220}
221
222/* Sets the given date and time to the real time clock. */
223static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm)
224{
f2b84ee8 225 unsigned char buf[8];
05a7f27a 226 int err, flags;
caaff562 227
f2b84ee8
MJ
228 if (tm->tm_year < 100 || tm->tm_year > 199)
229 return -EINVAL;
caaff562 230
caaff562 231 buf[M41T80_REG_SSEC] = 0;
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MJ
232 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec);
233 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min);
234 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour);
235 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday);
236 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1);
237 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100);
238 buf[M41T80_REG_WDAY] = tm->tm_wday;
239
240 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
241 sizeof(buf), buf);
242 if (err < 0) {
243 dev_err(&client->dev, "Unable to write to date registers\n");
244 return err;
bcebd81d 245 }
caaff562 246
05a7f27a
MJ
247 /* Clear the OF bit of Flags Register */
248 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
249 if (flags < 0)
250 return flags;
251
252 if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
253 flags & ~M41T80_FLAGS_OF)) {
254 dev_err(&client->dev, "Unable to write flags register\n");
255 return -EIO;
256 }
257
f2b84ee8 258 return err;
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259}
260
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261static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
262{
263 struct i2c_client *client = to_i2c_client(dev);
264 struct m41t80_data *clientdata = i2c_get_clientdata(client);
265 u8 reg;
266
3760f736 267 if (clientdata->features & M41T80_FEATURE_BL) {
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268 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
269 seq_printf(seq, "battery\t\t: %s\n",
270 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
271 }
272 return 0;
273}
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274
275static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
276{
277 return m41t80_get_datetime(to_i2c_client(dev), tm);
278}
279
280static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm)
281{
282 return m41t80_set_datetime(to_i2c_client(dev), tm);
283}
284
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285static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
286{
287 struct i2c_client *client = to_i2c_client(dev);
288 int flags, retval;
289
290 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
291 if (flags < 0)
292 return flags;
293
294 if (enabled)
295 flags |= M41T80_ALMON_AFE;
296 else
297 flags &= ~M41T80_ALMON_AFE;
298
299 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
300 if (retval < 0) {
e89487fe 301 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval);
9c6dfed9
MJ
302 return retval;
303 }
304 return 0;
305}
306
307static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
308{
309 struct i2c_client *client = to_i2c_client(dev);
310 u8 alarmvals[5];
311 int ret, err;
312
313 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
314 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
315 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
316 alarmvals[3] = bin2bcd(alrm->time.tm_min);
317 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
318
319 /* Clear AF and AFE flags */
320 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
321 if (ret < 0)
322 return ret;
323 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
324 ret & ~(M41T80_ALMON_AFE));
325 if (err < 0) {
326 dev_err(dev, "Unable to clear AFE bit\n");
327 return err;
328 }
329
330 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
331 if (ret < 0)
332 return ret;
333
334 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
335 ret & ~(M41T80_FLAGS_AF));
336 if (err < 0) {
337 dev_err(dev, "Unable to clear AF bit\n");
338 return err;
339 }
340
341 /* Write the alarm */
342 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
343 5, alarmvals);
344 if (err)
345 return err;
346
347 /* Enable the alarm interrupt */
348 if (alrm->enabled) {
349 alarmvals[0] |= M41T80_ALMON_AFE;
350 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
351 alarmvals[0]);
352 if (err)
353 return err;
354 }
355
356 return 0;
357}
358
359static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
360{
361 struct i2c_client *client = to_i2c_client(dev);
362 u8 alarmvals[5];
363 int flags, ret;
364
365 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
366 5, alarmvals);
367 if (ret != 5)
368 return ret < 0 ? ret : -EIO;
369
370 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
371 if (flags < 0)
372 return flags;
373
374 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
375 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
376 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
9c6dfed9
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377 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
378 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f);
9c6dfed9
MJ
379
380 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
381 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
382
383 return 0;
384}
385
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AN
386static struct rtc_class_ops m41t80_rtc_ops = {
387 .read_time = m41t80_rtc_read_time,
388 .set_time = m41t80_rtc_set_time,
caaff562 389 .proc = m41t80_rtc_proc,
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AN
390};
391
ae036af8
SC
392#ifdef CONFIG_PM_SLEEP
393static int m41t80_suspend(struct device *dev)
394{
395 struct i2c_client *client = to_i2c_client(dev);
396
397 if (client->irq >= 0 && device_may_wakeup(dev))
398 enable_irq_wake(client->irq);
399
400 return 0;
401}
402
403static int m41t80_resume(struct device *dev)
404{
405 struct i2c_client *client = to_i2c_client(dev);
406
407 if (client->irq >= 0 && device_may_wakeup(dev))
408 disable_irq_wake(client->irq);
409
410 return 0;
411}
412#endif
413
414static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
415
ef6b3125
MJ
416static ssize_t flags_show(struct device *dev,
417 struct device_attribute *attr, char *buf)
caaff562
AN
418{
419 struct i2c_client *client = to_i2c_client(dev);
420 int val;
421
422 val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
423 if (val < 0)
85d77047 424 return val;
caaff562
AN
425 return sprintf(buf, "%#x\n", val);
426}
ef6b3125 427static DEVICE_ATTR_RO(flags);
caaff562 428
ef6b3125
MJ
429static ssize_t sqwfreq_show(struct device *dev,
430 struct device_attribute *attr, char *buf)
caaff562
AN
431{
432 struct i2c_client *client = to_i2c_client(dev);
d3a126fc 433 struct m41t80_data *clientdata = i2c_get_clientdata(client);
f30281f4 434 int val, reg_sqw;
caaff562 435
d3a126fc
SF
436 if (!(clientdata->features & M41T80_FEATURE_SQ))
437 return -EINVAL;
438
f30281f4
DG
439 reg_sqw = M41T80_REG_SQW;
440 if (clientdata->features & M41T80_FEATURE_SQ_ALT)
441 reg_sqw = M41T80_REG_WDAY;
442 val = i2c_smbus_read_byte_data(client, reg_sqw);
caaff562 443 if (val < 0)
85d77047 444 return val;
caaff562
AN
445 val = (val >> 4) & 0xf;
446 switch (val) {
447 case 0:
448 break;
449 case 1:
450 val = 32768;
451 break;
452 default:
453 val = 32768 >> val;
454 }
455 return sprintf(buf, "%d\n", val);
456}
ef6b3125
MJ
457
458static ssize_t sqwfreq_store(struct device *dev,
459 struct device_attribute *attr,
460 const char *buf, size_t count)
caaff562
AN
461{
462 struct i2c_client *client = to_i2c_client(dev);
d3a126fc 463 struct m41t80_data *clientdata = i2c_get_clientdata(client);
85d77047 464 int almon, sqw, reg_sqw, rc;
fc99b901
MJ
465 unsigned long val;
466
467 rc = kstrtoul(buf, 0, &val);
468 if (rc < 0)
469 return rc;
caaff562 470
d3a126fc
SF
471 if (!(clientdata->features & M41T80_FEATURE_SQ))
472 return -EINVAL;
473
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AN
474 if (val) {
475 if (!is_power_of_2(val))
476 return -EINVAL;
477 val = ilog2(val);
478 if (val == 15)
479 val = 1;
480 else if (val < 14)
481 val = 15 - val;
482 else
483 return -EINVAL;
484 }
485 /* disable SQW, set SQW frequency & re-enable */
486 almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
487 if (almon < 0)
85d77047 488 return almon;
f30281f4
DG
489 reg_sqw = M41T80_REG_SQW;
490 if (clientdata->features & M41T80_FEATURE_SQ_ALT)
491 reg_sqw = M41T80_REG_WDAY;
492 sqw = i2c_smbus_read_byte_data(client, reg_sqw);
caaff562 493 if (sqw < 0)
85d77047 494 return sqw;
caaff562 495 sqw = (sqw & 0x0f) | (val << 4);
85d77047
WS
496
497 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
fc99b901 498 almon & ~M41T80_ALMON_SQWE);
85d77047
WS
499 if (rc < 0)
500 return rc;
501
502 if (val) {
503 rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw);
504 if (rc < 0)
505 return rc;
506
507 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
fc99b901
MJ
508 almon | M41T80_ALMON_SQWE);
509 if (rc < 0)
85d77047
WS
510 return rc;
511 }
caaff562
AN
512 return count;
513}
ef6b3125 514static DEVICE_ATTR_RW(sqwfreq);
caaff562
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515
516static struct attribute *attrs[] = {
517 &dev_attr_flags.attr,
518 &dev_attr_sqwfreq.attr,
519 NULL,
520};
fc99b901 521
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522static struct attribute_group attr_group = {
523 .attrs = attrs,
524};
525
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526#ifdef CONFIG_RTC_DRV_M41T80_WDT
527/*
528 *****************************************************************************
529 *
530 * Watchdog Driver
531 *
532 *****************************************************************************
533 */
534static struct i2c_client *save_client;
535
536/* Default margin */
537#define WD_TIMO 60 /* 1..31 seconds */
538
539static int wdt_margin = WD_TIMO;
540module_param(wdt_margin, int, 0);
541MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
542
543static unsigned long wdt_is_open;
544static int boot_flag;
545
546/**
547 * wdt_ping:
548 *
549 * Reload counter one with the watchdog timeout. We don't bother reloading
550 * the cascade counter.
551 */
552static void wdt_ping(void)
553{
554 unsigned char i2c_data[2];
555 struct i2c_msg msgs1[1] = {
556 {
557 .addr = save_client->addr,
558 .flags = 0,
559 .len = 2,
560 .buf = i2c_data,
561 },
562 };
d3a126fc
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563 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
564
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565 i2c_data[0] = 0x09; /* watchdog register */
566
567 if (wdt_margin > 31)
568 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
569 else
570 /*
571 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
572 */
fc99b901 573 i2c_data[1] = wdt_margin << 2 | 0x82;
617780d2 574
d3a126fc
SF
575 /*
576 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
577 * that would be an invalid resolution.
578 */
579 if (clientdata->features & M41T80_FEATURE_WD)
580 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
581
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AN
582 i2c_transfer(save_client->adapter, msgs1, 1);
583}
584
585/**
586 * wdt_disable:
587 *
588 * disables watchdog.
589 */
590static void wdt_disable(void)
591{
592 unsigned char i2c_data[2], i2c_buf[0x10];
593 struct i2c_msg msgs0[2] = {
594 {
595 .addr = save_client->addr,
596 .flags = 0,
597 .len = 1,
598 .buf = i2c_data,
599 },
600 {
601 .addr = save_client->addr,
602 .flags = I2C_M_RD,
603 .len = 1,
604 .buf = i2c_buf,
605 },
606 };
607 struct i2c_msg msgs1[1] = {
608 {
609 .addr = save_client->addr,
610 .flags = 0,
611 .len = 2,
612 .buf = i2c_data,
613 },
614 };
615
616 i2c_data[0] = 0x09;
617 i2c_transfer(save_client->adapter, msgs0, 2);
618
619 i2c_data[0] = 0x09;
620 i2c_data[1] = 0x00;
621 i2c_transfer(save_client->adapter, msgs1, 1);
622}
623
624/**
625 * wdt_write:
626 * @file: file handle to the watchdog
627 * @buf: buffer to write (unused as data does not matter here
628 * @count: count of bytes
629 * @ppos: pointer to the position to write. No seeks allowed
630 *
631 * A write to a watchdog device is defined as a keepalive signal. Any
632 * write of data will do, as we we don't define content meaning.
633 */
634static ssize_t wdt_write(struct file *file, const char __user *buf,
635 size_t count, loff_t *ppos)
636{
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637 if (count) {
638 wdt_ping();
639 return 1;
640 }
641 return 0;
642}
643
644static ssize_t wdt_read(struct file *file, char __user *buf,
645 size_t count, loff_t *ppos)
646{
647 return 0;
648}
649
650/**
651 * wdt_ioctl:
652 * @inode: inode of the device
653 * @file: file handle to the device
654 * @cmd: watchdog command
655 * @arg: argument pointer
656 *
657 * The watchdog API defines a common set of functions for all watchdogs
658 * according to their available features. We only actually usefully support
659 * querying capabilities and current status.
660 */
55929332 661static int wdt_ioctl(struct file *file, unsigned int cmd,
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AN
662 unsigned long arg)
663{
664 int new_margin, rv;
665 static struct watchdog_info ident = {
666 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
667 WDIOF_SETTIMEOUT,
668 .firmware_version = 1,
669 .identity = "M41T80 WTD"
670 };
671
672 switch (cmd) {
673 case WDIOC_GETSUPPORT:
674 return copy_to_user((struct watchdog_info __user *)arg, &ident,
675 sizeof(ident)) ? -EFAULT : 0;
676
677 case WDIOC_GETSTATUS:
678 case WDIOC_GETBOOTSTATUS:
679 return put_user(boot_flag, (int __user *)arg);
680 case WDIOC_KEEPALIVE:
681 wdt_ping();
682 return 0;
683 case WDIOC_SETTIMEOUT:
684 if (get_user(new_margin, (int __user *)arg))
685 return -EFAULT;
686 /* Arbitrary, can't find the card's limits */
687 if (new_margin < 1 || new_margin > 124)
688 return -EINVAL;
689 wdt_margin = new_margin;
690 wdt_ping();
691 /* Fall */
692 case WDIOC_GETTIMEOUT:
693 return put_user(wdt_margin, (int __user *)arg);
694
695 case WDIOC_SETOPTIONS:
696 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
697 return -EFAULT;
698
699 if (rv & WDIOS_DISABLECARD) {
a737e835 700 pr_info("disable watchdog\n");
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701 wdt_disable();
702 }
703
704 if (rv & WDIOS_ENABLECARD) {
a737e835 705 pr_info("enable watchdog\n");
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706 wdt_ping();
707 }
708
709 return -EINVAL;
710 }
711 return -ENOTTY;
712}
713
55929332
AB
714static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
715 unsigned long arg)
716{
717 int ret;
718
613655fa 719 mutex_lock(&m41t80_rtc_mutex);
55929332 720 ret = wdt_ioctl(file, cmd, arg);
613655fa 721 mutex_unlock(&m41t80_rtc_mutex);
55929332
AB
722
723 return ret;
724}
725
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726/**
727 * wdt_open:
728 * @inode: inode of device
729 * @file: file handle to device
730 *
731 */
732static int wdt_open(struct inode *inode, struct file *file)
733{
734 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) {
613655fa 735 mutex_lock(&m41t80_rtc_mutex);
41012735 736 if (test_and_set_bit(0, &wdt_is_open)) {
613655fa 737 mutex_unlock(&m41t80_rtc_mutex);
617780d2 738 return -EBUSY;
41012735 739 }
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AN
740 /*
741 * Activate
742 */
743 wdt_is_open = 1;
613655fa 744 mutex_unlock(&m41t80_rtc_mutex);
09eeb1f5 745 return nonseekable_open(inode, file);
617780d2
AN
746 }
747 return -ENODEV;
748}
749
750/**
751 * wdt_close:
752 * @inode: inode to board
753 * @file: file handle to board
754 *
755 */
756static int wdt_release(struct inode *inode, struct file *file)
757{
758 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR)
759 clear_bit(0, &wdt_is_open);
760 return 0;
761}
762
763/**
764 * notify_sys:
765 * @this: our notifier block
766 * @code: the event being reported
767 * @unused: unused
768 *
769 * Our notifier is called on system shutdowns. We want to turn the card
770 * off at reboot otherwise the machine will reboot again during memory
771 * test or worse yet during the following fsck. This would suck, in fact
772 * trust me - if it happens it does suck.
773 */
774static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
775 void *unused)
776{
777 if (code == SYS_DOWN || code == SYS_HALT)
778 /* Disable Watchdog */
779 wdt_disable();
780 return NOTIFY_DONE;
781}
782
783static const struct file_operations wdt_fops = {
784 .owner = THIS_MODULE,
785 .read = wdt_read,
55929332 786 .unlocked_ioctl = wdt_unlocked_ioctl,
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787 .write = wdt_write,
788 .open = wdt_open,
789 .release = wdt_release,
6038f373 790 .llseek = no_llseek,
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791};
792
793static struct miscdevice wdt_dev = {
794 .minor = WATCHDOG_MINOR,
795 .name = "watchdog",
796 .fops = &wdt_fops,
797};
798
799/*
800 * The WDT card needs to learn about soft shutdowns in order to
801 * turn the timebomb registers off.
802 */
803static struct notifier_block wdt_notifier = {
804 .notifier_call = wdt_notify_sys,
805};
806#endif /* CONFIG_RTC_DRV_M41T80_WDT */
807
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808/*
809 *****************************************************************************
810 *
811 * Driver Interface
812 *
813 *****************************************************************************
814 */
ef6b3125
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815
816static void m41t80_remove_sysfs_group(void *_dev)
817{
818 struct device *dev = _dev;
819
820 sysfs_remove_group(&dev->kobj, &attr_group);
821}
822
d2653e92
JD
823static int m41t80_probe(struct i2c_client *client,
824 const struct i2c_device_id *id)
caaff562 825{
f2b84ee8 826 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
3760f736 827 int rc = 0;
caaff562
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828 struct rtc_device *rtc = NULL;
829 struct rtc_time tm;
9c6dfed9 830 struct m41t80_data *m41t80_data = NULL;
caaff562 831
f2b84ee8
MJ
832 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
833 I2C_FUNC_SMBUS_BYTE_DATA)) {
834 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
c67fedfa 835 return -ENODEV;
f2b84ee8 836 }
caaff562 837
9c6dfed9
MJ
838 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
839 GFP_KERNEL);
840 if (!m41t80_data)
c67fedfa 841 return -ENOMEM;
caaff562 842
eb235c56
JMC
843 if (client->dev.of_node)
844 m41t80_data->features = (unsigned long)
845 of_device_get_match_data(&client->dev);
846 else
847 m41t80_data->features = id->driver_data;
9c6dfed9
MJ
848 i2c_set_clientdata(client, m41t80_data);
849
850 if (client->irq > 0) {
851 rc = devm_request_threaded_irq(&client->dev, client->irq,
852 NULL, m41t80_handle_irq,
853 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
854 "m41t80", client);
855 if (rc) {
856 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
857 client->irq = 0;
858 } else {
859 m41t80_rtc_ops.read_alarm = m41t80_read_alarm;
860 m41t80_rtc_ops.set_alarm = m41t80_set_alarm;
861 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable;
3726a218
MJ
862 /* Enable the wakealarm */
863 device_init_wakeup(&client->dev, true);
9c6dfed9
MJ
864 }
865 }
a015dbc1 866
4ebabb78 867 rtc = devm_rtc_device_register(&client->dev, client->name,
fc99b901 868 &m41t80_rtc_ops, THIS_MODULE);
c67fedfa
WS
869 if (IS_ERR(rtc))
870 return PTR_ERR(rtc);
caaff562 871
9c6dfed9 872 m41t80_data->rtc = rtc;
caaff562
AN
873
874 /* Make sure HT (Halt Update) bit is cleared */
875 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
caaff562 876
c67fedfa 877 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
9c6dfed9 878 if (m41t80_data->features & M41T80_FEATURE_HT) {
caaff562
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879 m41t80_get_datetime(client, &tm);
880 dev_info(&client->dev, "HT bit was set!\n");
881 dev_info(&client->dev,
fc99b901 882 "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n",
caaff562
AN
883 tm.tm_year + 1900,
884 tm.tm_mon + 1, tm.tm_mday, tm.tm_hour,
885 tm.tm_min, tm.tm_sec);
886 }
c67fedfa 887 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
fc99b901 888 rc & ~M41T80_ALHOUR_HT);
c67fedfa
WS
889 }
890
891 if (rc < 0) {
892 dev_err(&client->dev, "Can't clear HT bit\n");
85d77047 893 return rc;
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AN
894 }
895
896 /* Make sure ST (stop) bit is cleared */
897 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
caaff562 898
c67fedfa
WS
899 if (rc >= 0 && rc & M41T80_SEC_ST)
900 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
fc99b901 901 rc & ~M41T80_SEC_ST);
c67fedfa
WS
902 if (rc < 0) {
903 dev_err(&client->dev, "Can't clear ST bit\n");
85d77047 904 return rc;
caaff562
AN
905 }
906
ef6b3125
MJ
907 /* Export sysfs entries */
908 rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group);
909 if (rc) {
910 dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc);
c67fedfa 911 return rc;
ef6b3125
MJ
912 }
913
104b2d87
SM
914 rc = devm_add_action_or_reset(&client->dev, m41t80_remove_sysfs_group,
915 &client->dev);
ef6b3125 916 if (rc) {
ef6b3125
MJ
917 dev_err(&client->dev,
918 "Failed to add sysfs cleanup action: %d\n", rc);
919 return rc;
920 }
caaff562 921
617780d2 922#ifdef CONFIG_RTC_DRV_M41T80_WDT
9c6dfed9 923 if (m41t80_data->features & M41T80_FEATURE_HT) {
417607d0 924 save_client = client;
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AN
925 rc = misc_register(&wdt_dev);
926 if (rc)
c67fedfa 927 return rc;
617780d2
AN
928 rc = register_reboot_notifier(&wdt_notifier);
929 if (rc) {
930 misc_deregister(&wdt_dev);
c67fedfa 931 return rc;
617780d2 932 }
617780d2
AN
933 }
934#endif
caaff562 935 return 0;
caaff562
AN
936}
937
938static int m41t80_remove(struct i2c_client *client)
939{
4ebabb78 940#ifdef CONFIG_RTC_DRV_M41T80_WDT
caaff562 941 struct m41t80_data *clientdata = i2c_get_clientdata(client);
caaff562 942
3760f736 943 if (clientdata->features & M41T80_FEATURE_HT) {
617780d2
AN
944 misc_deregister(&wdt_dev);
945 unregister_reboot_notifier(&wdt_notifier);
946 }
947#endif
caaff562
AN
948
949 return 0;
950}
951
952static struct i2c_driver m41t80_driver = {
953 .driver = {
afe1ab4d 954 .name = "rtc-m41t80",
eb235c56 955 .of_match_table = of_match_ptr(m41t80_of_match),
ae036af8 956 .pm = &m41t80_pm,
caaff562
AN
957 },
958 .probe = m41t80_probe,
959 .remove = m41t80_remove,
3760f736 960 .id_table = m41t80_id,
caaff562
AN
961};
962
0abc9201 963module_i2c_driver(m41t80_driver);
caaff562
AN
964
965MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
966MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
967MODULE_LICENSE("GPL");